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| author | Bharat Bhushan <Bharat.Bhushan@freescale.com> | 2013-01-15 22:24:43 (GMT) |
|---|---|---|
| committer | Emil Medve <Emilian.Medve@Freescale.com> | 2013-03-21 18:42:08 (GMT) |
| commit | 5929a6255f648b8eb19ddd816f9c5053f1bcf1d5 (patch) | |
| tree | 0ff37e6206c656aaa678fc04e4de388eeed427a0 | |
| parent | 3dc43a46e59c8490820c73bedc4406ad7eabfe35 (diff) | |
| download | linux-fsl-qoriq-5929a6255f648b8eb19ddd816f9c5053f1bcf1d5.tar.xz | |
booke: Added DBCR4 SPR number
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index e07e6af..b417de3 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -56,6 +56,7 @@ #define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */ #define SPRN_EPCR 0x133 /* Embedded Processor Control Register */ #define SPRN_DBCR2 0x136 /* Debug Control Register 2 */ +#define SPRN_DBCR4 0x233 /* Debug Control Register 4 */ #define SPRN_MSRP 0x137 /* MSR Protect Register */ #define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */ #define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */ |