diff options
author | Scott Wood <scottwood@freescale.com> | 2012-06-09 06:00:37 (GMT) |
---|---|---|
committer | Fleming Andrew-AFLEMING <AFLEMING@freescale.com> | 2013-03-26 22:10:11 (GMT) |
commit | a3fcdacec909a20be8b1e8f07ec0419a0956204a (patch) | |
tree | 70263a275addd33b1140be0568b4be83c4180fa4 | |
parent | 38043080bb90f931efbe56a3f407c18206985f18 (diff) | |
download | linux-fsl-qoriq-a3fcdacec909a20be8b1e8f07ec0419a0956204a.tar.xz |
powerpc/e6500: hw tablewalk: fix corruption when no lock needed
If the low bit is not set, that indicates the need for a TLB miss lock,
the next tlb entry was written to the wrong byte, corrupting pgdir_kernel.
This can happen when there's a TLB miss before threading is started
(e.g. serial port MMIO), or if threading is disabled.
Signed-off-by: Scott Wood <scottwood@freescale.com>
(cherry picked from commit 93b8a91ec5da87e3aa6e7bb78e7618779224254c)
Change-Id: I135f16be6b529a1cdf4e204584d993e186024bf7
Reviewed-on: http://git.am.freescale.net:8181/509
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
-rw-r--r-- | arch/powerpc/mm/tlb_low_64e.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 9e390bf..c3d4bf9 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S @@ -421,8 +421,8 @@ tlb_miss_common_fsl_htw: mfspr r10,SPRN_MAS0 - rldicr r15,r11,0,62 - lwz r15,0(r15) + rldicr r16,r11,0,62 + lwz r15,0(r16) ori r14,r14,(BOOK3E_PAGESZ_4K << MAS3_SPSIZE_SHIFT) mtspr SPRN_MAS7_MAS3,r14 @@ -436,7 +436,7 @@ tlb_miss_common_fsl_htw: cmpw r10,r14 rlwinm r10,r15,24,0xff /* extract first */ iseleq r14,r10,r14 /* if next == last use first */ - stb r14,PACA_TLB_ESEL_NEXT-1(r11) + stb r14,PACA_TLB_ESEL_NEXT(r16) tlbwe |