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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-04-10 19:04:02 (GMT) |
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committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-11 17:29:04 (GMT) |
commit | da8d1b38356853c37116f9afa29f15648d7fb159 (patch) | |
tree | 9f44a78b4e86326d6cc321b9a43c41f9d6fae439 /arch/arm/boot | |
parent | 3d76e1f386f1b41dfbba046e0c85f27f6077414d (diff) | |
download | linux-fsl-qoriq-da8d1b38356853c37116f9afa29f15648d7fb159.tar.xz |
ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
The Armada XP Development Board DB-MV784MP-GP has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/armada-xp-gp.dts | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index 1c8afe2..e57e9c7 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -109,5 +109,34 @@ spi-max-frequency = <108000000>; }; }; + + devbus-bootcs@d0010400 { + status = "okay"; + ranges = <0 0xf0000000 0x1000000>; /* @addr 0xf000000, size 0x1000000 */ + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <8>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + /* NOR 16 MiB */ + nor@0 { + compatible = "cfi-flash"; + reg = <0 0x1000000>; + bank-width = <2>; + }; + }; }; }; |