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authorZhang Zhuoyu <Zhuoyu.Zhang@freescale.com>2014-10-21 07:11:40 (GMT)
committerMatthew Weigel <Matthew.Weigel@freescale.com>2014-12-11 18:38:49 (GMT)
commitdb4f06cb334bbd91a9ba26f79137292b3597aec8 (patch)
treeeb40d07c9debced123462c1749014aafd8e33131 /arch/arm/mach-imx/src.c
parent673581d1ac66bce8d14567b9b539fb956f7e580d (diff)
downloadlinux-fsl-qoriq-db4f06cb334bbd91a9ba26f79137292b3597aec8.tar.xz
ARM:LS1021aQDS: add CPU hotplug platform support
This is only a CPU pseudo-hotplug, and incompatible with kexec mechanics. As per the discussion with Russell King in opensource community, CPU hotplug should reset the secondary core to be compatible with kexec. "In the kexec case, when the secondary CPU wakeup, the code it is executing can already been overwritten, which then means that the CPU ends up executing some random code instead." For LS102x platforms, resetting core can be realized, but come across cache coherence problem which is still unresolved, we will submit another patch to implement CPU hotplug by resetting core once cache coherence issue resloved. Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com> --- Patch Sent Upstream url: https://lkml.org/lkml/2014/9/26/422 Change-Id: I36509f99299f874ef0df891a33c907a749649527 Reviewed-on: http://git.am.freescale.net:8181/21918 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Yang Li <LeoLi@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/src.c')
-rw-r--r--arch/arm/mach-imx/src.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 10a6b1a..e73cbbe 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -30,6 +30,8 @@
#define BP_SRC_SCR_CORE1_RST 14
#define BP_SRC_SCR_CORE1_ENABLE 22
+#define CCSR_TWAITSR0 0x04C
+
static void __iomem *src_base;
static DEFINE_SPINLOCK(scr_lock);
@@ -114,6 +116,25 @@ void imx_set_cpu_arg(int cpu, u32 arg)
writel_relaxed(arg, src_base + SRC_GPR1 + cpu * 8 + 4);
}
+u32 ls1_get_cpu_arg(int cpu)
+{
+ struct device_node *np;
+ void __iomem *ls1_rcpm_base;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,qoriq-rcpm-2.1");
+ if (!np) {
+ pr_err("%s(): Can not find the RCPM node.\n", __func__);
+ return -ENODEV;
+ }
+
+ ls1_rcpm_base = of_iomap(np, 0);
+ of_node_put(np);
+ WARN_ON(!ls1_rcpm_base);
+
+ cpu = cpu_logical_map(cpu);
+ return ioread32be(ls1_rcpm_base + CCSR_TWAITSR0) & (1 << cpu);
+}
+
void imx_src_prepare_restart(void)
{
u32 val;