diff options
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-11-11 08:44:03 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:40:40 (GMT) |
| commit | 191df8fa29e685ce4c3250e6f8ca76599f32f4c3 (patch) | |
| tree | a8d02c4fc62ae5c01039215d1ef60db2c8090e2f /arch/powerpc/configs | |
| parent | 8977be2dd3ff3e7101a531c84acf658a2460e5be (diff) | |
| download | linux-fsl-qoriq-191df8fa29e685ce4c3250e6f8ca76599f32f4c3.tar.xz | |
powerpc/defconfig: Enable CONFIG_MTD_SPI_NOR_BASE
In order to use the SPI nor framework to detect NOR flash.
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
Change-Id: I5f7b42316cefb618278d739c212bd7cbd4833e9c
Reviewed-on: http://git.am.freescale.net:8181/23450
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: Matthew Weigel <Matthew.Weigel@freescale.com>
Diffstat (limited to 'arch/powerpc/configs')
| -rw-r--r-- | arch/powerpc/configs/85xx/bsc913x_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/85xx/bsc913x_smp_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/85xx/e6500rev2_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/corenet32_smp_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/mpc85xx_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/configs/mpc85xx_smp_defconfig | 1 |
6 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/configs/85xx/bsc913x_defconfig b/arch/powerpc/configs/85xx/bsc913x_defconfig index d1aec67..abaf817 100644 --- a/arch/powerpc/configs/85xx/bsc913x_defconfig +++ b/arch/powerpc/configs/85xx/bsc913x_defconfig @@ -81,6 +81,7 @@ CONFIG_MTD_NAND_PLATFORM=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_MTD_NAND_FSL_IFC=y CONFIG_MTD_NAND_FSL_UPM=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_MTD_UBI=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y diff --git a/arch/powerpc/configs/85xx/bsc913x_smp_defconfig b/arch/powerpc/configs/85xx/bsc913x_smp_defconfig index e3032e3..fcfbbc4 100644 --- a/arch/powerpc/configs/85xx/bsc913x_smp_defconfig +++ b/arch/powerpc/configs/85xx/bsc913x_smp_defconfig @@ -83,6 +83,7 @@ CONFIG_MTD_NAND_PLATFORM=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_MTD_NAND_FSL_IFC=y CONFIG_MTD_NAND_FSL_UPM=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_MTD_UBI=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y diff --git a/arch/powerpc/configs/85xx/e6500rev2_defconfig b/arch/powerpc/configs/85xx/e6500rev2_defconfig index 5420895..53f9761 100644 --- a/arch/powerpc/configs/85xx/e6500rev2_defconfig +++ b/arch/powerpc/configs/85xx/e6500rev2_defconfig @@ -82,6 +82,7 @@ CONFIG_MTD_SPI_NOR_BASE=y CONFIG_MTD_M25P80=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 1eee839..47b01412 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig @@ -80,6 +80,7 @@ CONFIG_MTD_M25P80=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index 237eb37..c61ed1e 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -107,6 +107,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_RESERVE=1 diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig index 5356b06..674073c 100644 --- a/arch/powerpc/configs/mpc85xx_smp_defconfig +++ b/arch/powerpc/configs/mpc85xx_smp_defconfig @@ -112,6 +112,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_RESERVE=1 |