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-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-l2switch-0.dtsi93
-rw-r--r--arch/powerpc/boot/dts/fsl/t1040si-post.dtsi46
-rw-r--r--arch/powerpc/boot/dts/t1040rdb.dts18
-rw-r--r--arch/powerpc/boot/dts/t104xqds.dtsi17
-rw-r--r--arch/powerpc/boot/dts/t2080rdb-usdpaa-shared-interfaces.dts148
-rw-r--r--arch/powerpc/boot/dts/t2080rdb-usdpaa.dts119
-rw-r--r--arch/powerpc/boot/dts/t4240rdb-usdpaa-shared-interfaces.dts191
-rw-r--r--arch/powerpc/boot/dts/t4240rdb-usdpaa.dts208
-rw-r--r--arch/powerpc/boot/dts/t4240rdb.dts476
-rw-r--r--arch/powerpc/configs/85xx/e6500rev2_defconfig5
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/include/asm/switch_to.h6
-rw-r--r--arch/powerpc/kernel/process.c32
-rw-r--r--arch/powerpc/kvm/booke.c12
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig2
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c7
-rw-r--r--arch/powerpc/platforms/Kconfig2
18 files changed, 1309 insertions, 75 deletions
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-l2switch-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-l2switch-0.dtsi
new file mode 100644
index 0000000..e15ac3c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-l2switch-0.dtsi
@@ -0,0 +1,93 @@
+/*
+ * T1040 Silicon/SoC L2switch device tree stub [ controller @ offset 0x800000 ]
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+l2switch: l2switch@800000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "vitesse-9953";
+ clock-frequency = <0>;
+
+ reg = <0x800000 0x290000>;
+
+ port@100000 {
+ compatible = "vitesse-9953-port";
+ port-index = <0>;
+ };
+
+ port@110000 {
+ compatible = "vitesse-9953-port";
+ port-index = <1>;
+ };
+
+ port@120000 {
+ compatible = "vitesse-9953-port";
+ port-index = <2>;
+ };
+
+ port@130000 {
+ compatible = "vitesse-9953-port";
+ port-index = <3>;
+ };
+
+ port@140000 {
+ compatible = "vitesse-9953-port";
+ port-index = <4>;
+ };
+
+ port@150000 {
+ compatible = "vitesse-9953-port";
+ port-index = <5>;
+ };
+
+ port@160000 {
+ compatible = "vitesse-9953-port";
+ port-index = <6>;
+ };
+
+ port@170000 {
+ compatible = "vitesse-9953-port";
+ port-index = <7>;
+ };
+
+ port@180000 {
+ compatible = "vitesse-9953-port";
+ port-index = <8>;
+ };
+
+ port@190000 {
+ compatible = "vitesse-9953-port";
+ port-index = <9>;
+ };
+ };
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 696e30b..f48d5c2 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -638,6 +638,7 @@ sata@221000 {
status = "disabled";
};
};
+/include/ "qoriq-l2switch-0.dtsi"
l2switch@800000 {
interrupts = <26 2 0 0>;
@@ -757,48 +758,3 @@ sata@221000 {
};
};
};
-
-&qe {
- #address-cells = <1>;
- #size-cells = <1>;
- device_type = "qe";
- compatible = "fsl,qe";
- fsl,qe-num-riscs = <1>;
- fsl,qe-num-snums = <28>;
-
- qeic: interrupt-controller@80 {
- interrupt-controller;
- compatible = "fsl,qe-ic";
- #address-cells = <0>;
- #interrupt-cells = <1>;
- reg = <0x80 0x80>;
- interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
- };
-
- ucc@2000 {
- cell-index = <1>;
- reg = <0x2000 0x200>;
- interrupts = <32>;
- interrupt-parent = <&qeic>;
- };
-
- ucc@2200 {
- cell-index = <3>;
- reg = <0x2200 0x200>;
- interrupts = <34>;
- interrupt-parent = <&qeic>;
- };
-
- muram@10000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0x0 0x10000 0x6000>;
-
- data-only@0 {
- compatible = "fsl,qe-muram-data",
- "fsl,cpm-muram-data";
- reg = <0x0 0x6000>;
- };
- };
-};
diff --git a/arch/powerpc/boot/dts/t1040rdb.dts b/arch/powerpc/boot/dts/t1040rdb.dts
index dcb5a93..d1caf30 100644
--- a/arch/powerpc/boot/dts/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/t1040rdb.dts
@@ -304,6 +304,14 @@
};
};
+ /* bp dts definition is borrowed from other USDPAA dts */
+ bp6: buffer-pool@6 {
+ compatible = "fsl,t1040-bpool", "fsl,bpool";
+ fsl,bpid = <6>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
fsl,dpaa {
compatible = "fsl,t1040-dpaa", "fsl,dpaa";
ethernet@0 {
@@ -331,6 +339,16 @@
fsl,fman-mac = <&enet4>;
sleep = <&rcpm 0x08000008>;
};
+ /* enable one offline port */
+ dpa-fman0-oh@5 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,bman-buffer-pools = <&bp6>;
+ fsl,qman-frame-queues-tx = <0x90 8>;
+ fsl,fman-oh-port = <&fman0_oh5>;
+ };
};
qe: qe@ffe139999 {
diff --git a/arch/powerpc/boot/dts/t104xqds.dtsi b/arch/powerpc/boot/dts/t104xqds.dtsi
index 079a4cd..ba4de7f 100644
--- a/arch/powerpc/boot/dts/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/t104xqds.dtsi
@@ -329,6 +329,13 @@
};
};
};
+ /* bp dts definition is borrowed from other USDPAA dts */
+ bp6: buffer-pool@6 {
+ compatible = "fsl,t1040-bpool", "fsl,bpool";
+ fsl,bpid = <6>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
fsl,dpaa {
compatible = "fsl,t1040-dpaa", "fsl,dpaa";
@@ -357,6 +364,16 @@
fsl,fman-mac = <&enet4>;
sleep = <&rcpm 0x08000008>;
};
+ /* Enable one offline port as default to support HW based LAG */
+ dpa-fman0-oh@5 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,bman-buffer-pools = <&bp6>;
+ fsl,qman-frame-queues-tx = <0x90 8>;
+ fsl,fman-oh-port = <&fman0_oh5>;
+ };
};
pci0: pcie@ffe240000 {
diff --git a/arch/powerpc/boot/dts/t2080rdb-usdpaa-shared-interfaces.dts b/arch/powerpc/boot/dts/t2080rdb-usdpaa-shared-interfaces.dts
new file mode 100644
index 0000000..babce4d
--- /dev/null
+++ b/arch/powerpc/boot/dts/t2080rdb-usdpaa-shared-interfaces.dts
@@ -0,0 +1,148 @@
+/*
+ * T2080RDB USDPAA Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t2080rdb.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ bp10: buffer-pool@10 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <10>;
+ fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>;
+ };
+ bp11: buffer-pool@11 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <11>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp12: buffer-pool@12 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <12>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp16: buffer-pool@16 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <16>;
+ fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp17: buffer-pool@17 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <17>;
+ fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ ethernet@0 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x90 1 0x91 1>;
+ fsl,qman-frame-queues-tx = <0x98 1 0x99 1>;
+ };
+ /* ethernet@1 declared as shared MAC. USDPAA will seed buffers to
+ * this buffer pool. The ethernet driver will initialize the RX default,
+ * RX error, TX error, TX confirm and 8 TX Frame queues. On receiving frame
+ * at this interface, the ethernet driver will do kmap_atomic/kunmap_atomic
+ * for that frame. */
+ ethernet@1 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-shared", "fsl,dpa-ethernet-shared";
+ fsl,bman-buffer-pools = <&bp17>;
+ fsl,qman-frame-queues-rx = <0x92 1 0x93 1 0x2000 3>;
+ fsl,qman-frame-queues-tx = <0 1 0 1 0x3000 8>;
+ };
+ ethernet@2 {/* 1G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {/* 1G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ ethernet@8 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
+ fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
+ };
+ ethernet@9 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
+ fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
+ };
+ /* ethernet@10 declared as MAC-less interface with no "fsl,fman-mac" property.
+ * USDPAA will seed buffers to this buffer pool and initialize 8 TX Frame
+ * queues. The ethernet driver will initialize 8 RX default Frame queues.
+ * On receiving frame at this interface, the ethernet driver will do
+ * kmap_atomic/kunmap_atomic for that frame. */
+ ethernet@10 {
+ compatible = "fsl,t2080-dpa-ethernet-macless", "fsl,dpa-ethernet-macless";
+ fsl,bman-buffer-pools = <&bp16>;
+ fsl,qman-frame-queues-rx = <4000 8>;
+ fsl,qman-frame-queues-tx = <4008 8>;
+ local-mac-address = [00 11 22 33 44 55];
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t2080rdb-usdpaa.dts b/arch/powerpc/boot/dts/t2080rdb-usdpaa.dts
new file mode 100644
index 0000000..c4dac2d
--- /dev/null
+++ b/arch/powerpc/boot/dts/t2080rdb-usdpaa.dts
@@ -0,0 +1,119 @@
+/*
+ * T2080RDB USDPAA Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t2080rdb.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ bp10: buffer-pool@10 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <10>;
+ fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>;
+ };
+ bp11: buffer-pool@11 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <11>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp12: buffer-pool@12 {
+ compatible = "fsl,t2080-bpool", "fsl,bpool";
+ fsl,bpid = <12>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ ethernet@0 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x90 1 0x91 1>;
+ fsl,qman-frame-queues-tx = <0x98 1 0x99 1>;
+ };
+ ethernet@1 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x92 1 0x93 1>;
+ fsl,qman-frame-queues-tx = <0x9a 1 0x9b 1>;
+ };
+ ethernet@2 {/* 1G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {/* 1G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ ethernet@8 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
+ fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
+ };
+ ethernet@9 {/* 10G */
+ compatible = "fsl,t2080-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
+ fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t4240rdb-usdpaa-shared-interfaces.dts b/arch/powerpc/boot/dts/t4240rdb-usdpaa-shared-interfaces.dts
new file mode 100644
index 0000000..689db9c
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240rdb-usdpaa-shared-interfaces.dts
@@ -0,0 +1,191 @@
+/*
+ * T4240RDB USDPAA Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t4240rdb.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ bp10: buffer-pool@10 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <10>;
+ fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>;
+ };
+ bp11: buffer-pool@11 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <11>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp12: buffer-pool@12 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <12>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp16: buffer-pool@16 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <16>;
+ fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp17: buffer-pool@17 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <17>;
+ fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ ethernet@0 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
+ fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
+ fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ ethernet@6 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
+ fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
+ };
+ ethernet@7 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
+ fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
+ };
+ ethernet@8 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
+ fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
+ };
+ ethernet@9 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x62 1 0x63 1>;
+ fsl,qman-frame-queues-tx = <0x82 1 0x83 1>;
+ };
+ ethernet@10 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x64 1 0x65 1>;
+ fsl,qman-frame-queues-tx = <0x84 1 0x85 1>;
+ };
+ ethernet@11 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x66 1 0x67 1>;
+ fsl,qman-frame-queues-tx = <0x86 1 0x87 1>;
+ };
+ ethernet@14 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x6c 1 0x6d 1>;
+ fsl,qman-frame-queues-tx = <0x8c 1 0x8d 1>;
+ };
+ /* ethernet@15 declared as shared MAC. USDPAA will seed buffers to
+ * this buffer pool. The ethernet driver will initialize the RX default,
+ * RX error, TX error, TX confirm and 8 TX Frame queues. On receiving frame
+ * at this interface, the ethernet driver will do kmap_atomic/kunmap_atomic
+ * for that frame. */
+ ethernet@15 {
+ compatible = "fsl,t4240-dpa-ethernet-shared", "fsl,dpa-ethernet-shared";
+ fsl,bman-buffer-pools = <&bp17>;
+ fsl,qman-frame-queues-rx = <0x6e 1 0x6f 1 0x2000 3>;
+ fsl,qman-frame-queues-tx = <0 1 0 1 0x3000 8>;
+ };
+ /* ethernet@16 declared as MAC-less interface with no "fsl,fman-mac" property.
+ * USDPAA will seed buffers to this buffer pool and initialize 8 TX Frame
+ * queues. The ethernet driver will initialize 8 RX default Frame queues.
+ * On receiving frame at this interface, the ethernet driver will do
+ * kmap_atomic/kunmap_atomic for that frame. */
+ ethernet@16 {
+ compatible = "fsl,t4240-dpa-ethernet-macless", "fsl,dpa-ethernet-macless";
+ fsl,bman-buffer-pools = <&bp16>;
+ fsl,qman-frame-queues-rx = <4000 8>;
+ fsl,qman-frame-queues-tx = <4008 8>;
+ local-mac-address = [00 11 22 33 44 55];
+ };
+ dpa-fman0-oh@2 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x90 1 0x91 1>;
+ fsl,fman-oh-port = <&fman0_oh2>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t4240rdb-usdpaa.dts b/arch/powerpc/boot/dts/t4240rdb-usdpaa.dts
new file mode 100644
index 0000000..a9e30eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240rdb-usdpaa.dts
@@ -0,0 +1,208 @@
+/*
+ * T4240RDB USDPAA Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t4240rdb.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ bp10: buffer-pool@10 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <10>;
+ fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>;
+ };
+ bp11: buffer-pool@11 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <11>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp12: buffer-pool@12 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool";
+ fsl,bpid = <12>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp13: buffer-pool@13 {
+ compatible = "fsl,t4240-bpool", "fsl,bpool", "fsl,bpool-ethernet-seeds";
+ fsl,bpid = <13>;
+ fsl,bpool-ethernet-cfg = <0 2048 0 1728 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ chosen {
+ dpaa-extended-args {
+ fman0-extd-args {
+ cell-index = <0x0>;
+ compatible = "fsl,fman-extended-args";
+ dma-aid-mode = "port";
+ fman0_oh3-extd-args {
+ cell-index = <0x2>;
+ compatible = "fsl,fman-port-op-extended-args";
+ vsp-window = <0x8 0x0>;
+ };
+ fman0_oh4-extd-args {
+ cell-index = <0x3>;
+ compatible = "fsl,fman-port-op-extended-args";
+ vsp-window = <0x8 0x0>;
+ };
+ };
+ };
+ };
+
+ fsl,dpaa {
+ ethernet@0 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
+ fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
+ fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ ethernet@6 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>;
+ fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>;
+ };
+ ethernet@7 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>;
+ fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>;
+ };
+ ethernet@8 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x60 1 0x61 1>;
+ fsl,qman-frame-queues-tx = <0x80 1 0x81 1>;
+ };
+ ethernet@9 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x62 1 0x63 1>;
+ fsl,qman-frame-queues-tx = <0x82 1 0x83 1>;
+ };
+ ethernet@10 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x64 1 0x65 1>;
+ fsl,qman-frame-queues-tx = <0x84 1 0x85 1>;
+ };
+ ethernet@11 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x66 1 0x67 1>;
+ fsl,qman-frame-queues-tx = <0x86 1 0x87 1>;
+ };
+ ethernet@14 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x6c 1 0x6d 1>;
+ fsl,qman-frame-queues-tx = <0x8c 1 0x8d 1>;
+ };
+ ethernet@15 {
+ compatible = "fsl,t4240-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x6e 1 0x6f 1>;
+ fsl,qman-frame-queues-tx = <0x8e 1 0x8f 1>;
+ };
+ ethernet@16 {
+ compatible = "fsl,t4240-dpa-ethernet-generic", "fsl,dpa-ethernet-generic";
+ fsl,qman-frame-queues-tx = <0x92 1>;
+ fsl,oh-ports = <&oh3 &oh4>;
+ local-mac-address = [00 11 22 33 44 66];
+ };
+
+ dpa-fman0-oh@2 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x90 1 0x91 1>;
+ fsl,fman-oh-port = <&fman0_oh2>;
+ };
+ oh3: dpa-fman0-oh@3 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp13>;
+ fsl,qman-frame-queues-oh = <0x96 1 0x97 1>;
+ fsl,fman-oh-port = <&fman0_oh3>;
+ };
+ oh4: dpa-fman0-oh@4 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-oh = <0x94 1 0x95 1>;
+ fsl,fman-oh-port = <&fman0_oh4>;
+ };
+
+ };
+};
diff --git a/arch/powerpc/boot/dts/t4240rdb.dts b/arch/powerpc/boot/dts/t4240rdb.dts
new file mode 100644
index 0000000..934b96a
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240rdb.dts
@@ -0,0 +1,476 @@
+/*
+ * T4240RDB Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/t4240si-pre.dtsi"
+
+/ {
+ model = "fsl,T4240RDB";
+ compatible = "fsl,T4240RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ sgmii_phy21 = &sgmiiphy21;
+ sgmii_phy22 = &sgmiiphy22;
+ sgmii_phy23 = &sgmiiphy23;
+ sgmii_phy24 = &sgmiiphy24;
+ sgmii_phy41 = &sgmiiphy41;
+ sgmii_phy42 = &sgmiiphy42;
+ sgmii_phy43 = &sgmiiphy43;
+ sgmii_phy44 = &sgmiiphy44;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet14;
+ ethernet5 = &enet15;
+ ethernet6 = &enet6;
+ ethernet7 = &enet7;
+ ethernet8 = &enet8;
+ ethernet9 = &enet9;
+ ethernet10 = &enet10;
+ ethernet11 = &enet11;
+ ethernet12 = &enet12;
+ ethernet13 = &enet13;
+ ethernet14 = &enet4;
+ ethernet15 = &enet5;
+ };
+
+ ifc: localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x08000000
+ 2 0 0xf 0xff800000 0x00010000
+ 3 0 0xf 0xffdf0000 0x00008000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x2 0x0 0x10000>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr@f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
+ };
+
+ bportals: bman-portals@ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals@ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ lportals: lac-portals@ff8000000 {
+ ranges = <0x0 0xf 0xf8000000 0x20000>;
+ };
+
+ soc: soc@ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ spi@110000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25wf040";
+ reg = <0>;
+ spi-max-frequency = <40000000>; /* input clock */
+ };
+ };
+
+ i2c@118000 {
+ eeprom@52 {
+ compatible = "at24,24c256";
+ reg = <0x52>;
+ };
+ eeprom@54 {
+ compatible = "at24,24c256";
+ reg = <0x54>;
+ };
+ eeprom@56 {
+ compatible = "at24,24c256";
+ reg = <0x56>;
+ };
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ interrupts = <0x1 0x1 0 0>;
+ };
+ monitor@2f {
+ compatible = "w83793";
+ reg = <0x2f>;
+ };
+ };
+
+ fman0: fman@400000 {
+ enet0: ethernet@e0000 {
+ phy-handle = <&sgmiiphy21>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet1: ethernet@e2000 {
+ phy-handle = <&sgmiiphy22>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@e4000 {
+ phy-handle = <&sgmiiphy23>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet3: ethernet@e6000 {
+ phy-handle = <&sgmiiphy24>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet4: ethernet@e8000 {
+ status = "disabled";
+ };
+
+ enet5: ethernet@ea000 {
+ status = "disabled";
+ };
+
+ enet6: ethernet@f0000 { /* FM1@TSEC9/FM1@TGEC1 */
+ phy-handle = <&xfiphy1>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet7: ethernet@f2000 { /* FM1@TSEC10/FM1@TGEC2 */
+ phy-handle = <&xfiphy2>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio@fc000 {
+ status = "disabled";
+ };
+
+ mdio@fd000 {
+ status = "disabled";
+ };
+
+ fman0_oh2 {
+ status = "disabled";
+ };
+ fman0_oh3 {
+ status = "disabled";
+ };
+ fman0_oh4 {
+ status = "disabled";
+ };
+ fman0_oh5 {
+ status = "disabled";
+ };
+ fman0_oh6 {
+ status = "disabled";
+ };
+ };
+
+ fman1: fman@500000 {
+ enet8: ethernet@e0000 {
+ phy-handle = <&sgmiiphy41>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet9: ethernet@e2000 {
+ phy-handle = <&sgmiiphy42>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet10: ethernet@e4000 {
+ phy-handle = <&sgmiiphy43>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet11: ethernet@e6000 {
+ phy-handle = <&sgmiiphy44>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet12: ethernet@e8000 {
+ status = "disabled";
+ };
+
+ enet13: ethernet@ea000 {
+ status = "disabled";
+ };
+
+ enet14: ethernet@f0000 { /* FM2@TSEC9/FM2@TGEC1 */
+ phy-handle = <&xfiphy3>;
+ phy-connection-type = "xgmii";
+ };
+
+ enet15: ethernet@f2000 { /* FM2@TSEC10/FM2@TGEC2 */
+ phy-handle = <&xfiphy4>;
+ phy-connection-type = "xgmii";
+ };
+
+ mdio0: mdio@fc000 {
+ sgmiiphy21: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+
+ sgmiiphy22: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+
+ sgmiiphy23: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ sgmiiphy24: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+
+ sgmiiphy41: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+
+ sgmiiphy42: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+
+ sgmiiphy43: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+
+ sgmiiphy44: ethernet-phy@7 {
+ reg = <0x7>;
+ };
+ };
+
+ xmdio0: mdio@fd000 {
+ xfiphy1: ethernet-phy@10 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x10>;
+ };
+
+ xfiphy2: ethernet-phy@11 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x11>;
+ };
+
+ xfiphy3: ethernet-phy@13 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x13>;
+ };
+
+ xfiphy4: ethernet-phy@12 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x12>;
+ };
+ };
+
+ fman1_oh3 {
+ status = "disabled";
+ };
+ fman1_oh4 {
+ status = "disabled";
+ };
+ fman1_oh5 {
+ status = "disabled";
+ };
+ fman1_oh6 {
+ status = "disabled";
+ };
+ };
+
+ sdhc@114000 {
+ voltage-ranges = <1800 1800 3300 3300>;
+ };
+ };
+
+ pci0: pcie@ffe240000 {
+ reg = <0xf 0xfe240000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie@ffe250000 {
+ reg = <0xf 0xfe250000 0 0x10000>;
+ ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci2: pcie@ffe260000 {
+ reg = <0xf 0xfe260000 0 0x1000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci3: pcie@ffe270000 {
+ reg = <0xf 0xfe270000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+ rio: rapidio@ffe0c0000 {
+ reg = <0xf 0xfe0c0000 0 0x11000>;
+
+ port1 {
+ ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+ };
+ port2 {
+ ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+ };
+ };
+
+ fsl,dpaa {
+ compatible = "fsl,t4240-dpaa", "fsl,dpaa";
+ ethernet@0 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
+ status = "disabled";
+ };
+ ethernet@5 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
+ status = "disabled";
+ };
+ ethernet@6 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet6>;
+ };
+ ethernet@7 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
+ };
+ ethernet@8 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet8>;
+ };
+ ethernet@9 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet9>;
+ };
+ ethernet@10 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet10>;
+ };
+ ethernet@11 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet11>;
+ };
+ ethernet@12 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet12>;
+ status = "disabled";
+ };
+ ethernet@13 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet13>;
+ status = "disabled";
+ };
+ ethernet@14 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet14>;
+ };
+ ethernet@15 {
+ compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet15>;
+ };
+ };
+};
+
+/include/ "fsl/t4240si-post.dtsi"
+/include/ "fsl/qoriq-dpaa-res3.dtsi"
+/include/ "fsl/qoriq-qman-ceetm0.dtsi"
+/include/ "fsl/qoriq-qman-ceetm1.dtsi"
diff --git a/arch/powerpc/configs/85xx/e6500rev2_defconfig b/arch/powerpc/configs/85xx/e6500rev2_defconfig
index 9bdce3e..f7a855b 100644
--- a/arch/powerpc/configs/85xx/e6500rev2_defconfig
+++ b/arch/powerpc/configs/85xx/e6500rev2_defconfig
@@ -106,6 +106,7 @@ CONFIG_FMAN_T4240=y
CONFIG_FSL_DPAA_ETH=y
CONFIG_E1000E=y
CONFIG_FSL_10GBASE_KR=y
+CONFIG_VITESSE_PHY=y
CONFIG_FIXED_PHY=y
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
@@ -125,7 +126,8 @@ CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_FSL_SPI=y
CONFIG_SPI_FSL_ESPI=y
-# CONFIG_HWMON is not set
+CONFIG_HWMON=y
+CONFIG_SENSORS_W83793=y
CONFIG_VIDEO_OUTPUT_CONTROL=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
@@ -139,6 +141,7 @@ CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=y
CONFIG_EDAC_MPC85XX=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1374=y
CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_CMOS=y
CONFIG_DMADEVICES=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 7c8904d..7e4a6dd 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -264,6 +264,7 @@ CONFIG_LZO_DECOMPRESS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_INFO=y
CONFIG_CRYPTO_PCBC=m
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 0396c23..7eb8788 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -276,6 +276,7 @@ CONFIG_LZO_DECOMPRESS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_INFO=y
CONFIG_CRYPTO_PCBC=m
diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index a18b4ab..aace905 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -35,11 +35,7 @@ extern void giveup_vsx(struct task_struct *);
extern void enable_kernel_spe(void);
extern void giveup_spe(struct task_struct *);
extern void load_up_spe(struct task_struct *);
-extern void switch_booke_debug_regs(struct thread_struct *new_thread);
-
-#ifdef CONFIG_PPC_ADV_DEBUG_REGS
-extern void switch_booke_debug_regs(struct thread_struct *new_thread);
-#endif
+extern void switch_booke_debug_regs(struct debug_reg *new_debug);
#ifndef CONFIG_SMP
extern void discard_lazy_cpu_state(void);
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 5b2490a..815b540 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -339,7 +339,7 @@ static void set_debug_reg_defaults(struct thread_struct *thread)
#endif
}
-static void prime_debug_regs(struct thread_struct *thread)
+static void prime_debug_regs(struct debug_reg *debug)
{
/*
* We could have inherited MSR_DE from userspace, since
@@ -348,22 +348,22 @@ static void prime_debug_regs(struct thread_struct *thread)
*/
mtmsr(mfmsr() & ~MSR_DE);
- mtspr(SPRN_IAC1, thread->debug.iac1);
- mtspr(SPRN_IAC2, thread->debug.iac2);
+ mtspr(SPRN_IAC1, debug->iac1);
+ mtspr(SPRN_IAC2, debug->iac2);
#if CONFIG_PPC_ADV_DEBUG_IACS > 2
- mtspr(SPRN_IAC3, thread->debug.iac3);
- mtspr(SPRN_IAC4, thread->debug.iac4);
+ mtspr(SPRN_IAC3, debug->iac3);
+ mtspr(SPRN_IAC4, debug->iac4);
#endif
- mtspr(SPRN_DAC1, thread->debug.dac1);
- mtspr(SPRN_DAC2, thread->debug.dac2);
+ mtspr(SPRN_DAC1, debug->dac1);
+ mtspr(SPRN_DAC2, debug->dac2);
#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
- mtspr(SPRN_DVC1, thread->debug.dvc1);
- mtspr(SPRN_DVC2, thread->debug.dvc2);
+ mtspr(SPRN_DVC1, debug->dvc1);
+ mtspr(SPRN_DVC2, debug->dvc2);
#endif
- mtspr(SPRN_DBCR0, thread->debug.dbcr0);
- mtspr(SPRN_DBCR1, thread->debug.dbcr1);
+ mtspr(SPRN_DBCR0, debug->dbcr0);
+ mtspr(SPRN_DBCR1, debug->dbcr1);
#ifdef CONFIG_BOOKE
- mtspr(SPRN_DBCR2, thread->debug.dbcr2);
+ mtspr(SPRN_DBCR2, debug->dbcr2);
#endif
}
/*
@@ -371,11 +371,11 @@ static void prime_debug_regs(struct thread_struct *thread)
* debug registers, set the debug registers from the values
* stored in the new thread.
*/
-void switch_booke_debug_regs(struct thread_struct *new_thread)
+void switch_booke_debug_regs(struct debug_reg *new_debug)
{
if ((current->thread.debug.dbcr0 & DBCR0_IDM)
- || (new_thread->debug.dbcr0 & DBCR0_IDM))
- prime_debug_regs(new_thread);
+ || (new_debug->dbcr0 & DBCR0_IDM))
+ prime_debug_regs(new_debug);
}
EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
@@ -682,7 +682,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
#endif /* CONFIG_SMP */
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
- switch_booke_debug_regs(&new->thread);
+ switch_booke_debug_regs(&new->thread.debug);
#else
/*
* For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index d95438e..12c6706 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -679,7 +679,7 @@ int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
{
int ret, s;
- struct thread_struct thread;
+ struct debug_reg debug;
#ifdef CONFIG_PPC_FPU
struct thread_fp_state fp;
int fpexc_mode;
@@ -745,9 +745,9 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
#endif
/* Switch to guest debug context */
- thread.debug = vcpu->arch.shadow_dbg_reg;
- switch_booke_debug_regs(&thread);
- thread.debug = current->thread.debug;
+ debug = vcpu->arch.shadow_dbg_reg;
+ switch_booke_debug_regs(&debug);
+ debug = current->thread.debug;
current->thread.debug = vcpu->arch.shadow_dbg_reg;
kvmppc_fix_ee_before_entry();
@@ -758,8 +758,8 @@ int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
We also get here with interrupts enabled. */
/* Switch back to user space debug context */
- switch_booke_debug_regs(&thread);
- current->thread.debug = thread.debug;
+ switch_booke_debug_regs(&debug);
+ current->thread.debug = debug;
#ifdef CONFIG_PPC_FPU
kvmppc_save_guest_fp(vcpu);
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index ae08633..ae9fdb51 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -284,7 +284,7 @@ config CORENET_GENERIC
For 32bit kernel, the following boards are supported:
P2041 RDB, P3041 DS and P4080 DS
For 64bit kernel, the following boards are supported:
- T208x QDS and RDB, T4240 QDS and B4 QDS
+ T208x QDS and RDB, T4240 QDS, T4240 RDB and B4 QDS
The following boards are supported for both 32bit and 64bit kernel:
P5020 DS, P5040 DS, T104xQDS, T104xRDB
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 7026526..45a61bb 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -42,7 +42,9 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
+#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
+#endif
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
@@ -52,12 +54,14 @@ void __init corenet_gen_pic_init(void)
mpic_init(mpic);
+#ifdef CONFIG_QUICC_ENGINE
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (np) {
qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
qe_ic_cascade_high_mpic);
of_node_put(np);
}
+#endif
}
/*
@@ -108,9 +112,11 @@ static const struct of_device_id of_device_ids[] = {
{
.compatible = "fsl,qoriq-pcie-v3.0",
},
+#ifdef CONFIG_QUICC_ENGINE
{
.compatible = "fsl,qe",
},
+#endif
/* The following two are for the Freescale hypervisor */
{
.name = "hypervisor",
@@ -141,6 +147,7 @@ static const char * const boards[] __initconst = {
"fsl,T2081QDS",
"fsl,T2080RDB",
"fsl,T4240QDS",
+ "fsl,T4240RDB",
"fsl,B4860QDS",
"fsl,B4420QDS",
"fsl,B4220QDS",
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index bf9c6d4..be181b6 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -280,7 +280,7 @@ config TAU_AVERAGE
config QUICC_ENGINE
bool "Freescale QUICC Engine (QE) Support"
- depends on FSL_SOC && PPC32
+ depends on FSL_SOC && (PPC32 || PPC64)
select PPC_LIB_RHEAP
select CRC32
help
generated by cgit v0.10.2 at 2024-09-29 21:33:39 (GMT)