Age | Commit message (Collapse) | Author |
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Set dmap ops for xhci dev same as dwc3 dev
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
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Add support for USB3 snooping by asserting bits
in register DWC3_GSBUSCFG0 for data and descriptor
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
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requests.
This is required for better performance
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
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Based on FM_PCD_KgSchemeGetCounter() function which is already
exposed by the API
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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This attribute should have been added also to the compat layer
while it was implemented in the general layer
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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~R01356/linux-devel:bugfix/QUSDPA-704-segfault-in-dma_mem-allocator.c to master
* commit 'e98f36e86bdfbeb1728ab0de4f2be367d6283963':
fsl_usdpaa: Remove TLB entries when unmapping memory
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~B06830/linux-devel:bugfix/QSDK-2404-cryptodev-linux-sha1-offloading to master
* commit '8700bab2995ecc511d8db729e412a056be81e6b5':
crypto: caam - Change kmalloc to kzalloc to avoid residual data
crypto: caam - fix memory corruption in ahash_final_ctx
crypto: caam - Fix incorrect size when DMA unmapping buffer
crypto: caam - improve initalization for context state saves
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~B29983/linux-devel-tyt:QSDK-2438-there-is-some-improper-information to master
* commit '418316ce8769300438fc076e04d5ac5e6d7f870d':
cpufreq: qoriq: fix output information error
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to master
* commit '300c3ff86988bc13e310b58d9c7c786528697150':
fsl-qbman: Handle memory leaks
fsl-pme: Check for null pointers
fsl-dce: Handle memory allocation failures
fsl-dce: Correct error paths and add new labels
fsl_qbman: null check for lni in qman_ceemt_sp_release
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Exporting functions to be used by CEETM for tcp termination handling.
TCP packets may come with GSO options.
Signed-off-by: Sahil Malhotra <sahilmalhotra@freescale.com>
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TLB1 entries must be removed when unmapping a DMA map from a
process so they don't point to the wrong physical memory if
a new map reuses the same virtual address
Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com>
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Since fields must be ORed in to operate correctly using any order of
operations, changed allocations of the combination of extended
descriptor structs + hardware scatterlists to use kzalloc() instead
of kmalloc(), so as to ensure that residue data would not be ORed in
with the correct data.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit dde20ae9d63835178ef4ba9655f530e052c08ab9)
Conflicts:
drivers/crypto/caam/caamalg.c
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When doing pointer operation for accessing the HW S/G table,
a value representing number of entries (and not number of bytes)
must be used.
Cc: <stable@vger.kernel.org> # 3.6+
Fixes: 045e36780f115 ("crypto: caam - ahash hmac support")
Signed-off-by: Horia Geant? <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit b310c178e6d897f82abb9da3af1cd7c02b09f592)
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The CAAM driver uses two data buffers to store data for a hashing operation,
with one buffer defined as active. This change forces switching of the
active buffer when executing a hashing operation to avoid a later DMA unmap
using the length of the opposite buffer.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 8af7b0f809a3d34657433ec545d64dff9808ce34)
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Multiple function in asynchronous hashing use a saved-state block,
a.k.a. struct caam_hash_state, which holds a stash of information
between requests (init/update/final). Certain values in this state
block are loaded for processing using an inline-if, and when this
is done, the potential for uninitialized data can pose conflicts.
Therefore, this patch improves initialization of state data to
prevent false assignments using uninitialized data in the state block.
This patch addresses the following traceback, originating in
ahash_final_ctx(), although a problem like this could certainly
exhibit other symptoms:
kernel BUG at arch/arm/mm/dma-mapping.c:465!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 80004000
[00000000] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 Not tainted (3.0.15-01752-gdd441b9-dirty #40)
PC is at __bug+0x1c/0x28
LR is at __bug+0x18/0x28
pc : [<80043240>] lr : [<8004323c>] psr: 60000013
sp : e423fd98 ip : 60000013 fp : 0000001c
r10: e4191b84 r9 : 00000020 r8 : 00000009
r7 : 88005038 r6 : 00000001 r5 : 2d676572 r4 : e4191a60
r3 : 00000000 r2 : 00000001 r1 : 60000093 r0 : 00000033
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 1000404a DAC: 00000015
Process cryptomgr_test (pid: 1306, stack limit = 0xe423e2f0)
Stack: (0xe423fd98 to 0xe4240000)
fd80: 11807fd1 80048544
fda0: 88005000 e4191a00 e5178040 8039dda0 00000000 00000014 2d676572 e4191008
fdc0: 88005018 e4191a60 00100100 e4191a00 00000000 8039ce0c e423fea8 00000007
fde0: e4191a00 e4227000 e5178000 8039ce18 e419183c 80203808 80a94a44 00000006
fe00: 00000000 80207180 00000000 00000006 e423ff08 00000000 00000007 e5178000
fe20: e41918a4 80a949b4 8c4844e2 00000000 00000049 74227000 8c4844e2 00000e90
fe40: 0000000e 74227e90 ffff8c58 80ac29e0 e423fed4 8006a350 8c81625c e423ff5c
fe60: 00008576 e4002500 00000003 00030010 e4002500 00000003 e5180000 e4002500
fe80: e5178000 800e6d24 007fffff 00000000 00000010 e4001280 e4002500 60000013
fea0: 000000d0 804df078 00000000 00000000 00000000 00000000 00000000 00000000
fec0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
fee0: 00000000 00000000 e4227000 e4226000 e4753000 e4752000 e40a5000 e40a4000
ff00: e41e7000 e41e6000 00000000 00000000 00000000 e423ff14 e423ff14 00000000
ff20: 00000400 804f9080 e5178000 e4db0b40 00000000 e4db0b80 0000047c 00000400
ff40: 00000000 8020758c 00000400 ffffffff 0000008a 00000000 e4db0b40 80206e00
ff60: e4049dbc 00000000 00000000 00000003 e423ffa4 80062978 e41a8bfc 00000000
ff80: 00000000 e4049db4 00000013 e4049db0 00000013 00000000 00000000 00000000
ffa0: e4db0b40 e4db0b40 80204cbc 00000013 00000000 00000000 00000000 80204cfc
ffc0: e4049da0 80089544 80040a40 00000000 e4db0b40 00000000 00000000 00000000
ffe0: e423ffe0 e423ffe0 e4049da0 800894c4 80040a40 80040a40 00000000 00000000
[<80043240>] (__bug+0x1c/0x28) from [<80048544>] (___dma_single_dev_to_cpu+0x84)
[<80048544>] (___dma_single_dev_to_cpu+0x84/0x94) from [<8039dda0>] (ahash_fina)
[<8039dda0>] (ahash_final_ctx+0x180/0x428) from [<8039ce18>] (ahash_final+0xc/0)
[<8039ce18>] (ahash_final+0xc/0x10) from [<80203808>] (crypto_ahash_op+0x28/0xc)
[<80203808>] (crypto_ahash_op+0x28/0xc0) from [<80207180>] (test_hash+0x214/0x5)
[<80207180>] (test_hash+0x214/0x5b8) from [<8020758c>] (alg_test_hash+0x68/0x8c)
[<8020758c>] (alg_test_hash+0x68/0x8c) from [<80206e00>] (alg_test+0x7c/0x1b8)
[<80206e00>] (alg_test+0x7c/0x1b8) from [<80204cfc>] (cryptomgr_test+0x40/0x48)
[<80204cfc>] (cryptomgr_test+0x40/0x48) from [<80089544>] (kthread+0x80/0x88)
[<80089544>] (kthread+0x80/0x88) from [<80040a40>] (kernel_thread_exit+0x0/0x8)
Code: e59f0010 e1a01003 eb126a8d e3a03000 (e5833000)
---[ end trace d52a403a1d1eaa86 ]---
Cc: stable@vger.kernel.org
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
(cherry picked from commit 6fd4b15603124c1b56e03db29b41ec39d8a077b9)
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Increasing CAAM DMA engine transaction size either
-reduces the number of required transactions or
-adds the ability to transfer more data with same transaction count
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
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Previous change (see "Fixes" tag) to the MCFGR register clears AWCACHE[0]
(which is "1" at POR).
For PPC-based platforms, this makes all writes non-bufferable, causing
a performance drop.
Rework previous change such that MCFGR[AWCACHE] is set to:
-4'b0001 (default value at POR) for PPC-based platforms
-4'b0011 (default value at POR + AWCACHE[1]) for ARM-based platforms
Fixes: bcd586241449 ("crypto: caam - fix snooping for write transactions")
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
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This driver is used by both ARM-based core and PowerPC-based core. So
PowerPC specific information should be removed.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
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Eliminate memory leaks on error paths
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
Change-Id: I36d1a35f9d48188a9dad043c78e90d787997ea19
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Check for null pointers to prevent null pointer dereferencing
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
Change-Id: Icc267f51d5ad85187c6ee5d03aa87f8649e124c9
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Check for memory allocation failures to protect from
null pointer dereferencing
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
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Correct the order of existing goto labels and add new ones
to handle error paths properly for inflation process
Signed-off-by: Mahammad Ismayilzada <mahammad.ismayilzada@freescale.com>
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For JIRA issue QLINUX-3837
Signed-off-by: Hemant Agrawal <Hemant@freescale.com>
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
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Fixing an issue that occurs when there are two root ccnodes
and both of them point to the same miss ccnode
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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The PCIe controller should be fully initialized in spite of link
status controller and the designware driver will check it before
accessing the PCIe device. So we do not need to check link status
and the patch removed the related code.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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Earlier tcp timestamp is typecasted using long. But timestamp is of
4 byte. For 64-bit machine, long is 8 byte. This is incorrect
So it is typecasted using int.
Signed-off-by: Alok Makhariya <B46187@freescale.com>
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This reverts commit 20af0dc3a4003cdfaaac974dfe131e030b857dcd.
Revert this non-upstreamable patch (DMACTRL[LE] hack) from
SDK1.9, to sync gianfar with following usptream u-boot fix:
git.denx.de/?p=u-boot/u-boot-arm.git/
commit: ebe4c1e6469444753bd2ba93fe63e6183cf2905c
(“ls102xa: etsec: Use proper settings for BE BDs”).
Details about the fix are documented by this uboot commit.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
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asf_qos feature to be only available for non-dpaa platform
asf_qos will not be enabled by enabling ASF.
asf_linux_qos may be used for dpaa platforms.
Signed-off-by: Alok Makhariya <B46187@freescale.com>
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ASF_EGRESS_QOS should be disabled for DPAA platforms.
ASF_LINUX_QOS may be enabled for DPAA platforms.
the l2blob shall be offloaded from ceetm instead of hook from the dev.c
Signed-off-by: Alok Makhariya <B46187@freescale.com>
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On 32 bit kernels using size_t truncated the 40 bit addresses.
Signed-off-by: Madalin Bucur <madalin.bucur@freescale.com>
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Increased TX_TIMEOUT to 5HZ to improve performance in case of Real-Time.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Abhimanyu <abhimanyu@freescale.com>
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-In a PREEMPT_RT with CONFIG_PREEMPT_RT_FULL configuration enabled,
some of Interrupt Handler runs in context of threaded ISR.
And if this threaded ISR raises a particular softirq, then that calls
__raise_softirq_irqoff() function which mark the softirq ready to be
executed while exiting ISR in context of ISR only.
-So, net_rx_action() function is called in context of threaded ISR
if NET_RX_SOFTIRQ softirq is raised by that particular ISR.
-net_rx_action is balancing scheduling among napis
by using time-out of 2 jiffies for particular napi.
On timeout , it calls __raise_softirq_irqoff().
-In case of RT kernel, __raise_softirq_irqoff() again makes the
NET_RX_SOFTIRQ ready. So it is called again and again until the packet
ring is emptied.This creats a starvation condition for other threads.
-This patch removes calling __raise_softirq_irqoff() again while exiting
net_rx_action()
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Abhimanyu <abhimanyu@freescale.com>
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This patch adds "interrupts" property for Ethernet PHYs connected over
QSGMII to the L2 Switch ports, for boards T1040rdb, T1040d4rdb and
T1040qds.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
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Set CSCN_TARG with correct DCP portal in qman_create_cgr_to_dcp()
funciton for the qman revision < qman_3.0
JIRA issue# QLINUX-3814
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
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The patch e9cacc46fcd4ebd1b2238a2655d08ad42e87f7d2 only added
CEETM node qman-ceetm0 in t4240si-post.dts, and defined 8
ceetm channels. It is not correct for T4240 which has QMan 3.x
version to support 32 CEETM channels. Besides, T4240 supports
2 CEETMs, so 2 ceetm nodes should be included in this device tree.
JIRA issue# QLINUX-3737
Signed-off-by: Haiying Wang <Haiying.wang@freescale.com>
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Signed-off-by: Camelia Groza <camelia.groza@freescale.com>
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Fix two compile errors below,
error: implicit declaration of function 'of_iomap'
error: implicit declaration of function 'out_be32'
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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The Thermal Monitoring Unit node for T1023/T1024.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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It supports one critical trip point and one passive trip point.
The cpufreq is used as the cooling device to throttle CPUs when
the passive trip is crossed.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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This is Thermal Monitoring Unit for QorIQ platform.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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As per Documentation/thermal/sysfs-api.txt, max_level
is an index, not a counter. Thus, in case a CPU has
3 valid frequencies, max_level is expected to be 2, for instance.
The current code makes max_level == number of valid frequencies,
which is bogus. This patch fix the cpu_cooling device by
ranging max_level properly.
Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
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The eSDHC is not compatible with SD spec well, so we need
to use eSDHC-specific code to switch to SDR50 mode.
1. IO signal voltage switching, eSDHC uses SDHC_VS to switch
io voltage and it's needed to configure a global utilities
register SCFG_SDHCIOVSELCR(if it has) and SDHC_VS signal.
2. Before executing tuning procedure, eSDHC should set its own
tuning block.
static const struct sdhci_ops sdhci_esdhc_ops = {
...
.set_tuning_block = esdhc_set_tuning_block,
.signal_voltage_switch = esdhc_signal_voltage_switch,
};
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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The eSDHC is not compatible with SD spec well, it's needed
to add callbacks for signal voltage switching and tuning
block setting for eSDHC for eMMC45 Adapter Card HS200 mode
support.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
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The Thermal Monitoring Unit node for LS1021A.
Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
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ssh://sw-stash.freescale.net/dnnpi/ls1-linux-jason into LS1-SDKV04-SDK1.9
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DS26522 is used for tdm, configured by SPI bus.
Add nodes under spi node to t104xd4rdb.dtsi.
Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com>
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