linux-fsl-qoriq - Freescale linux tree with Scalys patches

Age	Commit message (Collapse)	Author
2013-04-04	clk: tegra: Add flags to tegra_clk_periph()	Peter De Schrijver
	We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag, most notably mselect, which is a bridge between AXI and most peripherals. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04	clk: tegra: Export peripheral reset functions	Thierry Reding
	The tegra_periph_reset_assert() and tegra_periph_reset_deassert() functions can be used by drivers to reset peripherals. In order to allow such drivers to be built as modules, export the functions. Note that this restores the status quo as the functions were exported before the move to the drivers/clk tree. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28	ARM: tegra: migrate to new clock code	Prashant Gaikwad
	Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28	clk: tegra: add Tegra specific clocks	Prashant Gaikwad
	Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re: storing pointers to stack variables, make a timeout loop more idiomatic, use _clk_pll_disable() not clk_disable_pll() from _program_pll() to avoid redundant lock operations, unified tegra_clk_periph() and tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock registration functions so they don't have the same name as the clock structs, return -EINVAL from clk_plle_enable when matching table rate not found, pass ops to _tegra_clk_register_pll rather than a bool.] Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>