From 7d4c6f3c5fdb216dfd36573d117eff602146cdcd Mon Sep 17 00:00:00 2001
From: Tony Prisk <linux@prisktech.co.nz>
Date: Thu, 9 May 2013 07:35:13 +1200
Subject: dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL  clocks

Change the WM8850 SoC dtsi to use the new wm8850 specific PLL clock
binding. Previously, the WM8850 used the wm8750 pll clock which is
actually different to the wm8850 pll clock.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>

diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index fc60e32..9239c0a 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -83,14 +83,14 @@
 
 				plla: plla {
 					#clock-cells = <0>;
-					compatible = "wm,wm8750-pll-clock";
+					compatible = "wm,wm8850-pll-clock";
 					clocks = <&ref25>;
 					reg = <0x200>;
 				};
 
 				pllb: pllb {
 					#clock-cells = <0>;
-					compatible = "wm,wm8750-pll-clock";
+					compatible = "wm,wm8850-pll-clock";
 					clocks = <&ref25>;
 					reg = <0x204>;
 				};
-- 
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