From 91aade93b62b767ad5218735feaa5a4b8e657902 Mon Sep 17 00:00:00 2001 From: Claudiu Manoil Date: Thu, 15 Oct 2015 16:23:13 +0300 Subject: Revert "gianfar: Add dma transfer endian property support" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit 20af0dc3a4003cdfaaac974dfe131e030b857dcd. Revert this non-upstreamable patch (DMACTRL[LE] hack) from SDK1.9, to sync gianfar with following usptream u-boot fix: git.denx.de/?p=u-boot/u-boot-arm.git/ commit: ebe4c1e6469444753bd2ba93fe63e6183cf2905c (“ls102xa: etsec: Use proper settings for BE BDs”). Details about the fix are documented by this uboot commit. Signed-off-by: Claudiu Manoil diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index d8c92a2..a6f2d77 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c @@ -979,9 +979,6 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) /* Find the TBI PHY. If it's not there, we don't support SGMII */ priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0); - - priv->dma_endian_le = of_property_read_bool(np, "fsl,dma-endian-le"); - #if defined CONFIG_FSL_GIANFAR_1588 /* Handle IEEE1588 node */ if (!gfar_ptp_init(np, priv)) @@ -2215,8 +2212,6 @@ void gfar_start(struct gfar_private *priv) /* Initialize DMACTRL to have WWR and WOP */ tempval = gfar_read(®s->dmactrl); tempval |= DMACTRL_INIT_SETTINGS; - if (priv->dma_endian_le) - tempval |= DMACTRL_LE; gfar_write(®s->dmactrl, tempval); /* Make sure we aren't stopped */ diff --git a/drivers/net/ethernet/freescale/gianfar.h b/drivers/net/ethernet/freescale/gianfar.h index 0f5bf84..0b0d7c9 100644 --- a/drivers/net/ethernet/freescale/gianfar.h +++ b/drivers/net/ethernet/freescale/gianfar.h @@ -328,7 +328,6 @@ extern const char gfar_driver_version[]; #define DMACTRL_INIT_SETTINGS 0x000000c3 #define DMACTRL_GRS 0x00000010 #define DMACTRL_GTS 0x00000008 -#define DMACTRL_LE 0x00008000 #define TSTAT_CLEAR_THALT_ALL 0xFF000000 #define TSTAT_CLEAR_THALT 0x80000000 @@ -1380,9 +1379,6 @@ struct gfar_private { /* L2 SRAM alloc of BDs */ bd_l2sram_en:1; - /* little endian dma buffer and descriptor host interface */ - unsigned int dma_endian_le; - /* The total tx and rx ring size for the enabled queues */ unsigned int total_tx_ring_size; unsigned int total_rx_ring_size; -- cgit v0.10.2