From 8af12cdb7c4aa9ed278ed71a8b5b130f2d8c8920 Mon Sep 17 00:00:00 2001 From: Jason Gaston Date: Fri, 2 Mar 2007 17:39:46 -0800 Subject: ahci: RAID mode SATA patch for Intel ICH9M This patch adds the Intel ICH9M RAID controller DID for SATA support. Signed-off-by: Jason Gaston Signed-off-by: Jeff Garzik diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 43cc43d..dc7b562 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -389,6 +389,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0x2929), board_ahci_pi }, /* ICH9M */ { PCI_VDEVICE(INTEL, 0x292a), board_ahci_pi }, /* ICH9M */ { PCI_VDEVICE(INTEL, 0x292b), board_ahci_pi }, /* ICH9M */ + { PCI_VDEVICE(INTEL, 0x292c), board_ahci_pi }, /* ICH9M */ { PCI_VDEVICE(INTEL, 0x292f), board_ahci_pi }, /* ICH9M */ { PCI_VDEVICE(INTEL, 0x294d), board_ahci_pi }, /* ICH9 */ { PCI_VDEVICE(INTEL, 0x294e), board_ahci_pi }, /* ICH9M */ -- cgit v0.10.2 From 8b966dddc29899008fb178a533263afa8d1ad849 Mon Sep 17 00:00:00 2001 From: Mikael Pettersson Date: Sat, 3 Mar 2007 20:57:44 +0100 Subject: pata_legacy: fix io/irq mismatch pata_legacy fails to detect the disk on my old ISA/VLB 486: it starts to probe io=0x1f0 ctr=0x3f6 irq=15, complains loudly about IDENTIFYs timing out, and finally fails. (Sorry I couldn't capture the kernel's boot messages.) It turns out that the driver's mapping from io to irq in legacy_irq[] is wrong: index 0 for io=0x1f0 has irq=15 but should have irq=14, and index 1 for io=0x170 has irq=14 but should have irq=15. This is confirmed by a comparison with include/asm-i386/ide.h:ide_default_irq(). This patch swaps the first two elements in legacy_irq[], which makes pata_legacy work on my 486. Signed-off-by: Mikael Pettersson Signed-off-by: Jeff Garzik diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index fc5b73d..86fbcd6 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c @@ -69,7 +69,7 @@ #define NR_HOST 6 static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; -static int legacy_irq[NR_HOST] = { 15, 14, 11, 10, 8, 12 }; +static int legacy_irq[NR_HOST] = { 14, 15, 11, 10, 8, 12 }; struct legacy_data { unsigned long timing; -- cgit v0.10.2 From 63ed71019c4437caef65fca1f83c990ae729024f Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Sun, 4 Mar 2007 04:48:08 +0100 Subject: pata_pdc202xx_old: fix data corruption and other problems Fix wrong "port" calculations in pdc202xx_{configure_piomode,set_dmamode}() They were broken for all configurations except one (master device on primary channel, no other devices) and as a result device settings + PIO/DMA timings were being programmed into the wrong PCI registers. This could result in a large variety of problems including data corruption, hangs etc. (depending on devices used and your luck :-). ap->port_no ap->devno used PCI registers correct PCI registers 0 0 0x60-0x62 0x60-0x62 0 1 0x62-0x64 0x64-0x66 1 0 0x64-0x66 0x68-0x6a 1 1 0x66-0x68 0x6c-0x6e Also forward port recent fixes from drivers/ide pdc202xx_old driver: * fix XFER_MW_DMA0 timings (they were overclocked, use the official ones) * fix bitmasks for clearing bits of register B: - when programming DMA mode bit 0x10 of register B was cleared which resulted in overclocked PIO timing setting (iff PIO0 was used) - when programming PIO mode bits 0x18 weren't cleared so suboptimal timings were used for PIO1-4 if PIO0 was previously set (bit 0x10) and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08) and finally bump driver version. Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Jeff Garzik diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c index 3fb4177..acdc52c 100644 --- a/drivers/ata/pata_pdc202xx_old.c +++ b/drivers/ata/pata_pdc202xx_old.c @@ -2,13 +2,14 @@ * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer * (C) 2005 Red Hat Inc * Alan Cox + * (C) 2007 Bartlomiej Zolnierkiewicz * * Based in part on linux/drivers/ide/pci/pdc202xx_old.c * * First cut with LBA48/ATAPI * * TODO: - * Channel interlock/reset on both required ? + * Channel interlock/reset on both required */ #include @@ -21,7 +22,7 @@ #include #define DRV_NAME "pata_pdc202xx_old" -#define DRV_VERSION "0.3.0" +#define DRV_VERSION "0.4.0" /** * pdc2024x_pre_reset - probe begin @@ -76,7 +77,7 @@ static void pdc2026x_error_handler(struct ata_port *ap) static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); - int port = 0x60 + 4 * ap->port_no + 2 * adev->devno; + int port = 0x60 + 8 * ap->port_no + 4 * adev->devno; static u16 pio_timing[5] = { 0x0913, 0x050C , 0x0308, 0x0206, 0x0104 }; @@ -85,7 +86,7 @@ static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *a pci_read_config_byte(pdev, port, &r_ap); pci_read_config_byte(pdev, port + 1, &r_bp); r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */ - r_bp &= ~0x07; + r_bp &= ~0x1F; r_ap |= (pio_timing[pio] >> 8); r_bp |= (pio_timing[pio] & 0xFF); @@ -123,7 +124,7 @@ static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev) static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); - int port = 0x60 + 4 * ap->port_no + 2 * adev->devno; + int port = 0x60 + 8 * ap->port_no + 4 * adev->devno; static u8 udma_timing[6][2] = { { 0x60, 0x03 }, /* 33 Mhz Clock */ { 0x40, 0x02 }, @@ -132,12 +133,17 @@ static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev) { 0x20, 0x01 }, { 0x20, 0x01 } }; + static u8 mdma_timing[3][2] = { + { 0x60, 0x03 }, + { 0x60, 0x04 }, + { 0xe0, 0x0f }, + }; u8 r_bp, r_cp; pci_read_config_byte(pdev, port + 1, &r_bp); pci_read_config_byte(pdev, port + 2, &r_cp); - r_bp &= ~0xF0; + r_bp &= ~0xE0; r_cp &= ~0x0F; if (adev->dma_mode >= XFER_UDMA_0) { @@ -147,8 +153,8 @@ static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev) } else { int speed = adev->dma_mode - XFER_MW_DMA_0; - r_bp |= 0x60; - r_cp |= (5 - speed); + r_bp |= mdma_timing[speed][0]; + r_cp |= mdma_timing[speed][1]; } pci_write_config_byte(pdev, port + 1, r_bp); pci_write_config_byte(pdev, port + 2, r_cp); -- cgit v0.10.2