From eb5ba378bc0ed3f426edee3af7fdcd215a505026 Mon Sep 17 00:00:00 2001 From: Phaneendra Kumar Date: Thu, 27 Aug 2009 17:06:56 -0400 Subject: DaVinci: DM365: SDIO interrupt resource correction This patch fixes a typo/bug in the DM365 SDIO interrupt assignment Signed-off-by: Sandeep Paulraj Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index a55b650..34dc0e9 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c @@ -177,7 +177,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) mmcsd1_resources[0].start = DM365_MMCSD1_BASE; mmcsd1_resources[0].end = DM365_MMCSD1_BASE + SZ_4K - 1; - mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1; + mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1; } else break; -- cgit v0.10.2 From ed16067205d79aef6ab885a662380fd1dad3ff6a Mon Sep 17 00:00:00 2001 From: Sandeep Paulraj Date: Thu, 27 Aug 2009 16:39:43 -0400 Subject: DaVinci: DM365: Correct USB parent clock The parent clock for the USB source clock is actually PLL1 aux clock, not PLL2 sysclk1. Signed-off-by: Sandeep Paulraj Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index e815174..6c948b1 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -369,7 +369,7 @@ static struct clk timer3_clk = { static struct clk usb_clk = { .name = "usb", - .parent = &pll2_sysclk1, + .parent = &pll1_aux_clk, .lpsc = DAVINCI_LPSC_USB, }; -- cgit v0.10.2 From e9ab3214a8fc546d62e22064caa559b912620106 Mon Sep 17 00:00:00 2001 From: Miguel Aguilar Date: Wed, 2 Sep 2009 15:33:29 -0600 Subject: Davinci: DM365: Add platform device for McBSP 1) Registers the platform device for McBSP on dm365. 2) Add platform data to DM365 EVM board file. 3) Set i2c address for audio codec at DM365 EVM board file. Signed-off-by: Miguel Aguilar Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 52dd804..a5ed178 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -176,11 +176,16 @@ static struct at24_platform_data eeprom_info = { .context = (void *)0x7f00, }; +static struct snd_platform_data dm365_evm_snd_data; + static struct i2c_board_info i2c_info[] = { { I2C_BOARD_INFO("24c256", 0x50), .platform_data = &eeprom_info, }, + { + I2C_BOARD_INFO("tlv320aic3x", 0x18), + }, }; static struct davinci_i2c_platform_data i2c_pdata = { @@ -472,6 +477,8 @@ static __init void dm365_evm_init(void) /* maybe setup mmc1/etc ... _after_ mmc0 */ evm_init_cpld(); + + dm365_init_asp(&dm365_evm_snd_data); } static __init void dm365_evm_irq_init(void) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 6c948b1..2674438 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" @@ -456,7 +457,7 @@ static struct davinci_clk dm365_clks[] = { CLK(NULL, "usb", &usb_clk), CLK("davinci_emac.1", NULL, &emac_clk), CLK("voice_codec", NULL, &voicecodec_clk), - CLK("soc-audio.0", NULL, &asp0_clk), + CLK("davinci-asp.0", NULL, &asp0_clk), CLK(NULL, "rto", &rto_clk), CLK(NULL, "mjcp", &mjcp_clk), CLK(NULL, NULL, NULL), @@ -603,6 +604,9 @@ INT_CFG(DM365, INT_IMX1_ENABLE, 24, 1, 1, false) INT_CFG(DM365, INT_IMX1_DISABLE, 24, 1, 0, false) INT_CFG(DM365, INT_NSF_ENABLE, 25, 1, 1, false) INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) + +EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false) +EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false) #endif }; @@ -806,6 +810,31 @@ static struct platform_device dm365_edma_device = { .resource = edma_resources, }; +static struct resource dm365_asp_resources[] = { + { + .start = DAVINCI_DM365_ASP0_BASE, + .end = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = DAVINCI_DMA_ASP0_TX, + .end = DAVINCI_DMA_ASP0_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = DAVINCI_DMA_ASP0_RX, + .end = DAVINCI_DMA_ASP0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device dm365_asp_device = { + .name = "davinci-asp", + .id = 0, + .num_resources = ARRAY_SIZE(dm365_asp_resources), + .resource = dm365_asp_resources, +}; + static struct map_desc dm365_io_desc[] = { { .virtual = IO_VIRT, @@ -907,6 +936,20 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { .sram_len = SZ_32K, }; +void __init dm365_init_asp(struct snd_platform_data *pdata) +{ + davinci_cfg_reg(DM365_MCBSP0_BDX); + davinci_cfg_reg(DM365_MCBSP0_X); + davinci_cfg_reg(DM365_MCBSP0_BFSX); + davinci_cfg_reg(DM365_MCBSP0_BDR); + davinci_cfg_reg(DM365_MCBSP0_R); + davinci_cfg_reg(DM365_MCBSP0_BFSR); + davinci_cfg_reg(DM365_EVT2_ASP_TX); + davinci_cfg_reg(DM365_EVT3_ASP_RX); + dm365_asp_device.dev.platform_data = pdata; + platform_device_register(&dm365_asp_device); +} + void __init dm365_init(void) { davinci_common_init(&davinci_soc_info_dm365); diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index 18e4ce3..fef12b9 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h @@ -11,6 +11,9 @@ #define DAVINCI_ASP0_BASE 0x01E02000 #define DAVINCI_ASP1_BASE 0x01E04000 +/* Bases of dm365 register banks */ +#define DAVINCI_DM365_ASP0_BASE 0x01D02000 + /* Bases of dm646x register banks */ #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 09db434..2291c0d 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h @@ -16,6 +16,7 @@ #include #include #include +#include #define DM365_EMAC_BASE (0x01D07000) #define DM365_EMAC_CNTRL_OFFSET (0x0000) @@ -25,5 +26,6 @@ #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) void __init dm365_init(void); +void __init dm365_init_asp(struct snd_platform_data *pdata); #endif /* __ASM_ARCH_DM365_H */ -- cgit v0.10.2 From 31f53cf391520e62804ed013daf50dfa170d114a Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 28 Aug 2009 15:02:54 -0700 Subject: davinci: Move DA8xx/OMAP-L13x emac register routine Some mcasp code was inserted between the emac resource setup and the related register routine that registers the emac. Signed-off-by: Mark A. Greer Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 58ad5b6..94ce7a1 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -282,6 +282,11 @@ static struct platform_device da8xx_emac_device = { .resource = da8xx_emac_resources, }; +int __init da8xx_register_emac(void) +{ + return platform_device_register(&da8xx_emac_device); +} + static struct resource da830_mcasp1_resources[] = { { .name = "mcasp1", @@ -338,11 +343,6 @@ static struct platform_device da850_mcasp_device = { .resource = da850_mcasp_resources, }; -int __init da8xx_register_emac(void) -{ - return platform_device_register(&da8xx_emac_device); -} - void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata) { /* DA830/OMAP-L137 has 3 instances of McASP */ -- cgit v0.10.2 From b8864aa4abf3cda4676c4174453cf813de6b1701 Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 28 Aug 2009 15:05:02 -0700 Subject: davinci: Change DA8xx/OMAP-L13x McASP registration routine name For consistency with existing code, change the name of da8xx_init_mcasp() to da8xx_register_mcasp(). Signed-off-by: Mark A. Greer Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index bfbb639..22d9fe4 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -122,7 +122,7 @@ static __init void da830_evm_init(void) pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", ret); - da8xx_init_mcasp(1, &da830_evm_snd_data); + da8xx_register_mcasp(1, &da830_evm_snd_data); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index c759d72..fbc7aae 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -365,7 +365,7 @@ static __init void da850_evm_init(void) pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", ret); - da8xx_init_mcasp(0, &da850_evm_snd_data); + da8xx_register_mcasp(0, &da850_evm_snd_data); ret = da8xx_pinmux_setup(da850_lcdcntl_pins); if (ret) diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 94ce7a1..a54aa4e 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -343,7 +343,7 @@ static struct platform_device da850_mcasp_device = { .resource = da850_mcasp_resources, }; -void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata) +void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) { /* DA830/OMAP-L137 has 3 instances of McASP */ if (cpu_is_davinci_da830() && id == 1) { diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index d4095d0..7576e8c 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -74,7 +74,7 @@ int da8xx_register_watchdog(void); int da8xx_register_emac(void); int da8xx_register_lcdc(void); int da8xx_register_mmcsd0(struct davinci_mmc_config *config); -void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata); +void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; -- cgit v0.10.2 From 32bf078caff4dbdba59f8aab022f11a4e1622880 Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Fri, 28 Aug 2009 15:05:21 -0700 Subject: davinci: Add DA830/OMAP-L137 EVM specific pinmux setting for McASP1 The DA830/OMAP-L137 EVM cannot use the default pinmux setup for McASP1 so put the correct settings in the board file for that platform. Signed-off-by: Mark A. Greer Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 22d9fe4..39711c1 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -55,6 +56,14 @@ static struct davinci_uart_config da830_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; +static const short da830_evm_mcasp1_pins[] = { + DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1, + DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5, + DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10, + DA830_AXR1_11, + -1 +}; + static u8 da830_iis_serializer_direction[] = { RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, @@ -117,7 +126,7 @@ static __init void da830_evm_init(void) i2c_register_board_info(1, da830_evm_i2c_devices, ARRAY_SIZE(da830_evm_i2c_devices)); - ret = da8xx_pinmux_setup(da830_mcasp1_pins); + ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins); if (ret) pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", ret); -- cgit v0.10.2 From 3c60a66de662dca6e47951a78b73de1bf081e785 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:47:58 +0530 Subject: davinci: DA8XX/OMAP-L1XX: It's SYSCFG not BOOT_CFG Rename the DA8XX_BOOT_CFG_BASE macro to get it in line with the public documentation for these parts. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 19b2748..c2224b9 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1184,7 +1184,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = { .cpu_clks = da830_clks, .psc_bases = da830_psc_bases, .psc_bases_num = ARRAY_SIZE(da830_psc_bases), - .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), + .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120), .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 192d719..18c33b6 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -799,7 +799,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .cpu_clks = da850_clks, .psc_bases = da850_psc_bases, .psc_bases_num = ARRAY_SIZE(da850_psc_bases), - .pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), + .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120), .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 7576e8c..1c42379 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -29,7 +29,7 @@ #define DA8XX_CP_INTC_SIZE SZ_8K #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) -#define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000) +#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 -- cgit v0.10.2 From 6a28adef21e551602023afc5bba330f8013556d8 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:47:59 +0530 Subject: davinci: DA8XX/OMAP-L1XX: Avoid use of IO_ADDRESS for SYSCFG module Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index c2224b9..3d70eae 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1184,7 +1184,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = { .cpu_clks = da830_clks, .psc_bases = da830_psc_bases, .psc_bases_num = ARRAY_SIZE(da830_psc_bases), - .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120), .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, @@ -1201,5 +1200,11 @@ static struct davinci_soc_info davinci_soc_info_da830 = { void __init da830_init(void) { + da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); + if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) + return; + + davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); + davinci_common_init(&davinci_soc_info_da830); } diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 18c33b6..54d1836 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -799,7 +799,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = { .cpu_clks = da850_clks, .psc_bases = da850_psc_bases, .psc_bases_num = ARRAY_SIZE(da850_psc_bases), - .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120), .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, @@ -816,5 +815,11 @@ static struct davinci_soc_info davinci_soc_info_da850 = { void __init da850_init(void) { + da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); + if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) + return; + + davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); + davinci_common_init(&davinci_soc_info_da850); } diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index a54aa4e..0102e0a 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -43,6 +43,8 @@ #define DA8XX_MDIO_REG_OFFSET 0x4000 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K +void __iomem *da8xx_syscfg_base; + static struct plat_serial8250_port da8xx_serial_pdata[] = { { .mapbase = DA8XX_UART0_BASE, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 1c42379..11d2079 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -18,6 +18,8 @@ #include #include +extern void __iomem *da8xx_syscfg_base; + /* * The cp_intc interrupt controller for the da8xx isn't in the same * chunk of physical memory space as the other registers (like it is @@ -30,6 +32,7 @@ #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) +#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 -- cgit v0.10.2 From cd87444802ddceaa2259bc5ac48c1d2e42a99a3f Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:00 +0530 Subject: davinci: DA8XX/OMAP-L1XX: JTAG ID register should offset from SYSCFG base This makes it clear that JTAG ID register is part of the SYSCFG module Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 3d70eae..f52174a 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1178,7 +1178,6 @@ static struct davinci_timer_info da830_timer_info = { static struct davinci_soc_info davinci_soc_info_da830 = { .io_desc = da830_io_desc, .io_desc_num = ARRAY_SIZE(da830_io_desc), - .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG), .ids = da830_ids, .ids_num = ARRAY_SIZE(da830_ids), .cpu_clks = da830_clks, @@ -1204,6 +1203,8 @@ void __init da830_init(void) if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) return; + davinci_soc_info_da830.jtag_id_base = + DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); davinci_common_init(&davinci_soc_info_da830); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 54d1836..f5c3a6a 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -793,7 +793,6 @@ static struct davinci_timer_info da850_timer_info = { static struct davinci_soc_info davinci_soc_info_da850 = { .io_desc = da850_io_desc, .io_desc_num = ARRAY_SIZE(da850_io_desc), - .jtag_id_base = IO_ADDRESS(DA8XX_JTAG_ID_REG), .ids = da850_ids, .ids_num = ARRAY_SIZE(da850_ids), .cpu_clks = da850_clks, @@ -819,6 +818,8 @@ void __init da850_init(void) if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) return; + davinci_soc_info_da850.jtag_id_base = + DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); davinci_common_init(&davinci_soc_info_da850); diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 11d2079..6f03650 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -33,10 +33,10 @@ extern void __iomem *da8xx_syscfg_base; #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) #define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) +#define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 -#define DA8XX_JTAG_ID_REG 0x01c14018 #define DA8XX_TIMER64P0_BASE 0x01c20000 #define DA8XX_TIMER64P1_BASE 0x01c21000 #define DA8XX_GPIO_BASE 0x01e26000 -- cgit v0.10.2 From f02bf3b396846f3da60b4962aeaae8652e20f0dd Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:01 +0530 Subject: davinci: enable easy top down traversal of clock tree Achieve easy top down traversal of clock tree by keeping track of each clock's list of children. This is useful in supporting DVFS where clock rates of all children need to be updated in an efficient manner. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 83d54d5..f8c4ef08 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -123,8 +123,12 @@ int clk_register(struct clk *clk) clk->name, clk->parent->name)) return -EINVAL; + INIT_LIST_HEAD(&clk->children); + mutex_lock(&clocks_mutex); list_add_tail(&clk->node, &clocks); + if (clk->parent) + list_add_tail(&clk->childnode, &clk->parent->children); mutex_unlock(&clocks_mutex); /* If rate is already set, use it */ @@ -146,6 +150,7 @@ void clk_unregister(struct clk *clk) mutex_lock(&clocks_mutex); list_del(&clk->node); + list_del(&clk->childnode); mutex_unlock(&clocks_mutex); } EXPORT_SYMBOL(clk_unregister); @@ -352,9 +357,8 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) /* REVISIT show device associations too */ /* cost is now small, but not linear... */ - list_for_each_entry(clk, &clocks, node) { - if (clk->parent == parent) - dump_clock(s, nest + NEST_DELTA, clk); + list_for_each_entry(clk, &parent->children, childnode) { + dump_clock(s, nest + NEST_DELTA, clk); } } diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 27233cb..f88794d 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -69,6 +69,8 @@ struct clk { u8 lpsc; u8 psc_ctlr; struct clk *parent; + struct list_head children; /* list of children */ + struct list_head childnode; /* parent's child list node */ struct pll_data *pll_data; u32 div_reg; }; -- cgit v0.10.2 From de381a91f544008f4f99571e2ef1f60b92d5f0cf Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:02 +0530 Subject: davinci: make clock rate re-calculation easy Make clock rate recalculation easy by having a re-calculate function for each clock. The existing functions for calculation of output rates of PLL and PLL-derived sysclks have been convered to the new re-calculate API. A new function is introduced to take care of rate (re)calculation for leaf clocks. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index f8c4ef08..6de1e34 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -135,8 +135,12 @@ int clk_register(struct clk *clk) if (clk->rate) return 0; + /* Else, see if there is a way to calculate it */ + if (clk->recalc) + clk->rate = clk->recalc(clk); + /* Otherwise, default to parent rate */ - if (clk->parent) + else if (clk->parent) clk->rate = clk->parent->rate; return 0; @@ -184,50 +188,62 @@ static int __init clk_disable_unused(void) late_initcall(clk_disable_unused); #endif -static void clk_sysclk_recalc(struct clk *clk) +static unsigned long clk_sysclk_recalc(struct clk *clk) { u32 v, plldiv; struct pll_data *pll; + unsigned long rate = clk->rate; /* If this is the PLL base clock, no more calculations needed */ if (clk->pll_data) - return; + return rate; if (WARN_ON(!clk->parent)) - return; + return rate; - clk->rate = clk->parent->rate; + rate = clk->parent->rate; /* Otherwise, the parent must be a PLL */ if (WARN_ON(!clk->parent->pll_data)) - return; + return rate; pll = clk->parent->pll_data; /* If pre-PLL, source clock is before the multiplier and divider(s) */ if (clk->flags & PRE_PLL) - clk->rate = pll->input_rate; + rate = pll->input_rate; if (!clk->div_reg) - return; + return rate; v = __raw_readl(pll->base + clk->div_reg); if (v & PLLDIV_EN) { plldiv = (v & PLLDIV_RATIO_MASK) + 1; if (plldiv) - clk->rate /= plldiv; + rate /= plldiv; } + + return rate; +} + +static unsigned long clk_leafclk_recalc(struct clk *clk) +{ + if (WARN_ON(!clk->parent)) + return clk->rate; + + return clk->parent->rate; } -static void __init clk_pll_init(struct clk *clk) +static unsigned long clk_pllclk_recalc(struct clk *clk) { u32 ctrl, mult = 1, prediv = 1, postdiv = 1; u8 bypass; struct pll_data *pll = clk->pll_data; + unsigned long rate = clk->rate; pll->base = IO_ADDRESS(pll->phys_base); ctrl = __raw_readl(pll->base + PLLCTL); - clk->rate = pll->input_rate = clk->parent->rate; + rate = pll->input_rate = clk->parent->rate; if (ctrl & PLLCTL_PLLEN) { bypass = 0; @@ -260,9 +276,9 @@ static void __init clk_pll_init(struct clk *clk) } if (!bypass) { - clk->rate /= prediv; - clk->rate *= mult; - clk->rate /= postdiv; + rate /= prediv; + rate *= mult; + rate /= postdiv; } pr_debug("PLL%d: input = %lu MHz [ ", @@ -275,7 +291,9 @@ static void __init clk_pll_init(struct clk *clk) pr_debug("* %d ", mult); if (postdiv > 1) pr_debug("/ %d ", postdiv); - pr_debug("] --> %lu MHz output.\n", clk->rate / 1000000); + pr_debug("] --> %lu MHz output.\n", rate / 1000000); + + return rate; } int __init davinci_clk_init(struct davinci_clk *clocks) @@ -286,12 +304,23 @@ int __init davinci_clk_init(struct davinci_clk *clocks) for (c = clocks; c->lk.clk; c++) { clk = c->lk.clk; - if (clk->pll_data) - clk_pll_init(clk); + if (!clk->recalc) { + + /* Check if clock is a PLL */ + if (clk->pll_data) + clk->recalc = clk_pllclk_recalc; + + /* Else, if it is a PLL-derived clock */ + else if (clk->flags & CLK_PLL) + clk->recalc = clk_sysclk_recalc; + + /* Otherwise, it is a leaf clock (PSC clock) */ + else if (clk->parent) + clk->recalc = clk_leafclk_recalc; + } - /* Calculate rates for PLL-derived clocks */ - else if (clk->flags & CLK_PLL) - clk_sysclk_recalc(clk); + if (clk->recalc) + clk->rate = clk->recalc(clk); if (clk->lpsc) clk->flags |= CLK_PSC; diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index f88794d..202b9ff 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -73,6 +73,7 @@ struct clk { struct list_head childnode; /* parent's child list node */ struct pll_data *pll_data; u32 div_reg; + unsigned long (*recalc) (struct clk *); }; /* Clock flags */ -- cgit v0.10.2 From d6a61563f9e934ef20a1338780082f63802c8908 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:03 +0530 Subject: davinci: support changing the clock rate in clock framework clk_round_rate, clk_set_rate have been updated to handle dynamic frequency changes. The motivation behind the changes is to support dynamic CPU frequency change. davinci_set_pllrate() changes the PLL rate of a given PLL. This function has been presented as a generic function though it has been tested only on OMAP-L138 EVM. No other currently available DaVinci device will probably use this function, but any future device specific changes will hopefully be small enough to get taken care using a cpu_is_xxx() macro. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 6de1e34..09e0e1c 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -99,17 +100,44 @@ long clk_round_rate(struct clk *clk, unsigned long rate) if (clk == NULL || IS_ERR(clk)) return -EINVAL; + if (clk->round_rate) + return clk->round_rate(clk, rate); + return clk->rate; } EXPORT_SYMBOL(clk_round_rate); +/* Propagate rate to children */ +static void propagate_rate(struct clk *root) +{ + struct clk *clk; + + list_for_each_entry(clk, &root->children, childnode) { + if (clk->recalc) + clk->rate = clk->recalc(clk); + propagate_rate(clk); + } +} + int clk_set_rate(struct clk *clk, unsigned long rate) { + unsigned long flags; + int ret = -EINVAL; + if (clk == NULL || IS_ERR(clk)) - return -EINVAL; + return ret; - /* changing the clk rate is not supported */ - return -EINVAL; + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->set_rate) + ret = clk->set_rate(clk, rate); + if (ret == 0) { + if (clk->recalc) + clk->rate = clk->recalc(clk); + propagate_rate(clk); + } + spin_unlock_irqrestore(&clockfw_lock, flags); + + return ret; } EXPORT_SYMBOL(clk_set_rate); @@ -296,6 +324,86 @@ static unsigned long clk_pllclk_recalc(struct clk *clk) return rate; } +/** + * davinci_set_pllrate - set the output rate of a given PLL. + * + * Note: Currently tested to work with OMAP-L138 only. + * + * @pll: pll whose rate needs to be changed. + * @prediv: The pre divider value. Passing 0 disables the pre-divider. + * @pllm: The multiplier value. Passing 0 leads to multiply-by-one. + * @postdiv: The post divider value. Passing 0 disables the post-divider. + */ +int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, + unsigned int mult, unsigned int postdiv) +{ + u32 ctrl; + unsigned int locktime; + + if (pll->base == NULL) + return -EINVAL; + + /* + * PLL lock time required per OMAP-L138 datasheet is + * (2000 * prediv)/sqrt(pllm) OSCIN cycles. We approximate sqrt(pllm) + * as 4 and OSCIN cycle as 25 MHz. + */ + if (prediv) { + locktime = ((2000 * prediv) / 100); + prediv = (prediv - 1) | PLLDIV_EN; + } else { + locktime = 20; + } + if (postdiv) + postdiv = (postdiv - 1) | PLLDIV_EN; + if (mult) + mult = mult - 1; + + ctrl = __raw_readl(pll->base + PLLCTL); + + /* Switch the PLL to bypass mode */ + ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); + __raw_writel(ctrl, pll->base + PLLCTL); + + /* + * Wait for 4 OSCIN/CLKIN cycles to ensure that the PLLC has switched + * to bypass mode. Delay of 1us ensures we are good for all > 4MHz + * OSCIN/CLKIN inputs. Typically the input is ~25MHz. + */ + udelay(1); + + /* Reset and enable PLL */ + ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS); + __raw_writel(ctrl, pll->base + PLLCTL); + + if (pll->flags & PLL_HAS_PREDIV) + __raw_writel(prediv, pll->base + PREDIV); + + __raw_writel(mult, pll->base + PLLM); + + if (pll->flags & PLL_HAS_POSTDIV) + __raw_writel(postdiv, pll->base + POSTDIV); + + /* + * Wait for PLL to reset properly, OMAP-L138 datasheet says + * 'min' time = 125ns + */ + udelay(1); + + /* Bring PLL out of reset */ + ctrl |= PLLCTL_PLLRST; + __raw_writel(ctrl, pll->base + PLLCTL); + + udelay(locktime); + + /* Remove PLL from bypass mode */ + ctrl |= PLLCTL_PLLEN; + __raw_writel(ctrl, pll->base + PLLCTL); + + return 0; +} +EXPORT_SYMBOL(davinci_set_pllrate); + int __init davinci_clk_init(struct davinci_clk *clocks) { struct davinci_clk *c; diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 202b9ff..a75d3f7 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -22,6 +22,10 @@ /* PLL/Reset register offsets */ #define PLLCTL 0x100 #define PLLCTL_PLLEN BIT(0) +#define PLLCTL_PLLPWRDN BIT(1) +#define PLLCTL_PLLRST BIT(3) +#define PLLCTL_PLLDIS BIT(4) +#define PLLCTL_PLLENSRC BIT(5) #define PLLCTL_CLKMODE BIT(8) #define PLLM 0x110 @@ -74,6 +78,8 @@ struct clk { struct pll_data *pll_data; u32 div_reg; unsigned long (*recalc) (struct clk *); + int (*set_rate) (struct clk *clk, unsigned long rate); + int (*round_rate) (struct clk *clk, unsigned long rate); }; /* Clock flags */ @@ -97,6 +103,8 @@ struct davinci_clk { } int davinci_clk_init(struct davinci_clk *clocks); +int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, + unsigned int mult, unsigned int postdiv); extern struct platform_device davinci_wdt_device; -- cgit v0.10.2 From b82a51e8ce560fece675b8e3ca652eee26a47789 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:04 +0530 Subject: davinci: support re-parenting a clock in the clock framework The clk_set_parent() API is implemented to enable re-parenting clocks in the clock tree. This is useful in DVFS and helps by shifting clocks to an asynchronous domain where supported by hardware Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 09e0e1c..e7696fc 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -141,6 +141,33 @@ int clk_set_rate(struct clk *clk, unsigned long rate) } EXPORT_SYMBOL(clk_set_rate); +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + unsigned long flags; + + if (clk == NULL || IS_ERR(clk)) + return -EINVAL; + + /* Cannot change parent on enabled clock */ + if (WARN_ON(clk->usecount)) + return -EINVAL; + + mutex_lock(&clocks_mutex); + clk->parent = parent; + list_del_init(&clk->childnode); + list_add(&clk->childnode, &clk->parent->children); + mutex_unlock(&clocks_mutex); + + spin_lock_irqsave(&clockfw_lock, flags); + if (clk->recalc) + clk->rate = clk->recalc(clk); + propagate_rate(clk); + spin_unlock_irqrestore(&clockfw_lock, flags); + + return 0; +} +EXPORT_SYMBOL(clk_set_parent); + int clk_register(struct clk *clk) { if (clk == NULL || IS_ERR(clk)) -- cgit v0.10.2 From 5d36a3321bd77418cc55e05680efc35deeaba3f4 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Mon, 31 Aug 2009 15:48:05 +0530 Subject: davinci: DA850/OMAP-L138: allow async3 source to be changed The patch allows Async3 clock source to be selected between PLL1 SYSCLK2 and PLL0 SYSCLK2. Having Async3 source from PLL1 SYSCLK2 allows peripherals on that domain to remain unaffected by frequency scaling on PLL0. Signed-off-by: Sekhar Nori Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index a75d3f7..d45dc69 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -69,9 +69,9 @@ struct clk { const char *name; unsigned long rate; u8 usecount; - u8 flags; u8 lpsc; u8 psc_ctlr; + u32 flags; struct clk *parent; struct list_head children; /* list of children */ struct list_head childnode; /* parent's child list node */ @@ -82,7 +82,7 @@ struct clk { int (*round_rate) (struct clk *clk, unsigned long rate); }; -/* Clock flags */ +/* Clock flags: SoC-specific flags start at BIT(16) */ #define ALWAYS_ENABLED BIT(1) #define CLK_PSC BIT(2) #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index f5c3a6a..575e9cc 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -30,12 +30,17 @@ #include "clock.h" #include "mux.h" +/* SoC specific clock flags */ +#define DA850_CLK_ASYNC3 BIT(16) + #define DA850_PLL1_BASE 0x01e1a000 #define DA850_TIMER64P2_BASE 0x01f0c000 #define DA850_TIMER64P3_BASE 0x01f0d000 #define DA850_REF_FREQ 24000000 +#define CFGCHIP3_ASYNC3_CLKSRC BIT(4) + static struct pll_data pll0_data = { .num = 1, .phys_base = DA8XX_PLL0_BASE, @@ -232,6 +237,7 @@ static struct clk uart1_clk = { .name = "uart1", .parent = &pll0_sysclk2, .lpsc = DA8XX_LPSC1_UART1, + .flags = DA850_CLK_ASYNC3, .psc_ctlr = 1, }; @@ -239,6 +245,7 @@ static struct clk uart2_clk = { .name = "uart2", .parent = &pll0_sysclk2, .lpsc = DA8XX_LPSC1_UART2, + .flags = DA850_CLK_ASYNC3, .psc_ctlr = 1, }; @@ -790,6 +797,30 @@ static struct davinci_timer_info da850_timer_info = { .clocksource_id = T0_TOP, }; +static void da850_set_async3_src(int pllnum) +{ + struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2; + struct davinci_clk *c; + unsigned int v; + int ret; + + for (c = da850_clks; c->lk.clk; c++) { + clk = c->lk.clk; + if (clk->flags & DA850_CLK_ASYNC3) { + ret = clk_set_parent(clk, newparent); + WARN(ret, "DA850: unable to re-parent clock %s", + clk->name); + } + } + + v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); + if (pllnum) + v |= CFGCHIP3_ASYNC3_CLKSRC; + else + v &= ~CFGCHIP3_ASYNC3_CLKSRC; + __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); +} + static struct davinci_soc_info davinci_soc_info_da850 = { .io_desc = da850_io_desc, .io_desc_num = ARRAY_SIZE(da850_io_desc), @@ -823,4 +854,13 @@ void __init da850_init(void) davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); davinci_common_init(&davinci_soc_info_da850); + + /* + * Move the clock source of Async3 domain to PLL1 SYSCLK2. + * This helps keeping the peripherals on this domain insulated + * from CPU frequency changes caused by DVFS. The firmware sets + * both PLL0 and PLL1 to the same frequency so, there should not + * be any noticible change even in non-DVFS use cases. + */ + da850_set_async3_src(1); } diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 6f03650..ec2821b 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -34,6 +34,7 @@ extern void __iomem *da8xx_syscfg_base; #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) #define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) #define DA8XX_JTAG_ID_REG 0x18 +#define DA8XX_CFGCHIP3_REG 0x188 #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 -- cgit v0.10.2 From f63dd12da29f47c37bbc093abec098538e04357c Mon Sep 17 00:00:00 2001 From: Hemant Pedanekar Date: Wed, 2 Sep 2009 16:49:35 +0530 Subject: davinci: dm646x: Add support for 3.x silicon revision DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'. This path adds entry for the same in dm646x_ids to be able to boot on boards with 3.x revision chips. Also modifies name for 'variant=0' (revisions 1.0, 1.1). Signed-off-by: Hemant Pedanekar Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 0976049..36e4fb4 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -789,7 +789,14 @@ static struct davinci_id dm646x_ids[] = { .part_no = 0xb770, .manufacturer = 0x017, .cpu_id = DAVINCI_CPU_ID_DM6467, - .name = "dm6467", + .name = "dm6467_rev1.x", + }, + { + .variant = 0x1, + .part_no = 0xb770, + .manufacturer = 0x017, + .cpu_id = DAVINCI_CPU_ID_DM6467, + .name = "dm6467_rev3.x", }, }; -- cgit v0.10.2 From 2eb30c81ce91f646f6f2e6cdfd36b79a492002ce Mon Sep 17 00:00:00 2001 From: "David A. Griego" Date: Tue, 15 Sep 2009 18:10:20 -0700 Subject: davinci: Add MMC/SD support for DA830/OMAP-L137 EVM Add pinmux settings, etc. to enable the MMC/SC hardware. Signed-off-by: David A. Griego Signed-off-by: Mark A. Greer Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 39711c1..fe86afa 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -83,6 +84,57 @@ static struct snd_platform_data da830_evm_snd_data = { .rxnumevt = 1, }; +/* + * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS. + */ +static const short da830_evm_mmc_sd_pins[] = { + DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, + DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, + DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, + DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2, + -1 +}; + +#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) + +static int da830_evm_mmc_get_ro(int index) +{ + return gpio_get_value(DA830_MMCSD_WP_PIN); +} + +static struct davinci_mmc_config da830_evm_mmc_config = { + .get_ro = da830_evm_mmc_get_ro, + .wires = 4, + .version = MMC_CTLR_VERSION_2, +}; + +static inline void da830_evm_init_mmc(void) +{ + int ret; + + ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins); + if (ret) { + pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n", + ret); + return; + } + + ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP"); + if (ret) { + pr_warning("da830_evm_init: can not open GPIO %d\n", + DA830_MMCSD_WP_PIN); + return; + } + gpio_direction_input(DA830_MMCSD_WP_PIN); + + ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); + if (ret) { + pr_warning("da830_evm_init: mmc/sd registration failed: %d\n", + ret); + gpio_free(DA830_MMCSD_WP_PIN); + } +} + static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -132,6 +184,8 @@ static __init void da830_evm_init(void) ret); da8xx_register_mcasp(1, &da830_evm_snd_data); + + da830_evm_init_mmc(); } #ifdef CONFIG_SERIAL_8250_CONSOLE -- cgit v0.10.2 From b9e6342b2b796c2f7fdc98cefd17df16892b035e Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Tue, 15 Sep 2009 18:14:19 -0700 Subject: davinci: Add support for Sharp LCD035Q3DG01 graphical LCD Add support for the Sharp LCD035Q3DG01 graphical LCD. This requires a minor interface change to da8xx_register_lcdc() so that the board code can pass in the platform_data which describes the lcd controller that's to be used. Signed-off-by: Mark A. Greer Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index fbc7aae..da1a6fb 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -377,7 +377,7 @@ static __init void da850_evm_init(void) pr_warning("da850_evm_init: lcd initialization failed: %d\n", ret); - ret = da8xx_register_lcdc(); + ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); if (ret) pr_warning("da850_evm_init: lcdc registration failed: %d\n", ret); diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 0102e0a..5595613 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -21,7 +21,6 @@ #include #include #include -#include