From 04b4a27226e6396bdd12ea5185c9eea995fc21c3 Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Thu, 14 Mar 2013 16:13:51 +0200 Subject: powerpc/e6500: Don't assume two threads always present There are virtualization scenarios that might expose to guests e6500 cores with just one thread. So check first how many threads are available and only after that try starting them. Signed-off-by: Laurentiu Tudor Change-Id: I7e14c0d7e9a792ad47e3f9cc41cf73a6a2b954f4 Reviewed-on: http://git.am.freescale.net:8181/578 Reviewed-by: Wood Scott-B07421 Reviewed-by: Fleming Andrew-AFLEMING Tested-by: Fleming Andrew-AFLEMING diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 8ae6b9f..b8682a3 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -717,6 +717,7 @@ #define MMUBE1_VBE4 0x00000002 #define MMUBE1_VBE5 0x00000001 +#define TMRN_TMCFG0 0x010 /* Thread Management Configuration Register 0 */ #define TMRN_TPRI0 0x0C0 /* Thread Priority Register 0 */ #define TMRN_TPRI1 0x0C1 /* Thread Priority Register 1 */ #define TMRN_TPRI2 0x0C2 /* Thread Priority Register 2 */ diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 0b7b33f..39308c7 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -1363,6 +1363,11 @@ _STATIC(init_core_book3e) _GLOBAL(fsl_enable_threads) BEGIN_FTR_SECTION + MFTMR(TMRN_TMCFG0, 3) + andi. r3,r3,0x3f + cmpi 0,r3,2 + blt 2f + /* Disable the other thread */ li r3,2 mtspr SPRN_TENC,r3 @@ -1386,8 +1391,7 @@ BEGIN_FTR_SECTION li r3, 2 mtspr SPRN_TENS, r3 END_FTR_SECTION_IFSET(CPU_FTR_SMT) - - blr +2: blr _STATIC(init_thread_book3e) lis r3,(SPRN_EPCR_ICM | SPRN_EPCR_GICM)@h -- cgit v0.10.2