From bdbff6bad8a81a90b1e3eb65be8892672cbde601 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 8 Aug 2013 10:51:15 -0500 Subject: MAINTAINERS: Add Kumar to Device Tree Binding maintainers group I'm tossing my hat into the ring of maintainers/reviewers for device tree bindings based on history of dealing with DT on embedded PPC and starting work on ARM SoCs. Signed-off-by: Kumar Gala Acked-by: Pawel Moll Cc: Mark Rutland Acked-by: Stephen Warren Cc: Ian Campbell Cc: Rob Herring Cc: Grant Likely Cc: Olof Johansson Signed-off-by: Rob Herring diff --git a/MAINTAINERS b/MAINTAINERS index 8285ed4..c4d89a7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6240,6 +6240,7 @@ M: Pawel Moll M: Mark Rutland M: Stephen Warren M: Ian Campbell +M: Kumar Gala L: devicetree@vger.kernel.org S: Maintained F: Documentation/devicetree/ -- cgit v0.10.2 From 2bfb66c279a491f92cd5e85f3bbc064295a344fd Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 8 Oct 2013 14:25:43 -0600 Subject: MAINTAINERS: remove swarren from DT bindings I'm afraid I'm rather burned out w.r.t. DT bindings. As has probably been evident, I don't have and haven't made the time to review many recently. As such, remove myself from that MAINTAINERS entry. Signed-off-by: Stephen Warren Signed-off-by: Rob Herring diff --git a/MAINTAINERS b/MAINTAINERS index c4d89a7..7243336 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6238,7 +6238,6 @@ OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS M: Rob Herring M: Pawel Moll M: Mark Rutland -M: Stephen Warren M: Ian Campbell M: Kumar Gala L: devicetree@vger.kernel.org -- cgit v0.10.2 From f04bda90392b729fea9b0420b2a87aa6f2abfcd9 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 7 Nov 2013 20:58:16 -0600 Subject: dt-bindings: add ARMv8 PMU binding Add missing "arm,armv8-pmuv3" compatible property for ARMv8 PMU. Signed-off-by: Rob Herring Cc: Will Deacon Cc: Pawel Moll Acked-by: Mark Rutland Cc: Ian Campbell diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt index 343781b..3e1e498 100644 --- a/Documentation/devicetree/bindings/arm/pmu.txt +++ b/Documentation/devicetree/bindings/arm/pmu.txt @@ -7,6 +7,7 @@ representation in the device tree should be done as under:- Required properties: - compatible : should be one of + "arm,armv8-pmuv3" "arm,cortex-a15-pmu" "arm,cortex-a9-pmu" "arm,cortex-a8-pmu" -- cgit v0.10.2 From f1e8e3811486b858bcc7190477bc6e4ea8f3488c Mon Sep 17 00:00:00 2001 From: Sricharan R Date: Fri, 8 Nov 2013 16:08:48 +0530 Subject: ARM: dts: doc: Document missing binding for omap5-mpu The binding and support for omap5-mpu which has a cortex-a15 smp core, gic and integrated L2 cache has been existing for sometime. So Documenting the missing binding here. Cc: Benoit Cousson Signed-off-by: Sricharan R Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt index 1a5a42c..83f405b 100644 --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt @@ -7,10 +7,18 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM. Required properties: - compatible : Should be "ti,omap3-mpu" for OMAP3 Should be "ti,omap4-mpu" for OMAP4 + Should be "ti,omap5-mpu" for OMAP5 - ti,hwmods: "mpu" Examples: +- For an OMAP5 SMP system: + +mpu { + compatible = "ti,omap5-mpu"; + ti,hwmods = "mpu" +}; + - For an OMAP4 SMP system: mpu { -- cgit v0.10.2 From 21ea02686164a71f1d464835c602c3fe2a0f3d61 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 18 Nov 2013 11:28:07 -0200 Subject: Documentation: net: fsl-fec.txt: Add phy-supply entry phy-supply is an optional property of the fec driver, so add it to the binding documentation. Signed-off-by: Fabio Estevam Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt index d536392..845ff84 100644 --- a/Documentation/devicetree/bindings/net/fsl-fec.txt +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt @@ -15,6 +15,7 @@ Optional properties: only if property "phy-reset-gpios" is available. Missing the property will have the duration be 1 millisecond. Numbers greater than 1000 are invalid and 1 millisecond will be used instead. +- phy-supply: regulator that powers the Ethernet PHY. Example: @@ -25,4 +26,5 @@ ethernet@83fec000 { phy-mode = "mii"; phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */ local-mac-address = [00 04 9F 01 1B B9]; + phy-supply = <®_fec_supply>; }; -- cgit v0.10.2 From 53d6b36020c76b7d77514ec08394a75cb9deab08 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 18 Nov 2013 11:11:19 +0100 Subject: of: Add vendor prefix for LG Corporation Signed-off-by: Thierry Reding Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index ce95ed1..e986fbe 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -38,6 +38,7 @@ ibm International Business Machines (IBM) idt Integrated Device Technologies, Inc. img Imagination Technologies Ltd. intercontrol Inter Control Group +lg LG Corporation linux Linux-specific binding lsi LSI Corp. (LSI Logic) marvell Marvell Technology Group Ltd. -- cgit v0.10.2 From cdbea09819fc5f2ad84f1ffa218999632f0857a7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 18 Nov 2013 12:46:12 +0100 Subject: clk: exynos: Fix typos in DT bindings documentation s/comptible/compatible/ Signed-off-by: Laurent Pinchart Reviewed-by: Sachin Kamat Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index c6bf8a6..a2ac2d9 100644 --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt @@ -6,7 +6,7 @@ SoC's in the Exynos4 family. Required Properties: -- comptible: should be one of the following. +- compatible: should be one of the following. - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC. - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC. diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 24765c1..46f5c79 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -5,7 +5,7 @@ controllers within the Exynos5250 SoC. Required Properties: -- comptible: should be one of the following. +- compatible: should be one of the following. - "samsung,exynos5250-clock" - controller compatible with Exynos5250 SoC. - reg: physical base address of the controller and length of memory mapped diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 32aa34e..458f347 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -5,7 +5,7 @@ controllers within the Exynos5420 SoC. Required Properties: -- comptible: should be one of the following. +- compatible: should be one of the following. - "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC. - reg: physical base address of the controller and length of memory mapped diff --git a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt index 4499e99..9955dc9 100644 --- a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt @@ -5,7 +5,7 @@ controllers within the Exynos5440 SoC. Required Properties: -- comptible: should be "samsung,exynos5440-clock". +- compatible: should be "samsung,exynos5440-clock". - reg: physical base address of the controller and length of memory mapped region. -- cgit v0.10.2 From dd622d2506a63f0d9cf7b3beaad12f012308a39f Mon Sep 17 00:00:00 2001 From: Wei Ni Date: Wed, 13 Nov 2013 18:59:09 +0800 Subject: of: add vendor prefix for GMT Adding Global Mixed-mode Technology Inc. to the list of devicetree vendor prefixes. Signed-off-by: Wei Ni Acked-by: Stephen Warren Reviewed-by: Jean Delvare Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index e986fbe..edbb8d8 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -32,6 +32,7 @@ est ESTeem Wireless Modems fsl Freescale Semiconductor GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. +gmt Global Mixed-mode Technology, Inc. hisilicon Hisilicon Limited. hp Hewlett Packard ibm International Business Machines (IBM) -- cgit v0.10.2 From 1675088f8bc3f955e9bd31418a6b3319487f27bf Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 23 Oct 2013 10:44:50 +0900 Subject: hwmon: ntc_thermistor: Fix typo (pullup-uV -> pullup-uv) This patch fix typo of property name from 'pullup-uV' to 'pullup-uv'. The ntc_thermistor.c use 'pullup-uv' when parsing dt data. Signed-off-by: Chanwoo Choi Reviewed-by: Jingoo Han Acked-by: Naveen Krishna Chatradhi Reviewed-by: Tomasz Figa Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt index 47ada1d..5d49f2b 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt @@ -49,7 +49,7 @@ adc@12D10000 { /* NTC thermistor is a hwmon device */ ncp15wb473@0 { compatible = "ntc,ncp15wb473"; - pullup-uV = <1800000>; + pullup-uv = <1800000>; pullup-ohm = <47000>; pulldown-ohm = <0>; io-channels = <&adc 4>; -- cgit v0.10.2 From 72d944ec7eeb195db96942d5a9f907a312e23313 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 25 Nov 2013 15:37:55 -0700 Subject: ARM: tegra: delete nvidia,tegra20-spi.txt binding This binding shouldn't exist; Tegra20 has two forms of SPI controller that are documented separately in nvidia,tegra20-sflash.txt and nvidia,tegra20-slink.txt. Signed-off-by: Stephen Warren Reviewed-by: Thierry Reding Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt deleted file mode 100644 index 6b9e518..0000000 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt +++ /dev/null @@ -1,5 +0,0 @@ -NVIDIA Tegra 2 SPI device - -Required properties: -- compatible : should be "nvidia,tegra20-spi". -- gpios : should specify GPIOs used for chipselect. -- cgit v0.10.2 From 2c0e641a963d073d60cb63c24614c642b6f64b21 Mon Sep 17 00:00:00 2001 From: Gerhard Sittig Date: Thu, 21 Nov 2013 09:41:44 +0100 Subject: dt: binding: reword PowerPC 8xxx GPIO documentation re-format and re-word the device tree binding documentation for MPC8xxx and compatibles, reference the common document for interrupt controllers and remove outdated duplicate SoC specific information Cc: Mark Rutland Cc: Rob Herring Cc: Pawel Moll Cc: Arnd Bergmann Cc: Acked-by: Arnd Bergmann Signed-off-by: Gerhard Sittig Signed-off-by: Rob Herring diff --git a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt index b0019eb..798cfc9 100644 --- a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt +++ b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt @@ -5,16 +5,42 @@ This is for the non-QE/CPM/GUTs GPIO controllers as found on Every GPIO controller node must have #gpio-cells property defined, this information will be used to translate gpio-specifiers. +See bindings/gpio/gpio.txt for details of how to specify GPIO +information for devices. + +The GPIO module usually is connected to the SoC's internal interrupt +controller, see bindings/interrupt-controller/interrupts.txt (the +interrupt client nodes section) for details how to specify this GPIO +module's interrupt. + +The GPIO module may serve as another interrupt controller (cascaded to +the SoC's internal interrupt controller). See the interrupt controller +nodes section in bindings/interrupt-controller/interrupts.txt for +details. Required properties: -- compatible : "fsl,-gpio" followed by "fsl,mpc8349-gpio" for - 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). - - interrupts : Interrupt mapping for GPIO IRQ. - - interrupt-parent : Phandle for the interrupt controller that - services interrupts for this device. -- gpio-controller : Marks the port as GPIO controller. +- compatible: "fsl,-gpio" followed by "fsl,mpc8349-gpio" + for 83xx, "fsl,mpc8572-gpio" for 85xx, or + "fsl,mpc8610-gpio" for 86xx. +- #gpio-cells: Should be two. The first cell is the pin number + and the second cell is used to specify optional + parameters (currently unused). +- interrupt-parent: Phandle for the interrupt controller that + services interrupts for this device. +- interrupts: Interrupt mapping for GPIO IRQ. +- gpio-controller: Marks the port as GPIO controller. + +Optional properties: +- interrupt-controller: Empty boolean property which marks the GPIO + module as an IRQ controller. +- #interrupt-cells: Should be two. Defines the number of integer + cells required to specify an interrupt within + this interrupt controller. The first cell + defines the pin number, the second cell + defines additional flags (trigger type, + trigger polarity). Note that the available + set of trigger conditions supported by the + GPIO module depends on the actual SoC. Example of gpio-controller nodes for a MPC8347 SoC: @@ -22,39 +48,27 @@ Example of gpio-controller nodes for a MPC8347 SoC: #gpio-cells = <2>; compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; reg = <0xc00 0x100>; - interrupts = <74 0x8>; interrupt-parent = <&ipic>; + interrupts = <74 0x8>; gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; }; gpio2: gpio-controller@d00 { #gpio-cells = <2>; compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; reg = <0xd00 0x100>; - interrupts = <75 0x8>; interrupt-parent = <&ipic>; + interrupts = <75 0x8>; gpio-controller; }; -See booting-without-of.txt for details of how to specify GPIO -information for devices. - -To use GPIO pins as interrupt sources for peripherals, specify the -GPIO controller as the interrupt parent and define GPIO number + -trigger mode using the interrupts property, which is defined like -this: - -interrupts = , where: - - number: GPIO pin (0..31) - - trigger: trigger mode: - 2 = trigger on falling edge - 3 = trigger on both edges - -Example of device using this is: +Example of a peripheral using the GPIO module as an IRQ controller: funkyfpga@0 { compatible = "funky-fpga"; ... - interrupts = <4 3>; interrupt-parent = <&gpio1>; + interrupts = <4 3>; }; -- cgit v0.10.2