From d5e9fe8462d3f596a420cc1a25a01928777f139b Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 10 Jun 2013 11:33:31 -0400 Subject: ARM: dts: keystone: Add minimal Keystone SOC device tree data Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet. Cc: Grant Likely Cc: Arnd Bergmann Cc: arm@kernel.org Acked-by: Olof Johansson Signed-off-by: Santosh Shilimkar diff --git a/Documentation/devicetree/bindings/arm/keystone/keystone.txt b/Documentation/devicetree/bindings/arm/keystone/keystone.txt new file mode 100644 index 0000000..63c0e6a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/keystone/keystone.txt @@ -0,0 +1,10 @@ +TI Keystone Platforms Device Tree Bindings +----------------------------------------------- + +Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the +following properties. + +Required properties: + - compatible: All TI specific devices present in Keystone SOC should be in + the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550 + type UART should use the specified compatible for those devices. diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts new file mode 100644 index 0000000..1334b42 --- /dev/null +++ b/arch/arm/boot/dts/keystone.dts @@ -0,0 +1,117 @@ +/* + * Copyright 2013 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +/include/ "skeleton.dtsi" + +/ { + model = "Texas Instruments Keystone 2 SoC"; + compatible = "ti,keystone-evm"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart0; + }; + + memory { + reg = <0x00000000 0x80000000 0x00000000 0x40000000>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&gic>; + + cpu@0 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <1>; + }; + + cpu@2 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <2>; + }; + + cpu@3 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <3>; + }; + }; + + gic: interrupt-controller { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #size-cells = <0>; + #address-cells = <1>; + interrupt-controller; + reg = <0x0 0x02561000 0x0 0x1000>, + <0x0 0x02562000 0x0 0x2000>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0x308>; + }; + + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = <0 20 0xf01>, + <0 21 0xf01>, + <0 22 0xf01>, + <0 23 0xf01>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ti,keystone","simple-bus"; + interrupt-parent = <&gic>; + ranges = <0x0 0x0 0x0 0xc0000000>; + + rstctrl: reset-controller { + compatible = "ti,keystone-reset"; + reg = <0x023100e8 4>; /* pll reset control reg */ + }; + + uart0: serial@02530c00 { + compatible = "ns16550a"; + current-speed = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + reg = <0x02530c00 0x100>; + clock-frequency = <133120000>; + interrupts = <0 277 0xf01>; + }; + + uart1: serial@02531000 { + compatible = "ns16550a"; + current-speed = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + reg = <0x02531000 0x100>; + clock-frequency = <133120000>; + interrupts = <0 280 0xf01>; + }; + + }; +}; -- cgit v0.10.2 From 828989ad87af15b555f783a70efa2cc526b35b3f Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 10 Jun 2013 11:27:13 -0400 Subject: ARM: keystone: Add minimal TI Keystone platform support Texas Instruments Keystone family of multi-core devices are based on ARM Cortex A15. Patch adds basic definitions for a new Keystone sub-architecture in ARM. The TCI66xxK2H Communications Infrastructure Keystone SoCs are member of the C66x family based on TI's new KeyStone 2 multi-core SoC Architecture designed specifically for high performance wireless and networking infrastructure applications. The SOCs contains many subsystems like Cortex A15 ARM CorePacs, C66XX DSP CorePacs, MSMC memory controller, Tera Net bus, IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers and queue based communication systems. Cc: Arnd Bergmann Cc: arm@kernel.org Acked-by: Olof Johansson Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 49d993c..62cd2fac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -948,6 +948,8 @@ source "arch/arm/mach-iop13xx/Kconfig" source "arch/arm/mach-ixp4xx/Kconfig" +source "arch/arm/mach-keystone/Kconfig" + source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-ks8695/Kconfig" @@ -1560,6 +1562,7 @@ config ARCH_NR_GPIO int default 1024 if ARCH_SHMOBILE || ARCH_TEGRA default 512 if SOC_OMAP5 + default 512 if ARCH_KEYSTONE default 392 if ARCH_U8500 default 352 if ARCH_VT8500 default 288 if ARCH_SUNXI diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1d41908..62e7f95 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -251,6 +251,20 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q/DL. + config DEBUG_KEYSTONE_UART0 + bool "Kernel low-level debugging on KEYSTONE2 using UART0" + depends on ARCH_KEYSTONE + help + Say Y here if you want the debug print routines to direct + their output to UART0 serial port on KEYSTONE2 devices. + + config DEBUG_KEYSTONE_UART1 + bool "Kernel low-level debugging on KEYSTONE2 using UART1" + depends on ARCH_KEYSTONE + help + Say Y here if you want the debug print routines to direct + their output to UART1 serial port on KEYSTONE2 devices. + config DEBUG_MMP_UART2 bool "Kernel low-level debugging message via MMP UART2" depends on ARCH_MMP @@ -632,6 +646,8 @@ config DEBUG_LL_INCLUDE DEBUG_IMX51_UART || \ DEBUG_IMX53_UART ||\ DEBUG_IMX6Q_UART + default "debug/keystone.S" if DEBUG_KEYSTONE_UART0 || \ + DEBUG_KEYSTONE_UART1 default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/mxs.S" if DEBUG_IMX23_UART || DEBUG_IMX28_UART default "debug/nomadik.S" if DEBUG_NOMADIK_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1ba358b..a1c9a78 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -194,6 +194,7 @@ machine-$(CONFIG_PLAT_SPEAR) += spear machine-$(CONFIG_ARCH_VIRT) += virt machine-$(CONFIG_ARCH_ZYNQ) += zynq machine-$(CONFIG_ARCH_SUNXI) += sunxi +machine-$(CONFIG_ARCH_KEYSTONE) += keystone # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig new file mode 100644 index 0000000..62e968c --- /dev/null +++ b/arch/arm/configs/keystone_defconfig @@ -0,0 +1,157 @@ +# CONFIG_SWAP is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_ELF_CORE is not set +# CONFIG_BASE_FULL is not set +CONFIG_EMBEDDED=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_ARCH_KEYSTONE=y +CONFIG_ARM_LPAE=y +CONFIG_SMP=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_SUSPEND is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_NET_IPIP=y +CONFIG_NET_IPGRE_DEMUX=y +CONFIG_NET_IPGRE=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V2=y +CONFIG_INET_AH=y +CONFIG_INET_IPCOMP=y +CONFIG_IPV6=y +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_NETFILTER=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_CPU=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_ULOG=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_TARGET_CLUSTERIP=y +CONFIG_IP_NF_TARGET_ECN=y +CONFIG_IP_NF_TARGET_TTL=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP_SCTP=y +CONFIG_VLAN_8021Q=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_CMA=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_PLATRAM=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_UBI=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_EEPROM_AT24=y +CONFIG_NETDEVICES=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_SPI=y +CONFIG_SPI_SPIDEV=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +# CONFIG_USB_SUPPORT is not set +CONFIG_DMADEVICES=y +CONFIG_COMMON_CLK_DEBUG=y +CONFIG_MEMORY=y +CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_WBUF_VERIFY=y +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_USER=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_USER_API_HASH=y +CONFIG_CRYPTO_USER_API_SKCIPHER=y diff --git a/arch/arm/include/debug/keystone.S b/arch/arm/include/debug/keystone.S new file mode 100644 index 0000000..9aef9ba --- /dev/null +++ b/arch/arm/include/debug/keystone.S @@ -0,0 +1,43 @@ +/* + * Early serial debug output macro for Keystone SOCs + * + * Copyright 2013 Texas Instruments, Inc. + * Santosh Shilimkar + * + * Based on RMKs low level debug code. + * Copyright (C) 1994-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +#define UART_SHIFT 2 +#if defined(CONFIG_DEBUG_KEYSTONE_UART0) +#define UART_PHYS 0x02530c00 +#define UART_VIRT 0xfeb30c00 +#elif defined(CONFIG_DEBUG_KEYSTONE_UART1) +#define UART_PHYS 0x02531000 +#define UART_VIRT 0xfeb31000 +#endif + + .macro addruart, rp, rv, tmp + ldr \rv, =UART_VIRT @ physical base address + ldr \rp, =UART_PHYS @ virtual base address + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + .macro waituart,rd,rx + .endm diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig new file mode 100644 index 0000000..aebe8cd --- /dev/null +++ b/arch/arm/mach-keystone/Kconfig @@ -0,0 +1,14 @@ +config ARCH_KEYSTONE + bool "Texas Instruments Keystone Devices" + depends on ARCH_MULTI_V7 + select CPU_V7 + select ARM_GIC + select HAVE_ARM_ARCH_TIMER + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select HAVE_SCHED_CLOCK + select ARCH_WANT_OPTIONAL_GPIOLIB + select ARM_ERRATA_798181 + help + Support for boards based on the Texas Instruments Keystone family of + SoCs. diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile new file mode 100644 index 0000000..d4671d5 --- /dev/null +++ b/arch/arm/mach-keystone/Makefile @@ -0,0 +1 @@ +obj-y := keystone.o diff --git a/arch/arm/mach-keystone/Makefile.boot b/arch/arm/mach-keystone/Makefile.boot new file mode 100644 index 0000000..f3835c4 --- /dev/null +++ b/arch/arm/mach-keystone/Makefile.boot @@ -0,0 +1 @@ +zreladdr-y := 0x80008000 diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c new file mode 100644 index 0000000..a67c19b --- /dev/null +++ b/arch/arm/mach-keystone/keystone.c @@ -0,0 +1,71 @@ +/* + * Keystone2 based boards and SOC related code. + * + * Copyright 2013 Texas Instruments, Inc. + * Cyril Chemparathy + * Santosh Shilimkar + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define PLL_RESET_WRITE_KEY_MASK 0xffff0000 +#define PLL_RESET_WRITE_KEY 0x5a69 +#define PLL_RESET BIT(16) + +static void __iomem *keystone_rstctrl; + +static void __init keystone_init(void) +{ + struct device_node *node; + + node = of_find_compatible_node(NULL, NULL, "ti,keystone-reset"); + if (WARN_ON(!node)) + pr_warn("ti,keystone-reset node undefined\n"); + + keystone_rstctrl = of_iomap(node, 0); + if (WARN_ON(!keystone_rstctrl)) + pr_warn("ti,keystone-reset iomap error\n"); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char *keystone_match[] __initconst = { + "ti,keystone-evm", + NULL, +}; + +void keystone_restart(char mode, const char *cmd) +{ + u32 val; + + BUG_ON(!keystone_rstctrl); + + /* Enable write access to RSTCTRL */ + val = readl(keystone_rstctrl); + val &= PLL_RESET_WRITE_KEY_MASK; + val |= PLL_RESET_WRITE_KEY; + writel(val, keystone_rstctrl); + + /* Reset the SOC */ + val = readl(keystone_rstctrl); + val &= ~PLL_RESET; + writel(val, keystone_rstctrl); +} + +DT_MACHINE_START(KEYSTONE, "Keystone") + .init_machine = keystone_init, + .dt_compat = keystone_match, + .restart = keystone_restart, +MACHINE_END -- cgit v0.10.2 From f07cb6a089644e2334c3523af589d9233cc18c74 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 10 Jun 2013 12:20:17 -0400 Subject: ARM: keystone: Enable SMP support on Keystone machines Add basic SMP support for Keystone machines. This does not include support for CPU hotplug for now. Cc: Arnd Bergmann Cc: arm@kernel.org Acked-by: Olof Johansson Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig index aebe8cd..2dbd4ce 100644 --- a/arch/arm/mach-keystone/Kconfig +++ b/arch/arm/mach-keystone/Kconfig @@ -4,6 +4,7 @@ config ARCH_KEYSTONE select CPU_V7 select ARM_GIC select HAVE_ARM_ARCH_TIMER + select HAVE_SMP select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index d4671d5..3f6b8ab 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile @@ -1 +1,2 @@ obj-y := keystone.o +obj-$(CONFIG_SMP) += platsmp.o diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c index a67c19b..fe4d9ff 100644 --- a/arch/arm/mach-keystone/keystone.c +++ b/arch/arm/mach-keystone/keystone.c @@ -19,6 +19,9 @@ #include #include #include +#include + +#include "keystone.h" #define PLL_RESET_WRITE_KEY_MASK 0xffff0000 #define PLL_RESET_WRITE_KEY 0x5a69 @@ -65,6 +68,7 @@ void keystone_restart(char mode, const char *cmd) } DT_MACHINE_START(KEYSTONE, "Keystone") + .smp = smp_ops(keystone_smp_ops), .init_machine = keystone_init, .dt_compat = keystone_match, .restart = keystone_restart, diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h new file mode 100644 index 0000000..43a1b47 --- /dev/null +++ b/arch/arm/mach-keystone/keystone.h @@ -0,0 +1,17 @@ +/* + * Copyright 2013 Texas Instruments, Inc. + * Cyril Chemparathy + * Santosh Shilimkar + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ + +#ifndef __KEYSTONE_H__ +#define __KEYSTONE_H__ + +extern struct smp_operations keystone_smp_ops; +extern void secondary_startup(void); + +#endif /* __KEYSTONE_H__ */ diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c new file mode 100644 index 0000000..630ab3b --- /dev/null +++ b/arch/arm/mach-keystone/platsmp.c @@ -0,0 +1,52 @@ +/* + * Keystone SOC SMP platform code + * + * Copyright 2013 Texas Instruments, Inc. + * Cyril Chemparathy + * Santosh Shilimkar + * + * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#include "keystone.h" + +static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, + struct task_struct *idle) +{ + unsigned long start = virt_to_phys(&secondary_startup); + int error; + + pr_debug("keystone-smp: booting cpu %d, vector %08lx\n", + cpu, start); + + asm volatile ( + "mov r0, #0\n" /* power on cmd */ + "mov r1, %1\n" /* cpu */ + "mov r2, %2\n" /* start */ + ".inst 0xe1600070\n" /* smc #0 */ + "mov %0, r0\n" + : "=r" (error) + : "r"(cpu), "r"(start) + : "cc", "r0", "r1", "r2", "memory" + ); + + pr_debug("keystone-smp: monitor returned %d\n", error); + + return error; +} + +struct smp_operations keystone_smp_ops __initdata = { + .smp_init_cpus = arm_dt_init_cpu_maps, + .smp_boot_secondary = keystone_smp_boot_secondary, +}; -- cgit v0.10.2