From f41caddbe73f52a42f529d668ce47b4d693fd2c0 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 22 Aug 2011 23:57:23 -0700 Subject: omap2+: Use Kconfig symbol in Makefile instead of obj-y As noted by Grant Likely , omap2+ Makefile unnecessarily repeats entries for common device init code instead of using Kconfig symbol. Remove references to hsmmc.o and board-flash.o. Also omap_phy_internal.o references can be removed once it has some Kconfig symbol to use. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index f343365..b1501bd 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -185,78 +185,66 @@ endif # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o -obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o \ - hsmmc.o +obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o -obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o \ - hsmmc.o -obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o \ - board-flash.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o \ - hsmmc.o -obj-$(CONFIG_MACH_OVERO) += board-overo.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o \ - hsmmc.o \ - board-flash.o +obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o +obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o +obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o +obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o +obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o +obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o +obj-$(CONFIG_MACH_OVERO) += board-overo.o +obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o +obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o +obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o \ - sdram-nokia.o \ - hsmmc.o + sdram-nokia.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o \ sdram-nokia.o \ board-rx51-peripherals.o \ - board-rx51-video.o \ - hsmmc.o + board-rx51-video.o obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o \ board-zoom-peripherals.o \ board-zoom-display.o \ - board-flash.o \ - hsmmc.o \ board-zoom-debugboard.o obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o \ board-zoom-peripherals.o \ board-zoom-display.o \ - board-flash.o \ - hsmmc.o \ board-zoom-debugboard.o obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o \ board-zoom-peripherals.o \ - board-zoom-display.o \ - board-flash.o \ - hsmmc.o -obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \ - hsmmc.o + board-zoom-display.o +obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o -obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o \ - hsmmc.o -obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \ - hsmmc.o +obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o +obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o \ - hsmmc.o \ omap_phy_internal.o obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \ - hsmmc.o \ + omap_phy_internal.o + +obj-$(CONFIG_MACH_PCM049) += board-omap4pcm049.o \ omap_phy_internal.o obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \ - omap_phy_internal.o \ + omap_phy_internal.o obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o -obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o \ - hsmmc.o +obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o + # Platform specific device init code + +omap-flash-$(CONFIG_MTD_NAND_OMAP2) := board-flash.o +omap-flash-$(CONFIG_MTD_ONENAND_OMAP2) := board-flash.o +obj-y += $(omap-flash-y) $(omap-flash-m) + +omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o +obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) + + usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o obj-y += $(usbfs-m) $(usbfs-y) obj-y += usb-musb.o -- cgit v0.10.2 From a4ca9dbe44a167d63545c7ac2b5a36d7b0b415b6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 22 Aug 2011 23:57:23 -0700 Subject: ARM: OMAP: Move omap2_init_common_devices out of init_early There's no need to call omap2_init_common_devices from init_early. It no longer does anything else except reprogram the memory timings for some boards, so it's better to do it later so we have a chance to get console messages if something goes wrong. Move it to happen after omap_serial_init gets called. And while patching it anyways, rename it to omap_sdrc_init as suggested by Benoit Cousson . Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 2028464..a4f43ee 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -144,7 +144,6 @@ static struct omap_board_config_kernel sdp2430_config[] __initdata = { static void __init omap_2430sdp_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct regulator_consumer_supply sdp2430_vmmc1_supplies[] = { @@ -235,6 +234,7 @@ static void __init omap_2430sdp_init(void) platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); omap_serial_init(); + omap_sdrc_init(NULL, NULL); omap2_hsmmc_init(mmc); omap2_usbfs_init(&sdp2430_usb_config); diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index bd600cf..cc8e148 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -228,7 +228,6 @@ static struct omap_board_config_kernel sdp3430_config[] __initdata = { static void __init omap_3430sdp_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); } static struct omap2_hsmmc_info mmc[] = { @@ -719,6 +718,7 @@ static void __init omap_3430sdp_init(void) gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1; omap_ads7846_init(1, gpio_pendown, 310, NULL); board_serial_init(); + omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL); usb_musb_init(NULL); board_smc91x_init(); board_flash_init(sdp_flash_partitions, chip_sel_3430, 0); diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index e4f37b5..96766e9 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -73,8 +73,6 @@ static struct omap_board_config_kernel sdp_config[] __initdata = { static void __init omap_sdp_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params, - h8mbx00u0mer0em_sdrc_params); } #ifdef CONFIG_OMAP_MUX @@ -207,6 +205,8 @@ static void __init omap_sdp_init(void) omap_board_config = sdp_config; omap_board_config_size = ARRAY_SIZE(sdp_config); zoom_peripherals_init(); + omap_sdrc_init(h8mbx00u0mer0em_sdrc_params, + h8mbx00u0mer0em_sdrc_params); zoom_display_init(); board_smc91x_init(); board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16); diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index c7cef44..bbe3735 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -392,7 +392,6 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { static void __init omap_4430sdp_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct omap_musb_board_data musb_board_data = { @@ -809,6 +808,7 @@ static void __init omap_4430sdp_init(void) omap_sfh7741prox_init(); platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); board_serial_init(); + omap_sdrc_init(NULL, NULL); omap4_sdp4430_wifi_init(); omap4_twl6030_hsmmc_init(mmc); diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 933e935..4701e8c 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -50,7 +50,6 @@ static struct omap_board_mux board_mux[] __initdata = { static void __init am3517_crane_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct usbhs_omap_board_data usbhs_bdata __initdata = { @@ -70,6 +69,7 @@ static void __init am3517_crane_init(void) omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap_serial_init(); + omap_sdrc_init(NULL, NULL); omap_board_config = am3517_crane_config; omap_board_config_size = ARRAY_SIZE(am3517_crane_config); diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index f3006c3..b5391a1 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -365,7 +365,6 @@ static struct omap_dss_board_info am3517_evm_dss_data = { static void __init am3517_evm_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct omap_musb_board_data musb_board_data = { @@ -469,6 +468,7 @@ static void __init am3517_evm_init(void) am3517_evm_i2c_init(); omap_display_init(&am3517_evm_dss_data); omap_serial_init(); + omap_sdrc_init(NULL, NULL); /* Configure GPIO for EHCI port */ omap_mux_init_gpio(57, OMAP_PIN_OUTPUT); diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 7021170..6d88ffa 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -276,7 +276,6 @@ static struct omap_board_config_kernel apollon_config[] __initdata = { static void __init omap_apollon_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct gpio apollon_gpio_leds[] __initdata = { @@ -340,6 +339,7 @@ static void __init omap_apollon_init(void) */ platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices)); omap_serial_init(); + omap_sdrc_init(NULL, NULL); } static void __init omap_apollon_map_io(void) diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 3af8aab..0f25496 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -474,8 +474,6 @@ static void __init cm_t35_init_i2c(void) static void __init cm_t35_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } #ifdef CONFIG_OMAP_MUX @@ -610,6 +608,8 @@ static void __init cm_t3x_common_init(void) omap_board_config_size = ARRAY_SIZE(cm_t35_config); omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); cm_t35_init_i2c(); omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); cm_t35_init_ethernet(); diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 05c72f4..88e1f74 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -254,7 +254,6 @@ static struct omap_board_config_kernel cm_t3517_config[] __initdata = { static void __init cm_t3517_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } #ifdef CONFIG_OMAP_MUX @@ -289,6 +288,7 @@ static void __init cm_t3517_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap_serial_init(); + omap_sdrc_init(NULL, NULL); omap_board_config = cm_t3517_config; omap_board_config_size = ARRAY_SIZE(cm_t3517_config); cm_t3517_init_leds(); diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index b6002ec..631dc58 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -401,8 +401,6 @@ static struct platform_device keys_gpio = { static void __init devkit8000_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } static void __init devkit8000_init_irq(void) @@ -645,6 +643,8 @@ static void __init devkit8000_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_dm9000_init(); diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 54db41a..5223898f 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -36,12 +36,12 @@ static struct omap_board_config_kernel generic_config[] = { static void __init omap_generic_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static void __init omap_generic_init(void) { omap_serial_init(); + omap_sdrc_init(NULL, NULL); omap_board_config = generic_config; omap_board_config_size = ARRAY_SIZE(generic_config); } diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 45de2b3..84ca5c0 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -293,7 +293,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = { static void __init omap_h4_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static void __init omap_h4_init_irq(void) @@ -371,6 +370,7 @@ static void __init omap_h4_init(void) platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); omap2_usbfs_init(&h4_usb_config); omap_serial_init(); + omap_sdrc_init(NULL, NULL); h4_init_flash(); } diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 35be778..1b2309f 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -494,8 +494,6 @@ static struct platform_device *igep_devices[] __initdata = { static void __init igep_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(m65kxxxxam_sdrc_params, - m65kxxxxam_sdrc_params); } static int igep2_keymap[] = { @@ -650,6 +648,8 @@ static void __init igep_init(void) igep_i2c_init(); platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); omap_serial_init(); + omap_sdrc_init(m65kxxxxam_sdrc_params, + m65kxxxxam_sdrc_params); usb_musb_init(NULL); igep_flash_init(); diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 218764c..c45a0f4 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -196,7 +196,6 @@ static struct omap_board_config_kernel ldp_config[] __initdata = { static void __init omap_ldp_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static struct twl4030_gpio_platform_data ldp_gpio_data = { @@ -325,6 +324,7 @@ static void __init omap_ldp_init(void) platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices)); omap_ads7846_init(1, 54, 310, NULL); omap_serial_init(); + omap_sdrc_init(NULL, NULL); usb_musb_init(NULL); board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index e11f0c5..2545a4a 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -625,7 +625,6 @@ static void __init n8x0_map_io(void) static void __init n8x0_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } #ifdef CONFIG_OMAP_MUX @@ -689,6 +688,7 @@ static void __init n8x0_init_machine(void) i2c_register_board_info(2, n810_i2c_board_info_2, ARRAY_SIZE(n810_i2c_board_info_2)); board_serial_init(); + omap_sdrc_init(NULL, NULL); gpmc_onenand_init(board_onenand_data); n8x0_mmc_init(); n8x0_usb_init(); diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 3ae16b4..ce3234d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -447,8 +447,6 @@ static struct platform_device keys_gpio = { static void __init omap3_beagle_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } static void __init omap3_beagle_init_irq(void) @@ -534,6 +532,8 @@ static void __init omap3_beagle_init(void) ARRAY_SIZE(omap3_beagle_devices)); omap_display_init(&beagle_dss_data); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_mux_init_gpio(170, OMAP_PIN_INPUT); /* REVISIT leave DVI powered down until it's needed ... */ diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index c452b3f..0735bca 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -523,7 +523,6 @@ static struct omap_board_config_kernel omap3_evm_config[] __initdata = { static void __init omap3_evm_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL); } static struct usbhs_omap_board_data usbhs_bdata __initdata = { @@ -640,6 +639,7 @@ static void __init omap3_evm_init(void) omap_display_init(&omap3_evm_dss_data); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */ usb_nop_xceiv_register(); diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 703aeb5..2e0b011 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -185,7 +185,6 @@ static inline void __init board_smsc911x_init(void) static void __init omap3logic_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } #ifdef CONFIG_OMAP_MUX @@ -200,6 +199,7 @@ static void __init omap3logic_init(void) omap3torpedo_fix_pbias_voltage(); omap3logic_i2c_init(); omap_serial_init(); + omap_sdrc_init(NULL, NULL); board_mmc_init(); board_smsc911x_init(); diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 080d7bd..0f70566 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -528,8 +528,6 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = { static void __init omap3pandora_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } static void __init pandora_wl1251_init(void) @@ -593,6 +591,8 @@ static void __init omap3pandora_init(void) ARRAY_SIZE(omap3pandora_devices)); omap_display_init(&pandora_dss_data); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); spi_register_board_info(omap3pandora_spi_board_info, ARRAY_SIZE(omap3pandora_spi_board_info)); omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL); diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 8e10498..04981f9 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -431,7 +431,6 @@ static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { static void __init omap3_stalker_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL); } static void __init omap3_stalker_init_irq(void) @@ -478,6 +477,7 @@ static void __init omap3_stalker_init(void) omap_display_init(&omap3_stalker_dss_data); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); usb_musb_init(NULL); usbhs_init(&usbhs_bdata); omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 852ea04..b3fe7ad 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -329,8 +329,6 @@ static struct omap_board_mux board_mux[] __initdata = { static void __init omap3_touchbook_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } static void __init omap3_touchbook_init_irq(void) @@ -385,6 +383,8 @@ static void __init omap3_touchbook_init(void) platform_add_devices(omap3_touchbook_devices, ARRAY_SIZE(omap3_touchbook_devices)); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_mux_init_gpio(170, OMAP_PIN_INPUT); /* REVISIT leave DVI powered down until it's needed ... */ diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 9aaa960..b730ca5 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -98,7 +98,6 @@ static struct platform_device *panda_devices[] __initdata = { static void __init omap4_panda_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static const struct usbhs_omap_board_data usbhs_bdata __initconst = { @@ -569,6 +568,7 @@ static void __init omap4_panda_init(void) platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); platform_device_register(&omap_vwlan_device); board_serial_init(); + omap_sdrc_init(NULL, NULL); omap4_twl6030_hsmmc_init(mmc); omap4_ehci_init(); usb_musb_init(&musb_board_data); diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index f949a99..c3bd1af 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -481,8 +481,6 @@ static int __init overo_spi_init(void) static void __init overo_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); } static const struct usbhs_omap_board_data usbhs_bdata __initconst = { @@ -514,6 +512,8 @@ static void __init overo_init(void) overo_i2c_init(); omap_display_init(&overo_dss_data); omap_serial_init(); + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_nand_flash_init(0, overo_nand_partitions, ARRAY_SIZE(overo_nand_partitions)); usb_musb_init(NULL); diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 7dfed24..a6f76e1 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -125,11 +125,7 @@ static void __init rm680_peripherals_init(void) static void __init rm680_init_early(void) { - struct omap_sdrc_params *sdrc_params; - omap2_init_common_infrastructure(); - sdrc_params = nokia_get_sdram_timings(); - omap2_init_common_devices(sdrc_params, sdrc_params); } #ifdef CONFIG_OMAP_MUX @@ -140,8 +136,14 @@ static struct omap_board_mux board_mux[] __initdata = { static void __init rm680_init(void) { + struct omap_sdrc_params *sdrc_params; + omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap_serial_init(); + + sdrc_params = nokia_get_sdram_timings(); + omap_sdrc_init(sdrc_params, sdrc_params); + usb_musb_init(NULL); rm680_peripherals_init(); } diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 5ea142f..656a8b5 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -104,11 +104,7 @@ static struct omap_board_config_kernel rx51_config[] = { static void __init rx51_init_early(void) { - struct omap_sdrc_params *sdrc_params; - omap2_init_common_infrastructure(); - sdrc_params = nokia_get_sdram_timings(); - omap2_init_common_devices(sdrc_params, sdrc_params); } extern void __init rx51_peripherals_init(void); @@ -127,11 +123,17 @@ static struct omap_musb_board_data musb_board_data = { static void __init rx51_init(void) { + struct omap_sdrc_params *sdrc_params; + omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap_board_config = rx51_config; omap_board_config_size = ARRAY_SIZE(rx51_config); omap3_pm_init_cpuidle(rx51_cpuidle_params); omap_serial_init(); + + sdrc_params = nokia_get_sdram_timings(); + omap_sdrc_init(sdrc_params, sdrc_params); + usb_musb_init(&musb_board_data); rx51_peripherals_init(); diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index a85d5b0..e249c3d 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -30,12 +30,12 @@ static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { static void __init ti8168_init_early(void) { omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); } static void __init ti8168_evm_init(void) { omap_serial_init(); + omap_sdrc_init(NULL, NULL); omap_board_config = ti8168_evm_config; omap_board_config_size = ARRAY_SIZE(ti8168_evm_config); } diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 8a98c3c..5695264 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -37,12 +37,6 @@ static void __init omap_zoom_init_early(void) { omap2_init_common_infrastructure(); - if (machine_is_omap_zoom2()) - omap2_init_common_devices(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - else if (machine_is_omap_zoom3()) - omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params, - h8mbx00u0mer0em_sdrc_params); } #ifdef CONFIG_OMAP_MUX @@ -129,6 +123,14 @@ static void __init omap_zoom_init(void) ZOOM_NAND_CS, NAND_BUSWIDTH_16); zoom_debugboard_init(); zoom_peripherals_init(); + + if (machine_is_omap_zoom2()) + omap_sdrc_init(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); + else if (machine_is_omap_zoom3()) + omap_sdrc_init(h8mbx00u0mer0em_sdrc_params, + h8mbx00u0mer0em_sdrc_params); + zoom_display_init(); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 2ce1ce6..9258a5c 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -376,7 +376,7 @@ void __init omap2_init_common_infrastructure(void) * omap_hwmod_late_init(), so boards that desire full watchdog * coverage of kernel initialization can reprogram the * postsetup_state between the calls to - * omap2_init_common_infra() and omap2_init_common_devices(). + * omap2_init_common_infra() and omap_sdrc_init(). * * XXX ideally we could detect whether the MPU WDT was currently * enabled here and make this conditional @@ -400,7 +400,7 @@ void __init omap2_init_common_infrastructure(void) pr_err("Could not init clock framework - unknown SoC\n"); } -void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, +void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { if (cpu_is_omap24xx() || omap3_has_sdrc()) { diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index d72ec85..75311fc 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -300,7 +300,7 @@ static inline void omap44xx_map_common_io(void) #endif extern void omap2_init_common_infrastructure(void); -extern void omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, +extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1); #define __arch_ioremap omap_ioremap -- cgit v0.10.2 From 8f5b5a41ebc750ffcc2c410371b2b4998955709e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 22 Aug 2011 23:57:24 -0700 Subject: ARM: OMAP: Introduce SoC specific early_init Introduce them for each omap variant and just make them all call omap2_init_common_infrastructure for now. Do this for each board-*.c file except for board-generic and board-omap3beagle as they use the same machine ID for multiple SoCs. No functional changes. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index a4f43ee..618216c 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -141,11 +141,6 @@ static struct omap_board_config_kernel sdp2430_config[] __initdata = { {OMAP_TAG_LCD, &sdp2430_lcd_config}, }; -static void __init omap_2430sdp_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct regulator_consumer_supply sdp2430_vmmc1_supplies[] = { REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), }; @@ -259,7 +254,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap_2430sdp_map_io, - .init_early = omap_2430sdp_init_early, + .init_early = omap2430_init_early, .init_irq = omap2_init_irq, .init_machine = omap_2430sdp_init, .timer = &omap2_timer, diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index cc8e148..9bb48ea 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -225,11 +225,6 @@ static struct omap_dss_board_info sdp3430_dss_data = { static struct omap_board_config_kernel sdp3430_config[] __initdata = { }; -static void __init omap_3430sdp_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct omap2_hsmmc_info mmc[] = { { .mmc = 1, @@ -732,7 +727,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap_3430sdp_init_early, + .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = omap_3430sdp_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 96766e9..94febc8 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -70,11 +70,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = { static struct omap_board_config_kernel sdp_config[] __initdata = { }; -static void __init omap_sdp_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -218,7 +213,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap_sdp_init_early, + .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = omap_sdp_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index bbe3735..ab19d30 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -389,11 +389,6 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = { { OMAP_TAG_LCD, &sdp4430_lcd_config }, }; -static void __init omap_4430sdp_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct omap_musb_board_data musb_board_data = { .interface_type = MUSB_INTERFACE_UTMI, .mode = MUSB_OTG, @@ -841,7 +836,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap_4430sdp_map_io, - .init_early = omap_4430sdp_init_early, + .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap_4430sdp_init, .timer = &omap4_timer, diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 4701e8c..9e1b2c2 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -47,11 +47,6 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init am3517_crane_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct usbhs_omap_board_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, @@ -101,7 +96,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = am3517_crane_init_early, + .init_early = am35xx_init_early, .init_irq = omap3_init_irq, .init_machine = am3517_crane_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index b5391a1..7d84294 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -362,10 +362,6 @@ static struct omap_dss_board_info am3517_evm_dss_data = { /* * Board initialization */ -static void __init am3517_evm_init_early(void) -{ - omap2_init_common_infrastructure(); -} static struct omap_musb_board_data musb_board_data = { .interface_type = MUSB_INTERFACE_ULPI, @@ -493,7 +489,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = am3517_evm_init_early, + .init_early = am35xx_init_early, .init_irq = omap3_init_irq, .init_machine = am3517_evm_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 6d88ffa..cf546f8 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -273,11 +273,6 @@ static struct omap_board_config_kernel apollon_config[] __initdata = { { OMAP_TAG_LCD, &apollon_lcd_config }, }; -static void __init omap_apollon_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct gpio apollon_gpio_leds[] __initdata = { { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */ { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6 */ @@ -353,7 +348,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap_apollon_map_io, - .init_early = omap_apollon_init_early, + .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = omap_apollon_init, .timer = &omap2_timer, diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 0f25496..e15d39b 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -471,11 +471,6 @@ static void __init cm_t35_init_i2c(void) omap3_pmic_init("tps65930", &cm_t35_twldata); } -static void __init cm_t35_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* nCS and IRQ for CM-T35 ethernet */ @@ -637,7 +632,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = cm_t35_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = cm_t35_init, .timer = &omap3_timer, @@ -647,7 +642,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = cm_t35_init_early, + .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = cm_t3730_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 88e1f74..867bf67 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -251,11 +251,6 @@ static inline void cm_t3517_init_nand(void) {} static struct omap_board_config_kernel cm_t3517_config[] __initdata = { }; -static void __init cm_t3517_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* GPIO186 - Green LED */ @@ -302,7 +297,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = cm_t3517_init_early, + .init_early = am35xx_init_early, .init_irq = omap3_init_irq, .init_machine = cm_t3517_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 631dc58..4b1f6c6 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -397,12 +397,6 @@ static struct platform_device keys_gpio = { }, }; - -static void __init devkit8000_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init devkit8000_init_irq(void) { omap3_init_irq(); @@ -670,7 +664,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = devkit8000_init_early, + .init_early = omap35xx_init_early, .init_irq = devkit8000_init_irq, .init_machine = devkit8000_init, .timer = &omap3_secure_timer, diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 84ca5c0..948fde0 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -290,11 +290,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = { { OMAP_TAG_LCD, &h4_lcd_config }, }; -static void __init omap_h4_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init omap_h4_init_irq(void) { omap2_init_irq(); @@ -385,7 +380,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap_h4_map_io, - .init_early = omap_h4_init_early, + .init_early = omap2420_init_early, .init_irq = omap_h4_init_irq, .init_machine = omap_h4_init, .timer = &omap2_timer, diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 1b2309f..7b66338 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -491,11 +491,6 @@ static struct platform_device *igep_devices[] __initdata = { &igep_vwlan_device, }; -static void __init igep_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static int igep2_keymap[] = { KEY(0, 0, KEY_LEFT), KEY(0, 1, KEY_RIGHT), @@ -675,7 +670,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = igep_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = igep_init, .timer = &omap3_timer, @@ -685,7 +680,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = igep_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = igep_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index c45a0f4..401b944 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -193,11 +193,6 @@ static struct omap_board_config_kernel ldp_config[] __initdata = { { OMAP_TAG_LCD, &ldp_lcd_config }, }; -static void __init omap_ldp_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct twl4030_gpio_platform_data ldp_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, @@ -336,7 +331,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap_ldp_init_early, + .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = omap_ldp_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 2545a4a..77a4e19 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -622,11 +622,6 @@ static void __init n8x0_map_io(void) omap242x_map_common_io(); } -static void __init n8x0_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* I2S codec port pins for McBSP block */ @@ -698,7 +693,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = n8x0_map_io, - .init_early = n8x0_init_early, + .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, @@ -708,7 +703,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = n8x0_map_io, - .init_early = n8x0_init_early, + .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, @@ -718,7 +713,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = n8x0_map_io, - .init_early = n8x0_init_early, + .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, .timer = &omap2_timer, diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 0735bca..a1184b3 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -520,11 +520,6 @@ static int __init omap3_evm_i2c_init(void) static struct omap_board_config_kernel omap3_evm_config[] __initdata = { }; -static void __init omap3_evm_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct usbhs_omap_board_data usbhs_bdata __initdata = { .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, @@ -684,7 +679,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap3_evm_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = omap3_evm_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 2e0b011..3a1dd84 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -182,11 +182,6 @@ static inline void __init board_smsc911x_init(void) gpmc_smsc911x_init(&board_smsc911x_data); } -static void __init omap3logic_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -211,7 +206,7 @@ static void __init omap3logic_init(void) MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .boot_params = 0x80000100, .map_io = omap3_map_io, - .init_early = omap3logic_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = omap3logic_init, .timer = &omap3_timer, @@ -220,7 +215,7 @@ MACHINE_END MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .boot_params = 0x80000100, .map_io = omap3_map_io, - .init_early = omap3logic_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = omap3logic_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 0f70566..e46bf52 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -525,11 +525,6 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = { } }; -static void __init omap3pandora_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init pandora_wl1251_init(void) { struct wl12xx_platform_data pandora_wl1251_pdata; @@ -609,7 +604,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap3pandora_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = omap3pandora_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 04981f9..807c274 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -428,11 +428,6 @@ static int __init omap3_stalker_i2c_init(void) static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { }; -static void __init omap3_stalker_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init omap3_stalker_init_irq(void) { omap3_init_irq(); @@ -496,7 +491,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") /* Maintainer: Jason Lam -lzg@ema-tech.com */ .boot_params = 0x80000100, .map_io = omap3_map_io, - .init_early = omap3_stalker_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_stalker_init_irq, .init_machine = omap3_stalker_init, .timer = &omap3_secure_timer, diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index b3fe7ad..f7f1809 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -326,11 +326,6 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init omap3_touchbook_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init omap3_touchbook_init_irq(void) { omap3_init_irq(); @@ -407,7 +402,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap3_touchbook_init_early, + .init_early = omap3430_init_early, .init_irq = omap3_touchbook_init_irq, .init_machine = omap3_touchbook_init, .timer = &omap3_secure_timer, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index b730ca5..1bce765 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -95,11 +95,6 @@ static struct platform_device *panda_devices[] __initdata = { &wl1271_device, }; -static void __init omap4_panda_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static const struct usbhs_omap_board_data usbhs_bdata __initconst = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, @@ -586,7 +581,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap4_panda_map_io, - .init_early = omap4_panda_init_early, + .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap4_panda_init, .timer = &omap4_timer, diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index c3bd1af..7228ae5 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -478,11 +478,6 @@ static int __init overo_spi_init(void) return 0; } -static void __init overo_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static const struct usbhs_omap_board_data usbhs_bdata __initconst = { .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, @@ -564,7 +559,7 @@ MACHINE_START(OVERO, "Gumstix Overo") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = overo_init_early, + .init_early = omap35xx_init_early, .init_irq = omap3_init_irq, .init_machine = overo_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index a6f76e1..a3182e8 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -123,11 +123,6 @@ static void __init rm680_peripherals_init(void) omap2_hsmmc_init(mmc); } -static void __init rm680_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -158,7 +153,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = rm680_map_io, - .init_early = rm680_init_early, + .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = rm680_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 656a8b5..32a79e2 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -102,11 +102,6 @@ static struct omap_board_config_kernel rx51_config[] = { { OMAP_TAG_LCD, &rx51_lcd_config }, }; -static void __init rx51_init_early(void) -{ - omap2_init_common_infrastructure(); -} - extern void __init rx51_peripherals_init(void); #ifdef CONFIG_OMAP_MUX @@ -161,7 +156,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .boot_params = 0x80000100, .reserve = rx51_reserve, .map_io = rx51_map_io, - .init_early = rx51_init_early, + .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = rx51_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index e249c3d..981ca00 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -27,11 +27,6 @@ static struct omap_board_config_kernel ti8168_evm_config[] __initdata = { }; -static void __init ti8168_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static void __init ti8168_evm_init(void) { omap_serial_init(); @@ -50,7 +45,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") /* Maintainer: Texas Instruments */ .boot_params = 0x80000100, .map_io = ti8168_evm_map_io, - .init_early = ti8168_init_early, + .init_early = ti816x_init_early, .init_irq = ti816x_init_irq, .timer = &omap3_timer, .init_machine = ti8168_evm_init, diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 5695264..d56c796 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -34,11 +34,6 @@ #define ZOOM3_EHCI_RESET_GPIO 64 -static void __init omap_zoom_init_early(void) -{ - omap2_init_common_infrastructure(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* WLAN IRQ - GPIO 162 */ @@ -138,7 +133,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap_zoom_init_early, + .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, .timer = &omap3_timer, @@ -148,7 +143,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap_zoom_init_early, + .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = omap_zoom_init, .timer = &omap3_timer, diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 9258a5c..132724c 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -400,6 +400,46 @@ void __init omap2_init_common_infrastructure(void) pr_err("Could not init clock framework - unknown SoC\n"); } +void __init omap2420_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init omap2430_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init omap3430_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init omap35xx_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init omap3630_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init am35xx_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init ti816x_init_early(void) +{ + omap2_init_common_infrastructure(); +} + +void __init omap4430_init_early(void) +{ + omap2_init_common_infrastructure(); +} + void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 4564cc6..5cac97e 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -45,6 +45,15 @@ extern unsigned long long notrace omap_32k_sched_clock(void); extern void omap_reserve(void); +void omap2420_init_early(void); +void omap2430_init_early(void); +void omap3430_init_early(void); +void omap35xx_init_early(void); +void omap3630_init_early(void); +void am35xx_init_early(void); +void ti816x_init_early(void); +void omap4430_init_early(void); + /* * IO bases for various OMAP processors * Except the tap base, rest all the io bases -- cgit v0.10.2 From 12234f39a2067887802e799fd45c3c41dd26e187 Mon Sep 17 00:00:00 2001 From: Michael Jones Date: Mon, 8 Aug 2011 09:46:20 +0200 Subject: OMAP2: PM debug: remove leftover debug code commit 20d5d5514981f9a68832bffb27a698545ecba77a (OMAP2: PM debug: remove register dumping) left some code lying around which doesn't do anything. Clean it up. Signed-off-by: Michael Jones Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index bf089e7..cf0c216 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -53,8 +53,6 @@ #include "powerdomain.h" #include "clockdomain.h" -static int omap2_pm_debug; - #ifdef CONFIG_SUSPEND static suspend_state_t suspend_state = PM_SUSPEND_ON; static inline bool is_suspending(void) @@ -96,7 +94,6 @@ static int omap2_fclks_active(void) static void omap2_enter_full_retention(void) { u32 l; - struct timespec ts_preidle, ts_postidle, ts_idle; /* There is 1 reference hold for all children of the oscillator * clock, the following will remove it. If no one else uses the @@ -124,10 +121,6 @@ static void omap2_enter_full_retention(void) omap2_gpio_prepare_for_idle(0); - if (omap2_pm_debug) { - getnstimeofday(&ts_preidle); - } - /* One last check for pending IRQs to avoid extra latency due * to sleeping unnecessarily. */ if (omap_irq_pending()) @@ -155,13 +148,6 @@ static void omap2_enter_full_retention(void) console_unlock(); no_sleep: - if (omap2_pm_debug) { - unsigned long long tmp; - - getnstimeofday(&ts_postidle); - ts_idle = timespec_sub(ts_postidle, ts_preidle); - tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; - } omap2_gpio_resume_after_idle(); clk_enable(osc_ck); @@ -219,7 +205,6 @@ static int omap2_allow_mpu_retention(void) static void omap2_enter_mpu_retention(void) { int only_idle = 0; - struct timespec ts_preidle, ts_postidle, ts_idle; /* Putting MPU into the WFI state while a transfer is active * seems to cause the I2C block to timeout. Why? Good question. */ @@ -246,19 +231,7 @@ static void omap2_enter_mpu_retention(void) only_idle = 1; } - if (omap2_pm_debug) { - getnstimeofday(&ts_preidle); - } - omap2_sram_idle(); - - if (omap2_pm_debug) { - unsigned long long tmp; - - getnstimeofday(&ts_postidle); - ts_idle = timespec_sub(ts_postidle, ts_preidle); - tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC; - } } static int omap2_can_sleep(void) -- cgit v0.10.2 From 1e2d2df32b6902376bc79faf99f264273be056ce Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 30 Aug 2011 18:48:16 +0200 Subject: OMAP2+: PM: fix typos in misc. comment and error messages Fix misc. typos in various comment and error message. Signed-off-by: Johan Hovold [khilman@ti.com: minor changelog/subject edits] Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 3feb359..fd77cf4 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -163,11 +163,11 @@ err: } /* - * This API is to be called during init to put the various voltage + * This API is to be called during init to set the various voltage * domains to the voltage as per the opp table. Typically we boot up * at the nominal voltage. So this function finds out the rate of * the clock associated with the voltage domain, finds out the correct - * opp entry and puts the voltage domain to the voltage specifies + * opp entry and sets the voltage domain to the voltage specified * in the opp entry */ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, @@ -218,7 +218,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, return 0; exit: - printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n", + printk(KERN_ERR "%s: Unable to set vdd_%s to its init voltage\n\n", __func__, vdd_name); return -EINVAL; } -- cgit v0.10.2 From e9a5190aa30d9d9eeead10a978609f46869bfe50 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 30 Aug 2011 18:48:17 +0200 Subject: OMAP2+: PM: clean up error messages: replace printk with pr_err. Also, clean up error messages by adding missing whitespace, fixing capitalisations, removing double newlines, and reducing verbosity. Signed-off-by: Johan Hovold [khilman@ti.com: minor changelog/subject edits] Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index fd77cf4..3837818 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -137,8 +137,8 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) ret = pwrdm_set_next_pwrst(pwrdm, state); if (ret) { - printk(KERN_ERR "Unable to set state of powerdomain: %s\n", - pwrdm->name); + pr_err("%s: unable to set state of powerdomain: %s\n", + __func__, pwrdm->name); goto err; } @@ -179,21 +179,20 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, unsigned long freq, bootup_volt; if (!vdd_name || !clk_name || !dev) { - printk(KERN_ERR "%s: Invalid parameters!\n", __func__); + pr_err("%s: invalid parameters\n", __func__); goto exit; } voltdm = omap_voltage_domain_lookup(vdd_name); if (IS_ERR(voltdm)) { - printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", + pr_err("%s: unable to get vdd pointer for vdd_%s\n", __func__, vdd_name); goto exit; } clk = clk_get(NULL, clk_name); if (IS_ERR(clk)) { - printk(KERN_ERR "%s: unable to get clk %s\n", - __func__, clk_name); + pr_err("%s: unable to get clk %s\n", __func__, clk_name); goto exit; } @@ -202,14 +201,14 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, opp = opp_find_freq_ceil(dev, &freq); if (IS_ERR(opp)) { - printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n", + pr_err("%s: unable to find boot up OPP for vdd_%s\n", __func__, vdd_name); goto exit; } bootup_volt = opp_get_voltage(opp); if (!bootup_volt) { - printk(KERN_ERR "%s: unable to find voltage corresponding" + pr_err("%s: unable to find voltage corresponding " "to the bootup OPP for vdd_%s\n", __func__, vdd_name); goto exit; } @@ -218,8 +217,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, return 0; exit: - printk(KERN_ERR "%s: Unable to set vdd_%s to its init voltage\n\n", - __func__, vdd_name); + pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name); return -EINVAL; } -- cgit v0.10.2 From 1f1b0353aa3ba5dfc35641452484ea4158ee3c9c Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:13 -0600 Subject: OMAP3: id: remove identification codes that only correspond to marketing names The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family. The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family. Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS. Thanks to Tony Lindgren for some help with the second revision of this patch. Signed-off-by: Paul Walmsley Cc: Sanjeev Premi Cc: Tony Lindgren Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index b9b8446..dadb8c6 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3472,7 +3472,16 @@ int __init omap3xxx_clk_init(void) struct omap_clk *c; u32 cpu_clkflg = 0; - if (cpu_is_omap3517()) { + /* + * 3505 must be tested before 3517, since 3517 returns true + * for both AM3517 chips and AM3517 family chips, which + * includes 3505. Unfortunately there's no obvious family + * test for 3517/3505 :-( + */ + if (cpu_is_omap3505()) { + cpu_mask = RATE_IN_34XX; + cpu_clkflg = CK_3505; + } else if (cpu_is_omap3517()) { cpu_mask = RATE_IN_34XX; cpu_clkflg = CK_3517; } else if (cpu_is_omap3505()) { diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 37efb86..3f3f998 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -304,14 +304,15 @@ static void __init omap3_check_revision(void) } break; case 0xb868: - /* Handle OMAP35xx/AM35xx devices + /* + * Handle OMAP/AM 3505/3517 devices * - * Set the device to be OMAP3505 here. Actual device + * Set the device to be OMAP3517 here. Actual device * is identified later based on the features. * * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ - omap_revision = OMAP3505_REV(rev); + omap_revision = OMAP3517_REV(rev); omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 0xb891: @@ -438,30 +439,24 @@ static void __init omap3_cpuinfo(void) */ if (cpu_is_omap3630()) { strcpy(cpu_name, "OMAP3630"); - } else if (cpu_is_omap3505()) { + } else if (cpu_is_omap3517()) { /* * AM35xx devices */ - if (omap3_has_sgx()) { - omap_revision = OMAP3517_REV(rev); + if (omap3_has_sgx()) strcpy(cpu_name, "AM3517"); - } else { - /* Already set in omap3_check_revision() */ + else strcpy(cpu_name, "AM3505"); - } } else if (cpu_is_ti816x()) { strcpy(cpu_name, "TI816X"); } else if (omap3_has_iva() && omap3_has_sgx()) { /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ strcpy(cpu_name, "OMAP3430/3530"); } else if (omap3_has_iva()) { - omap_revision = OMAP3525_REV(rev); strcpy(cpu_name, "OMAP3525"); } else if (omap3_has_sgx()) { - omap_revision = OMAP3515_REV(rev); strcpy(cpu_name, "OMAP3515"); } else { - omap_revision = OMAP3503_REV(rev); strcpy(cpu_name, "OMAP3503"); } diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 67b3d75..34df171 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -262,7 +262,7 @@ IS_OMAP_TYPE(2422, 0x2422) IS_OMAP_TYPE(2423, 0x2423) IS_OMAP_TYPE(2430, 0x2430) IS_OMAP_TYPE(3430, 0x3430) -IS_OMAP_TYPE(3505, 0x3505) +IS_OMAP_TYPE(3505, 0x3517) IS_OMAP_TYPE(3517, 0x3517) #define cpu_is_omap310() 0 @@ -354,8 +354,9 @@ IS_OMAP_TYPE(3517, 0x3517) (!omap3_has_sgx()) && \ (omap3_has_iva())) # define cpu_is_omap3530() (cpu_is_omap3430()) -# define cpu_is_omap3505() is_omap3505() # define cpu_is_omap3517() is_omap3517() +# define cpu_is_omap3505() (cpu_is_omap3517() && \ + !omap3_has_sgx()) # undef cpu_is_omap3630 # define cpu_is_omap3630() is_omap363x() # define cpu_is_ti816x() is_ti816x() @@ -397,13 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8)) #define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8)) -#define OMAP35XX_CLASS 0x35000034 -#define OMAP3503_REV(v) (OMAP35XX_CLASS | (0x3503 << 16) | (v << 8)) -#define OMAP3515_REV(v) (OMAP35XX_CLASS | (0x3515 << 16) | (v << 8)) -#define OMAP3525_REV(v) (OMAP35XX_CLASS | (0x3525 << 16) | (v << 8)) -#define OMAP3530_REV(v) (OMAP35XX_CLASS | (0x3530 << 16) | (v << 8)) -#define OMAP3505_REV(v) (OMAP35XX_CLASS | (0x3505 << 16) | (v << 8)) -#define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8)) +#define OMAP3517_CLASS 0x35170034 +#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8)) #define TI816X_CLASS 0x81600034 #define TI8168_REV_ES1_0 TI816X_CLASS -- cgit v0.10.2 From 91d92d6cc86c9390b891a96e12a452a644c3ad76 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:14 -0600 Subject: OMAP3: id: remove useless strcpy()s omap3_cpuinfo() is filled with useless strcpy() calls; remove them. Signed-off-by: Paul Walmsley Cc: Sanjeev Premi Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 3f3f998..9fae4de 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -429,84 +429,80 @@ static void __init omap4_check_revision(void) static void __init omap3_cpuinfo(void) { u8 rev = GET_OMAP_REVISION(); - char cpu_name[16], cpu_rev[16]; + const char *cpu_name, *cpu_rev; - /* OMAP3430 and OMAP3530 are assumed to be same. + /* + * OMAP3430 and OMAP3530 are assumed to be same. * * OMAP3525, OMAP3515 and OMAP3503 can be detected only based * on available features. Upon detection, update the CPU id * and CPU class bits. */ if (cpu_is_omap3630()) { - strcpy(cpu_name, "OMAP3630"); + cpu_name = "OMAP3630"; } else if (cpu_is_omap3517()) { - /* - * AM35xx devices - */ - if (omap3_has_sgx()) - strcpy(cpu_name, "AM3517"); - else - strcpy(cpu_name, "AM3505"); + /* AM35xx devices */ + cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; } else if (cpu_is_ti816x()) { - strcpy(cpu_name, "TI816X"); + cpu_name = "TI816X"; } else if (omap3_has_iva() && omap3_has_sgx()) { /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ - strcpy(cpu_name, "OMAP3430/3530"); + cpu_name = "OMAP3430/3530"; } else if (omap3_has_iva()) { - strcpy(cpu_name, "OMAP3525"); + cpu_name = "OMAP3525"; } else if (omap3_has_sgx()) { - strcpy(cpu_name, "OMAP3515"); + cpu_name = "OMAP3515"; } else { - strcpy(cpu_name, "OMAP3503"); + cpu_name = "OMAP3503"; } if (cpu_is_omap3630() || cpu_is_ti816x()) { switch (rev) { case OMAP_REVBITS_00: - strcpy(cpu_rev, "1.0"); + cpu_rev = "1.0"; break; case OMAP_REVBITS_01: - strcpy(cpu_rev, "1.1"); + cpu_rev = "1.1"; break; case OMAP_REVBITS_02: /* FALLTHROUGH */ default: /* Use the latest known revision as default */ - strcpy(cpu_rev, "1.2"); + cpu_rev = "1.2"; } } else if (cpu_is_omap3505() || cpu_is_omap3517()) { switch (rev) { case OMAP_REVBITS_00: - strcpy(cpu_rev, "1.0"); + cpu_rev = "1.0"; break; case OMAP_REVBITS_01: /* FALLTHROUGH */ default: /* Use the latest known revision as default */ - strcpy(cpu_rev, "1.1"); + cpu_rev = "1.1"; } } else { switch (rev) { case OMAP_REVBITS_00: - strcpy(cpu_rev, "1.0"); + cpu_rev = "1.0"; break; case OMAP_REVBITS_01: - strcpy(cpu_rev, "2.0"); + cpu_rev = "2.0"; break; case OMAP_REVBITS_02: - strcpy(cpu_rev, "2.1"); + cpu_rev = "2.1"; break; case OMAP_REVBITS_03: - strcpy(cpu_rev, "3.0"); + cpu_rev = "3.0"; break; case OMAP_REVBITS_04: - strcpy(cpu_rev, "3.1"); + cpu_rev = "3.1"; break; case OMAP_REVBITS_05: /* FALLTHROUGH */ default: /* Use the latest known revision as default */ - strcpy(cpu_rev, "3.1.2"); + cpu_rev = "3.1.2"; } } -- cgit v0.10.2 From 9ed2ba7aa78ee35dda2cfc9a49b5cd4b2ae88500 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:14 -0600 Subject: OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley Cc: Sanjeev Premi Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 9fae4de..94a51cf 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -312,7 +312,15 @@ static void __init omap3_check_revision(void) * * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ - omap_revision = OMAP3517_REV(rev); + switch (rev) { + case 0: + omap_revision = OMAP3517_REV_ES1_0; + break; + case 1: + /* FALLTHROUGH */ + default: + omap_revision = OMAP3517_REV_ES1_1; + } omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 0xb891: diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 34df171..1debee9 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -399,7 +399,8 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8)) #define OMAP3517_CLASS 0x35170034 -#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8)) +#define OMAP3517_REV_ES1_0 OMAP3517_CLASS +#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8)) #define TI816X_CLASS 0x81600034 #define TI8168_REV_ES1_0 TI816X_CLASS -- cgit v0.10.2 From 51ec811a292eba77c1df00d9d6416526b1ce7972 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:15 -0600 Subject: OMAP3: id: add fallthrough warning; fix some CodingStyle issues Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on. Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case. Signed-off-by: Paul Walmsley Cc: Hemant Pedanekar Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 94a51cf..3f4a0d0 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -336,8 +336,9 @@ static void __init omap3_check_revision(void) omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; break; case 2: + /* FALLTHROUGH */ default: - omap_revision = OMAP3630_REV_ES1_2; + omap_revision = OMAP3630_REV_ES1_2; omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; } break; @@ -349,16 +350,16 @@ static void __init omap3_check_revision(void) omap_revision = TI8168_REV_ES1_0; break; case 1: - omap_revision = TI8168_REV_ES1_1; - break; + /* FALLTHROUGH */ default: - omap_revision = TI8168_REV_ES1_1; + omap_revision = TI8168_REV_ES1_1; } break; default: - /* Unknown default to latest silicon rev as default*/ + /* Unknown default to latest silicon rev as default */ omap_revision = OMAP3630_REV_ES1_2; omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; + pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); } } -- cgit v0.10.2 From 3b32b7d62e9800579e591553875e5ff60be15546 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:15 -0600 Subject: OMAP3: id: remove duplicate code for testing SoC ES level omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo(). Signed-off-by: Paul Walmsley Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 3f4a0d0..ed1d439 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -242,7 +242,7 @@ static void __init ti816x_check_features(void) omap_features = OMAP3_HAS_NEON; } -static void __init omap3_check_revision(void) +static void __init omap3_check_revision(const char **cpu_rev) { u32 cpuid, idcode; u16 hawkeye; @@ -259,6 +259,7 @@ static void __init omap3_check_revision(void) if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; omap_chip.oc |= CHIP_IS_OMAP3430ES1; + *cpu_rev = "1.0"; return; } @@ -280,18 +281,22 @@ static void __init omap3_check_revision(void) case 1: omap_revision = OMAP3430_REV_ES2_0; omap_chip.oc |= CHIP_IS_OMAP3430ES2; + *cpu_rev = "2.0"; break; case 2: omap_revision = OMAP3430_REV_ES2_1; omap_chip.oc |= CHIP_IS_OMAP3430ES2; + *cpu_rev = "2.1"; break; case 3: omap_revision = OMAP3430_REV_ES3_0; omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; + *cpu_rev = "3.0"; break; case 4: omap_revision = OMAP3430_REV_ES3_1; omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; + *cpu_rev = "3.1"; break; case 7: /* FALLTHROUGH */ @@ -301,6 +306,7 @@ static void __init omap3_check_revision(void) /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; + *cpu_rev = "3.1.2"; } break; case 0xb868: @@ -315,11 +321,13 @@ static void __init omap3_check_revision(void) switch (rev) { case 0: omap_revision = OMAP3517_REV_ES1_0; + *cpu_rev = "1.0"; break; case 1: /* FALLTHROUGH */ default: omap_revision = OMAP3517_REV_ES1_1; + *cpu_rev = "1.1"; } omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; @@ -330,16 +338,19 @@ static void __init omap3_check_revision(void) switch(rev) { case 0: /* Take care of early samples */ omap_revision = OMAP3630_REV_ES1_0; + *cpu_rev = "1.0"; break; case 1: omap_revision = OMAP3630_REV_ES1_1; omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; + *cpu_rev = "1.1"; break; case 2: /* FALLTHROUGH */ default: omap_revision = OMAP3630_REV_ES1_2; omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; + *cpu_rev = "1.2"; } break; case 0xb81e: @@ -348,17 +359,21 @@ static void __init omap3_check_revision(void) switch (rev) { case 0: omap_revision = TI8168_REV_ES1_0; + *cpu_rev = "1.0"; break; case 1: /* FALLTHROUGH */ default: omap_revision = TI8168_REV_ES1_1; + *cpu_rev = "1.1"; + break; } break; default: /* Unknown default to latest silicon rev as default */ - omap_revision = OMAP3630_REV_ES1_2; + omap_revision = OMAP3630_REV_ES1_2; omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; + *cpu_rev = "1.2"; pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); } } @@ -435,10 +450,9 @@ static void __init omap4_check_revision(void) if (omap3_has_ ##feat()) \ printk(#feat" "); -static void __init omap3_cpuinfo(void) +static void __init omap3_cpuinfo(const char *cpu_rev) { - u8 rev = GET_OMAP_REVISION(); - const char *cpu_name, *cpu_rev; + const char *cpu_name; /* * OMAP3430 and OMAP3530 are assumed to be same. @@ -465,56 +479,6 @@ static void __init omap3_cpuinfo(void) cpu_name = "OMAP3503"; } - if (cpu_is_omap3630() || cpu_is_ti816x()) { - switch (rev) { - case OMAP_REVBITS_00: - cpu_rev = "1.0"; - break; - case OMAP_REVBITS_01: - cpu_rev = "1.1"; - break; - case OMAP_REVBITS_02: - /* FALLTHROUGH */ - default: - /* Use the latest known revision as default */ - cpu_rev = "1.2"; - } - } else if (cpu_is_omap3505() || cpu_is_omap3517()) { - switch (rev) { - case OMAP_REVBITS_00: - cpu_rev = "1.0"; - break; - case OMAP_REVBITS_01: - /* FALLTHROUGH */ - default: - /* Use the latest known revision as default */ - cpu_rev = "1.1"; - } - } else { - switch (rev) { - case OMAP_REVBITS_00: - cpu_rev = "1.0"; - break; - case OMAP_REVBITS_01: - cpu_rev = "2.0"; - break; - case OMAP_REVBITS_02: - cpu_rev = "2.1"; - break; - case OMAP_REVBITS_03: - cpu_rev = "3.0"; - break; - case OMAP_REVBITS_04: - cpu_rev = "3.1"; - break; - case OMAP_REVBITS_05: - /* FALLTHROUGH */ - default: - /* Use the latest known revision as default */ - cpu_rev = "3.1.2"; - } - } - /* Print verbose information */ pr_info("%s ES%s (", cpu_name, cpu_rev); @@ -533,6 +497,8 @@ static void __init omap3_cpuinfo(void) */ void __init omap2_check_revision(void) { + const char *cpu_rev; + /* * At this point we have an idea about the processor revision set * earlier with omap2_set_globals_tap(). @@ -540,7 +506,7 @@ void __init omap2_check_revision(void) if (cpu_is_omap24xx()) { omap24xx_check_revision(); } else if (cpu_is_omap34xx()) { - omap3_check_revision(); + omap3_check_revision(&cpu_rev); /* TI816X doesn't have feature register */ if (!cpu_is_ti816x()) @@ -548,7 +514,7 @@ void __init omap2_check_revision(void) else ti816x_check_features(); - omap3_cpuinfo(); + omap3_cpuinfo(cpu_rev); return; } else if (cpu_is_omap44xx()) { omap4_check_revision(); -- cgit v0.10.2 From 057673d8bd4a223c72850d843458cf3d35340bd3 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 13 Sep 2011 19:52:15 -0600 Subject: OMAP2+: id: remove OMAP_REVBITS_* macros The OMAP_REVBITS_* macros are just used as otherwise meaningless aliases for the numbers zero through five, so remove these macros. Signed-off-by: Paul Walmsley Tested-by: Igor Grinberg Tested-by: Abhilash Koyamangalath diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 1debee9..ddbc025 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -60,19 +60,6 @@ struct omap_chip_id { unsigned int omap_rev(void); /* - * Define CPU revision bits - * - * Verbose meaning of the revision bits may be different for a silicon - * family. This difference can be handled separately. - */ -#define OMAP_REVBITS_00 0x00 -#define OMAP_REVBITS_01 0x01 -#define OMAP_REVBITS_02 0x02 -#define OMAP_REVBITS_03 0x03 -#define OMAP_REVBITS_04 0x04 -#define OMAP_REVBITS_05 0x05 - -/* * Get the CPU revision for OMAP devices */ #define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff) @@ -380,31 +367,31 @@ IS_OMAP_TYPE(3517, 0x3517) /* Various silicon revisions for omap2 */ #define OMAP242X_CLASS 0x24200024 #define OMAP2420_REV_ES1_0 OMAP242X_CLASS -#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8)) +#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8)) #define OMAP243X_CLASS 0x24300024 #define OMAP2430_REV_ES1_0 OMAP243X_CLASS #define OMAP343X_CLASS 0x34300034 #define OMAP3430_REV_ES1_0 OMAP343X_CLASS -#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8)) -#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8)) -#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8)) -#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8)) -#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8)) +#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8)) +#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8)) +#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8)) +#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8)) +#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8)) #define OMAP363X_CLASS 0x36300034 #define OMAP3630_REV_ES1_0 OMAP363X_CLASS -#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8)) -#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8)) +#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8)) +#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8)) #define OMAP3517_CLASS 0x35170034 #define OMAP3517_REV_ES1_0 OMAP3517_CLASS -#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8)) +#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (0x1 << 8)) #define TI816X_CLASS 0x81600034 #define TI8168_REV_ES1_0 TI816X_CLASS -#define TI8168_REV_ES1_1 (TI816X_CLASS | (OMAP_REVBITS_01 << 8)) +#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) #define OMAP443X_CLASS 0x44300044 #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) -- cgit v0.10.2 From 08cb9703e2922db297d8f83ec110bde37823e021 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 16:01:20 -0600 Subject: OMAP: clockdomain: split clkdm_init() In preparation for OMAP_CHIP() removal, split clkdm_init() into four functions. This allows some of them to be called multiple times: for example, clkdm_register_clkdms() can be called once to register clockdomains that are common to a group of SoCs, and once to register clockdomains that are specific to a single SoC. The appropriate order to call these functions - which is enforced by the code - is: 1. clkdm_register_platform_funcs() 2. clkdm_register_clkdms() (can be called multiple times) 3. clkdm_register_autodeps() (optional; deprecated) 4. clkdm_complete_init() Convert the OMAP2, 3, and 4 clockdomain init code to use these new functions. While here, improve documentation, and increase CodingStyle conformance by shortening some local variable names. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 8f08906..b73a1dc 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -257,43 +257,113 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm, /* Public functions */ /** - * clkdm_init - set up the clockdomain layer - * @clkdms: optional pointer to an array of clockdomains to register - * @init_autodeps: optional pointer to an array of autodeps to register - * @custom_funcs: func pointers for arch specific implementations - * - * Set up internal state. If a pointer to an array of clockdomains - * @clkdms was supplied, loop through the list of clockdomains, - * register all that are available on the current platform. Similarly, - * if a pointer to an array of clockdomain autodependencies - * @init_autodeps was provided, register those. No return value. + * clkdm_register_platform_funcs - register clockdomain implementation fns + * @co: func pointers for arch specific implementations + * + * Register the list of function pointers used to implement the + * clockdomain functions on different OMAP SoCs. Should be called + * before any other clkdm_register*() function. Returns -EINVAL if + * @co is null, -EEXIST if platform functions have already been + * registered, or 0 upon success. + */ +int clkdm_register_platform_funcs(struct clkdm_ops *co) +{ + if (!co) + return -EINVAL; + + if (arch_clkdm) + return -EEXIST; + + arch_clkdm = co; + + return 0; +}; + +/** + * clkdm_register_clkdms - register SoC clockdomains + * @cs: pointer to an array of struct clockdomain to register + * + * Register the clockdomains available on a particular OMAP SoC. Must + * be called after clkdm_register_platform_funcs(). May be called + * multiple times. Returns -EACCES if called before + * clkdm_register_platform_funcs(); -EINVAL if the argument @cs is + * null; or 0 upon success. */ -void clkdm_init(struct clockdomain **clkdms, - struct clkdm_autodep *init_autodeps, - struct clkdm_ops *custom_funcs) +int clkdm_register_clkdms(struct clockdomain **cs) { struct clockdomain **c = NULL; - struct clockdomain *clkdm; - struct clkdm_autodep *autodep = NULL; - if (!custom_funcs) - WARN(1, "No custom clkdm functions registered\n"); - else - arch_clkdm = custom_funcs; + if (!arch_clkdm) + return -EACCES; + + if (!cs) + return -EINVAL; + + for (c = cs; *c; c++) + _clkdm_register(*c); - if (clkdms) - for (c = clkdms; *c; c++) - _clkdm_register(*c); + return 0; +} + +/** + * clkdm_register_autodeps - register autodeps (if required) + * @ia: pointer to a static array of struct clkdm_autodep to register + * + * Register clockdomain "automatic dependencies." These are + * clockdomain wakeup and sleep dependencies that are automatically + * added whenever the first clock inside a clockdomain is enabled, and + * removed whenever the last clock inside a clockdomain is disabled. + * These are currently only used on OMAP3 devices, and are deprecated, + * since they waste energy. However, until the OMAP2/3 IP block + * enable/disable sequence can be converted to match the OMAP4 + * sequence, they are needed. + * + * Must be called only after all of the SoC clockdomains are + * registered, since the function will resolve autodep clockdomain + * names into clockdomain pointers. + * + * The struct clkdm_autodep @ia array must be static, as this function + * does not copy the array elements. + * + * Returns -EACCES if called before any clockdomains have been + * registered, -EINVAL if called with a null @ia argument, -EEXIST if + * autodeps have already been registered, or 0 upon success. + */ +int clkdm_register_autodeps(struct clkdm_autodep *ia) +{ + struct clkdm_autodep *a = NULL; + + if (list_empty(&clkdm_list)) + return -EACCES; + + if (!ia) + return -EINVAL; - autodeps = init_autodeps; if (autodeps) - for (autodep = autodeps; autodep->clkdm.ptr; autodep++) - _autodep_lookup(autodep); + return -EEXIST; + + autodeps = ia; + for (a = autodeps; a->clkdm.ptr; a++) + _autodep_lookup(a); + + return 0; +} + +/** + * clkdm_complete_init - set up the clockdomain layer + * + * Put all clockdomains into software-supervised mode; PM code should + * later enable hardware-supervised mode as appropriate. Must be + * called after clkdm_register_clkdms(). Returns -EACCES if called + * before clkdm_register_clkdms(), or 0 upon success. + */ +int clkdm_complete_init(void) +{ + struct clockdomain *clkdm; + + if (list_empty(&clkdm_list)) + return -EACCES; - /* - * Put all clockdomains into software-supervised mode; PM code - * should later enable hardware-supervised mode as appropriate - */ list_for_each_entry(clkdm, &clkdm_list, node) { if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) clkdm_wakeup(clkdm); @@ -306,6 +376,8 @@ void clkdm_init(struct clockdomain **clkdms, _resolve_clkdm_deps(clkdm, clkdm->sleepdep_srcs); clkdm_clear_all_sleepdeps(clkdm); } + + return 0; } /** diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 1e50c88..0d879ff 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -166,8 +166,11 @@ struct clkdm_ops { int (*clkdm_clk_disable)(struct clockdomain *clkdm); }; -void clkdm_init(struct clockdomain **clkdms, struct clkdm_autodep *autodeps, - struct clkdm_ops *custom_funcs); +int clkdm_register_platform_funcs(struct clkdm_ops *co); +int clkdm_register_autodeps(struct clkdm_autodep *ia); +int clkdm_register_clkdms(struct clockdomain **c); +int clkdm_complete_init(void); + struct clockdomain *clkdm_lookup(const char *name); int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index 13bde95..148a3e8 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -857,12 +857,21 @@ static struct clockdomain *clockdomains_omap2[] __initdata = { NULL, }; +static void __init omap2_3_clockdomains_init(void) +{ + clkdm_register_clkdms(clockdomains_omap2); + clkdm_register_autodeps(clkdm_autodeps); + clkdm_complete_init(); +} + void __init omap2xxx_clockdomains_init(void) { - clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap2_clkdm_operations); + clkdm_register_platform_funcs(&omap2_clkdm_operations); + omap2_3_clockdomains_init(); } void __init omap3xxx_clockdomains_init(void) { - clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap3_clkdm_operations); + clkdm_register_platform_funcs(&omap3_clkdm_operations); + omap2_3_clockdomains_init(); } diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index dccc651..c75411a 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -685,7 +685,10 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { NULL }; + void __init omap44xx_clockdomains_init(void) { - clkdm_init(clockdomains_omap44xx, NULL, &omap4_clkdm_operations); + clkdm_register_platform_funcs(&omap4_clkdm_operations); + clkdm_register_clkdms(clockdomains_omap44xx); + clkdm_complete_init(); } -- cgit v0.10.2 From a5ffef6af127721a813d70f87cd8cc348ea9d6ab Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 16:01:21 -0600 Subject: OMAP: clockdomain code/data: remove omap_chip bitmask from struct clockdomain At Tony's request, remove the omap_chip bitmasks from the clockdomain and clockdomain dependency definitions. Instead, initialize clockdomains based on one or more lists that are applicable to a particular SoC family, variant, and silicon revision. Tony Lindgren found a bug in a previous version of this patch - thanks Tony. Signed-off-by: Paul Walmsley Cc: Tony Lindgren diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index f343365..5a6fe73 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -116,9 +116,12 @@ obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) \ obj-$(CONFIG_ARCH_OMAP2) += clockdomain.o \ clockdomain2xxx_3xxx.o \ clockdomains2xxx_3xxx_data.o +obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o +obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o obj-$(CONFIG_ARCH_OMAP3) += clockdomain.o \ clockdomain2xxx_3xxx.o \ - clockdomains2xxx_3xxx_data.o + clockdomains2xxx_3xxx_data.o \ + clockdomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += clockdomain.o \ clockdomain44xx.o \ clockdomains44xx_data.o diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index b73a1dc..8480ee4 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -73,9 +73,6 @@ static int _clkdm_register(struct clockdomain *clkdm) if (!clkdm || !clkdm->name) return -EINVAL; - if (!omap_chip_is(clkdm->omap_chip)) - return -EINVAL; - pwrdm = pwrdm_lookup(clkdm->pwrdm.name); if (!pwrdm) { pr_err("clockdomain: %s: powerdomain %s does not exist\n", @@ -105,13 +102,10 @@ static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm, { struct clkdm_dep *cd; - if (!clkdm || !deps || !omap_chip_is(clkdm->omap_chip)) + if (!clkdm || !deps) return ERR_PTR(-EINVAL); for (cd = deps; cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; - if (!cd->clkdm && cd->clkdm_name) cd->clkdm = _clkdm_lookup(cd->clkdm_name); @@ -148,9 +142,6 @@ static void _autodep_lookup(struct clkdm_autodep *autodep) if (!autodep) return; - if (!omap_chip_is(autodep->omap_chip)) - return; - clkdm = clkdm_lookup(autodep->clkdm.name); if (!clkdm) { pr_err("clockdomain: autodeps: clockdomain %s does not exist\n", @@ -182,9 +173,6 @@ void _clkdm_add_autodeps(struct clockdomain *clkdm) if (IS_ERR(autodep->clkdm.ptr)) continue; - if (!omap_chip_is(autodep->omap_chip)) - continue; - pr_debug("clockdomain: adding %s sleepdep/wkdep for " "clkdm %s\n", autodep->clkdm.ptr->name, clkdm->name); @@ -216,9 +204,6 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm) if (IS_ERR(autodep->clkdm.ptr)) continue; - if (!omap_chip_is(autodep->omap_chip)) - continue; - pr_debug("clockdomain: removing %s sleepdep/wkdep for " "clkdm %s\n", autodep->clkdm.ptr->name, clkdm->name); @@ -243,8 +228,6 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm, struct clkdm_dep *cd; for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; if (cd->clkdm) continue; cd->clkdm = _clkdm_lookup(cd->clkdm_name); diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 0d879ff..f7b58609 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -45,7 +45,6 @@ /** * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only - * @omap_chip: OMAP chip types that this autodep is valid on * * A clockdomain that should have wkdeps and sleepdeps added when a * clockdomain should stay active in hwsup mode; and conversely, @@ -60,14 +59,12 @@ struct clkdm_autodep { const char *name; struct clockdomain *ptr; } clkdm; - const struct omap_chip_id omap_chip; }; /** * struct clkdm_dep - encode dependencies between clockdomains * @clkdm_name: clockdomain name * @clkdm: pointer to the struct clockdomain of @clkdm_name - * @omap_chip: OMAP chip types that this dependency is valid on * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle * @@ -81,7 +78,6 @@ struct clkdm_dep { struct clockdomain *clkdm; atomic_t wkdep_usecount; atomic_t sleepdep_usecount; - const struct omap_chip_id omap_chip; }; /* Possible flags for struct clockdomain._flags */ @@ -101,7 +97,6 @@ struct clkdm_dep { * @clkdm_offs: (OMAP4 only) CM clockdomain register offset * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact - * @omap_chip: OMAP chip types that this clockdomain is valid on * @usecount: Usecount tracking * @node: list_head to link all clockdomains together * @@ -126,7 +121,6 @@ struct clockdomain { const u16 clkdm_offs; struct clkdm_dep *wkdep_srcs; struct clkdm_dep *sleepdep_srcs; - const struct omap_chip_id omap_chip; atomic_t usecount; struct list_head node; spinlock_t lock; @@ -198,7 +192,8 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); -extern void __init omap2xxx_clockdomains_init(void); +extern void __init omap242x_clockdomains_init(void); +extern void __init omap243x_clockdomains_init(void); extern void __init omap3xxx_clockdomains_init(void); extern void __init omap44xx_clockdomains_init(void); extern void _clkdm_add_autodeps(struct clockdomain *clkdm); @@ -208,4 +203,10 @@ extern struct clkdm_ops omap2_clkdm_operations; extern struct clkdm_ops omap3_clkdm_operations; extern struct clkdm_ops omap4_clkdm_operations; +extern struct clkdm_dep gfx_24xx_wkdeps[]; +extern struct clkdm_dep dsp_24xx_wkdeps[]; +extern struct clockdomain wkup_common_clkdm; +extern struct clockdomain prm_common_clkdm; +extern struct clockdomain cm_common_clkdm; + #endif diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c index f740edb..a0d68db 100644 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c @@ -52,8 +52,6 @@ static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) u32 mask = 0; for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; if (!cd->clkdm) continue; /* only happens if data is erroneous */ @@ -98,8 +96,6 @@ static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) u32 mask = 0; for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; if (!cd->clkdm) continue; /* only happens if data is erroneous */ diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c index b43706a..935c7f0 100644 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ b/arch/arm/mach-omap2/clockdomain44xx.c @@ -52,8 +52,6 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) u32 mask = 0; for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!omap_chip_is(cd->omap_chip)) - continue; if (!cd->clkdm) continue; /* only happens if data is erroneous */ diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c new file mode 100644 index 0000000..0ab8e46 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomains2420_data.c @@ -0,0 +1,154 @@ +/* + * OMAP2420 clockdomains + * + * Copyright (C) 2008-2011 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley, Jouni Högander + * + * This file contains clockdomains and clockdomain wakeup dependencies + * for OMAP2420 chips. Some notes: + * + * A useful validation rule for struct clockdomain: Any clockdomain + * referenced by a wkdep_srcs must have a dep_bit assigned. So + * wkdep_srcs are really just software-controllable dependencies. + * Non-software-controllable dependencies do exist, but they are not + * encoded below (yet). + * + * 24xx does not support programmable sleep dependencies (SLEEPDEP) + * + * The overly-specific dep_bit names are due to a bit name collision + * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift + * value are the same for all powerdomains: 2 + * + * XXX should dep_bit be a mask, so we can test to see if it is 0 as a + * sanity check? + * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE + */ + +/* + * To-Do List + * -> Port the Sleep/Wakeup dependencies for the domains + * from the Power domain framework + */ + +#include +#include + +#include "clockdomain.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-24xx.h" +#include "prm-regbits-24xx.h" + +/* + * Clockdomain dependencies for wkdeps + * + * XXX Hardware dependencies (e.g., dependencies that cannot be + * changed in software) are not included here yet, but should be. + */ + +/* Wakeup dependency source arrays */ + +/* 2420-specific possible wakeup dependencies */ + +/* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */ +static struct clkdm_dep mpu_2420_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "dsp_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */ +static struct clkdm_dep core_2420_wkdeps[] = { + { .clkdm_name = "dsp_clkdm" }, + { .clkdm_name = "gfx_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* + * 2420-only clockdomains + */ + +static struct clockdomain mpu_2420_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .wkdep_srcs = mpu_2420_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, +}; + +static struct clockdomain iva1_2420_clkdm = { + .name = "iva1_clkdm", + .pwrdm = { .name = "dsp_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, + .wkdep_srcs = dsp_24xx_wkdeps, + .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, +}; + +static struct clockdomain dsp_2420_clkdm = { + .name = "dsp_clkdm", + .pwrdm = { .name = "dsp_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, +}; + +static struct clockdomain gfx_2420_clkdm = { + .name = "gfx_clkdm", + .pwrdm = { .name = "gfx_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = gfx_24xx_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, +}; + +static struct clockdomain core_l3_2420_clkdm = { + .name = "core_l3_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .wkdep_srcs = core_2420_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, +}; + +static struct clockdomain core_l4_2420_clkdm = { + .name = "core_l4_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .wkdep_srcs = core_2420_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, +}; + +static struct clockdomain dss_2420_clkdm = { + .name = "dss_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, +}; + +static struct clockdomain *clockdomains_omap242x[] __initdata = { + &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, + &mpu_2420_clkdm, + &iva1_2420_clkdm, + &dsp_2420_clkdm, + &gfx_2420_clkdm, + &core_l3_2420_clkdm, + &core_l4_2420_clkdm, + &dss_2420_clkdm, + NULL, +}; + +void __init omap242x_clockdomains_init(void) +{ + if (!cpu_is_omap242x()) + return; + + clkdm_register_platform_funcs(&omap2_clkdm_operations); + clkdm_register_clkdms(clockdomains_omap242x); + clkdm_complete_init(); +} diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c new file mode 100644 index 0000000..3645ed0 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomains2430_data.c @@ -0,0 +1,181 @@ +/* + * OMAP2xxx clockdomains + * + * Copyright (C) 2008-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley, Jouni Högander + * + * This file contains clockdomains and clockdomain wakeup dependencies + * for OMAP2xxx chips. Some notes: + * + * A useful validation rule for struct clockdomain: Any clockdomain + * referenced by a wkdep_srcs must have a dep_bit assigned. So + * wkdep_srcs are really just software-controllable dependencies. + * Non-software-controllable dependencies do exist, but they are not + * encoded below (yet). + * + * 24xx does not support programmable sleep dependencies (SLEEPDEP) + * + * The overly-specific dep_bit names are due to a bit name collision + * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift + * value are the same for all powerdomains: 2 + * + * XXX should dep_bit be a mask, so we can test to see if it is 0 as a + * sanity check? + * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE + */ + +/* + * To-Do List + * -> Port the Sleep/Wakeup dependencies for the domains + * from the Power domain framework + */ + +#include +#include + +#include "clockdomain.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-24xx.h" +#include "prm-regbits-24xx.h" + +/* + * Clockdomain dependencies for wkdeps + * + * XXX Hardware dependencies (e.g., dependencies that cannot be + * changed in software) are not included here yet, but should be. + */ + +/* Wakeup dependency source arrays */ + +/* 2430-specific possible wakeup dependencies */ + +/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */ +static struct clkdm_dep core_2430_wkdeps[] = { + { .clkdm_name = "dsp_clkdm" }, + { .clkdm_name = "gfx_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { .clkdm_name = "mdm_clkdm" }, + { NULL }, +}; + +/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */ +static struct clkdm_dep mpu_2430_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "dsp_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { .clkdm_name = "mdm_clkdm" }, + { NULL }, +}; + +/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */ +static struct clkdm_dep mdm_2430_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* + * 2430-only clockdomains + */ + +static struct clockdomain mpu_2430_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = mpu_2430_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, +}; + +/* Another case of bit name collisions between several registers: EN_MDM */ +static struct clockdomain mdm_clkdm = { + .name = "mdm_clkdm", + .pwrdm = { .name = "mdm_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT, + .wkdep_srcs = mdm_2430_wkdeps, + .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, +}; + +static struct clockdomain dsp_2430_clkdm = { + .name = "dsp_clkdm", + .pwrdm = { .name = "dsp_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, + .wkdep_srcs = dsp_24xx_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, +}; + +static struct clockdomain gfx_2430_clkdm = { + .name = "gfx_clkdm", + .pwrdm = { .name = "gfx_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = gfx_24xx_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, +}; + +/* + * XXX add usecounting for clkdm dependencies, otherwise the presence + * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm + * could cause trouble + */ +static struct clockdomain core_l3_2430_clkdm = { + .name = "core_l3_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .dep_bit = OMAP24XX_EN_CORE_SHIFT, + .wkdep_srcs = core_2430_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, +}; + +/* + * XXX add usecounting for clkdm dependencies, otherwise the presence + * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm + * could cause trouble + */ +static struct clockdomain core_l4_2430_clkdm = { + .name = "core_l4_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .dep_bit = OMAP24XX_EN_CORE_SHIFT, + .wkdep_srcs = core_2430_wkdeps, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, +}; + +static struct clockdomain dss_2430_clkdm = { + .name = "dss_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, +}; + +static struct clockdomain *clockdomains_omap243x[] __initdata = { + &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, + &mpu_2430_clkdm, + &mdm_clkdm, + &dsp_2430_clkdm, + &gfx_2430_clkdm, + &core_l3_2430_clkdm, + &core_l4_2430_clkdm, + &dss_2430_clkdm, + NULL, +}; + +void __init omap243x_clockdomains_init(void) +{ + if (!cpu_is_omap243x()) + return; + + clkdm_register_platform_funcs(&omap2_clkdm_operations); + clkdm_register_clkdms(clockdomains_omap243x); + clkdm_complete_init(); +} + diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c index 148a3e8..0a6a048 100644 --- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c @@ -1,7 +1,7 @@ /* - * OMAP2/3 clockdomains + * OMAP2/3 clockdomain common data * - * Copyright (C) 2008-2009 Texas Instruments, Inc. + * Copyright (C) 2008-2011 Texas Instruments, Inc. * Copyright (C) 2008-2010 Nokia Corporation * * Paul Walmsley, Jouni Högander @@ -51,374 +51,28 @@ * changed in software) are not included here yet, but should be. */ -/* OMAP2/3-common wakeup dependencies */ - -/* - * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP - * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE - * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE - * These can share data since they will never be present simultaneously - * on the same device. - */ -static struct clkdm_dep gfx_sgx_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | - CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | - CHIP_IS_OMAP3430) - }, - { NULL }, -}; - - -/* 24XX-specific possible dependencies */ - -#ifdef CONFIG_ARCH_OMAP2 - /* Wakeup dependency source arrays */ -/* 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP */ -static struct clkdm_dep dsp_24xx_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { NULL }, -}; - -/* - * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP - * 2430 adds MDM - */ -static struct clkdm_dep mpu_24xx_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "dsp_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "mdm_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }, - { NULL }, -}; - -/* - * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP - * 2430 adds MDM - */ -static struct clkdm_dep core_24xx_wkdeps[] = { - { - .clkdm_name = "dsp_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "gfx_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "mdm_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) - }, - { NULL }, -}; - -#endif /* CONFIG_ARCH_OMAP2 */ - -/* 2430-specific possible wakeup dependencies */ +/* 2xxx-specific possible dependencies */ -#ifdef CONFIG_SOC_OMAP2430 - -/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */ -static struct clkdm_dep mdm_2430_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) - }, - { NULL }, -}; - -#endif /* CONFIG_SOC_OMAP2430 */ - - -/* OMAP3-specific possible dependencies */ - -#ifdef CONFIG_ARCH_OMAP3 - -/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */ -static struct clkdm_dep per_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */ -static struct clkdm_dep usbhost_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, +/* 2xxx PM_WKDEP_GFX: CORE, MPU, WKUP */ +struct clkdm_dep gfx_24xx_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, { NULL }, }; -/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */ -static struct clkdm_dep mpu_3xxx_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, +/* 2xxx PM_WKDEP_DSP: CORE, MPU, WKUP */ +struct clkdm_dep dsp_24xx_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, { NULL }, }; -/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */ -static struct clkdm_dep iva2_wkdeps[] = { - { - .clkdm_name = "core_l3_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "core_l4_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - - -/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */ -static struct clkdm_dep cam_wkdeps[] = { - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */ -static struct clkdm_dep dss_wkdeps[] = { - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430: PM_WKDEP_NEON: MPU */ -static struct clkdm_dep neon_wkdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - - -/* Sleep dependency source arrays for OMAP3-specific clkdms */ - -/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */ -static struct clkdm_dep dss_sleepdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430: CM_SLEEPDEP_PER: MPU, IVA */ -static struct clkdm_dep per_sleepdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */ -static struct clkdm_dep usbhost_sleepdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm_name = "iva2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* 3430: CM_SLEEPDEP_CAM: MPU */ -static struct clkdm_dep cam_sleepdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -/* - * 3430ES1: CM_SLEEPDEP_GFX: MPU - * 3430ES2: CM_SLEEPDEP_SGX: MPU - * These can share data since they will never be present simultaneously - * on the same device. - */ -static struct clkdm_dep gfx_sgx_sleepdeps[] = { - { - .clkdm_name = "mpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { NULL }, -}; - -#endif /* CONFIG_ARCH_OMAP3 */ - /* * OMAP2/3-common clockdomains @@ -430,448 +84,18 @@ static struct clkdm_dep gfx_sgx_sleepdeps[] = { */ /* This is an implicit clockdomain - it is never defined as such in TRM */ -static struct clockdomain wkup_clkdm = { +struct clockdomain wkup_common_clkdm = { .name = "wkup_clkdm", .pwrdm = { .name = "wkup_pwrdm" }, .dep_bit = OMAP_EN_WKUP_SHIFT, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), }; -static struct clockdomain prm_clkdm = { +struct clockdomain prm_common_clkdm = { .name = "prm_clkdm", .pwrdm = { .name = "wkup_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), }; -static struct clockdomain cm_clkdm = { +struct clockdomain cm_common_clkdm = { .name = "cm_clkdm", .pwrdm = { .name = "core_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), -}; - -/* - * 2420-only clockdomains - */ - -#if defined(CONFIG_SOC_OMAP2420) - -static struct clockdomain mpu_2420_clkdm = { - .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .wkdep_srcs = mpu_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain iva1_2420_clkdm = { - .name = "iva1_clkdm", - .pwrdm = { .name = "dsp_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, - .wkdep_srcs = dsp_24xx_wkdeps, - .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain dsp_2420_clkdm = { - .name = "dsp_clkdm", - .pwrdm = { .name = "dsp_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain gfx_2420_clkdm = { - .name = "gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = gfx_sgx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain core_l3_2420_clkdm = { - .name = "core_l3_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .wkdep_srcs = core_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain core_l4_2420_clkdm = { - .name = "core_l4_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .wkdep_srcs = core_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -static struct clockdomain dss_2420_clkdm = { - .name = "dss_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -#endif /* CONFIG_SOC_OMAP2420 */ - - -/* - * 2430-only clockdomains - */ - -#if defined(CONFIG_SOC_OMAP2430) - -static struct clockdomain mpu_2430_clkdm = { - .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = mpu_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -/* Another case of bit name collisions between several registers: EN_MDM */ -static struct clockdomain mdm_clkdm = { - .name = "mdm_clkdm", - .pwrdm = { .name = "mdm_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT, - .wkdep_srcs = mdm_2430_wkdeps, - .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -static struct clockdomain dsp_2430_clkdm = { - .name = "dsp_clkdm", - .pwrdm = { .name = "dsp_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, - .wkdep_srcs = dsp_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -static struct clockdomain gfx_2430_clkdm = { - .name = "gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = gfx_sgx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -/* - * XXX add usecounting for clkdm dependencies, otherwise the presence - * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm - * could cause trouble - */ -static struct clockdomain core_l3_2430_clkdm = { - .name = "core_l3_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .dep_bit = OMAP24XX_EN_CORE_SHIFT, - .wkdep_srcs = core_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -/* - * XXX add usecounting for clkdm dependencies, otherwise the presence - * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm - * could cause trouble - */ -static struct clockdomain core_l4_2430_clkdm = { - .name = "core_l4_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .dep_bit = OMAP24XX_EN_CORE_SHIFT, - .wkdep_srcs = core_24xx_wkdeps, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -static struct clockdomain dss_2430_clkdm = { - .name = "dss_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), -}; - -#endif /* CONFIG_SOC_OMAP2430 */ - - -/* - * OMAP3 clockdomains - */ - -#if defined(CONFIG_ARCH_OMAP3) - -static struct clockdomain mpu_3xxx_clkdm = { - .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, - .dep_bit = OMAP3430_EN_MPU_SHIFT, - .wkdep_srcs = mpu_3xxx_wkdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; - -static struct clockdomain neon_clkdm = { - .name = "neon_clkdm", - .pwrdm = { .name = "neon_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = neon_wkdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain iva2_clkdm = { - .name = "iva2_clkdm", - .pwrdm = { .name = "iva2_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, - .wkdep_srcs = iva2_wkdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain gfx_3430es1_clkdm = { - .name = "gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = gfx_sgx_wkdeps, - .sleepdep_srcs = gfx_sgx_sleepdeps, - .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), -}; - -static struct clockdomain sgx_clkdm = { - .name = "sgx_clkdm", - .pwrdm = { .name = "sgx_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = gfx_sgx_wkdeps, - .sleepdep_srcs = gfx_sgx_sleepdeps, - .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -}; - -/* - * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but - * then that information was removed from the 34xx ES2+ TRM. It is - * unclear whether the core is still there, but the clockdomain logic - * is there, and must be programmed to an appropriate state if the - * CORE clockdomain is to become inactive. - */ -static struct clockdomain d2d_clkdm = { - .name = "d2d_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -/* - * XXX add usecounting for clkdm dependencies, otherwise the presence - * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm - * could cause trouble - */ -static struct clockdomain core_l3_3xxx_clkdm = { - .name = "core_l3_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .dep_bit = OMAP3430_EN_CORE_SHIFT, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -/* - * XXX add usecounting for clkdm dependencies, otherwise the presence - * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm - * could cause trouble - */ -static struct clockdomain core_l4_3xxx_clkdm = { - .name = "core_l4_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .flags = CLKDM_CAN_HWSUP, - .dep_bit = OMAP3430_EN_CORE_SHIFT, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -/* Another case of bit name collisions between several registers: EN_DSS */ -static struct clockdomain dss_3xxx_clkdm = { - .name = "dss_clkdm", - .pwrdm = { .name = "dss_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT, - .wkdep_srcs = dss_wkdeps, - .sleepdep_srcs = dss_sleepdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain cam_clkdm = { - .name = "cam_clkdm", - .pwrdm = { .name = "cam_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = cam_wkdeps, - .sleepdep_srcs = cam_sleepdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain usbhost_clkdm = { - .name = "usbhost_clkdm", - .pwrdm = { .name = "usbhost_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .wkdep_srcs = usbhost_wkdeps, - .sleepdep_srcs = usbhost_sleepdeps, - .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -}; - -static struct clockdomain per_clkdm = { - .name = "per_clkdm", - .pwrdm = { .name = "per_pwrdm" }, - .flags = CLKDM_CAN_HWSUP_SWSUP, - .dep_bit = OMAP3430_EN_PER_SHIFT, - .wkdep_srcs = per_wkdeps, - .sleepdep_srcs = per_sleepdeps, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -/* - * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is - * switched of even if sdti is in use - */ -static struct clockdomain emu_clkdm = { - .name = "emu_clkdm", - .pwrdm = { .name = "emu_pwrdm" }, - .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP, - .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll1_clkdm = { - .name = "dpll1_clkdm", - .pwrdm = { .name = "dpll1_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll2_clkdm = { - .name = "dpll2_clkdm", - .pwrdm = { .name = "dpll2_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll3_clkdm = { - .name = "dpll3_clkdm", - .pwrdm = { .name = "dpll3_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll4_clkdm = { - .name = "dpll4_clkdm", - .pwrdm = { .name = "dpll4_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll5_clkdm = { - .name = "dpll5_clkdm", - .pwrdm = { .name = "dpll5_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -}; - -#endif /* CONFIG_ARCH_OMAP3 */ - -/* - * Clockdomain hwsup dependencies (OMAP3 only) - */ - -static struct clkdm_autodep clkdm_autodeps[] = { - { - .clkdm = { .name = "mpu_clkdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm = { .name = "iva2_clkdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) - }, - { - .clkdm = { .name = NULL }, - } -}; - -static struct clockdomain *clockdomains_omap2[] __initdata = { - &wkup_clkdm, - &cm_clkdm, - &prm_clkdm, - -#ifdef CONFIG_SOC_OMAP2420 - &mpu_2420_clkdm, - &iva1_2420_clkdm, - &dsp_2420_clkdm, - &gfx_2420_clkdm, - &core_l3_2420_clkdm, - &core_l4_2420_clkdm, - &dss_2420_clkdm, -#endif - -#ifdef CONFIG_SOC_OMAP2430 - &mpu_2430_clkdm, - &mdm_clkdm, - &dsp_2430_clkdm, - &gfx_2430_clkdm, - &core_l3_2430_clkdm, - &core_l4_2430_clkdm, - &dss_2430_clkdm, -#endif - -#ifdef CONFIG_ARCH_OMAP3 - &mpu_3xxx_clkdm, - &neon_clkdm, - &iva2_clkdm, - &gfx_3430es1_clkdm, - &sgx_clkdm, - &d2d_clkdm, - &core_l3_3xxx_clkdm, - &core_l4_3xxx_clkdm, - &dss_3xxx_clkdm, - &cam_clkdm, - &usbhost_clkdm, - &per_clkdm, - &emu_clkdm, - &dpll1_clkdm, - &dpll2_clkdm, - &dpll3_clkdm, - &dpll4_clkdm, - &dpll5_clkdm, -#endif - NULL, -}; - -static void __init omap2_3_clockdomains_init(void) -{ - clkdm_register_clkdms(clockdomains_omap2); - clkdm_register_autodeps(clkdm_autodeps); - clkdm_complete_init(); -} - -void __init omap2xxx_clockdomains_init(void) -{ - clkdm_register_platform_funcs(&omap2_clkdm_operations); - omap2_3_clockdomains_init(); -} - -void __init omap3xxx_clockdomains_init(void) -{ - clkdm_register_platform_funcs(&omap3_clkdm_operations); - omap2_3_clockdomains_init(); -} diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c new file mode 100644 index 0000000..b84e138 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -0,0 +1,398 @@ +/* + * OMAP3xxx clockdomains + * + * Copyright (C) 2008-2011 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley, Jouni Högander + * + * This file contains clockdomains and clockdomain wakeup/sleep + * dependencies for the OMAP3xxx chips. Some notes: + * + * A useful validation rule for struct clockdomain: Any clockdomain + * referenced by a wkdep_srcs or sleepdep_srcs array must have a + * dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really just + * software-controllable dependencies. Non-software-controllable + * dependencies do exist, but they are not encoded below (yet). + * + * The overly-specific dep_bit names are due to a bit name collision + * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift + * value are the same for all powerdomains: 2 + * + * XXX should dep_bit be a mask, so we can test to see if it is 0 as a + * sanity check? + * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE + */ + +/* + * To-Do List + * -> Port the Sleep/Wakeup dependencies for the domains + * from the Power domain framework + */ + +#include +#include + +#include "clockdomain.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-34xx.h" +#include "prm-regbits-34xx.h" + +/* + * Clockdomain dependencies for wkdeps/sleepdeps + * + * XXX Hardware dependencies (e.g., dependencies that cannot be + * changed in software) are not included here yet, but should be. + */ + +/* OMAP3-specific possible dependencies */ + +/* + * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE + * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE + */ +static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = { + { .clkdm_name = "iva2_clkdm", }, + { .clkdm_name = "mpu_clkdm", }, + { .clkdm_name = "wkup_clkdm", }, + { NULL }, +}; + +/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */ +static struct clkdm_dep per_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */ +static struct clkdm_dep usbhost_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */ +static struct clkdm_dep mpu_3xxx_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { .clkdm_name = "dss_clkdm" }, + { .clkdm_name = "per_clkdm" }, + { NULL }, +}; + +/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */ +static struct clkdm_dep iva2_wkdeps[] = { + { .clkdm_name = "core_l3_clkdm" }, + { .clkdm_name = "core_l4_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { .clkdm_name = "dss_clkdm" }, + { .clkdm_name = "per_clkdm" }, + { NULL }, +}; + +/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */ +static struct clkdm_dep cam_wkdeps[] = { + { .clkdm_name = "iva2_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */ +static struct clkdm_dep dss_wkdeps[] = { + { .clkdm_name = "iva2_clkdm" }, + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "wkup_clkdm" }, + { NULL }, +}; + +/* 3430: PM_WKDEP_NEON: MPU */ +static struct clkdm_dep neon_wkdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { NULL }, +}; + +/* Sleep dependency source arrays for OMAP3-specific clkdms */ + +/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */ +static struct clkdm_dep dss_sleepdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { NULL }, +}; + +/* 3430: CM_SLEEPDEP_PER: MPU, IVA */ +static struct clkdm_dep per_sleepdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { NULL }, +}; + +/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */ +static struct clkdm_dep usbhost_sleepdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { .clkdm_name = "iva2_clkdm" }, + { NULL }, +}; + +/* 3430: CM_SLEEPDEP_CAM: MPU */ +static struct clkdm_dep cam_sleepdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { NULL }, +}; + +/* + * 3430ES1: CM_SLEEPDEP_GFX: MPU + * 3430ES2: CM_SLEEPDEP_SGX: MPU + * These can share data since they will never be present simultaneously + * on the same device. + */ +static struct clkdm_dep gfx_sgx_sleepdeps[] = { + { .clkdm_name = "mpu_clkdm" }, + { NULL }, +}; + +/* + * OMAP3 clockdomains + */ + +static struct clockdomain mpu_3xxx_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, + .dep_bit = OMAP3430_EN_MPU_SHIFT, + .wkdep_srcs = mpu_3xxx_wkdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, +}; + +static struct clockdomain neon_clkdm = { + .name = "neon_clkdm", + .pwrdm = { .name = "neon_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = neon_wkdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, +}; + +static struct clockdomain iva2_clkdm = { + .name = "iva2_clkdm", + .pwrdm = { .name = "iva2_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, + .wkdep_srcs = iva2_wkdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, +}; + +static struct clockdomain gfx_3430es1_clkdm = { + .name = "gfx_clkdm", + .pwrdm = { .name = "gfx_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = gfx_sgx_3xxx_wkdeps, + .sleepdep_srcs = gfx_sgx_sleepdeps, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, +}; + +static struct clockdomain sgx_clkdm = { + .name = "sgx_clkdm", + .pwrdm = { .name = "sgx_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = gfx_sgx_3xxx_wkdeps, + .sleepdep_srcs = gfx_sgx_sleepdeps, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, +}; + +/* + * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but + * then that information was removed from the 34xx ES2+ TRM. It is + * unclear whether the core is still there, but the clockdomain logic + * is there, and must be programmed to an appropriate state if the + * CORE clockdomain is to become inactive. + */ +static struct clockdomain d2d_clkdm = { + .name = "d2d_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, +}; + +/* + * XXX add usecounting for clkdm dependencies, otherwise the presence + * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm + * could cause trouble + */ +static struct clockdomain core_l3_3xxx_clkdm = { + .name = "core_l3_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .dep_bit = OMAP3430_EN_CORE_SHIFT, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, +}; + +/* + * XXX add usecounting for clkdm dependencies, otherwise the presence + * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm + * could cause trouble + */ +static struct clockdomain core_l4_3xxx_clkdm = { + .name = "core_l4_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .flags = CLKDM_CAN_HWSUP, + .dep_bit = OMAP3430_EN_CORE_SHIFT, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, +}; + +/* Another case of bit name collisions between several registers: EN_DSS */ +static struct clockdomain dss_3xxx_clkdm = { + .name = "dss_clkdm", + .pwrdm = { .name = "dss_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT, + .wkdep_srcs = dss_wkdeps, + .sleepdep_srcs = dss_sleepdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, +}; + +static struct clockdomain cam_clkdm = { + .name = "cam_clkdm", + .pwrdm = { .name = "cam_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = cam_wkdeps, + .sleepdep_srcs = cam_sleepdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, +}; + +static struct clockdomain usbhost_clkdm = { + .name = "usbhost_clkdm", + .pwrdm = { .name = "usbhost_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .wkdep_srcs = usbhost_wkdeps, + .sleepdep_srcs = usbhost_sleepdeps, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, +}; + +static struct clockdomain per_clkdm = { + .name = "per_clkdm", + .pwrdm = { .name = "per_pwrdm" }, + .flags = CLKDM_CAN_HWSUP_SWSUP, + .dep_bit = OMAP3430_EN_PER_SHIFT, + .wkdep_srcs = per_wkdeps, + .sleepdep_srcs = per_sleepdeps, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, +}; + +/* + * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is + * switched of even if sdti is in use + */ +static struct clockdomain emu_clkdm = { + .name = "emu_clkdm", + .pwrdm = { .name = "emu_pwrdm" }, + .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, +}; + +static struct clockdomain dpll1_clkdm = { + .name = "dpll1_clkdm", + .pwrdm = { .name = "dpll1_pwrdm" }, +}; + +static struct clockdomain dpll2_clkdm = { + .name = "dpll2_clkdm", + .pwrdm = { .name = "dpll2_pwrdm" }, +}; + +static struct clockdomain dpll3_clkdm = { + .name = "dpll3_clkdm", + .pwrdm = { .name = "dpll3_pwrdm" }, +}; + +static struct clockdomain dpll4_clkdm = { + .name = "dpll4_clkdm", + .pwrdm = { .name = "dpll4_pwrdm" }, +}; + +static struct clockdomain dpll5_clkdm = { + .name = "dpll5_clkdm", + .pwrdm = { .name = "dpll5_pwrdm" }, +}; + +/* + * Clockdomain hwsup dependencies + */ + +static struct clkdm_autodep clkdm_autodeps[] = { + { + .clkdm = { .name = "mpu_clkdm" }, + }, + { + .clkdm = { .name = "iva2_clkdm" }, + }, + { + .clkdm = { .name = NULL }, + } +}; + +/* + * + */ + +static struct clockdomain *clockdomains_omap3430_common[] __initdata = { + &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, + &mpu_3xxx_clkdm, + &neon_clkdm, + &iva2_clkdm, + &d2d_clkdm, + &core_l3_3xxx_clkdm, + &core_l4_3xxx_clkdm, + &dss_3xxx_clkdm, + &cam_clkdm, + &per_clkdm, + &emu_clkdm, + &dpll1_clkdm, + &dpll2_clkdm, + &dpll3_clkdm, + &dpll4_clkdm, + NULL +}; + +static struct clockdomain *clockdomains_omap3430es1[] __initdata = { + &gfx_3430es1_clkdm, + NULL, +}; + +static struct clockdomain *clockdomains_omap3430es2plus[] __initdata = { + &sgx_clkdm, + &dpll5_clkdm, + &usbhost_clkdm, + NULL, +}; + +void __init omap3xxx_clockdomains_init(void) +{ + struct clockdomain **sc; + + if (!cpu_is_omap34xx()) + return; + + clkdm_register_platform_funcs(&omap3_clkdm_operations); + clkdm_register_clkdms(clockdomains_omap3430_common); + + sc = (omap_rev() == OMAP3430_REV_ES1_0) ? clockdomains_omap3430es1 : + clockdomains_omap3430es2plus; + + clkdm_register_clkdms(sc); + + clkdm_register_autodeps(clkdm_autodeps); + clkdm_complete_init(); +} diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index c75411a..9299ac2 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -34,350 +34,122 @@ /* Static Dependencies for OMAP4 Clock Domains */ static struct clkdm_dep d2d_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_2_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l3_init_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, { NULL }, }; static struct clkdm_dep ducati_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_gfx_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_secure_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "tesla_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_2_clkdm" }, + { .clkdm_name = "l3_dss_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l3_gfx_clkdm" }, + { .clkdm_name = "l3_init_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, + { .clkdm_name = "l4_secure_clkdm" }, + { .clkdm_name = "l4_wkup_clkdm" }, + { .clkdm_name = "tesla_clkdm" }, { NULL }, }; static struct clkdm_dep iss_wkup_sleep_deps[] = { - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, { NULL }, }; static struct clkdm_dep ivahd_wkup_sleep_deps[] = { - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, { NULL }, }; static struct clkdm_dep l3_dma_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ducati_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_secure_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ducati_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_dss_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l3_init_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, + { .clkdm_name = "l4_secure_clkdm" }, + { .clkdm_name = "l4_wkup_clkdm" }, { NULL }, }; static struct clkdm_dep l3_dss_wkup_sleep_deps[] = { - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_2_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, { NULL }, }; static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = { - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, { NULL }, }; static struct clkdm_dep l3_init_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_secure_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, + { .clkdm_name = "l4_secure_clkdm" }, + { .clkdm_name = "l4_wkup_clkdm" }, { NULL }, }; static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, { NULL }, }; static struct clkdm_dep mpu_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ducati_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_gfx_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_secure_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "tesla_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ducati_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_2_clkdm" }, + { .clkdm_name = "l3_dss_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l3_gfx_clkdm" }, + { .clkdm_name = "l3_init_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, + { .clkdm_name = "l4_secure_clkdm" }, + { .clkdm_name = "l4_wkup_clkdm" }, + { .clkdm_name = "tesla_clkdm" }, { NULL }, }; static struct clkdm_dep tesla_wkup_sleep_deps[] = { - { - .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "ivahd_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l3_init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, - { - .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) - }, + { .clkdm_name = "abe_clkdm" }, + { .clkdm_name = "ivahd_clkdm" }, + { .clkdm_name = "l3_1_clkdm" }, + { .clkdm_name = "l3_2_clkdm" }, + { .clkdm_name = "l3_emif_clkdm" }, + { .clkdm_name = "l3_init_clkdm" }, + { .clkdm_name = "l4_cfg_clkdm" }, + { .clkdm_name = "l4_per_clkdm" }, + { .clkdm_name = "l4_wkup_clkdm" }, { NULL }, }; @@ -388,7 +160,6 @@ static struct clockdomain l4_cefuse_44xx_clkdm = { .cm_inst = OMAP4430_CM2_CEFUSE_INST, .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l4_cfg_44xx_clkdm = { @@ -399,7 +170,6 @@ static struct clockdomain l4_cfg_44xx_clkdm = { .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS, .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain tesla_44xx_clkdm = { @@ -412,7 +182,6 @@ static struct clockdomain tesla_44xx_clkdm = { .wkdep_srcs = tesla_wkup_sleep_deps, .sleepdep_srcs = tesla_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_gfx_44xx_clkdm = { @@ -425,7 +194,6 @@ static struct clockdomain l3_gfx_44xx_clkdm = { .wkdep_srcs = l3_gfx_wkup_sleep_deps, .sleepdep_srcs = l3_gfx_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain ivahd_44xx_clkdm = { @@ -438,7 +206,6 @@ static struct clockdomain ivahd_44xx_clkdm = { .wkdep_srcs = ivahd_wkup_sleep_deps, .sleepdep_srcs = ivahd_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l4_secure_44xx_clkdm = { @@ -451,7 +218,6 @@ static struct clockdomain l4_secure_44xx_clkdm = { .wkdep_srcs = l4_secure_wkup_sleep_deps, .sleepdep_srcs = l4_secure_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l4_per_44xx_clkdm = { @@ -462,7 +228,6 @@ static struct clockdomain l4_per_44xx_clkdm = { .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS, .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain abe_44xx_clkdm = { @@ -473,7 +238,6 @@ static struct clockdomain abe_44xx_clkdm = { .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS, .dep_bit = OMAP4430_ABE_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_instr_44xx_clkdm = { @@ -482,7 +246,6 @@ static struct clockdomain l3_instr_44xx_clkdm = { .prcm_partition = OMAP4430_CM2_PARTITION, .cm_inst = OMAP4430_CM2_CORE_INST, .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_init_44xx_clkdm = { @@ -495,7 +258,6 @@ static struct clockdomain l3_init_44xx_clkdm = { .wkdep_srcs = l3_init_wkup_sleep_deps, .sleepdep_srcs = l3_init_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain d2d_44xx_clkdm = { @@ -507,7 +269,6 @@ static struct clockdomain d2d_44xx_clkdm = { .wkdep_srcs = d2d_wkup_sleep_deps, .sleepdep_srcs = d2d_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain mpu0_44xx_clkdm = { @@ -517,7 +278,6 @@ static struct clockdomain mpu0_44xx_clkdm = { .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST, .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain mpu1_44xx_clkdm = { @@ -527,7 +287,6 @@ static struct clockdomain mpu1_44xx_clkdm = { .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST, .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_emif_44xx_clkdm = { @@ -538,7 +297,6 @@ static struct clockdomain l3_emif_44xx_clkdm = { .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS, .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l4_ao_44xx_clkdm = { @@ -548,7 +306,6 @@ static struct clockdomain l4_ao_44xx_clkdm = { .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST, .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain ducati_44xx_clkdm = { @@ -561,7 +318,6 @@ static struct clockdomain ducati_44xx_clkdm = { .wkdep_srcs = ducati_wkup_sleep_deps, .sleepdep_srcs = ducati_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain mpu_44xx_clkdm = { @@ -573,7 +329,6 @@ static struct clockdomain mpu_44xx_clkdm = { .wkdep_srcs = mpu_wkup_sleep_deps, .sleepdep_srcs = mpu_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_2_44xx_clkdm = { @@ -584,7 +339,6 @@ static struct clockdomain l3_2_44xx_clkdm = { .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS, .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_1_44xx_clkdm = { @@ -595,7 +349,6 @@ static struct clockdomain l3_1_44xx_clkdm = { .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS, .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain iss_44xx_clkdm = { @@ -607,7 +360,6 @@ static struct clockdomain iss_44xx_clkdm = { .wkdep_srcs = iss_wkup_sleep_deps, .sleepdep_srcs = iss_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_dss_44xx_clkdm = { @@ -620,7 +372,6 @@ static struct clockdomain l3_dss_44xx_clkdm = { .wkdep_srcs = l3_dss_wkup_sleep_deps, .sleepdep_srcs = l3_dss_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l4_wkup_44xx_clkdm = { @@ -631,7 +382,6 @@ static struct clockdomain l4_wkup_44xx_clkdm = { .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS, .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain emu_sys_44xx_clkdm = { @@ -641,7 +391,6 @@ static struct clockdomain emu_sys_44xx_clkdm = { .cm_inst = OMAP4430_PRM_EMU_CM_INST, .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct clockdomain l3_dma_44xx_clkdm = { @@ -653,7 +402,6 @@ static struct clockdomain l3_dma_44xx_clkdm = { .wkdep_srcs = l3_dma_wkup_sleep_deps, .sleepdep_srcs = l3_dma_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* As clockdomains are added or removed above, this list must also be changed */ diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 2ce1ce6..d098c87 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -342,11 +342,11 @@ void __init omap2_init_common_infrastructure(void) if (cpu_is_omap242x()) { omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); + omap242x_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); + omap243x_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { omap3xxx_powerdomains_init(); -- cgit v0.10.2 From 129c65ee66a97fbf663f2f5fce26aacdc7348736 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 16:01:21 -0600 Subject: OMAP: powerdomain: split pwrdm_init() into two functions In preparation for OMAP_CHIP() removal, split pwrdm_init() into three functions. This allows some of them to be called multiple times: for example, pwrdm_register_pwrdms() can be called once to register powerdomains that are common to a group of SoCs, and once to register powerdomains that are specific to a single SoC. The appropriate order to call these functions - which is enforced by the code - is: 1. pwrdm_register_platform_funcs() 2. pwrdm_register_pwrdms() (can be called multiple times) 3. pwrdm_complete_init() Convert the OMAP2, 3, and 4 powerdomain init code to use these new functions. While here, improve documentation, and increase CodingStyle conformance by shortening some local variable names. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index ef71fdd..3483537 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -1,7 +1,7 @@ /* * OMAP powerdomain control * - * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc. * Copyright (C) 2007-2011 Nokia Corporation * * Written by Paul Walmsley @@ -194,36 +194,76 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) /* Public functions */ /** - * pwrdm_init - set up the powerdomain layer - * @pwrdms: array of struct powerdomain pointers to register - * @custom_funcs: func pointers for arch specific implementations + * pwrdm_register_platform_funcs - register powerdomain implementation fns + * @po: func pointers for arch specific implementations * - * Loop through the array of powerdomains @pwrdms, registering all - * that are available on the current CPU. Also, program all - * powerdomain target state as ON; this is to prevent domains from - * hitting low power states (if bootloader has target states set to - * something other than ON) and potentially even losing context while - * PM is not fully initialized. The PM late init code can then program - * the desired target state for all the power domains. No return - * value. + * Register the list of function pointers used to implement the + * powerdomain functions on different OMAP SoCs. Should be called + * before any other pwrdm_register*() function. Returns -EINVAL if + * @po is null, -EEXIST if platform functions have already been + * registered, or 0 upon success. */ -void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs) +int pwrdm_register_platform_funcs(struct pwrdm_ops *po) +{ + if (!po) + return -EINVAL; + + if (arch_pwrdm) + return -EEXIST; + + arch_pwrdm = po; + + return 0; +} + +/** + * pwrdm_register_pwrdms - register SoC powerdomains + * @ps: pointer to an array of struct powerdomain to register + * + * Register the powerdomains available on a particular OMAP SoC. Must + * be called after pwrdm_register_platform_funcs(). May be called + * multiple times. Returns -EACCES if called before + * pwrdm_register_platform_funcs(); -EINVAL if the argument @ps is + * null; or 0 upon success. + */ +int pwrdm_register_pwrdms(struct powerdomain **ps) { struct powerdomain **p = NULL; - struct powerdomain *temp_p; - if (!custom_funcs) - WARN(1, "powerdomain: No custom pwrdm functions registered\n"); - else - arch_pwrdm = custom_funcs; + if (!arch_pwrdm) + return -EEXIST; - if (pwrdms) { - for (p = pwrdms; *p; p++) - _pwrdm_register(*p); - } + if (!ps) + return -EINVAL; + + for (p = ps; *p; p++) + _pwrdm_register(*p); + + return 0; +} + +/** + * pwrdm_complete_init - set up the powerdomain layer + * + * Do whatever is necessary to initialize registered powerdomains and + * powerdomain code. Currently, this programs the next power state + * for each powerdomain to ON. This prevents powerdomains from + * unexpectedly losing context or entering high wakeup latency modes + * with non-power-management-enabled kernels. Must be called after + * pwrdm_register_pwrdms(). Returns -EACCES if called before + * pwrdm_register_pwrdms(), or 0 upon success. + */ +int pwrdm_complete_init(void) +{ + struct powerdomain *temp_p; + + if (list_empty(&pwrdm_list)) + return -EACCES; list_for_each_entry(temp_p, &pwrdm_list, node) pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON); + + return 0; } /** diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index d23d979..489e1c5 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -162,7 +162,9 @@ struct pwrdm_ops { int (*pwrdm_wait_transition)(struct powerdomain *pwrdm); }; -void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs); +int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs); +int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list); +int pwrdm_complete_init(void); struct powerdomain *pwrdm_lookup(const char *name); diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index cc389fb..71c4fd7 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -119,5 +119,7 @@ static struct powerdomain *powerdomains_omap2xxx[] __initdata = { void __init omap2xxx_powerdomains_init(void) { - pwrdm_init(powerdomains_omap2xxx, &omap2_pwrdm_operations); + pwrdm_register_platform_funcs(&omap2_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_omap2xxx); + pwrdm_complete_init(); } diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 469a920..9d355fc 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -283,5 +283,7 @@ static struct powerdomain *powerdomains_omap3xxx[] __initdata = { void __init omap3xxx_powerdomains_init(void) { - pwrdm_init(powerdomains_omap3xxx, &omap3_pwrdm_operations); + pwrdm_register_platform_funcs(&omap3_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_omap3xxx); + pwrdm_complete_init(); } diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 247e794..67ac24b 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -352,5 +352,7 @@ static struct powerdomain *powerdomains_omap44xx[] __initdata = { void __init omap44xx_powerdomains_init(void) { - pwrdm_init(powerdomains_omap44xx, &omap4_pwrdm_operations); + pwrdm_register_platform_funcs(&omap4_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_omap44xx); + pwrdm_complete_init(); } -- cgit v0.10.2 From 8179488a36985d4929cf89be5d9171145a769511 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 11:34:21 -0600 Subject: OMAP: powerdomain: remove omap_chip bitmasks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At Tony's request, remove the omap_chip bitmasks from the powerdomain definitions. Instead, initialize powerdomains based on one or more lists that are applicable to a particular SoC family, variant, and silicon revision. Gražvydas Ignotas found and reported a bug in a related patch that also applied to this patch - thanks Gražvydas. Signed-off-by: Paul Walmsley Cc: Gražvydas Ignotas diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index d098c87..40b6d47 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -341,11 +341,11 @@ void __init omap2_init_common_infrastructure(void) u8 postsetup_state; if (cpu_is_omap242x()) { - omap2xxx_powerdomains_init(); + omap242x_powerdomains_init(); omap242x_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { - omap2xxx_powerdomains_init(); + omap243x_powerdomains_init(); omap243x_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c index 171fccd..f97afff 100644 --- a/arch/arm/mach-omap2/powerdomain-common.c +++ b/arch/arm/mach-omap2/powerdomain-common.c @@ -1,9 +1,8 @@ /* - * linux/arch/arm/mach-omap2/powerdomain-common.c - * Contains common powerdomain framework functions + * Common powerdomain framework functions * - * Copyright (C) 2010 Texas Instruments, Inc. - * Copyright (C) 2010 Nokia Corporation + * Copyright (C) 2010-2011 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation * * Derived from mach-omap2/powerdomain.c written by Paul Walmsley * diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 3483537..896cb4c 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -81,9 +81,6 @@ static int _pwrdm_register(struct powerdomain *pwrdm) if (!pwrdm || !pwrdm->name) return -EINVAL; - if (!omap_chip_is(pwrdm->omap_chip)) - return -EINVAL; - if (cpu_is_omap44xx() && pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) { pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n", diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 489e1c5..8febd84 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -78,7 +78,6 @@ struct powerdomain; /** * struct powerdomain - OMAP powerdomain * @name: Powerdomain name - * @omap_chip: represents the OMAP chip types containing this pwrdm * @prcm_offs: the address offset from CM_BASE/PRM_BASE * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs * @pwrsts: Possible powerdomain power states @@ -98,7 +97,6 @@ struct powerdomain; */ struct powerdomain { const char *name; - const struct omap_chip_id omap_chip; const s16 prcm_offs; const u8 pwrsts; const u8 pwrsts_logic_ret; @@ -212,7 +210,8 @@ int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm); u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm); bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm); -extern void omap2xxx_powerdomains_init(void); +extern void omap242x_powerdomains_init(void); +extern void omap243x_powerdomains_init(void); extern void omap3xxx_powerdomains_init(void); extern void omap44xx_powerdomains_init(void); diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c index 4210c33..bf30483 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c @@ -1,7 +1,7 @@ /* * OMAP2/3 common powerdomain definitions * - * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc. * Copyright (C) 2007-2011 Nokia Corporation * * Paul Walmsley, Jouni Högander @@ -12,20 +12,6 @@ */ /* - * To Do List - * -> Move the Sleep/Wakeup dependencies from Power Domain framework to - * Clock Domain Framework - */ - -/* - * This file contains all of the powerdomains that have some element - * of software control for the OMAP24xx and OMAP34xx chips. - * - * This is not an exhaustive listing of powerdomains on the chips; only - * powerdomains that can be controlled in software. - */ - -/* * The names for the DSP/IVA2 powerdomains are confusing. * * Most OMAP chips have an on-board DSP. @@ -59,8 +45,6 @@ struct powerdomain gfx_omap2_pwrdm = { .name = "gfx_pwrdm", .prcm_offs = GFX_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | - CHIP_IS_OMAP3430ES1), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, @@ -75,6 +59,5 @@ struct powerdomain gfx_omap2_pwrdm = { struct powerdomain wkup_omap2_pwrdm = { .name = "wkup_pwrdm", .prcm_offs = WKUP_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), .pwrsts = PWRSTS_ON, }; diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index 71c4fd7..bb4394e 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -1,7 +1,7 @@ /* * OMAP2XXX powerdomain definitions * - * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc. * Copyright (C) 2007-2011 Nokia Corporation * * Paul Walmsley, Jouni Högander @@ -28,7 +28,6 @@ static struct powerdomain dsp_pwrdm = { .name = "dsp_pwrdm", .prcm_offs = OMAP24XX_DSP_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, @@ -43,7 +42,6 @@ static struct powerdomain dsp_pwrdm = { static struct powerdomain mpu_24xx_pwrdm = { .name = "mpu_pwrdm", .prcm_offs = MPU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -58,7 +56,6 @@ static struct powerdomain mpu_24xx_pwrdm = { static struct powerdomain core_24xx_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), .pwrsts = PWRSTS_OFF_RET_ON, .banks = 3, .pwrsts_mem_ret = { @@ -78,14 +75,11 @@ static struct powerdomain core_24xx_pwrdm = { * 2430-specific powerdomains */ -#ifdef CONFIG_SOC_OMAP2430 - /* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ static struct powerdomain mdm_pwrdm = { .name = "mdm_pwrdm", .prcm_offs = OMAP2430_MDM_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, .banks = 1, @@ -97,29 +91,41 @@ static struct powerdomain mdm_pwrdm = { }, }; -#endif /* CONFIG_SOC_OMAP2430 */ - -/* As powerdomains are added or removed above, this list must also be changed */ -static struct powerdomain *powerdomains_omap2xxx[] __initdata = { +/* + * + */ +static struct powerdomain *powerdomains_omap24xx[] __initdata = { &wkup_omap2_pwrdm, &gfx_omap2_pwrdm, - -#ifdef CONFIG_ARCH_OMAP2 &dsp_pwrdm, &mpu_24xx_pwrdm, &core_24xx_pwrdm, -#endif + NULL +}; -#ifdef CONFIG_SOC_OMAP2430 +static struct powerdomain *powerdomains_omap2430[] __initdata = { &mdm_pwrdm, -#endif NULL }; -void __init omap2xxx_powerdomains_init(void) +void __init omap242x_powerdomains_init(void) { + if (!cpu_is_omap2420()) + return; + + pwrdm_register_platform_funcs(&omap2_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_omap24xx); + pwrdm_complete_init(); +} + +void __init omap243x_powerdomains_init(void) +{ + if (!cpu_is_omap2430()) + return; + pwrdm_register_platform_funcs(&omap2_pwrdm_operations); - pwrdm_register_pwrdms(powerdomains_omap2xxx); + pwrdm_register_pwrdms(powerdomains_omap24xx); + pwrdm_register_pwrdms(powerdomains_omap2430); pwrdm_complete_init(); } diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 9d355fc..e4f3a7d 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -1,7 +1,7 @@ /* * OMAP3 powerdomain definitions * - * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc. * Copyright (C) 2007-2011 Nokia Corporation * * Paul Walmsley, Jouni Högander @@ -14,6 +14,8 @@ #include #include +#include + #include "powerdomain.h" #include "powerdomains2xxx_3xxx_data.h" @@ -27,8 +29,6 @@ * 34XX-specific powerdomains, dependencies */ -#ifdef CONFIG_ARCH_OMAP3 - /* * Powerdomains */ @@ -36,7 +36,6 @@ static struct powerdomain iva2_pwrdm = { .name = "iva2_pwrdm", .prcm_offs = OMAP3430_IVA2_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 4, @@ -57,7 +56,6 @@ static struct powerdomain iva2_pwrdm = { static struct powerdomain mpu_3xxx_pwrdm = { .name = "mpu_pwrdm", .prcm_offs = MPU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .flags = PWRDM_HAS_MPU_QUIRK, @@ -83,10 +81,6 @@ static struct powerdomain mpu_3xxx_pwrdm = { static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_IS_OMAP3430ES2 | - CHIP_IS_OMAP3430ES3_0 | - CHIP_IS_OMAP3630ES1), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -103,8 +97,6 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { static struct powerdomain core_3xxx_es3_1_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 | - CHIP_GE_OMAP3630ES1_1), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, /* @@ -125,7 +117,6 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = { static struct powerdomain dss_pwrdm = { .name = "dss_pwrdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .prcm_offs = OMAP3430_DSS_MOD, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, @@ -146,7 +137,6 @@ static struct powerdomain dss_pwrdm = { static struct powerdomain sgx_pwrdm = { .name = "sgx_pwrdm", .prcm_offs = OMAP3430ES2_SGX_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), /* XXX This is accurate for 3430 SGX, but what about GFX? */ .pwrsts = PWRSTS_OFF_ON, .pwrsts_logic_ret = PWRSTS_RET, @@ -161,7 +151,6 @@ static struct powerdomain sgx_pwrdm = { static struct powerdomain cam_pwrdm = { .name = "cam_pwrdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .prcm_offs = OMAP3430_CAM_MOD, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, @@ -177,7 +166,6 @@ static struct powerdomain cam_pwrdm = { static struct powerdomain per_pwrdm = { .name = "per_pwrdm", .prcm_offs = OMAP3430_PER_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -192,13 +180,11 @@ static struct powerdomain per_pwrdm = { static struct powerdomain emu_pwrdm = { .name = "emu_pwrdm", .prcm_offs = OMAP3430_EMU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static struct powerdomain neon_pwrdm = { .name = "neon_pwrdm", .prcm_offs = OMAP3430_NEON_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, }; @@ -206,7 +192,6 @@ static struct powerdomain neon_pwrdm = { static struct powerdomain usbhost_pwrdm = { .name = "usbhost_pwrdm", .prcm_offs = OMAP3430ES2_USBHOST_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, /* @@ -228,62 +213,92 @@ static struct powerdomain usbhost_pwrdm = { static struct powerdomain dpll1_pwrdm = { .name = "dpll1_pwrdm", .prcm_offs = MPU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static struct powerdomain dpll2_pwrdm = { .name = "dpll2_pwrdm", .prcm_offs = OMAP3430_IVA2_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static struct powerdomain dpll3_pwrdm = { .name = "dpll3_pwrdm", .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static struct powerdomain dpll4_pwrdm = { .name = "dpll4_pwrdm", .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static struct powerdomain dpll5_pwrdm = { .name = "dpll5_pwrdm", .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), }; /* As powerdomains are added or removed above, this list must also be changed */ -static struct powerdomain *powerdomains_omap3xxx[] __initdata = { - +static struct powerdomain *powerdomains_omap3430_common[] __initdata = { &wkup_omap2_pwrdm, - &gfx_omap2_pwrdm, &iva2_pwrdm, &mpu_3xxx_pwrdm, &neon_pwrdm, - &core_3xxx_pre_es3_1_pwrdm, - &core_3xxx_es3_1_pwrdm, &cam_pwrdm, &dss_pwrdm, &per_pwrdm, &emu_pwrdm, - &sgx_pwrdm, - &usbhost_pwrdm, &dpll1_pwrdm, &dpll2_pwrdm, &dpll3_pwrdm, &dpll4_pwrdm, + NULL +}; + +static struct powerdomain *powerdomains_omap3430es1[] __initdata = { + &gfx_omap2_pwrdm, + &core_3xxx_pre_es3_1_pwrdm, + NULL +}; + +/* also includes 3630ES1.0 */ +static struct powerdomain *powerdomains_omap3430es2_es3_0[] __initdata = { + &core_3xxx_pre_es3_1_pwrdm, + &sgx_pwrdm, + &usbhost_pwrdm, &dpll5_pwrdm, -#endif NULL }; +/* also includes 3630ES1.1+ */ +static struct powerdomain *powerdomains_omap3430es3_1plus[] __initdata = { + &core_3xxx_es3_1_pwrdm, + &sgx_pwrdm, + &usbhost_pwrdm, + &dpll5_pwrdm, + NULL +}; void __init omap3xxx_powerdomains_init(void) { + unsigned int rev; + + if (!cpu_is_omap34xx()) + return; + pwrdm_register_platform_funcs(&omap3_pwrdm_operations); - pwrdm_register_pwrdms(powerdomains_omap3xxx); + pwrdm_register_pwrdms(powerdomains_omap3430_common); + + rev = omap_rev(); + + if (rev == OMAP3430_REV_ES1_0) + pwrdm_register_pwrdms(powerdomains_omap3430es1); + else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 || + rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0) + pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0); + else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 || + rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 || + rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) + pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus); + else + WARN(1, "OMAP3 powerdomain init: unknown chip type\n"); + pwrdm_complete_init(); } diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index 67ac24b..cbce0c9 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -35,7 +35,6 @@ static struct powerdomain core_44xx_pwrdm = { .name = "core_pwrdm", .prcm_offs = OMAP4430_PRM_CORE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 5, @@ -61,7 +60,6 @@ static struct powerdomain gfx_44xx_pwrdm = { .name = "gfx_pwrdm", .prcm_offs = OMAP4430_PRM_GFX_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -78,7 +76,6 @@ static struct powerdomain abe_44xx_pwrdm = { .name = "abe_pwrdm", .prcm_offs = OMAP4430_PRM_ABE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 2, @@ -98,7 +95,6 @@ static struct powerdomain dss_44xx_pwrdm = { .name = "dss_pwrdm", .prcm_offs = OMAP4430_PRM_DSS_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 1, @@ -116,7 +112,6 @@ static struct powerdomain tesla_44xx_pwrdm = { .name = "tesla_pwrdm", .prcm_offs = OMAP4430_PRM_TESLA_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, @@ -138,7 +133,6 @@ static struct powerdomain wkup_44xx_pwrdm = { .name = "wkup_pwrdm", .prcm_offs = OMAP4430_PRM_WKUP_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_ON, .banks = 1, .pwrsts_mem_ret = { @@ -154,7 +148,6 @@ static struct powerdomain cpu0_44xx_pwrdm = { .name = "cpu0_pwrdm", .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -171,7 +164,6 @@ static struct powerdomain cpu1_44xx_pwrdm = { .name = "cpu1_pwrdm", .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -188,7 +180,6 @@ static struct powerdomain emu_44xx_pwrdm = { .name = "emu_pwrdm", .prcm_offs = OMAP4430_PRM_EMU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -204,7 +195,6 @@ static struct powerdomain mpu_44xx_pwrdm = { .name = "mpu_pwrdm", .prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, @@ -225,7 +215,6 @@ static struct powerdomain ivahd_44xx_pwrdm = { .name = "ivahd_pwrdm", .prcm_offs = OMAP4430_PRM_IVAHD_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 4, @@ -249,7 +238,6 @@ static struct powerdomain cam_44xx_pwrdm = { .name = "cam_pwrdm", .prcm_offs = OMAP4430_PRM_CAM_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -266,7 +254,6 @@ static struct powerdomain l3init_44xx_pwrdm = { .name = "l3init_pwrdm", .prcm_offs = OMAP4430_PRM_L3INIT_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -284,7 +271,6 @@ static struct powerdomain l4per_44xx_pwrdm = { .name = "l4per_pwrdm", .prcm_offs = OMAP4430_PRM_L4PER_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -307,7 +293,6 @@ static struct powerdomain always_on_core_44xx_pwrdm = { .name = "always_on_core_pwrdm", .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_ON, }; @@ -316,7 +301,6 @@ static struct powerdomain cefuse_44xx_pwrdm = { .name = "cefuse_pwrdm", .prcm_offs = OMAP4430_PRM_CEFUSE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), .pwrsts = PWRSTS_OFF_ON, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; -- cgit v0.10.2 From d6504acd2125984c61dce24727dd3842d0144015 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 17:23:19 -0600 Subject: OMAP2+: hwmod: remove OMAP_CHIP* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At Tony's request, remove the OMAP_CHIP* flags from the hwmod data, and replace it instead with chip family, variant, and ES level-specific lists of hwmods to register. Thanks to Gražvydas Ignotas for finding a bug in the AM3517/3505 support, and for other review comments. Signed-off-by: Paul Walmsley Cc: Gražvydas Ignotas diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 84cc0bd..d713807 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1954,9 +1954,6 @@ int __init omap_hwmod_register(struct omap_hwmod **ohs) i = 0; do { - if (!omap_chip_is(ohs[i]->omap_chip)) - continue; - r = _register(ohs[i]); WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name, r); diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index a015c69..b6ea69a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -100,7 +100,6 @@ static struct omap_hwmod omap2420_l3_main_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters), .slaves = omap2420_l3_main_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -206,7 +205,6 @@ static struct omap_hwmod omap2420_l4_core_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), .slaves = omap2420_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -227,7 +225,6 @@ static struct omap_hwmod omap2420_l4_wkup_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), .slaves = omap2420_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -243,7 +240,6 @@ static struct omap_hwmod omap2420_mpu_hwmod = { .main_clk = "mpu_ck", .masters = omap2420_mpu_masters, .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* @@ -271,7 +267,6 @@ static struct omap_hwmod omap2420_iva_hwmod = { .class = &iva_hwmod_class, .masters = omap2420_iva_masters, .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer1 */ @@ -317,7 +312,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer2 */ @@ -354,7 +348,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer3 */ @@ -391,7 +384,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer4 */ @@ -428,7 +420,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer5 */ @@ -465,7 +456,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; @@ -503,7 +493,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer7 */ @@ -540,7 +529,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer8 */ @@ -577,7 +565,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer9 */ @@ -614,7 +601,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer10 */ @@ -651,7 +637,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer11 */ @@ -688,7 +673,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* timer12 */ @@ -725,7 +709,6 @@ static struct omap_hwmod omap2420_timer12_hwmod = { .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* l4_wkup -> wd_timer2 */ @@ -766,7 +749,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { }, .slaves = omap2420_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* UART1 */ @@ -792,7 +774,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { .slaves = omap2420_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* UART2 */ @@ -818,7 +799,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { .slaves = omap2420_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* UART3 */ @@ -844,7 +824,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { .slaves = omap2420_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* dss */ @@ -898,7 +877,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves), .masters = omap2420_dss_masters, .masters_cnt = ARRAY_SIZE(omap2420_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -938,7 +916,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { }, .slaves = omap2420_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -975,7 +952,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { }, .slaves = omap2420_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -1013,7 +989,6 @@ static struct omap_hwmod omap2420_dss_venc_hwmod = { }, .slaves = omap2420_dss_venc_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -1064,7 +1039,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_16BIT_REG, }; @@ -1092,7 +1066,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_16BIT_REG, }; @@ -1197,7 +1170,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio2 */ @@ -1223,7 +1195,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio3 */ @@ -1249,7 +1220,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio4 */ @@ -1275,7 +1245,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* dma attributes */ @@ -1322,7 +1291,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .masters = omap2420_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters), .dev_attr = &dma_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -1363,7 +1331,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { }, .slaves = omap2420_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcspi1 */ @@ -1393,7 +1360,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), .class = &omap2xxx_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcspi2 */ @@ -1423,7 +1389,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), .class = &omap2xxx_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* @@ -1473,7 +1438,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { }, .slaves = omap2420_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcbsp2 */ @@ -1514,7 +1478,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { }, .slaves = omap2420_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 408193d..56de8d6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -110,7 +110,6 @@ static struct omap_hwmod omap2430_l3_main_hwmod = { .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), .slaves = omap2430_l3_main_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -250,7 +249,6 @@ static struct omap_hwmod omap2430_l4_core_hwmod = { .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), .slaves = omap2430_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -301,7 +299,6 @@ static struct omap_hwmod omap2430_l4_wkup_hwmod = { .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), .slaves = omap2430_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -317,7 +314,6 @@ static struct omap_hwmod omap2430_mpu_hwmod = { .main_clk = "mpu_ck", .masters = omap2430_mpu_masters, .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* @@ -345,7 +341,6 @@ static struct omap_hwmod omap2430_iva_hwmod = { .class = &iva_hwmod_class, .masters = omap2430_iva_masters, .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer1 */ @@ -391,7 +386,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { .slaves = omap2430_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer2 */ @@ -428,7 +422,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { .slaves = omap2430_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer3 */ @@ -465,7 +458,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { .slaves = omap2430_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer4 */ @@ -502,7 +494,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { .slaves = omap2430_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer5 */ @@ -539,7 +530,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { .slaves = omap2430_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer6 */ @@ -576,7 +566,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { .slaves = omap2430_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer7 */ @@ -613,7 +602,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { .slaves = omap2430_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer8 */ @@ -650,7 +638,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { .slaves = omap2430_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer9 */ @@ -687,7 +674,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { .slaves = omap2430_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer10 */ @@ -724,7 +710,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { .slaves = omap2430_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer11 */ @@ -761,7 +746,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { .slaves = omap2430_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* timer12 */ @@ -798,7 +782,6 @@ static struct omap_hwmod omap2430_timer12_hwmod = { .slaves = omap2430_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* l4_wkup -> wd_timer2 */ @@ -839,7 +822,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = { }, .slaves = omap2430_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* UART1 */ @@ -865,7 +847,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { .slaves = omap2430_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* UART2 */ @@ -891,7 +872,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { .slaves = omap2430_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* UART3 */ @@ -917,7 +897,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { .slaves = omap2430_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* dss */ @@ -965,7 +944,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves), .masters = omap2430_dss_masters, .masters_cnt = ARRAY_SIZE(omap2430_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -999,7 +977,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { }, .slaves = omap2430_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -1030,7 +1007,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { }, .slaves = omap2430_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -1062,7 +1038,6 @@ static struct omap_hwmod omap2430_dss_venc_hwmod = { }, .slaves = omap2430_dss_venc_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -1123,7 +1098,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* I2C2 */ @@ -1151,7 +1125,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* l4_wkup -> gpio1 */ @@ -1273,7 +1246,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* gpio2 */ @@ -1299,7 +1271,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* gpio3 */ @@ -1325,7 +1296,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* gpio4 */ @@ -1351,7 +1321,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* gpio5 */ @@ -1382,7 +1351,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* dma attributes */ @@ -1429,7 +1397,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .masters = omap2430_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), .dev_attr = &dma_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), .flags = HWMOD_NO_IDLEST, }; @@ -1469,7 +1436,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { }, .slaves = omap2430_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi1 */ @@ -1499,7 +1465,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), .class = &omap2xxx_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi2 */ @@ -1529,7 +1494,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), .class = &omap2xxx_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcspi3 */ @@ -1572,7 +1536,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), .class = &omap2xxx_mcspi_class, .dev_attr = &omap_mcspi3_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* @@ -1628,7 +1591,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = { */ .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* @@ -1689,7 +1651,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { }, .slaves = omap2430_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcbsp2 */ @@ -1731,7 +1692,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { }, .slaves = omap2430_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcbsp3 */ @@ -1783,7 +1743,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { }, .slaves = omap2430_mcbsp3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcbsp4 */ @@ -1841,7 +1800,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { }, .slaves = omap2430_mcbsp4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* mcbsp5 */ @@ -1899,7 +1857,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { }, .slaves = omap2430_mcbsp5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* MMC/SD/SDIO common */ @@ -1966,7 +1923,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { .slaves = omap2430_mmc1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves), .class = &omap2430_mmc_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; /* MMC/SD/SDIO2 */ @@ -2010,7 +1966,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { .slaves = omap2430_mmc2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves), .class = &omap2430_mmc_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; static __initdata struct omap_hwmod *omap2430_hwmods[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 25bf43b..ab35acb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -156,7 +156,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), .slaves = omap3xxx_l3_main_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l3_main_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .flags = HWMOD_NO_IDLEST, }; @@ -459,7 +458,6 @@ static struct omap_hwmod omap3xxx_l4_core_hwmod = { .class = &l4_hwmod_class, .slaves = omap3xxx_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .flags = HWMOD_NO_IDLEST, }; @@ -474,7 +472,6 @@ static struct omap_hwmod omap3xxx_l4_per_hwmod = { .class = &l4_hwmod_class, .slaves = omap3xxx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .flags = HWMOD_NO_IDLEST, }; @@ -489,7 +486,6 @@ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = { .class = &l4_hwmod_class, .slaves = omap3xxx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .flags = HWMOD_NO_IDLEST, }; @@ -505,7 +501,6 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = { .main_clk = "arm_fck", .masters = omap3xxx_mpu_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* @@ -533,7 +528,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { .class = &iva_hwmod_class, .masters = omap3xxx_iva_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer class */ @@ -613,7 +607,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { .slaves = omap3xxx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer2 */ @@ -659,7 +652,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { .slaves = omap3xxx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer3 */ @@ -705,7 +697,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { .slaves = omap3xxx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer4 */ @@ -751,7 +742,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { .slaves = omap3xxx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer5 */ @@ -797,7 +787,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { .slaves = omap3xxx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer6 */ @@ -843,7 +832,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { .slaves = omap3xxx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer7 */ @@ -889,7 +877,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { .slaves = omap3xxx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer8 */ @@ -935,7 +922,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { .slaves = omap3xxx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer9 */ @@ -981,7 +967,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { .slaves = omap3xxx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer10 */ @@ -1018,7 +1003,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { .slaves = omap3xxx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer11 */ @@ -1055,7 +1039,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .slaves = omap3xxx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* timer12*/ @@ -1105,7 +1088,6 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { .slaves = omap3xxx_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), .class = &omap3xxx_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* l4_wkup -> wd_timer2 */ @@ -1182,7 +1164,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { }, .slaves = omap3xxx_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), /* * XXX: Use software supervised mode, HW supervised smartidle seems to * block CORE power domain idle transitions. Maybe a HW bug in wdt2? @@ -1213,7 +1194,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { .slaves = omap3xxx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* UART2 */ @@ -1239,7 +1219,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { .slaves = omap3xxx_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* UART3 */ @@ -1265,7 +1244,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { .slaves = omap3xxx_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* UART4 */ @@ -1302,7 +1280,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { .slaves = omap3xxx_uart4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), .class = &omap2_uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), }; static struct omap_hwmod_class i2c_class = { @@ -1390,7 +1367,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3430es1_dss_slaves), .masters = omap3xxx_dss_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), .flags = HWMOD_NO_IDLEST, }; @@ -1415,8 +1391,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_slaves), .masters = omap3xxx_dss_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2 | - CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1), }; /* l4_core -> dss_dispc */ @@ -1454,9 +1428,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { }, .slaves = omap3xxx_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 | - CHIP_GE_OMAP3630ES1_1), .flags = HWMOD_NO_IDLEST, }; @@ -1518,9 +1489,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { }, .slaves = omap3xxx_dss_dsi1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 | - CHIP_GE_OMAP3630ES1_1), .flags = HWMOD_NO_IDLEST, }; @@ -1558,9 +1526,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { }, .slaves = omap3xxx_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 | - CHIP_GE_OMAP3630ES1_1), .flags = HWMOD_NO_IDLEST, }; @@ -1599,9 +1564,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { }, .slaves = omap3xxx_dss_venc_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_dss_venc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 | - CHIP_GE_OMAP3630ES1_1), .flags = HWMOD_NO_IDLEST, }; @@ -1637,7 +1599,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves), .class = &i2c_class, .dev_attr = &i2c1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* I2C2 */ @@ -1672,7 +1633,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c2_slaves), .class = &i2c_class, .dev_attr = &i2c2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* I2C3 */ @@ -1718,7 +1678,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c3_slaves), .class = &i2c_class, .dev_attr = &i2c3_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* l4_wkup -> gpio1 */ @@ -1880,7 +1839,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio1_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* gpio2 */ @@ -1912,7 +1870,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio2_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* gpio3 */ @@ -1944,7 +1901,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio3_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* gpio4 */ @@ -1976,7 +1932,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio4_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* gpio5 */ @@ -2013,7 +1968,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio5_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* gpio6 */ @@ -2050,7 +2004,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { .slaves_cnt = ARRAY_SIZE(omap3xxx_gpio6_slaves), .class = &omap3xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* dma_system -> L3 */ @@ -2134,7 +2087,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { .masters = omap3xxx_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap3xxx_dma_system_masters), .dev_attr = &dma_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .flags = HWMOD_NO_IDLEST, }; @@ -2207,7 +2159,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { }, .slaves = omap3xxx_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcbsp2 */ @@ -2264,7 +2215,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .slaves = omap3xxx_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves), .dev_attr = &omap34xx_mcbsp2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcbsp3 */ @@ -2321,7 +2271,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .slaves = omap3xxx_mcbsp3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves), .dev_attr = &omap34xx_mcbsp3_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcbsp4 */ @@ -2379,7 +2328,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { }, .slaves = omap3xxx_mcbsp4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcbsp5 */ @@ -2437,7 +2385,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { }, .slaves = omap3xxx_mcbsp5_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* 'mcbsp sidetone' class */ @@ -2498,7 +2445,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { }, .slaves = omap3xxx_mcbsp2_sidetone_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcbsp3_sidetone */ @@ -2547,7 +2493,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { }, .slaves = omap3xxx_mcbsp3_sidetone_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; @@ -2609,9 +2554,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { }, .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | - CHIP_IS_OMAP3430ES3_0 | - CHIP_IS_OMAP3430ES3_1), .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; @@ -2631,7 +2573,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { }, .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), }; /* SR2 */ @@ -2655,9 +2596,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { }, .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | - CHIP_IS_OMAP3430ES3_0 | - CHIP_IS_OMAP3430ES3_1), .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; @@ -2677,7 +2615,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { }, .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), }; /* @@ -2745,7 +2682,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { }, .slaves = omap3xxx_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* l4 core -> mcspi1 interface */ @@ -2843,7 +2779,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi1_slaves), .class = &omap34xx_mcspi_class, .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcspi2 */ @@ -2873,7 +2808,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi2_slaves), .class = &omap34xx_mcspi_class, .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* mcspi3 */ @@ -2916,7 +2850,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi3_slaves), .class = &omap34xx_mcspi_class, .dev_attr = &omap_mcspi3_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* SPI4 */ @@ -2957,7 +2890,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { .slaves_cnt = ARRAY_SIZE(omap34xx_mcspi4_slaves), .class = &omap34xx_mcspi_class, .dev_attr = &omap_mcspi4_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* @@ -3014,7 +2946,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { */ .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* usb_otg_hs */ @@ -3042,7 +2973,6 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = { .slaves = am35xx_usbhsotg_slaves, .slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves), .class = &am35xx_usbotg_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1) }; /* MMC/SD/SDIO common */ @@ -3108,7 +3038,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { .slaves = omap3xxx_mmc1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves), .class = &omap34xx_mmc_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* MMC/SD/SDIO2 */ @@ -3151,7 +3080,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { .slaves = omap3xxx_mmc2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves), .class = &omap34xx_mmc_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; /* MMC/SD/SDIO3 */ @@ -3193,7 +3121,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { .slaves = omap3xxx_mmc3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mmc3_slaves), .class = &omap34xx_mmc_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { @@ -3224,10 +3151,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_uart1_hwmod, &omap3xxx_uart2_hwmod, &omap3xxx_uart3_hwmod, - &omap3xxx_uart4_hwmod, /* dss class */ - &omap3430es1_dss_core_hwmod, - &omap3xxx_dss_core_hwmod, &omap3xxx_dss_dispc_hwmod, &omap3xxx_dss_dsi1_hwmod, &omap3xxx_dss_rfbi_hwmod, @@ -3239,9 +3163,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_i2c3_hwmod, &omap34xx_sr1_hwmod, &omap34xx_sr2_hwmod, - &omap36xx_sr1_hwmod, - &omap36xx_sr2_hwmod, - /* gpio class */ &omap3xxx_gpio1_hwmod, @@ -3272,16 +3193,96 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap34xx_mcspi3, &omap34xx_mcspi4, - /* usbotg class */ + NULL, +}; + +/* 3430ES1-only hwmods */ +static __initdata struct omap_hwmod *omap3430es1_hwmods[] = { + &omap3430es1_dss_core_hwmod, + NULL +}; + +/* 3430ES2+-only hwmods */ +static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = { + &omap3xxx_dss_core_hwmod, &omap3xxx_usbhsotg_hwmod, + NULL +}; - /* usbotg for am35x */ - &am35xx_usbhsotg_hwmod, +/* 34xx-only hwmods (all ES revisions) */ +static __initdata struct omap_hwmod *omap34xx_hwmods[] = { + &omap34xx_sr1_hwmod, + &omap34xx_sr2_hwmod, + NULL +}; - NULL, +/* 36xx-only hwmods (all ES revisions) */ +static __initdata struct omap_hwmod *omap36xx_hwmods[] = { + &omap3xxx_uart4_hwmod, + &omap3xxx_dss_core_hwmod, + &omap36xx_sr1_hwmod, + &omap36xx_sr2_hwmod, + &omap3xxx_usbhsotg_hwmod, + NULL +}; + +static __initdata struct omap_hwmod *am35xx_hwmods[] = { + &omap3xxx_dss_core_hwmod, /* XXX ??? */ + &am35xx_usbhsotg_hwmod, + NULL }; int __init omap3xxx_hwmod_init(void) { - return omap_hwmod_register(omap3xxx_hwmods); + int r; + struct omap_hwmod **h = NULL; + unsigned int rev; + + /* Register hwmods common to all OMAP3 */ + r = omap_hwmod_register(omap3xxx_hwmods); + if (!r) + return r; + + rev = omap_rev(); + + /* + * Register hwmods common to individual OMAP3 families, all + * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx) + * All possible revisions should be included in this conditional. + */ + if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 || + rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || + rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { + h = omap34xx_hwmods; + } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) { + h = am35xx_hwmods; + } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || + rev == OMAP3630_REV_ES1_2) { + h = omap36xx_hwmods; + } else { + WARN(1, "OMAP3 hwmod family init: unknown chip type\n"); + return -EINVAL; + }; + + r = omap_hwmod_register(h); + if (!r) + return r; + + /* + * Register hwmods specific to certain ES levels of a + * particular family of silicon (e.g., 34xx ES1.0) + */ + h = NULL; + if (rev == OMAP3430_REV_ES1_0) { + h = omap3430es1_hwmods; + } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 || + rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || + rev == OMAP3430_REV_ES3_1_2) { + h = omap3430es2plus_hwmods; + }; + + if (h) + r = omap_hwmod_register(h); + + return r; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 6201422..caaf409 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -133,7 +133,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { .slaves = omap44xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), .mpu_irqs = omap44xx_dmm_irqs, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -189,7 +188,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { }, .slaves = omap44xx_emif_fw_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -236,7 +234,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { }, .slaves = omap44xx_l3_instr_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l3_main_1 */ @@ -336,7 +333,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { }, .slaves = omap44xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l3_main_2 */ @@ -438,7 +434,6 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { }, .slaves = omap44xx_l3_main_2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l3_main_3 */ @@ -496,7 +491,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { }, .slaves = omap44xx_l3_main_3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -559,7 +553,6 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { }, .slaves = omap44xx_l4_abe_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l4_cfg */ @@ -588,7 +581,6 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { }, .slaves = omap44xx_l4_cfg_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l4_per */ @@ -617,7 +609,6 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { }, .slaves = omap44xx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* l4_wkup */ @@ -646,7 +637,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { }, .slaves = omap44xx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -677,7 +667,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { .clkdm_name = "mpuss_clkdm", .slaves = omap44xx_mpu_private_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -828,7 +817,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_aess_slaves), .masters = omap44xx_aess_masters, .masters_cnt = ARRAY_SIZE(omap44xx_aess_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -856,7 +844,6 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = { }, .opt_clks = bandgap_opt_clks, .opt_clks_cnt = ARRAY_SIZE(bandgap_opt_clks), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -917,7 +904,6 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { }, .slaves = omap44xx_counter_32k_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_counter_32k_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1005,7 +991,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_dma_system_slaves), .masters = omap44xx_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap44xx_dma_system_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1098,7 +1083,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { }, .slaves = omap44xx_dmic_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dmic_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1164,7 +1148,6 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, }, }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct omap_hwmod omap44xx_dsp_hwmod = { @@ -1187,7 +1170,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_dsp_slaves), .masters = omap44xx_dsp_masters, .masters_cnt = ARRAY_SIZE(omap44xx_dsp_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1278,7 +1260,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves), .masters = omap44xx_dss_masters, .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1381,7 +1362,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), .slaves = omap44xx_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1480,7 +1460,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), .slaves = omap44xx_dss_dsi1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* dss_dsi2 */ @@ -1558,7 +1537,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), .slaves = omap44xx_dss_dsi2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1656,7 +1634,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), .slaves = omap44xx_dss_hdmi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1748,7 +1725,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), .slaves = omap44xx_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1817,7 +1793,6 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { }, .slaves = omap44xx_dss_venc_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -1901,7 +1876,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* gpio2 */ @@ -1957,7 +1931,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* gpio3 */ @@ -2013,7 +1986,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* gpio4 */ @@ -2069,7 +2041,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* gpio5 */ @@ -2125,7 +2096,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio5_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* gpio6 */ @@ -2181,7 +2151,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap44xx_gpio6_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_gpio6_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2261,7 +2230,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_hsi_slaves), .masters = omap44xx_hsi_masters, .masters_cnt = ARRAY_SIZE(omap44xx_hsi_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2345,7 +2313,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { .slaves = omap44xx_i2c1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* i2c2 */ @@ -2402,7 +2369,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { .slaves = omap44xx_i2c2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* i2c3 */ @@ -2459,7 +2425,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { .slaves = omap44xx_i2c3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* i2c4 */ @@ -2516,7 +2481,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { .slaves = omap44xx_i2c4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2577,7 +2541,6 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* Pseudo hwmod for reset control purpose only */ @@ -2593,7 +2556,6 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, }, }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct omap_hwmod omap44xx_ipu_hwmod = { @@ -2616,7 +2578,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_ipu_slaves), .masters = omap44xx_ipu_masters, .masters_cnt = ARRAY_SIZE(omap44xx_ipu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2706,7 +2667,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_iss_slaves), .masters = omap44xx_iss_masters, .masters_cnt = ARRAY_SIZE(omap44xx_iss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2781,7 +2741,6 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* Pseudo hwmod for reset control purpose only */ @@ -2797,7 +2756,6 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, }, }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static struct omap_hwmod omap44xx_iva_hwmod = { @@ -2820,7 +2778,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_iva_slaves), .masters = omap44xx_iva_masters, .masters_cnt = ARRAY_SIZE(omap44xx_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2890,7 +2847,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { }, .slaves = omap44xx_kbd_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_kbd_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -2956,7 +2912,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { }, .slaves = omap44xx_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -3051,7 +3006,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { }, .slaves = omap44xx_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcbsp2 */ @@ -3127,7 +3081,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { }, .slaves = omap44xx_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcbsp3 */ @@ -3203,7 +3156,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { }, .slaves = omap44xx_mcbsp3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcbsp4 */ @@ -3258,7 +3210,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { }, .slaves = omap44xx_mcbsp4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -3353,7 +3304,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { }, .slaves = omap44xx_mcpdm_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcpdm_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -3442,7 +3392,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { .dev_attr = &mcspi1_dev_attr, .slaves = omap44xx_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcspi2 */ @@ -3505,7 +3454,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { .dev_attr = &mcspi2_dev_attr, .slaves = omap44xx_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcspi3 */ @@ -3568,7 +3516,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { .dev_attr = &mcspi3_dev_attr, .slaves = omap44xx_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mcspi4 */ @@ -3629,7 +3576,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { .dev_attr = &mcspi4_dev_attr, .slaves = omap44xx_mcspi4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mcspi4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -3718,7 +3664,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_mmc1_slaves), .masters = omap44xx_mmc1_masters, .masters_cnt = ARRAY_SIZE(omap44xx_mmc1_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mmc2 */ @@ -3779,7 +3724,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_mmc2_slaves), .masters = omap44xx_mmc2_masters, .masters_cnt = ARRAY_SIZE(omap44xx_mmc2_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mmc3 */ @@ -3834,7 +3778,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { }, .slaves = omap44xx_mmc3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mmc3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mmc4 */ @@ -3890,7 +3833,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { }, .slaves = omap44xx_mmc4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mmc4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* mmc5 */ @@ -3945,7 +3887,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { }, .slaves = omap44xx_mmc5_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_mmc5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -3987,7 +3928,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { }, .masters = omap44xx_mpu_masters, .masters_cnt = ARRAY_SIZE(omap44xx_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -4063,7 +4003,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { }, .slaves = omap44xx_smartreflex_core_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* smartreflex_iva */ @@ -4112,7 +4051,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { }, .slaves = omap44xx_smartreflex_iva_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* smartreflex_mpu */ @@ -4161,7 +4099,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { }, .slaves = omap44xx_smartreflex_mpu_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -4224,7 +4161,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { }, .slaves = omap44xx_spinlock_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_spinlock_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -4310,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { }, .slaves = omap44xx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer2 */ @@ -4358,7 +4293,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { }, .slaves = omap44xx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer3 */ @@ -4406,7 +4340,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { }, .slaves = omap44xx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer4 */ @@ -4454,7 +4387,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { }, .slaves = omap44xx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer5 */ @@ -4521,7 +4453,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { }, .slaves = omap44xx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer6 */ @@ -4589,7 +4520,6 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { }, .slaves = omap44xx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer7 */ @@ -4656,7 +4586,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { }, .slaves = omap44xx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer8 */ @@ -4723,7 +4652,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { }, .slaves = omap44xx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer9 */ @@ -4771,7 +4699,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { }, .slaves = omap44xx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer10 */ @@ -4819,7 +4746,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { }, .slaves = omap44xx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* timer11 */ @@ -4867,7 +4793,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { }, .slaves = omap44xx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -4944,7 +4869,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { }, .slaves = omap44xx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_uart1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* uart2 */ @@ -4999,7 +4923,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { }, .slaves = omap44xx_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_uart2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* uart3 */ @@ -5055,7 +4978,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { }, .slaves = omap44xx_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_uart3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* uart4 */ @@ -5110,7 +5032,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { }, .slaves = omap44xx_uart4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_uart4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -5195,7 +5116,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), .masters = omap44xx_usb_otg_hs_masters, .masters_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -5266,7 +5186,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { }, .slaves = omap44xx_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* wd_timer3 */ @@ -5333,7 +5252,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { }, .slaves = omap44xx_wd_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static __initdata struct omap_hwmod *omap44xx_hwmods[] = { diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 0e329ca..9115aed 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -496,7 +496,6 @@ struct omap_hwmod_class { * @_state: internal-use hwmod state * @_postsetup_state: internal-use state to leave the hwmod in after _setup() * @flags: hwmod flags (documented below) - * @omap_chip: OMAP chips this hwmod is present on * @_lock: spinlock serializing operations on this hwmod * @node: list node for hwmod list (internal use) * @@ -545,7 +544,6 @@ struct omap_hwmod { u8 _int_flags; u8 _state; u8 _postsetup_state; - const struct omap_chip_id omap_chip; }; int omap_hwmod_register(struct omap_hwmod **ohs); -- cgit v0.10.2 From 00c46b3069c1ee9aa31db3057e9224685af52efa Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Sep 2011 17:23:39 -0600 Subject: OMAP: id: remove OMAP_CHIP declarations, code Now that all of the users of the OMAP_CHIP bitfield code have been converted to use lists, the OMAP_CHIP code, data, and declarations can be removed. Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index ed1d439..d27daf9 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -28,7 +28,6 @@ #include "control.h" -static struct omap_chip_id omap_chip; static unsigned int omap_revision; u32 omap_features; @@ -39,19 +38,6 @@ unsigned int omap_rev(void) } EXPORT_SYMBOL(omap_rev); -/** - * omap_chip_is - test whether currently running OMAP matches a chip type - * @oc: omap_chip_t to test against - * - * Test whether the currently-running OMAP chip matches the supplied - * chip type 'oc'. Returns 1 upon a match; 0 upon failure. - */ -int omap_chip_is(struct omap_chip_id oci) -{ - return (oci.oc & omap_chip.oc) ? 1 : 0; -} -EXPORT_SYMBOL(omap_chip_is); - int omap_type(void) { u32 val = 0; @@ -248,8 +234,6 @@ static void __init omap3_check_revision(const char **cpu_rev) u16 hawkeye; u8 rev; - omap_chip.oc = CHIP_IS_OMAP3430; - /* * We cannot access revision registers on ES1.0. * If the processor type is Cortex-A8 and the revision is 0x0 @@ -258,7 +242,6 @@ static void __init omap3_check_revision(const char **cpu_rev) cpuid = read_cpuid(CPUID_ID); if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { omap_revision = OMAP3430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP3430ES1; *cpu_rev = "1.0"; return; } @@ -280,22 +263,18 @@ static void __init omap3_check_revision(const char **cpu_rev) case 0: /* Take care of early samples */ case 1: omap_revision = OMAP3430_REV_ES2_0; - omap_chip.oc |= CHIP_IS_OMAP3430ES2; *cpu_rev = "2.0"; break; case 2: omap_revision = OMAP3430_REV_ES2_1; - omap_chip.oc |= CHIP_IS_OMAP3430ES2; *cpu_rev = "2.1"; break; case 3: omap_revision = OMAP3430_REV_ES3_0; - omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; *cpu_rev = "3.0"; break; case 4: omap_revision = OMAP3430_REV_ES3_1; - omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; *cpu_rev = "3.1"; break; case 7: @@ -303,9 +282,6 @@ static void __init omap3_check_revision(const char **cpu_rev) default: /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1_2; - - /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */ - omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; *cpu_rev = "3.1.2"; } break; @@ -315,8 +291,6 @@ static void __init omap3_check_revision(const char **cpu_rev) * * Set the device to be OMAP3517 here. Actual device * is identified later based on the features. - * - * REVISIT: AM3505/AM3517 should have their own CHIP_IS */ switch (rev) { case 0: @@ -329,11 +303,9 @@ static void __init omap3_check_revision(const char **cpu_rev) omap_revision = OMAP3517_REV_ES1_1; *cpu_rev = "1.1"; } - omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; break; case 0xb891: /* Handle 36xx devices */ - omap_chip.oc |= CHIP_IS_OMAP3630ES1; switch(rev) { case 0: /* Take care of early samples */ @@ -342,20 +314,16 @@ static void __init omap3_check_revision(const char **cpu_rev) break; case 1: omap_revision = OMAP3630_REV_ES1_1; - omap_chip.oc |= CHIP_IS_OMAP3630ES1_1; *cpu_rev = "1.1"; break; case 2: /* FALLTHROUGH */ default: omap_revision = OMAP3630_REV_ES1_2; - omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; *cpu_rev = "1.2"; } break; case 0xb81e: - omap_chip.oc = CHIP_IS_TI816X; - switch (rev) { case 0: omap_revision = TI8168_REV_ES1_0; @@ -372,7 +340,6 @@ static void __init omap3_check_revision(const char **cpu_rev) default: /* Unknown default to latest silicon rev as default */ omap_revision = OMAP3630_REV_ES1_2; - omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; *cpu_rev = "1.2"; pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); } @@ -407,24 +374,20 @@ static void __init omap4_check_revision(void) switch (rev) { case 0: omap_revision = OMAP4430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP4430ES1; break; case 1: default: omap_revision = OMAP4430_REV_ES2_0; - omap_chip.oc |= CHIP_IS_OMAP4430ES2; } break; case 0xb95c: switch (rev) { case 3: omap_revision = OMAP4430_REV_ES2_1; - omap_chip.oc |= CHIP_IS_OMAP4430ES2_1; break; case 4: default: omap_revision = OMAP4430_REV_ES2_2; - omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; } break; case 0xb94e: @@ -432,14 +395,12 @@ static void __init omap4_check_revision(void) case 0: default: omap_revision = OMAP4460_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP4460ES1_0; break; } break; default: /* Unknown default to latest silicon rev as default */ omap_revision = OMAP4430_REV_ES2_2; - omap_chip.oc |= CHIP_IS_OMAP4430ES2_2; } pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, @@ -523,22 +484,6 @@ void __init omap2_check_revision(void) } else { pr_err("OMAP revision unknown, please fix!\n"); } - - /* - * OK, now we know the exact revision. Initialize omap_chip bits - * for powerdowmain and clockdomain code. - */ - if (cpu_is_omap243x()) { - /* Currently only supports 2430ES2.1 and 2430-all */ - omap_chip.oc |= CHIP_IS_OMAP2430; - return; - } else if (cpu_is_omap242x()) { - /* Currently only supports 2420ES2.1.1 and 2420-all */ - omap_chip.oc |= CHIP_IS_OMAP2420; - return; - } - - pr_err("Uninitialized omap_chip, please fix!\n"); } /* diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index df4b968..197ca03 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -80,8 +80,6 @@ struct clkops { * * @div is the divisor that should be applied to the parent clock's rate * to produce the current clock's rate. - * - * XXX @flags probably should be replaced with an struct omap_chip. */ struct clksel_rate { u32 val; diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index ddbc025..2f90269 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -44,13 +44,6 @@ int omap_type(void); -struct omap_chip_id { - u16 oc; - u8 type; -}; - -#define OMAP_CHIP_INIT(x) { .oc = x } - /* * omap_rev bits: * CPU id bits (0730, 1510, 1710, 2422...) [31:16] @@ -402,61 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517) #define OMAP446X_CLASS 0x44600044 #define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) -/* - * omap_chip bits - * - * CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is - * valid on all chips of that type. CHIP_IS_OMAP3430ES{1,2} indicates - * something that is only valid on that particular ES revision. - * - * These bits may be ORed together to indicate structures that are - * available on multiple chip types. - * - * To test whether a particular structure matches the current OMAP chip type, - * use omap_chip_is(). - * - */ -#define CHIP_IS_OMAP2420 (1 << 0) -#define CHIP_IS_OMAP2430 (1 << 1) -#define CHIP_IS_OMAP3430 (1 << 2) -#define CHIP_IS_OMAP3430ES1 (1 << 3) -#define CHIP_IS_OMAP3430ES2 (1 << 4) -#define CHIP_IS_OMAP3430ES3_0 (1 << 5) -#define CHIP_IS_OMAP3430ES3_1 (1 << 6) -#define CHIP_IS_OMAP3630ES1 (1 << 7) -#define CHIP_IS_OMAP4430ES1 (1 << 8) -#define CHIP_IS_OMAP3630ES1_1 (1 << 9) -#define CHIP_IS_OMAP3630ES1_2 (1 << 10) -#define CHIP_IS_OMAP4430ES2 (1 << 11) -#define CHIP_IS_OMAP4430ES2_1 (1 << 12) -#define CHIP_IS_OMAP4430ES2_2 (1 << 13) -#define CHIP_IS_TI816X (1 << 14) -#define CHIP_IS_OMAP4460ES1_0 (1 << 15) - -#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) - -#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \ - CHIP_IS_OMAP4430ES2 | \ - CHIP_IS_OMAP4430ES2_1 | \ - CHIP_IS_OMAP4430ES2_2 | \ - CHIP_IS_OMAP4460ES1_0) - -/* - * "GE" here represents "greater than or equal to" in terms of ES - * levels. So CHIP_GE_OMAP3430ES2 is intended to match all OMAP3430 - * chips at ES2 and beyond, but not, for example, any OMAP lines after - * OMAP3. - */ -#define CHIP_GE_OMAP3430ES2 (CHIP_IS_OMAP3430ES2 | \ - CHIP_IS_OMAP3430ES3_0 | \ - CHIP_GE_OMAP3430ES3_1) -#define CHIP_GE_OMAP3430ES3_1 (CHIP_IS_OMAP3430ES3_1 | \ - CHIP_IS_OMAP3630ES1 | \ - CHIP_GE_OMAP3630ES1_1) -#define CHIP_GE_OMAP3630ES1_1 (CHIP_IS_OMAP3630ES1_1 | \ - CHIP_IS_OMAP3630ES1_2) - -int omap_chip_is(struct omap_chip_id oci); void omap2_check_revision(void); /* -- cgit v0.10.2 From fa17f20f686a90004a8af403e24cc8443e8144f3 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 11:02:59 -0700 Subject: OMAP2+: hwmod: remove unused voltagedomain pointer The voltage domain pointer currently in struct omap_hwmod is not used and does not belong here. Instead, voltage domains will be associated with powerdomains in forthcoming patches. Acked-by: Paul Walmsley Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 0e329ca..38ac4af 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -526,7 +526,6 @@ struct omap_hwmod { char *clkdm_name; struct clockdomain *clkdm; char *vdd_name; - struct voltagedomain *voltdm; struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ void *dev_attr; -- cgit v0.10.2 From a7460daf15239563b3e7bb862580f90da78541bd Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 13:35:22 -0700 Subject: OMAP2+: voltage: move PRCM mod offets into VC/VP structures Eliminate need for global variables for the various PRM module offsets by making them part of the VP/VC common structures Eventually, these will likely be moved again, or more likely removed when VP/VC code is isolated, but for now just getting rid of them as global variabes so that the voltage domain initialization can be cleaned up. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index e776777..f7338af 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -23,6 +23,7 @@ * struct omap_vc_common_data - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register + * @prm_mod: PRM module id used for PRM register access * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start @@ -40,6 +41,7 @@ struct omap_vc_common_data { u32 cmd_on_mask; u32 valid; + s16 prm_mod; u8 smps_sa_reg; u8 smps_volra_reg; u8 bypass_val_reg; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index f37dc4b..55caccb 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -30,6 +30,7 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static struct omap_vc_common_data omap3_vc_common = { + .prm_mod = OMAP3430_GR_MOD, .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index a98da8d..b62678e 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -31,6 +31,7 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static const struct omap_vc_common_data omap4_vc_common = { + .prm_mod = OMAP4430_PRM_DEVICE_INST, .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 9ef3789..3151d75 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info; */ static int nr_scalable_vdd; -/* XXX document */ -static s16 prm_mod_offs; -static s16 prm_irqst_ocp_mod_offs; - static struct dentry *voltage_dir; /* Init function pointers */ @@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val) return -EINVAL; } - vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); + vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); if (!vdd->pmic_info->vsel_to_uv) { pr_warning("PMIC function to convert vsel to voltage" @@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) vsel = vdd->pmic_info->uv_to_vsel(uvdc); - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | vdd->vp_data->vp_common->vpconfig_initvdd); vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Trigger initVDD value copy to voltage processor */ vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), - prm_mod_offs, vdd->vp_data->vpconfig); + vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Clear initVDD copy trigger bit */ - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); } /* Generic voltage init functions */ @@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info *vdd) (vdd->vp_rt_data.vpconfig_errorgain << vdd->vp_data->vp_common->vpconfig_errorgain_shift) | vdd->vp_data->vp_common->vpconfig_timeouten; - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | (vdd->vp_rt_data.vstepmin_stepmin << vdd->vp_data->vp_common->vstepmin_stepmin_shift)); - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmin); + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | (vdd->vp_rt_data.vstepmax_stepmax << vdd->vp_data->vp_common->vstepmax_stepmax_shift)); - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmax); + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << vdd->vp_data->vp_common->vlimitto_vddmax_shift) | @@ -247,7 +243,7 @@ static void __init vp_init(struct omap_vdd_info *vdd) vdd->vp_data->vp_common->vlimitto_vddmin_shift) | (vdd->vp_rt_data.vlimitto_timeout << vdd->vp_data->vp_common->vlimitto_timeout_shift)); - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vlimitto); + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); } static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) @@ -336,23 +332,23 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, volt_data = NULL; *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); - *current_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); + *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); /* Setting the ON voltage to the new target voltage */ - vc_cmdval = vdd->read_reg(prm_mod_offs, vdd->vc_data->cmdval_reg); + vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); vc_cmdval &= ~vc_common->cmd_on_mask; vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); - vdd->write_reg(vc_cmdval, prm_mod_offs, vdd->vc_data->cmdval_reg); + vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); /* Setting vp errorgain based on the voltage */ if (volt_data) { - vp_errgain_val = vdd->read_reg(prm_mod_offs, + vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << vp_common->vpconfig_errorgain_shift; - vdd->write_reg(vp_errgain_val, prm_mod_offs, + vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); } @@ -394,11 +390,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, (vdd->pmic_info->i2c_slave_addr << vdd->vc_data->vc_common->slaveaddr_shift); - vdd->write_reg(vc_bypass_value, prm_mod_offs, vc_bypass_val_reg); - vdd->write_reg(vc_bypass_value | vc_valid, prm_mod_offs, + vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); + vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); - vc_bypass_value = vdd->read_reg(prm_mod_offs, vc_bypass_val_reg); + vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); /* * Loop till the bypass command is acknowledged from the SMPS. * NOTE: This is legacy code. The loop count and retry count needs @@ -417,7 +413,7 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, loop_cnt = 0; udelay(10); } - vc_bypass_value = vdd->read_reg(prm_mod_offs, + vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); } @@ -445,8 +441,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - prm_irqst_ocp_mod_offs, prm_irqst_reg); - if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & + vdd->prm_irqst_mod, prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); @@ -458,28 +454,28 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, } /* Configure for VP-Force Update */ - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | vdd->vp_data->vp_common->vpconfig_forceupdate | vdd->vp_data->vp_common->vpconfig_initvoltage_mask); vpconfig |= ((target_vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Trigger initVDD value copy to voltage processor */ vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Force update of voltage */ vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* * Wait for TransactionDone. Typical latency is <200us. * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ timeout = 0; - omap_test_timeout((vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) @@ -496,8 +492,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - prm_irqst_ocp_mod_offs, prm_irqst_reg); - if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & + vdd->prm_irqst_mod, prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); @@ -508,13 +504,13 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, "to clear the TRANXDONE status\n", __func__, vdd->voltdm.name); - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Clear initVDD copy trigger bit */ vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Clear force bit */ vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); return 0; } @@ -525,10 +521,10 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) * Voltage Manager FSM parameters init * XXX This data should be passed in from the board file */ - vdd->write_reg(OMAP3_CLKSETUP, prm_mod_offs, OMAP3_PRM_CLKSETUP_OFFSET); - vdd->write_reg(OMAP3_VOLTOFFSET, prm_mod_offs, + vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); + vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_VOLTOFFSET_OFFSET); - vdd->write_reg(OMAP3_VOLTSETUP2, prm_mod_offs, + vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_VOLTSETUP2_OFFSET); } @@ -550,15 +546,15 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); - vdd->write_reg(vc_val, prm_mod_offs, vdd->vc_data->cmdval_reg); + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); /* * Generic VC parameters init * XXX This data should be abstracted out */ - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, prm_mod_offs, + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_VC_CH_CONF_OFFSET); - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, prm_mod_offs, + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_VC_I2C_CFG_OFFSET); omap3_vfsm_init(vdd); @@ -585,11 +581,11 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); - vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); /* XXX These are magic numbers and do not belong! */ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); - vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); is_initialized = true; } @@ -612,27 +608,27 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) } /* Set up the SMPS_SA(i2c slave address in VC */ - vc_val = vdd->read_reg(prm_mod_offs, + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->vc_common->smps_sa_reg); vc_val &= ~vdd->vc_data->smps_sa_mask; vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; - vdd->write_reg(vc_val, prm_mod_offs, + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->vc_common->smps_sa_reg); /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = vdd->read_reg(prm_mod_offs, + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->vc_common->smps_volra_reg); vc_val &= ~vdd->vc_data->smps_volra_mask; vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; - vdd->write_reg(vc_val, prm_mod_offs, + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->vc_common->smps_volra_reg); /* Configure the setup times */ - vc_val = vdd->read_reg(prm_mod_offs, vdd->vfsm->voltsetup_reg); + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); vc_val &= ~vdd->vfsm->voltsetup_mask; vc_val |= vdd->pmic_info->volt_setup_time << vdd->vfsm->voltsetup_shift; - vdd->write_reg(vc_val, prm_mod_offs, vdd->vfsm->voltsetup_reg); + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); if (cpu_is_omap34xx()) omap3_vc_init(vdd); @@ -713,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) return 0; } - curr_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); + curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { pr_warning("%s: PMIC function to convert vsel to voltage" @@ -755,9 +751,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) vp_latch_vsel(vdd); /* Enable VP */ - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vdd->vp_enabled = true; } @@ -794,14 +790,14 @@ void omap_vp_disable(struct voltagedomain *voltdm) } /* Disable VP */ - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us */ - omap_test_timeout((vdd->read_reg(prm_mod_offs, vdd->vp_data->vstatus)), + omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), VP_IDLE_TIMEOUT, timeout); if (timeout >= VP_IDLE_TIMEOUT) @@ -1094,12 +1090,9 @@ int __init omap_voltage_late_init(void) } /* XXX document */ -int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_ocp_mod, - struct omap_vdd_info *omap_vdd_array[], +int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], u8 omap_vdd_count) { - prm_mod_offs = prm_mod; - prm_irqst_ocp_mod_offs = prm_irqst_ocp_mod; vdd_info = omap_vdd_array; nr_scalable_vdd = omap_vdd_count; return 0; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index e9f5408..ffdc55e 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -119,6 +119,7 @@ struct omap_volt_pmic_info { * @voltdm : pointer to the voltage domain structure * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. + * @prm_irqst_mod : PRM module id used for PRM IRQ status register access * @vp_enabled : flag to keep track of whether vp is enabled or not * @volt_scale : API to scale the voltage of the vdd. */ @@ -133,6 +134,8 @@ struct omap_vdd_info { struct dentry *debug_dir; u32 curr_volt; bool vp_enabled; + + s16 prm_irqst_mod; u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct omap_vdd_info *vdd, @@ -151,8 +154,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); -int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod, - struct omap_vdd_info *omap_vdd_array[], +int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], u8 omap_vdd_count); #ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index def230f..0d30b7f 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { }; static struct omap_vdd_info omap3_vdd1_info = { + .prm_irqst_mod = OCP_MOD, .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, @@ -53,6 +54,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { }; static struct omap_vdd_info omap3_vdd2_info = { + .prm_irqst_mod = OCP_MOD, .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, @@ -70,9 +72,6 @@ static struct omap_vdd_info *omap3_vdd_info[] = { /* OMAP3 specific voltage init functions */ static int __init omap3xxx_voltage_early_init(void) { - s16 prm_mod = OMAP3430_GR_MOD; - s16 prm_irqst_ocp_mod = OCP_MOD; - if (!cpu_is_omap34xx()) return 0; @@ -88,8 +87,7 @@ static int __init omap3xxx_voltage_early_init(void) omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; } - return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, - omap3_vdd_info, + return omap_voltage_early_init(omap3_vdd_info, ARRAY_SIZE(omap3_vdd_info)); }; core_initcall(omap3xxx_voltage_early_init); diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index cb64996..1c2d7d7 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -37,6 +37,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_mpu_info = { + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, @@ -50,6 +51,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_iva_info = { + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, @@ -63,6 +65,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_core_info = { + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, @@ -81,9 +84,6 @@ static struct omap_vdd_info *omap4_vdd_info[] = { /* OMAP4 specific voltage init functions */ static int __init omap44xx_voltage_early_init(void) { - s16 prm_mod = OMAP4430_PRM_DEVICE_INST; - s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST; - if (!cpu_is_omap44xx()) return 0; @@ -95,8 +95,7 @@ static int __init omap44xx_voltage_early_init(void) omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; - return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, - omap4_vdd_info, + return omap_voltage_early_init(omap4_vdd_info, ARRAY_SIZE(omap4_vdd_info)); }; core_initcall(omap44xx_voltage_early_init); diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 7ce134f..d277da6 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -42,6 +42,7 @@ * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg + * @prm_mod: PRM module id used for PRM register access * * XXX It it not necessary to have both a mask and a shift for the same * bitfield - remove one @@ -54,6 +55,7 @@ struct omap_vp_common_data { u32 vpconfig_initvdd; u32 vpconfig_forceupdate; u32 vpconfig_vpenable; + s16 prm_mod; u8 vpconfig_erroroffset_shift; u8 vpconfig_errorgain_shift; u8 vpconfig_initvoltage_shift; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 6452170..c9b3e64 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -31,6 +31,7 @@ * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. */ static const struct omap_vp_common_data omap3_vp_common = { + .prm_mod = OMAP3430_GR_MOD, .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 65d1ad6..1a0842e 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -32,6 +32,7 @@ * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. */ static const struct omap_vp_common_data omap4_vp_common = { + .prm_mod = OMAP4430_PRM_DEVICE_INST, .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, -- cgit v0.10.2 From c39263c33f9c94443aa9fc4fc2b1f1191666fccd Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 17:20:35 -0700 Subject: OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain The prm_irqst_reg is not part of the VP. Move it up into the common voltage domain struct. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 3151d75..a366a6b 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, unsigned long target_volt) { u32 vpconfig; - u8 target_vsel, current_vsel, prm_irqst_reg; + u8 target_vsel, current_vsel; int ret, timeout = 0; ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); if (ret) return ret; - prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; - /* * Clear all pending TransactionDone interrupt/status. Typical latency * is <3us */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); @@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ timeout = 0; - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, + vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) @@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & vdd->vp_data->prm_irqst_data->tranxdone_status)) break; udelay(1); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index ffdc55e..db23d49 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -136,6 +136,7 @@ struct omap_vdd_info { bool vp_enabled; s16 prm_irqst_mod; + u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct omap_vdd_info *vdd, diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 0d30b7f..f831f9a 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { static struct omap_vdd_info omap3_vdd1_info = { .prm_irqst_mod = OCP_MOD, + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, @@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { static struct omap_vdd_info omap3_vdd2_info = { .prm_irqst_mod = OCP_MOD, + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 1c2d7d7..64dc265 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { static struct omap_vdd_info omap4_vdd_mpu_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, @@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { static struct omap_vdd_info omap4_vdd_iva_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, @@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { static struct omap_vdd_info omap4_vdd_core_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index d277da6..5406b08 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -70,16 +70,13 @@ struct omap_vp_common_data { /** * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data - * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg * - * XXX prm_irqst_reg does not belong here * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a * hardware bug * XXX This structure is probably not needed */ struct omap_vp_prm_irqst_data { - u8 prm_irqst_reg; u32 tranxdone_status; }; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index c9b3e64..a8ea045 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -51,7 +51,6 @@ static const struct omap_vp_common_data omap3_vp_common = { }; static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, }; @@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = { }; static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, }; diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 1a0842e..0957c24 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -52,7 +52,6 @@ static const struct omap_vp_common_data omap4_vp_common = { }; static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, }; @@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { }; static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, }; @@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = { }; static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, }; -- cgit v0.10.2 From 81a604823797ddb3aaf2a78cc1c6a1fa8f4d200c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 14:25:45 -0700 Subject: OMAP2+: voltage: start towards a new voltagedomain layer Start cleaning up the voltage layer to have a voltage domain layer that resembles the structure of the existing clock and power domain layers. To that end: - move the 'struct voltagedomain' out of 'struct omap_vdd_info' to become the primary data structure. - convert any functions taking a pointer to struct omap_vdd_info into functions taking a struct voltagedomain pointer. - convert the register & initialize of voltage domains to look like that of powerdomains - convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled after the current powerdomain and clockdomain lookup functions. - omap_voltage_late_init(): only configure VDD info when the vdd_info struct is non-NULL Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 40b6d47..7c36fde 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -38,6 +38,7 @@ #include "io.h" #include +#include "voltage.h" #include "powerdomain.h" #include "clockdomain.h" @@ -349,10 +350,12 @@ void __init omap2_init_common_infrastructure(void) omap243x_clockdomains_init(); omap2430_hwmod_init(); } else if (cpu_is_omap34xx()) { + omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); omap3xxx_hwmod_init(); } else if (cpu_is_omap44xx()) { + omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); omap44xx_clockdomains_init(); omap44xx_hwmod_init(); diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 07d6140..fcd2f62 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -250,13 +250,13 @@ int __init omap4_twl_init(void) if (!cpu_is_omap44xx()) return -ENODEV; - voltdm = omap_voltage_domain_lookup("mpu"); + voltdm = voltdm_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); - voltdm = omap_voltage_domain_lookup("iva"); + voltdm = voltdm_lookup("iva"); omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); - voltdm = omap_voltage_domain_lookup("core"); + voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); return 0; @@ -288,10 +288,10 @@ int __init omap3_twl_init(void) if (!twl_sr_enable_autoinit) omap3_twl_set_sr_bit(true); - voltdm = omap_voltage_domain_lookup("mpu"); + voltdm = voltdm_lookup("mpu"); omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); - voltdm = omap_voltage_domain_lookup("core"); + voltdm = voltdm_lookup("core"); omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); return 0; diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 472bf22..c10f8f6 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -181,7 +181,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } - voltdm = omap_voltage_domain_lookup(vdd_name); + voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", __func__, vdd_name); diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 10d3c5e..2782d3f 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->senn_mod = 0x1; sr_data->senp_mod = 0x1; - sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name); + sr_data->voltdm = voltdm_lookup(oh->vdd_name); if (IS_ERR(sr_data->voltdm)) { pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", __func__, oh->vdd_name); diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index a366a6b..4f0361a 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -40,20 +40,13 @@ #include "vc.h" #include "vp.h" -#define VOLTAGE_DIR_SIZE 16 - - -static struct omap_vdd_info **vdd_info; - -/* - * Number of scalable voltage domains. - */ -static int nr_scalable_vdd; +static LIST_HEAD(voltdm_list); +#define VOLTAGE_DIR_SIZE 16 static struct dentry *voltage_dir; /* Init function pointers */ -static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, +static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, unsigned long target_volt); static u32 omap3_voltage_read_reg(u16 mod, u8 offset) @@ -77,11 +70,12 @@ static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); } -static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) +static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { char *sys_ck_name; struct clk *sys_ck; u32 sys_clk_speed, timeout_val, waittime; + struct omap_vdd_info *vdd = voltdm->vdd; /* * XXX Clockfw should handle this, or this should be in a @@ -101,7 +95,7 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) sys_ck = clk_get(NULL, sys_ck_name); if (IS_ERR(sys_ck)) { pr_warning("%s: Could not get the sys clk to calculate" - "various vdd_%s params\n", __func__, vdd->voltdm.name); + "various vdd_%s params\n", __func__, voltdm->name); return -EINVAL; } sys_clk_speed = clk_get_rate(sys_ck); @@ -135,7 +129,8 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) /* Voltage debugfs support */ static int vp_volt_debug_get(void *data, u64 *val) { - struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; + struct voltagedomain *voltdm = (struct voltagedomain *)data; + struct omap_vdd_info *vdd = voltdm->vdd; u8 vsel; if (!vdd) { @@ -157,14 +152,14 @@ static int vp_volt_debug_get(void *data, u64 *val) static int nom_volt_debug_get(void *data, u64 *val) { - struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; + struct voltagedomain *voltdm = (struct voltagedomain *)data; - if (!vdd) { + if (!voltdm) { pr_warning("Wrong paramater passed\n"); return -EINVAL; } - *val = omap_voltage_get_nom_volt(&vdd->voltdm); + *val = omap_voltage_get_nom_volt(voltdm); return 0; } @@ -172,16 +167,17 @@ static int nom_volt_debug_get(void *data, u64 *val) DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, "%llu\n"); -static void vp_latch_vsel(struct omap_vdd_info *vdd) +static void vp_latch_vsel(struct voltagedomain *voltdm) { u32 vpconfig; unsigned long uvdc; char vsel; + struct omap_vdd_info *vdd = voltdm->vdd; - uvdc = omap_voltage_get_nom_volt(&vdd->voltdm); + uvdc = omap_voltage_get_nom_volt(voltdm); if (!uvdc) { pr_warning("%s: unable to find current voltage for vdd_%s\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return; } @@ -209,13 +205,14 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) } /* Generic voltage init functions */ -static void __init vp_init(struct omap_vdd_info *vdd) +static void __init vp_init(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; u32 vp_val; if (!vdd->read_reg || !vdd->write_reg) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return; } @@ -246,25 +243,26 @@ static void __init vp_init(struct omap_vdd_info *vdd) vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); } -static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) +static void __init vdd_debugfs_init(struct voltagedomain *voltdm) { char *name; + struct omap_vdd_info *vdd = voltdm->vdd; name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); if (!name) { pr_warning("%s: Unable to allocate memory for debugfs" " directory name for vdd_%s", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return; } strcpy(name, "vdd_"); - strcat(name, vdd->voltdm.name); + strcat(name, voltdm->name); vdd->debug_dir = debugfs_create_dir(name, voltage_dir); kfree(name); if (IS_ERR(vdd->debug_dir)) { pr_warning("%s: Unable to create debugfs directory for" - " vdd_%s\n", __func__, vdd->voltdm.name); + " vdd_%s\n", __func__, voltdm->name); vdd->debug_dir = NULL; return; } @@ -288,16 +286,17 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, &(vdd->vp_rt_data.vlimitto_timeout)); (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, - (void *) vdd, &vp_volt_debug_fops); + (void *) voltdm, &vp_volt_debug_fops); (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, - vdd->debug_dir, (void *) vdd, + vdd->debug_dir, (void *) voltdm, &nom_volt_debug_fops); } /* Voltage scale and accessory APIs */ -static int _pre_volt_scale(struct omap_vdd_info *vdd, +static int _pre_volt_scale(struct voltagedomain *voltdm, unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) { + struct omap_vdd_info *vdd = voltdm->vdd; struct omap_volt_data *volt_data; const struct omap_vc_common_data *vc_common; const struct omap_vp_common_data *vp_common; @@ -309,25 +308,25 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, /* Check if suffiecient pmic info is available for this vdd */ if (!vdd->pmic_info) { pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return -EINVAL; } if (!vdd->pmic_info->uv_to_vsel) { pr_err("%s: PMIC function to convert voltage in uV to" "vsel not registered. Hence unable to scale voltage" - "for vdd_%s\n", __func__, vdd->voltdm.name); + "for vdd_%s\n", __func__, voltdm->name); return -ENODATA; } if (!vdd->read_reg || !vdd->write_reg) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return -EINVAL; } /* Get volt_data corresponding to target_volt */ - volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt); + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); if (IS_ERR(volt_data)) volt_data = NULL; @@ -355,9 +354,10 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, return 0; } -static void _post_volt_scale(struct omap_vdd_info *vdd, +static void _post_volt_scale(struct voltagedomain *voltdm, unsigned long target_volt, u8 target_vsel, u8 current_vsel) { + struct omap_vdd_info *vdd = voltdm->vdd; u32 smps_steps = 0, smps_delay = 0; smps_steps = abs(target_vsel - current_vsel); @@ -370,15 +370,16 @@ static void _post_volt_scale(struct omap_vdd_info *vdd, } /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ -static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, +static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, unsigned long target_volt) { + struct omap_vdd_info *vdd = voltdm->vdd; u32 loop_cnt = 0, retries_cnt = 0; u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; u8 target_vsel, current_vsel; int ret; - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); + ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); if (ret) return ret; @@ -417,19 +418,20 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, vc_bypass_val_reg); } - _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); + _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); return 0; } /* VP force update method of voltage scaling */ -static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, +static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, unsigned long target_volt) { + struct omap_vdd_info *vdd = voltdm->vdd; u32 vpconfig; u8 target_vsel, current_vsel; int ret, timeout = 0; - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); + ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); if (ret) return ret; @@ -447,7 +449,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, } if (timeout >= VP_TRANXDONE_TIMEOUT) { pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." - "Voltage change aborted", __func__, vdd->voltdm.name); + "Voltage change aborted", __func__, voltdm->name); return -ETIMEDOUT; } @@ -480,9 +482,9 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, if (timeout >= VP_TRANXDONE_TIMEOUT) pr_err("%s: vdd_%s TRANXDONE timeout exceeded." "TRANXDONE never got set after the voltage update\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); - _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); + _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); /* * Disable TransactionDone interrupt , clear all status, clear @@ -501,7 +503,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, if (timeout >= VP_TRANXDONE_TIMEOUT) pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" "to clear the TRANXDONE status\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); /* Clear initVDD copy trigger bit */ @@ -514,8 +516,10 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, return 0; } -static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) +static void __init omap3_vfsm_init(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; + /* * Voltage Manager FSM parameters init * XXX This data should be passed in from the board file @@ -527,8 +531,9 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) OMAP3_PRM_VOLTSETUP2_OFFSET); } -static void __init omap3_vc_init(struct omap_vdd_info *vdd) +static void __init omap3_vc_init(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; u32 vc_val; @@ -556,15 +561,16 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_VC_I2C_CFG_OFFSET); - omap3_vfsm_init(vdd); + omap3_vfsm_init(voltdm); is_initialized = true; } /* OMAP4 specific voltage init functions */ -static void __init omap4_vc_init(struct omap_vdd_info *vdd) +static void __init omap4_vc_init(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; u32 vc_val; @@ -589,20 +595,21 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) is_initialized = true; } -static void __init omap_vc_init(struct omap_vdd_info *vdd) +static void __init omap_vc_init(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; u32 vc_val; if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { pr_err("%s: PMIC info requried to configure vc for" "vdd_%s not populated.Hence cannot initialize vc\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return; } if (!vdd->read_reg || !vdd->write_reg) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, vdd->voltdm.name); + __func__, voltdm->name); return; } @@ -630,23 +637,24 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); if (cpu_is_omap34xx()) - omap3_vc_init(vdd); + omap3_vc_init(voltdm); else if (cpu_is_omap44xx()) - omap4_vc_init(vdd); + omap4_vc_init(voltdm); } -static int __init omap_vdd_data_configure(struct omap_vdd_info *vdd) +static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) { + struct omap_vdd_info *vdd = voltdm->vdd; int ret = -EINVAL; if (!vdd->pmic_info) { pr_err("%s: PMIC info requried to configure vdd_%s not" "populated.Hence cannot initialize vdd_%s\n", - __func__, vdd->voltdm.name, vdd->voltdm.name); + __func__, voltdm->name, voltdm->name); goto ovdc_out; } - if (IS_ERR_VALUE(_config_common_vdd_data(vdd))) + if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) goto ovdc_out; if (cpu_is_omap34xx()) { @@ -680,7 +688,7 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) return 0; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; return vdd->curr_volt; } @@ -701,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) return 0; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; if (!vdd->read_reg) { pr_err("%s: No read API for reading vdd_%s regs\n", __func__, voltdm->name); @@ -736,7 +744,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) return; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; if (!vdd->read_reg || !vdd->write_reg) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); @@ -747,7 +755,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) if (vdd->vp_enabled) return; - vp_latch_vsel(vdd); + vp_latch_vsel(voltdm); /* Enable VP */ vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); @@ -774,7 +782,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) return; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; if (!vdd->read_reg || !vdd->write_reg) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); @@ -827,7 +835,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, return -EINVAL; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; if (!vdd->volt_scale) { pr_err("%s: No voltage scale API registered for vdd_%s\n", @@ -835,7 +843,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, return -ENODATA; } - return vdd->volt_scale(vdd, target_volt); + return vdd->volt_scale(voltdm, target_volt); } /** @@ -888,7 +896,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, return; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; *volt_data = vdd->volt_data; } @@ -919,7 +927,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, return ERR_PTR(-EINVAL); } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; if (!vdd->volt_data) { pr_warning("%s: voltage table does not exist for vdd_%s\n", @@ -957,7 +965,7 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, return -EINVAL; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; vdd->pmic_info = pmic_info; @@ -984,7 +992,7 @@ struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) return NULL; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; return vdd->debug_dir; } @@ -1009,7 +1017,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, return; } - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); + vdd = voltdm->vdd; switch (voltscale_method) { case VOLTSCALE_VPFORCEUPDATE: @@ -1025,38 +1033,6 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, } /** - * omap_voltage_domain_lookup() - API to get the voltage domain pointer - * @name: Name of the voltage domain - * - * This API looks up in the global vdd_info struct for the - * existence of voltage domain . If it exists, the API returns - * a pointer to the voltage domain structure corresponding to the - * VDD. Else retuns error pointer. - */ -struct voltagedomain *omap_voltage_domain_lookup(char *name) -{ - int i; - - if (!vdd_info) { - pr_err("%s: Voltage driver init not yet happened.Faulting!\n", - __func__); - return ERR_PTR(-EINVAL); - } - - if (!name) { - pr_err("%s: No name to get the votage domain!\n", __func__); - return ERR_PTR(-EINVAL); - } - - for (i = 0; i < nr_scalable_vdd; i++) { - if (!(strcmp(name, vdd_info[i]->voltdm.name))) - return &vdd_info[i]->voltdm; - } - - return ERR_PTR(-EINVAL); -} - -/** * omap_voltage_late_init() - Init the various voltage parameters * * This API is to be called in the later stages of the @@ -1065,9 +1041,9 @@ struct voltagedomain *omap_voltage_domain_lookup(char *name) */ int __init omap_voltage_late_init(void) { - int i; + struct voltagedomain *voltdm; - if (!vdd_info) { + if (list_empty(&voltdm_list)) { pr_err("%s: Voltage driver support not added\n", __func__); return -EINVAL; @@ -1077,22 +1053,81 @@ int __init omap_voltage_late_init(void) if (IS_ERR(voltage_dir)) pr_err("%s: Unable to create voltage debugfs main dir\n", __func__); - for (i = 0; i < nr_scalable_vdd; i++) { - if (omap_vdd_data_configure(vdd_info[i])) - continue; - omap_vc_init(vdd_info[i]); - vp_init(vdd_info[i]); - vdd_debugfs_init(vdd_info[i]); + list_for_each_entry(voltdm, &voltdm_list, node) { + if (voltdm->vdd) { + if (omap_vdd_data_configure(voltdm)) + continue; + omap_vc_init(voltdm); + vp_init(voltdm); + vdd_debugfs_init(voltdm); + } } return 0; } -/* XXX document */ -int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], - u8 omap_vdd_count) +static struct voltagedomain *_voltdm_lookup(const char *name) { - vdd_info = omap_vdd_array; - nr_scalable_vdd = omap_vdd_count; + struct voltagedomain *voltdm, *temp_voltdm; + + voltdm = NULL; + + list_for_each_entry(temp_voltdm, &voltdm_list, node) { + if (!strcmp(name, temp_voltdm->name)) { + voltdm = temp_voltdm; + break; + } + } + + return voltdm; +} + +static int _voltdm_register(struct voltagedomain *voltdm) +{ + if (!voltdm || !voltdm->name) + return -EINVAL; + + list_add(&voltdm->node, &voltdm_list); + + pr_debug("voltagedomain: registered %s\n", voltdm->name); + return 0; } + +/** + * voltdm_lookup - look up a voltagedomain by name, return a pointer + * @name: name of voltagedomain + * + * Find a registered voltagedomain by its name @name. Returns a pointer + * to the struct voltagedomain if found, or NULL otherwise. + */ +struct voltagedomain *voltdm_lookup(const char *name) +{ + struct voltagedomain *voltdm ; + + if (!name) + return NULL; + + voltdm = _voltdm_lookup(name); + + return voltdm; +} + +/** + * voltdm_init - set up the voltagedomain layer + * @voltdm_list: array of struct voltagedomain pointers to register + * + * Loop through the array of voltagedomains @voltdm_list, registering all + * that are available on the current CPU. If voltdm_list is supplied + * and not null, all of the referenced voltagedomains will be + * registered. No return value. + */ +void voltdm_init(struct voltagedomain **voltdms) +{ + struct voltagedomain **v; + + if (voltdms) { + for (v = voltdms; *v; v++) + _voltdm_register(*v); + } +} diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index db23d49..5440298 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -31,6 +31,8 @@ #define OMAP3_VOLTOFFSET 0xff #define OMAP3_VOLTSETUP2 0xff +struct omap_vdd_info; + /** * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield * data @@ -50,11 +52,14 @@ struct omap_vfsm_instance_data { /** * struct voltagedomain - omap voltage domain global structure. - * @name: Name of the voltage domain which can be used as a unique - * identifier. + * @name: Name of the voltage domain which can be used as a unique identifier. + * @node: list_head linking all voltage domains + * @vdd: to be removed */ struct voltagedomain { char *name; + struct list_head node; + struct omap_vdd_info *vdd; }; /** @@ -116,7 +121,6 @@ struct omap_volt_pmic_info { * @vc_data : structure containing various various vc registers, * shifts, masks etc. * @vfsm : voltage manager FSM data - * @voltdm : pointer to the voltage domain structure * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. * @prm_irqst_mod : PRM module id used for PRM IRQ status register access @@ -130,7 +134,6 @@ struct omap_vdd_info { struct omap_vp_runtime_data vp_rt_data; struct omap_vc_instance_data *vc_data; const struct omap_vfsm_instance_data *vfsm; - struct voltagedomain voltdm; struct dentry *debug_dir; u32 curr_volt; bool vp_enabled; @@ -139,7 +142,7 @@ struct omap_vdd_info { u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); - int (*volt_scale) (struct omap_vdd_info *vdd, + int (*volt_scale) (struct voltagedomain *voltdm, unsigned long target_volt); }; @@ -155,16 +158,11 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); -int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], - u8 omap_vdd_count); #ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_volt_pmic_info *pmic_info); void omap_change_voltscale_method(struct voltagedomain *voltdm, int voltscale_method); -/* API to get the voltagedomain pointer */ -struct voltagedomain *omap_voltage_domain_lookup(char *name); - int omap_voltage_late_init(void); #else static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, @@ -178,10 +176,11 @@ static inline int omap_voltage_late_init(void) { return -EINVAL; } -static inline struct voltagedomain *omap_voltage_domain_lookup(char *name) -{ - return ERR_PTR(-EINVAL); -} #endif +extern void omap3xxx_voltagedomains_init(void); +extern void omap44xx_voltagedomains_init(void); + +struct voltagedomain *voltdm_lookup(const char *name); +void voltdm_init(struct voltagedomain **voltdm_list); #endif diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index f831f9a..4bee412 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -43,9 +43,6 @@ static struct omap_vdd_info omap3_vdd1_info = { .vp_data = &omap3_vp1_data, .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, - .voltdm = { - .name = "mpu", - }, }; static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { @@ -60,23 +57,26 @@ static struct omap_vdd_info omap3_vdd2_info = { .vp_data = &omap3_vp2_data, .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, - .voltdm = { - .name = "core", - }, }; -/* OMAP3 VDD structures */ -static struct omap_vdd_info *omap3_vdd_info[] = { - &omap3_vdd1_info, - &omap3_vdd2_info, +static struct voltagedomain omap3_voltdm_mpu = { + .name = "mpu", + .vdd = &omap3_vdd1_info, }; -/* OMAP3 specific voltage init functions */ -static int __init omap3xxx_voltage_early_init(void) -{ - if (!cpu_is_omap34xx()) - return 0; +static struct voltagedomain omap3_voltdm_core = { + .name = "core", + .vdd = &omap3_vdd2_info, +}; +static struct voltagedomain *voltagedomains_omap3[] __initdata = { + &omap3_voltdm_mpu, + &omap3_voltdm_core, + NULL, +}; + +void __init omap3xxx_voltagedomains_init(void) +{ /* * XXX Will depend on the process, validation, and binning * for the currently-running IC @@ -89,7 +89,5 @@ static int __init omap3xxx_voltage_early_init(void) omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; } - return omap_voltage_early_init(omap3_vdd_info, - ARRAY_SIZE(omap3_vdd_info)); + voltdm_init(voltagedomains_omap3); }; -core_initcall(omap3xxx_voltage_early_init); diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 64dc265..245fdf9 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -42,9 +42,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { .vp_data = &omap4_vp_mpu_data, .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, - .voltdm = { - .name = "mpu", - }, }; static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { @@ -57,9 +54,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { .vp_data = &omap4_vp_iva_data, .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, - .voltdm = { - .name = "iva", - }, }; static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { @@ -72,24 +66,32 @@ static struct omap_vdd_info omap4_vdd_core_info = { .vp_data = &omap4_vp_core_data, .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, - .voltdm = { - .name = "core", - }, }; -/* OMAP4 VDD structures */ -static struct omap_vdd_info *omap4_vdd_info[] = { - &omap4_vdd_mpu_info, - &omap4_vdd_iva_info, - &omap4_vdd_core_info, +static struct voltagedomain omap4_voltdm_mpu = { + .name = "mpu", + .vdd = &omap4_vdd_mpu_info, }; -/* OMAP4 specific voltage init functions */ -static int __init omap44xx_voltage_early_init(void) -{ - if (!cpu_is_omap44xx()) - return 0; +static struct voltagedomain omap4_voltdm_iva = { + .name = "iva", + .vdd = &omap4_vdd_iva_info, +}; + +static struct voltagedomain omap4_voltdm_core = { + .name = "core", + .vdd = &omap4_vdd_core_info, +}; +static struct voltagedomain *voltagedomains_omap4[] __initdata = { + &omap4_voltdm_mpu, + &omap4_voltdm_iva, + &omap4_voltdm_core, + NULL, +}; + +void __init omap44xx_voltagedomains_init(void) +{ /* * XXX Will depend on the process, validation, and binning * for the currently-running IC @@ -98,7 +100,5 @@ static int __init omap44xx_voltage_early_init(void) omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; - return omap_voltage_early_init(omap4_vdd_info, - ARRAY_SIZE(omap4_vdd_info)); + voltdm_init(voltagedomains_omap4); }; -core_initcall(omap44xx_voltage_early_init); -- cgit v0.10.2 From 280a72750535aaf69833bda13ab8912aa5eb71e3 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 23 Mar 2011 11:18:08 -0700 Subject: OMAP3: voltage: rename "mpu" voltagedomain to "mpu_iva" This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so rename appropriately. Also fixup any users of the "mpu" name to use "mpu_iva" Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 25bf43b..59fdb9f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -2597,7 +2597,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", - .vdd_name = "mpu", + .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -2619,7 +2619,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", - .vdd_name = "mpu", + .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1, diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index fcd2f62..760487b 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -288,7 +288,7 @@ int __init omap3_twl_init(void) if (!twl_sr_enable_autoinit) omap3_twl_set_sr_bit(true); - voltdm = voltdm_lookup("mpu"); + voltdm = voltdm_lookup("mpu_iva"); omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); voltdm = voltdm_lookup("core"); diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index c10f8f6..1e1feda 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -226,7 +226,7 @@ static void __init omap3_init_voltages(void) if (!cpu_is_omap34xx()) return; - omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); + omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); omap2_set_init_voltage("core", "l3_ick", l3_dev); } diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 4bee412..2167ef4 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -60,7 +60,7 @@ static struct omap_vdd_info omap3_vdd2_info = { }; static struct voltagedomain omap3_voltdm_mpu = { - .name = "mpu", + .name = "mpu_iva", .vdd = &omap3_vdd1_info, }; -- cgit v0.10.2 From ace19ffa9a580c7b3d2a7cd4bb9fda6071394d25 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 23 Mar 2011 13:30:33 -0700 Subject: OMAP3: voltagedomain data: add wakeup domain Add wakeup voltage domain so that the wakeup powerdomain can have an associated powerdomain. Note that the scalable flat is not set for the this voltagedomain, so it will not be fully initialized like scalable voltage domains. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 2167ef4..42d0b11 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -69,9 +69,14 @@ static struct voltagedomain omap3_voltdm_core = { .vdd = &omap3_vdd2_info, }; +static struct voltagedomain omap3_voltdm_wkup = { + .name = "wakeup", +}; + static struct voltagedomain *voltagedomains_omap3[] __initdata = { &omap3_voltdm_mpu, &omap3_voltdm_core, + &omap3_voltdm_wkup, NULL, }; -- cgit v0.10.2 From 37efca7e9deacf3c11bda82df5b7594f098daa69 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 23 Mar 2011 17:00:21 -0700 Subject: OMAP3+: voltage: add scalable flag to voltagedomain Add a 'bool scalable' flag to the struct powerdomain and set it for the scalable domains on OMAP3 and OMAP4. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 4f0361a..48a2593 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -1054,6 +1054,9 @@ int __init omap_voltage_late_init(void) pr_err("%s: Unable to create voltage debugfs main dir\n", __func__); list_for_each_entry(voltdm, &voltdm_list, node) { + if (!voltdm->scalable) + continue; + if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) continue; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 5440298..25cfb5c 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -53,11 +53,13 @@ struct omap_vfsm_instance_data { /** * struct voltagedomain - omap voltage domain global structure. * @name: Name of the voltage domain which can be used as a unique identifier. + * @scalable: Whether or not this voltage domain is scalable * @node: list_head linking all voltage domains * @vdd: to be removed */ struct voltagedomain { char *name; + bool scalable; struct list_head node; struct omap_vdd_info *vdd; }; diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 42d0b11..d7e1052 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -61,11 +61,13 @@ static struct omap_vdd_info omap3_vdd2_info = { static struct voltagedomain omap3_voltdm_mpu = { .name = "mpu_iva", + .scalable = true, .vdd = &omap3_vdd1_info, }; static struct voltagedomain omap3_voltdm_core = { .name = "core", + .scalable = true, .vdd = &omap3_vdd2_info, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 245fdf9..95e1ce5 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -70,16 +70,19 @@ static struct omap_vdd_info omap4_vdd_core_info = { static struct voltagedomain omap4_voltdm_mpu = { .name = "mpu", + .scalable = true, .vdd = &omap4_vdd_mpu_info, }; static struct voltagedomain omap4_voltdm_iva = { .name = "iva", + .scalable = true, .vdd = &omap4_vdd_iva_info, }; static struct voltagedomain omap4_voltdm_core = { .name = "core", + .scalable = true, .vdd = &omap4_vdd_core_info, }; -- cgit v0.10.2 From 8f1bec246c44d936a02cc6b781bfd9ba670d7e45 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 23 Mar 2011 07:22:23 -0700 Subject: OMAP2+: powerdomain: add voltagedomain to struct powerdomain Each powerdomain is associated with a voltage domain. Add an entry to struct powerdomain where the enclosing voltagedomain can be referenced. Modeled after similar relationship between clockdomains and powerdomains. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 8febd84..898d4fc 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -24,6 +24,8 @@ #include +#include "voltage.h" + /* Powerdomain basic power states */ #define PWRDM_POWER_OFF 0x0 #define PWRDM_POWER_RET 0x1 @@ -78,6 +80,7 @@ struct powerdomain; /** * struct powerdomain - OMAP powerdomain * @name: Powerdomain name + * @voltdm: voltagedomain containing this powerdomain * @prcm_offs: the address offset from CM_BASE/PRM_BASE * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs * @pwrsts: Possible powerdomain power states @@ -97,6 +100,10 @@ struct powerdomain; */ struct powerdomain { const char *name; + union { + const char *name; + struct voltagedomain *ptr; + } voltdm; const s16 prcm_offs; const u8 pwrsts; const u8 pwrsts_logic_ret; -- cgit v0.10.2 From aae030fa329307895eb935b057a72b12c6bd678b Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 23 Mar 2011 16:09:41 -0700 Subject: OMAP2: add voltage domains and connect to powerdomains Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains with the newly created voltage domains. While here, update copyright on powerdomain data to 2011. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 5a6fe73..cce9bc3 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -91,7 +91,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ # OMAP voltage domains ifeq ($(CONFIG_PM),y) voltagedomain-common := voltage.o -obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) +obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ + voltagedomains2xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ voltagedomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7c36fde..7802e84 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -342,10 +342,12 @@ void __init omap2_init_common_infrastructure(void) u8 postsetup_state; if (cpu_is_omap242x()) { + omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); omap2420_hwmod_init(); } else if (cpu_is_omap243x()) { + omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); omap2430_hwmod_init(); diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c index cf600e2..6a17e4c 100644 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c @@ -1,7 +1,7 @@ /* * OMAP2 and OMAP3 powerdomain control * - * Copyright (C) 2009-2010 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Texas Instruments, Inc. * Copyright (C) 2007-2009 Nokia Corporation * * Derived from mach-omap2/powerdomain.c written by Paul Walmsley diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c index bb4394e..2385c1f 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c @@ -37,6 +37,7 @@ static struct powerdomain dsp_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, }, + .voltdm = { .name = "core" }, }; static struct powerdomain mpu_24xx_pwrdm = { @@ -51,6 +52,7 @@ static struct powerdomain mpu_24xx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, }, + .voltdm = { .name = "core" }, }; static struct powerdomain core_24xx_pwrdm = { @@ -68,6 +70,7 @@ static struct powerdomain core_24xx_pwrdm = { [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ }, + .voltdm = { .name = "core" }, }; @@ -89,6 +92,7 @@ static struct powerdomain mdm_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; /* diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 25cfb5c..cacd76e 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -180,6 +180,7 @@ static inline int omap_voltage_late_init(void) } #endif +extern void omap2xxx_voltagedomains_init(void); extern void omap3xxx_voltagedomains_init(void); extern void omap44xx_voltagedomains_init(void); diff --git a/arch/arm/mach-omap2/voltagedomains2xxx_data.c b/arch/arm/mach-omap2/voltagedomains2xxx_data.c new file mode 100644 index 0000000..7a41349 --- /dev/null +++ b/arch/arm/mach-omap2/voltagedomains2xxx_data.c @@ -0,0 +1,32 @@ +/* + * OMAP3 voltage domain data + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#include "voltage.h" + +static struct voltagedomain omap2_voltdm_core = { + .name = "core", +}; + +static struct voltagedomain omap2_voltdm_wkup = { + .name = "wakeup", +}; + +static struct voltagedomain *voltagedomains_omap2[] __initdata = { + &omap2_voltdm_core, + &omap2_voltdm_wkup, + NULL, +}; + +void __init omap2xxx_voltagedomains_init(void) +{ + voltdm_init(voltagedomains_omap2); +} -- cgit v0.10.2 From da03ce65b5431245b9cd20db3edaaa6b9f5c8dc1 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 18 Mar 2011 14:12:18 -0700 Subject: OMAP3: powerdomain data: add voltage domains Add voltage domain name to indicate which voltagedomain each powerdomain is in. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c index bf30483..d3a5399 100644 --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c @@ -54,10 +54,12 @@ struct powerdomain gfx_omap2_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; struct powerdomain wkup_omap2_pwrdm = { .name = "wkup_pwrdm", .prcm_offs = WKUP_MOD, .pwrsts = PWRSTS_ON, + .voltdm = { .name = "wakeup" }, }; diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index e4f3a7d..8ef26da 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -51,6 +51,7 @@ static struct powerdomain iva2_pwrdm = { [2] = PWRSTS_OFF_ON, [3] = PWRSTS_ON, }, + .voltdm = { .name = "mpu_iva" }, }; static struct powerdomain mpu_3xxx_pwrdm = { @@ -66,6 +67,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_OFF_ON, }, + .voltdm = { .name = "mpu_iva" }, }; /* @@ -92,6 +94,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain core_3xxx_es3_1_pwrdm = { @@ -113,6 +116,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = { [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain dss_pwrdm = { @@ -127,6 +131,7 @@ static struct powerdomain dss_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; /* @@ -147,6 +152,7 @@ static struct powerdomain sgx_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain cam_pwrdm = { @@ -161,6 +167,7 @@ static struct powerdomain cam_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain per_pwrdm = { @@ -175,11 +182,13 @@ static struct powerdomain per_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain emu_pwrdm = { .name = "emu_pwrdm", .prcm_offs = OMAP3430_EMU_MOD, + .voltdm = { .name = "core" }, }; static struct powerdomain neon_pwrdm = { @@ -187,6 +196,7 @@ static struct powerdomain neon_pwrdm = { .prcm_offs = OMAP3430_NEON_MOD, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_RET, + .voltdm = { .name = "mpu_iva" }, }; static struct powerdomain usbhost_pwrdm = { @@ -208,31 +218,37 @@ static struct powerdomain usbhost_pwrdm = { .pwrsts_mem_on = { [0] = PWRSTS_ON, /* MEMONSTATE */ }, + .voltdm = { .name = "core" }, }; static struct powerdomain dpll1_pwrdm = { .name = "dpll1_pwrdm", .prcm_offs = MPU_MOD, + .voltdm = { .name = "mpu_iva" }, }; static struct powerdomain dpll2_pwrdm = { .name = "dpll2_pwrdm", .prcm_offs = OMAP3430_IVA2_MOD, + .voltdm = { .name = "mpu_iva" }, }; static struct powerdomain dpll3_pwrdm = { .name = "dpll3_pwrdm", .prcm_offs = PLL_MOD, + .voltdm = { .name = "core" }, }; static struct powerdomain dpll4_pwrdm = { .name = "dpll4_pwrdm", .prcm_offs = PLL_MOD, + .voltdm = { .name = "core" }, }; static struct powerdomain dpll5_pwrdm = { .name = "dpll5_pwrdm", .prcm_offs = PLL_MOD, + .voltdm = { .name = "core" }, }; /* As powerdomains are added or removed above, this list must also be changed */ -- cgit v0.10.2 From 7e1b94059cea39218071fdb78c4075b83d52e222 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Mon, 21 Mar 2011 12:11:54 +0100 Subject: OMAP4: powerdomain data: add voltage domains Add voltage domain name to indicate which voltagedomain each powerdomain is in. The fixed voltage domain like ldo_wakeup for emu and wkup power domain is added too. Signed-off-by: Benoit Cousson Cc: Paul Walmsley [khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/ Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c index cbce0c9..704664c 100644 --- a/arch/arm/mach-omap2/powerdomains44xx_data.c +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c @@ -33,6 +33,7 @@ /* core_44xx_pwrdm: CORE power domain */ static struct powerdomain core_44xx_pwrdm = { .name = "core_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_CORE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, @@ -58,6 +59,7 @@ static struct powerdomain core_44xx_pwrdm = { /* gfx_44xx_pwrdm: 3D accelerator power domain */ static struct powerdomain gfx_44xx_pwrdm = { .name = "gfx_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_GFX_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_ON, @@ -74,6 +76,7 @@ static struct powerdomain gfx_44xx_pwrdm = { /* abe_44xx_pwrdm: Audio back end power domain */ static struct powerdomain abe_44xx_pwrdm = { .name = "abe_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP4430_PRM_ABE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -93,6 +96,7 @@ static struct powerdomain abe_44xx_pwrdm = { /* dss_44xx_pwrdm: Display subsystem power domain */ static struct powerdomain dss_44xx_pwrdm = { .name = "dss_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_DSS_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -110,6 +114,7 @@ static struct powerdomain dss_44xx_pwrdm = { /* tesla_44xx_pwrdm: Tesla processor power domain */ static struct powerdomain tesla_44xx_pwrdm = { .name = "tesla_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP4430_PRM_TESLA_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -131,6 +136,7 @@ static struct powerdomain tesla_44xx_pwrdm = { /* wkup_44xx_pwrdm: Wake-up power domain */ static struct powerdomain wkup_44xx_pwrdm = { .name = "wkup_pwrdm", + .voltdm = { .name = "wakeup" }, .prcm_offs = OMAP4430_PRM_WKUP_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_ON, @@ -146,6 +152,7 @@ static struct powerdomain wkup_44xx_pwrdm = { /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ static struct powerdomain cpu0_44xx_pwrdm = { .name = "cpu0_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -162,6 +169,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ static struct powerdomain cpu1_44xx_pwrdm = { .name = "cpu1_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -178,6 +186,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { /* emu_44xx_pwrdm: Emulation power domain */ static struct powerdomain emu_44xx_pwrdm = { .name = "emu_pwrdm", + .voltdm = { .name = "wakeup" }, .prcm_offs = OMAP4430_PRM_EMU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_ON, @@ -193,6 +202,7 @@ static struct powerdomain emu_44xx_pwrdm = { /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ static struct powerdomain mpu_44xx_pwrdm = { .name = "mpu_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP4430_PRM_MPU_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, @@ -213,6 +223,7 @@ static struct powerdomain mpu_44xx_pwrdm = { /* ivahd_44xx_pwrdm: IVA-HD power domain */ static struct powerdomain ivahd_44xx_pwrdm = { .name = "ivahd_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP4430_PRM_IVAHD_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_RET_ON, @@ -236,6 +247,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { /* cam_44xx_pwrdm: Camera subsystem power domain */ static struct powerdomain cam_44xx_pwrdm = { .name = "cam_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_CAM_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_ON, @@ -252,6 +264,7 @@ static struct powerdomain cam_44xx_pwrdm = { /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ static struct powerdomain l3init_44xx_pwrdm = { .name = "l3init_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_L3INIT_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, @@ -269,6 +282,7 @@ static struct powerdomain l3init_44xx_pwrdm = { /* l4per_44xx_pwrdm: Target peripherals power domain */ static struct powerdomain l4per_44xx_pwrdm = { .name = "l4per_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_L4PER_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_RET_ON, @@ -291,6 +305,7 @@ static struct powerdomain l4per_44xx_pwrdm = { */ static struct powerdomain always_on_core_44xx_pwrdm = { .name = "always_on_core_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_ON, @@ -299,6 +314,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ static struct powerdomain cefuse_44xx_pwrdm = { .name = "cefuse_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP4430_PRM_CEFUSE_INST, .prcm_partition = OMAP4430_PRM_PARTITION, .pwrsts = PWRSTS_OFF_ON, diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 95e1ce5..9a17b5e 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -86,10 +86,15 @@ static struct voltagedomain omap4_voltdm_core = { .vdd = &omap4_vdd_core_info, }; +static struct voltagedomain omap4_voltdm_wkup = { + .name = "wakeup", +}; + static struct voltagedomain *voltagedomains_omap4[] __initdata = { &omap4_voltdm_mpu, &omap4_voltdm_iva, &omap4_voltdm_core, + &omap4_voltdm_wkup, NULL, }; -- cgit v0.10.2 From 048a7034f1044e69868df70bff32d8d67974e1b8 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 15:52:47 -0700 Subject: OMAP2+: powerdomain: add voltage domain lookup during register When a powerdomain is registered, lookup the voltage domain by name and keep a pointer to the containing voltagedomain in the powerdomain structure. Modeled after similar method between powerdomain and clockdomain layers. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 896cb4c..984457d 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name) static int _pwrdm_register(struct powerdomain *pwrdm) { int i; + struct voltagedomain *voltdm; if (!pwrdm || !pwrdm->name) return -EINVAL; @@ -91,6 +92,14 @@ static int _pwrdm_register(struct powerdomain *pwrdm) if (_pwrdm_lookup(pwrdm->name)) return -EEXIST; + voltdm = voltdm_lookup(pwrdm->voltdm.name); + if (!voltdm) { + pr_err("powerdomain: %s: voltagedomain %s does not exist\n", + pwrdm->name, pwrdm->voltdm.name); + return -EINVAL; + } + pwrdm->voltdm.ptr = voltdm; + list_add(&pwrdm->node, &pwrdm_list); /* Initialize the powerdomain's state counter */ @@ -427,6 +436,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, } /** + * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in + * @pwrdm: struct powerdomain * + * + * Return a pointer to the struct voltageomain that the specified powerdomain + * @pwrdm exists in. + */ +struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm) +{ + return pwrdm->voltdm.ptr; +} + +/** * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain * @pwrdm: struct powerdomain * * diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 898d4fc..d8a7f91 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -183,6 +183,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, int (*fn)(struct powerdomain *pwrdm, struct clockdomain *clkdm)); +struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm); int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index cacd76e..966aa88 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -186,4 +186,5 @@ extern void omap44xx_voltagedomains_init(void); struct voltagedomain *voltdm_lookup(const char *name); void voltdm_init(struct voltagedomain **voltdm_list); +int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); #endif -- cgit v0.10.2 From e69c22b1459068f15e56e48b4b6953cc3f566c79 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 16 Mar 2011 16:13:15 -0700 Subject: OMAP2+: voltage: keep track of powerdomains in each voltagedomain When a powerdomain is registered and it has an associated voltage domain, add the powerdomain to the voltagedomain using voltdm_add_pwrdm(). Also add voltagedomain iterator helper functions to iterate over all registered voltagedomains and all powerdomains associated with a voltagedomain. Modeled after a similar relationship between clockdomains and powerdomains. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 984457d..5164d58 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -99,6 +99,8 @@ static int _pwrdm_register(struct powerdomain *pwrdm) return -EINVAL; } pwrdm->voltdm.ptr = voltdm; + INIT_LIST_HEAD(&pwrdm->voltdm_node); + voltdm_add_pwrdm(voltdm, pwrdm); list_add(&pwrdm->node, &pwrdm_list); diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index d8a7f91..42e6dd8 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -91,6 +91,7 @@ struct powerdomain; * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON * @pwrdm_clkdms: Clockdomains in this powerdomain * @node: list_head linking all powerdomains + * @voltdm_node: list_head linking all powerdomains in a voltagedomain * @state: * @state_counter: * @timer: @@ -114,6 +115,7 @@ struct powerdomain { const u8 prcm_partition; struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; struct list_head node; + struct list_head voltdm_node; int state; unsigned state_counter[PWRDM_MAX_PWRSTS]; unsigned ret_logic_off_counter; diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 48a2593..1e5c122 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -36,6 +36,7 @@ #include "control.h" #include "voltage.h" +#include "powerdomain.h" #include "vc.h" #include "vp.h" @@ -1085,11 +1086,90 @@ static struct voltagedomain *_voltdm_lookup(const char *name) return voltdm; } +/** + * voltdm_add_pwrdm - add a powerdomain to a voltagedomain + * @voltdm: struct voltagedomain * to add the powerdomain to + * @pwrdm: struct powerdomain * to associate with a voltagedomain + * + * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This + * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if + * presented with invalid pointers; -ENOMEM if memory could not be allocated; + * or 0 upon success. + */ +int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) +{ + if (!voltdm || !pwrdm) + return -EINVAL; + + pr_debug("voltagedomain: associating powerdomain %s with voltagedomain " + "%s\n", pwrdm->name, voltdm->name); + + list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); + + return 0; +} + +/** + * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm + * @voltdm: struct voltagedomain * to iterate over + * @fn: callback function * + * + * Call the supplied function @fn for each powerdomain in the + * voltagedomain @voltdm. Returns -EINVAL if presented with invalid + * pointers; or passes along the last return value of the callback + * function, which should be 0 for success or anything else to + * indicate failure. + */ +int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, + int (*fn)(struct voltagedomain *voltdm, + struct powerdomain *pwrdm)) +{ + struct powerdomain *pwrdm; + int ret = 0; + + if (!fn) + return -EINVAL; + + list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node) + ret = (*fn)(voltdm, pwrdm); + + return ret; +} + +/** + * voltdm_for_each - call function on each registered voltagedomain + * @fn: callback function * + * + * Call the supplied function @fn for each registered voltagedomain. + * The callback function @fn can return anything but 0 to bail out + * early from the iterator. Returns the last return value of the + * callback function, which should be 0 for success or anything else + * to indicate failure; or -EINVAL if the function pointer is null. + */ +int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), + void *user) +{ + struct voltagedomain *temp_voltdm; + int ret = 0; + + if (!fn) + return -EINVAL; + + list_for_each_entry(temp_voltdm, &voltdm_list, node) { + ret = (*fn)(temp_voltdm, user); + if (ret) + break; + } + + return ret; +} + static int _voltdm_register(struct voltagedomain *voltdm) { if (!voltdm || !voltdm->name) return -EINVAL; + INIT_LIST_HEAD(&voltdm->pwrdm_list); list_add(&voltdm->node, &voltdm_list); pr_debug("voltagedomain: registered %s\n", voltdm->name); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 966aa88..5063ab3 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -19,6 +19,8 @@ #include "vc.h" #include "vp.h" +struct powerdomain; + /* XXX document */ #define VOLTSCALE_VPFORCEUPDATE 1 #define VOLTSCALE_VCBYPASS 2 @@ -55,12 +57,14 @@ struct omap_vfsm_instance_data { * @name: Name of the voltage domain which can be used as a unique identifier. * @scalable: Whether or not this voltage domain is scalable * @node: list_head linking all voltage domains + * @pwrdm_list: list_head linking all powerdomains in this voltagedomain * @vdd: to be removed */ struct voltagedomain { char *name; bool scalable; struct list_head node; + struct list_head pwrdm_list; struct omap_vdd_info *vdd; }; @@ -187,4 +191,9 @@ extern void omap44xx_voltagedomains_init(void); struct voltagedomain *voltdm_lookup(const char *name); void voltdm_init(struct voltagedomain **voltdm_list); int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); +int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), + void *user); +int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, + int (*fn)(struct voltagedomain *voltdm, + struct powerdomain *pwrdm)); #endif -- cgit v0.10.2 From ccd5ca7787df8f1bd267b90f03a09c31c160ffe2 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 21 Mar 2011 14:08:55 -0700 Subject: OMAP2+: voltage: split voltage controller (VC) code into dedicated layer As part of the voltage layer cleanup, split out VC specific code into a dedicated VC layer. This patch primarily just moves VC code from voltage.c into vc.c, and adds prototypes to vc.h. No functional changes. For readability, each function was given a local 'vc' pointer: struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; and a global replace of s/vdd->vc_data/vc/ was done. Also vc_init was renamed to vc_init_channel to reflect that this is per-VC channel initializtion. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index cce9bc3..59db6d9 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ # OMAP voltage domains ifeq ($(CONFIG_PM),y) -voltagedomain-common := voltage.o +voltagedomain-common := voltage.o vc.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ voltagedomains2xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c new file mode 100644 index 0000000..098af2f3 --- /dev/null +++ b/arch/arm/mach-omap2/vc.c @@ -0,0 +1,285 @@ +/* + * OMAP Voltage Controller (VC) interface + * + * Copyright (C) 2011 Texas Instruments, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include +#include +#include + +#include + +#include "voltage.h" +#include "vc.h" +#include "prm-regbits-34xx.h" +#include "prm-regbits-44xx.h" +#include "prm44xx.h" + +/* Voltage scale and accessory APIs */ +int omap_vc_pre_scale(struct voltagedomain *voltdm, + unsigned long target_volt, + u8 *target_vsel, u8 *current_vsel) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + struct omap_volt_data *volt_data; + const struct omap_vc_common_data *vc_common; + const struct omap_vp_common_data *vp_common; + u32 vc_cmdval, vp_errgain_val; + + vc_common = vc->vc_common; + vp_common = vdd->vp_data->vp_common; + + /* Check if sufficient pmic info is available for this vdd */ + if (!vdd->pmic_info) { + pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", + __func__, voltdm->name); + return -EINVAL; + } + + if (!vdd->pmic_info->uv_to_vsel) { + pr_err("%s: PMIC function to convert voltage in uV to" + "vsel not registered. Hence unable to scale voltage" + "for vdd_%s\n", __func__, voltdm->name); + return -ENODATA; + } + + if (!vdd->read_reg || !vdd->write_reg) { + pr_err("%s: No read/write API for accessing vdd_%s regs\n", + __func__, voltdm->name); + return -EINVAL; + } + + /* Get volt_data corresponding to target_volt */ + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); + if (IS_ERR(volt_data)) + volt_data = NULL; + + *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); + *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); + + /* Setting the ON voltage to the new target voltage */ + vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); + vc_cmdval &= ~vc_common->cmd_on_mask; + vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); + vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); + + /* Setting vp errorgain based on the voltage */ + if (volt_data) { + vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, + vdd->vp_data->vpconfig); + vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; + vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; + vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << + vp_common->vpconfig_errorgain_shift; + vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, + vdd->vp_data->vpconfig); + } + + return 0; +} + +void omap_vc_post_scale(struct voltagedomain *voltdm, + unsigned long target_volt, + u8 target_vsel, u8 current_vsel) +{ + struct omap_vdd_info *vdd = voltdm->vdd; + u32 smps_steps = 0, smps_delay = 0; + + smps_steps = abs(target_vsel - current_vsel); + /* SMPS slew rate / step size. 2us added as buffer. */ + smps_delay = ((smps_steps * vdd->pmic_info->step_size) / + vdd->pmic_info->slew_rate) + 2; + udelay(smps_delay); + + vdd->curr_volt = target_volt; +} + +/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ +int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, + unsigned long target_volt) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + u32 loop_cnt = 0, retries_cnt = 0; + u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; + u8 target_vsel, current_vsel; + int ret; + + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); + if (ret) + return ret; + + vc_valid = vc->vc_common->valid; + vc_bypass_val_reg = vc->vc_common->bypass_val_reg; + vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | + (vdd->pmic_info->pmic_reg << + vc->vc_common->regaddr_shift) | + (vdd->pmic_info->i2c_slave_addr << + vc->vc_common->slaveaddr_shift); + + vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); + vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, + vc_bypass_val_reg); + + vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); + /* + * Loop till the bypass command is acknowledged from the SMPS. + * NOTE: This is legacy code. The loop count and retry count needs + * to be revisited. + */ + while (!(vc_bypass_value & vc_valid)) { + loop_cnt++; + + if (retries_cnt > 10) { + pr_warning("%s: Retry count exceeded\n", __func__); + return -ETIMEDOUT; + } + + if (loop_cnt > 50) { + retries_cnt++; + loop_cnt = 0; + udelay(10); + } + vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, + vc_bypass_val_reg); + } + + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); + return 0; +} + +static void __init omap3_vfsm_init(struct voltagedomain *voltdm) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + + /* + * Voltage Manager FSM parameters init + * XXX This data should be passed in from the board file + */ + vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); + vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, + OMAP3_PRM_VOLTOFFSET_OFFSET); + vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, + OMAP3_PRM_VOLTSETUP2_OFFSET); +} + +static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + static bool is_initialized; + u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; + u32 vc_val; + + if (is_initialized) + return; + + /* Set up the on, inactive, retention and off voltage */ + on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); + onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); + ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); + off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); + vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | + (onlp_vsel << vc->vc_common->cmd_onlp_shift) | + (ret_vsel << vc->vc_common->cmd_ret_shift) | + (off_vsel << vc->vc_common->cmd_off_shift)); + vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); + + /* + * Generic VC parameters init + * XXX This data should be abstracted out + */ + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, + OMAP3_PRM_VC_CH_CONF_OFFSET); + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, + OMAP3_PRM_VC_I2C_CFG_OFFSET); + + omap3_vfsm_init(voltdm); + + is_initialized = true; +} + + +/* OMAP4 specific voltage init functions */ +static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + static bool is_initialized; + u32 vc_val; + + if (is_initialized) + return; + + /* TODO: Configure setup times and CMD_VAL values*/ + + /* + * Generic VC parameters init + * XXX This data should be abstracted out + */ + vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | + OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | + OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); + vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); + + /* XXX These are magic numbers and do not belong! */ + vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); + vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); + + is_initialized = true; +} + +void __init omap_vc_init_channel(struct voltagedomain *voltdm) +{ + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vdd_info *vdd = voltdm->vdd; + u32 vc_val; + + if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { + pr_err("%s: PMIC info requried to configure vc for" + "vdd_%s not populated.Hence cannot initialize vc\n", + __func__, voltdm->name); + return; + } + + if (!vdd->read_reg || !vdd->write_reg) { + pr_err("%s: No read/write API for accessing vdd_%s regs\n", + __func__, voltdm->name); + return; + } + + /* Set up the SMPS_SA(i2c slave address in VC */ + vc_val = vdd->read_reg(vc->vc_common->prm_mod, + vc->vc_common->smps_sa_reg); + vc_val &= ~vc->smps_sa_mask; + vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; + vdd->write_reg(vc_val, vc->vc_common->prm_mod, + vc->vc_common->smps_sa_reg); + + /* Setup the VOLRA(pmic reg addr) in VC */ + vc_val = vdd->read_reg(vc->vc_common->prm_mod, + vc->vc_common->smps_volra_reg); + vc_val &= ~vc->smps_volra_mask; + vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; + vdd->write_reg(vc_val, vc->vc_common->prm_mod, + vc->vc_common->smps_volra_reg); + + /* Configure the setup times */ + vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); + vc_val &= ~vdd->vfsm->voltsetup_mask; + vc_val |= vdd->pmic_info->volt_setup_time << + vdd->vfsm->voltsetup_shift; + vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); + + if (cpu_is_omap34xx()) + omap3_vc_init_channel(voltdm); + else if (cpu_is_omap44xx()) + omap4_vc_init_channel(voltdm); +} + diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index f7338af..d0bf348 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -19,6 +19,8 @@ #include +struct voltagedomain; + /** * struct omap_vc_common_data - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register @@ -81,5 +83,15 @@ extern struct omap_vc_instance_data omap4_vc_mpu_data; extern struct omap_vc_instance_data omap4_vc_iva_data; extern struct omap_vc_instance_data omap4_vc_core_data; +void omap_vc_init_channel(struct voltagedomain *voltdm); +int omap_vc_pre_scale(struct voltagedomain *voltdm, + unsigned long target_volt, + u8 *target_vsel, u8 *current_vsel); +void omap_vc_post_scale(struct voltagedomain *voltdm, + unsigned long target_volt, + u8 target_vsel, u8 current_vsel); +int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, + unsigned long target_volt); + #endif diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 1e5c122..6ba6e49 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -293,136 +293,6 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) &nom_volt_debug_fops); } -/* Voltage scale and accessory APIs */ -static int _pre_volt_scale(struct voltagedomain *voltdm, - unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - struct omap_volt_data *volt_data; - const struct omap_vc_common_data *vc_common; - const struct omap_vp_common_data *vp_common; - u32 vc_cmdval, vp_errgain_val; - - vc_common = vdd->vc_data->vc_common; - vp_common = vdd->vp_data->vp_common; - - /* Check if suffiecient pmic info is available for this vdd */ - if (!vdd->pmic_info) { - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", - __func__, voltdm->name); - return -EINVAL; - } - - if (!vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC function to convert voltage in uV to" - "vsel not registered. Hence unable to scale voltage" - "for vdd_%s\n", __func__, voltdm->name); - return -ENODATA; - } - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return -EINVAL; - } - - /* Get volt_data corresponding to target_volt */ - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); - if (IS_ERR(volt_data)) - volt_data = NULL; - - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - /* Setting the ON voltage to the new target voltage */ - vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - vc_cmdval &= ~vc_common->cmd_on_mask; - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); - vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - - /* Setting vp errorgain based on the voltage */ - if (volt_data) { - vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - vp_common->vpconfig_errorgain_shift; - vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); - } - - return 0; -} - -static void _post_volt_scale(struct voltagedomain *voltdm, - unsigned long target_volt, u8 target_vsel, u8 current_vsel) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - u32 smps_steps = 0, smps_delay = 0; - - smps_steps = abs(target_vsel - current_vsel); - /* SMPS slew rate / step size. 2us added as buffer. */ - smps_delay = ((smps_steps * vdd->pmic_info->step_size) / - vdd->pmic_info->slew_rate) + 2; - udelay(smps_delay); - - vdd->curr_volt = target_volt; -} - -/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ -static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - u32 loop_cnt = 0, retries_cnt = 0; - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; - u8 target_vsel, current_vsel; - int ret; - - ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - - vc_valid = vdd->vc_data->vc_common->valid; - vc_bypass_val_reg = vdd->vc_data->vc_common->bypass_val_reg; - vc_bypass_value = (target_vsel << vdd->vc_data->vc_common->data_shift) | - (vdd->pmic_info->pmic_reg << - vdd->vc_data->vc_common->regaddr_shift) | - (vdd->pmic_info->i2c_slave_addr << - vdd->vc_data->vc_common->slaveaddr_shift); - - vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); - vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, - vc_bypass_val_reg); - - vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); - /* - * Loop till the bypass command is acknowledged from the SMPS. - * NOTE: This is legacy code. The loop count and retry count needs - * to be revisited. - */ - while (!(vc_bypass_value & vc_valid)) { - loop_cnt++; - - if (retries_cnt > 10) { - pr_warning("%s: Retry count exceeded\n", __func__); - return -ETIMEDOUT; - } - - if (loop_cnt > 50) { - retries_cnt++; - loop_cnt = 0; - udelay(10); - } - vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vc_bypass_val_reg); - } - - _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); - return 0; -} - /* VP force update method of voltage scaling */ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, unsigned long target_volt) @@ -432,7 +302,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, u8 target_vsel, current_vsel; int ret, timeout = 0; - ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); if (ret) return ret; @@ -485,7 +355,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, "TRANXDONE never got set after the voltage update\n", __func__, voltdm->name); - _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); /* * Disable TransactionDone interrupt , clear all status, clear @@ -517,132 +387,6 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, return 0; } -static void __init omap3_vfsm_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - - /* - * Voltage Manager FSM parameters init - * XXX This data should be passed in from the board file - */ - vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); - vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VOLTOFFSET_OFFSET); - vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VOLTSETUP2_OFFSET); -} - -static void __init omap3_vc_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; - u32 vc_val; - - if (is_initialized) - return; - - /* Set up the on, inactive, retention and off voltage */ - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); - vc_val = ((on_vsel << vdd->vc_data->vc_common->cmd_on_shift) | - (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | - (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | - (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); - - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VC_CH_CONF_OFFSET); - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - - omap3_vfsm_init(voltdm); - - is_initialized = true; -} - - -/* OMAP4 specific voltage init functions */ -static void __init omap4_vc_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - static bool is_initialized; - u32 vc_val; - - if (is_initialized) - return; - - /* TODO: Configure setup times and CMD_VAL values*/ - - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); - - /* XXX These are magic numbers and do not belong! */ - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); - - is_initialized = true; -} - -static void __init omap_vc_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vc_val; - - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { - pr_err("%s: PMIC info requried to configure vc for" - "vdd_%s not populated.Hence cannot initialize vc\n", - __func__, voltdm->name); - return; - } - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; - } - - /* Set up the SMPS_SA(i2c slave address in VC */ - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_sa_reg); - vc_val &= ~vdd->vc_data->smps_sa_mask; - vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_sa_reg); - - /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_volra_reg); - vc_val &= ~vdd->vc_data->smps_volra_mask; - vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, - vdd->vc_data->vc_common->smps_volra_reg); - - /* Configure the setup times */ - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); - vc_val &= ~vdd->vfsm->voltsetup_mask; - vc_val |= vdd->pmic_info->volt_setup_time << - vdd->vfsm->voltsetup_shift; - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); - - if (cpu_is_omap34xx()) - omap3_vc_init(voltdm); - else if (cpu_is_omap44xx()) - omap4_vc_init(voltdm); -} - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) { struct omap_vdd_info *vdd = voltdm->vdd; @@ -1025,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, vdd->volt_scale = vp_forceupdate_scale_voltage; return; case VOLTSCALE_VCBYPASS: - vdd->volt_scale = vc_bypass_scale_voltage; + vdd->volt_scale = omap_vc_bypass_scale_voltage; return; default: pr_warning("%s: Trying to change the method of voltage scaling" @@ -1061,7 +805,7 @@ int __init omap_voltage_late_init(void) if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) continue; - omap_vc_init(voltdm); + omap_vc_init_channel(voltdm); vp_init(voltdm); vdd_debugfs_init(voltdm); } -- cgit v0.10.2 From d84adcf46b9c235d1f4975b72a8c2763dbfb0081 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 22 Mar 2011 16:14:57 -0700 Subject: OMAP2+: voltage: move VC into struct voltagedomain, misc. renames Move the VC instance struct from omap_vdd_info into struct voltagedomain. While moving, perform some misc. renames for readability. No functional changes. Summary of renames: - rename omap_vc_instance to omap_vc_channel, since there is only one instance of the VC IP and this actually represents channels using TRM terminology. - rename 'vc_common' field of VC channel which led to: s/vc->vc_common/vc->common/ - remove redundant '_data' suffix - OMAP3: vc1 --> vc_mpu, vc2 --> vc_core - omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() Signed-off-by: Kevin Hilman merge diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 098af2f3..b62363d 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -24,14 +24,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; struct omap_volt_data *volt_data; - const struct omap_vc_common_data *vc_common; const struct omap_vp_common_data *vp_common; u32 vc_cmdval, vp_errgain_val; - vc_common = vc->vc_common; vp_common = vdd->vp_data->vp_common; /* Check if sufficient pmic info is available for this vdd */ @@ -63,10 +61,10 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); /* Setting the ON voltage to the new target voltage */ - vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); - vc_cmdval &= ~vc_common->cmd_on_mask; - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); - vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); + vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); + vc_cmdval &= ~vc->common->cmd_on_mask; + vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); + vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); /* Setting vp errorgain based on the voltage */ if (volt_data) { @@ -99,11 +97,11 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, vdd->curr_volt = target_volt; } -/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ -int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) +/* vc_bypass_scale - VC bypass method of voltage scaling */ +int omap_vc_bypass_scale(struct voltagedomain *voltdm, + unsigned long target_volt) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; u32 loop_cnt = 0, retries_cnt = 0; u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; @@ -114,19 +112,19 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, if (ret) return ret; - vc_valid = vc->vc_common->valid; - vc_bypass_val_reg = vc->vc_common->bypass_val_reg; - vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | + vc_valid = vc->common->valid; + vc_bypass_val_reg = vc->common->bypass_val_reg; + vc_bypass_value = (target_vsel << vc->common->data_shift) | (vdd->pmic_info->pmic_reg << - vc->vc_common->regaddr_shift) | + vc->common->regaddr_shift) | (vdd->pmic_info->i2c_slave_addr << - vc->vc_common->slaveaddr_shift); + vc->common->slaveaddr_shift); - vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); - vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, + vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); + vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, vc_bypass_val_reg); - vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); + vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); /* * Loop till the bypass command is acknowledged from the SMPS. * NOTE: This is legacy code. The loop count and retry count needs @@ -145,7 +143,7 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, loop_cnt = 0; udelay(10); } - vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, + vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); } @@ -155,23 +153,23 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, static void __init omap3_vfsm_init(struct voltagedomain *voltdm) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; /* * Voltage Manager FSM parameters init * XXX This data should be passed in from the board file */ - vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); - vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, + vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); + vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, OMAP3_PRM_VOLTOFFSET_OFFSET); - vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, + vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, OMAP3_PRM_VOLTSETUP2_OFFSET); } static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; @@ -185,19 +183,19 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); - vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | - (onlp_vsel << vc->vc_common->cmd_onlp_shift) | - (ret_vsel << vc->vc_common->cmd_ret_shift) | - (off_vsel << vc->vc_common->cmd_off_shift)); - vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); + vc_val = ((on_vsel << vc->common->cmd_on_shift) | + (onlp_vsel << vc->common->cmd_onlp_shift) | + (ret_vsel << vc->common->cmd_ret_shift) | + (off_vsel << vc->common->cmd_off_shift)); + vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); /* * Generic VC parameters init * XXX This data should be abstracted out */ - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, OMAP3_PRM_VC_CH_CONF_OFFSET); - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, OMAP3_PRM_VC_I2C_CFG_OFFSET); omap3_vfsm_init(voltdm); @@ -209,7 +207,7 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) /* OMAP4 specific voltage init functions */ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; u32 vc_val; @@ -226,18 +224,18 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); - vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); + vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); /* XXX These are magic numbers and do not belong! */ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); - vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); + vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); is_initialized = true; } void __init omap_vc_init_channel(struct voltagedomain *voltdm) { - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; + struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; u32 vc_val; @@ -255,27 +253,27 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) } /* Set up the SMPS_SA(i2c slave address in VC */ - vc_val = vdd->read_reg(vc->vc_common->prm_mod, - vc->vc_common->smps_sa_reg); + vc_val = vdd->read_reg(vc->common->prm_mod, + vc->common->smps_sa_reg); vc_val &= ~vc->smps_sa_mask; vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; - vdd->write_reg(vc_val, vc->vc_common->prm_mod, - vc->vc_common->smps_sa_reg); + vdd->write_reg(vc_val, vc->common->prm_mod, + vc->common->smps_sa_reg); /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = vdd->read_reg(vc->vc_common->prm_mod, - vc->vc_common->smps_volra_reg); + vc_val = vdd->read_reg(vc->common->prm_mod, + vc->common->smps_volra_reg); vc_val &= ~vc->smps_volra_mask; vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; - vdd->write_reg(vc_val, vc->vc_common->prm_mod, - vc->vc_common->smps_volra_reg); + vdd->write_reg(vc_val, vc->common->prm_mod, + vc->common->smps_volra_reg); /* Configure the setup times */ - vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); + vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); vc_val &= ~vdd->vfsm->voltsetup_mask; vc_val |= vdd->pmic_info->volt_setup_time << vdd->vfsm->voltsetup_shift; - vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); + vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); if (cpu_is_omap34xx()) omap3_vc_init_channel(voltdm); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index d0bf348..51d36a8 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -22,7 +22,7 @@ struct voltagedomain; /** - * struct omap_vc_common_data - per-VC register/bitfield data + * struct omap_vc_common - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register * @prm_mod: PRM module id used for PRM register access @@ -40,7 +40,7 @@ struct voltagedomain; * XXX One of cmd_on_mask and cmd_on_shift are not needed * XXX VALID should probably be a shift, not a mask */ -struct omap_vc_common_data { +struct omap_vc_common { u32 cmd_on_mask; u32 valid; s16 prm_mod; @@ -57,8 +57,8 @@ struct omap_vc_common_data { }; /** - * struct omap_vc_instance_data - VC per-instance data - * @vc_common: pointer to VC common data for this platform + * struct omap_vc_channel - VC per-instance data + * @common: pointer to VC common data for this platform * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register @@ -67,8 +67,8 @@ struct omap_vc_common_data { * XXX It is not necessary to have both a *_mask and a *_shift - * remove one */ -struct omap_vc_instance_data { - const struct omap_vc_common_data *vc_common; +struct omap_vc_channel { + const struct omap_vc_common *common; u32 smps_sa_mask; u32 smps_volra_mask; u8 cmdval_reg; @@ -76,12 +76,12 @@ struct omap_vc_instance_data { u8 smps_volra_shift; }; -extern struct omap_vc_instance_data omap3_vc1_data; -extern struct omap_vc_instance_data omap3_vc2_data; +extern struct omap_vc_channel omap3_vc_mpu; +extern struct omap_vc_channel omap3_vc_core; -extern struct omap_vc_instance_data omap4_vc_mpu_data; -extern struct omap_vc_instance_data omap4_vc_iva_data; -extern struct omap_vc_instance_data omap4_vc_core_data; +extern struct omap_vc_channel omap4_vc_mpu; +extern struct omap_vc_channel omap4_vc_iva; +extern struct omap_vc_channel omap4_vc_core; void omap_vc_init_channel(struct voltagedomain *voltdm); int omap_vc_pre_scale(struct voltagedomain *voltdm, @@ -90,8 +90,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, void omap_vc_post_scale(struct voltagedomain *voltdm, unsigned long target_volt, u8 target_vsel, u8 current_vsel); -int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt); +int omap_vc_bypass_scale(struct voltagedomain *voltdm, + unsigned long target_volt); #endif diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index 55caccb..1a17ed4 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -29,7 +29,7 @@ * VC data common to 34xx/36xx chips * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ -static struct omap_vc_common_data omap3_vc_common = { +static struct omap_vc_common omap3_vc_common = { .prm_mod = OMAP3430_GR_MOD, .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, @@ -45,8 +45,8 @@ static struct omap_vc_common_data omap3_vc_common = { .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, }; -struct omap_vc_instance_data omap3_vc1_data = { - .vc_common = &omap3_vc_common, +struct omap_vc_channel omap3_vc_mpu = { + .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, @@ -54,8 +54,8 @@ struct omap_vc_instance_data omap3_vc1_data = { .smps_volra_mask = OMAP3430_VOLRA0_MASK, }; -struct omap_vc_instance_data omap3_vc2_data = { - .vc_common = &omap3_vc_common, +struct omap_vc_channel omap3_vc_core = { + .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index b62678e..56f3f4a 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -30,7 +30,7 @@ * VC data common to 44xx chips * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ -static const struct omap_vc_common_data omap4_vc_common = { +static const struct omap_vc_common omap4_vc_common = { .prm_mod = OMAP4430_PRM_DEVICE_INST, .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, @@ -47,8 +47,8 @@ static const struct omap_vc_common_data omap4_vc_common = { }; /* VC instance data for each controllable voltage line */ -struct omap_vc_instance_data omap4_vc_mpu_data = { - .vc_common = &omap4_vc_common, +struct omap_vc_channel omap4_vc_mpu = { + .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, @@ -56,8 +56,8 @@ struct omap_vc_instance_data omap4_vc_mpu_data = { .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, }; -struct omap_vc_instance_data omap4_vc_iva_data = { - .vc_common = &omap4_vc_common, +struct omap_vc_channel omap4_vc_iva = { + .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, @@ -65,8 +65,8 @@ struct omap_vc_instance_data omap4_vc_iva_data = { .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, }; -struct omap_vc_instance_data omap4_vc_core_data = { - .vc_common = &omap4_vc_common, +struct omap_vc_channel omap4_vc_core = { + .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 6ba6e49..c6352e3 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -769,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, vdd->volt_scale = vp_forceupdate_scale_voltage; return; case VOLTSCALE_VCBYPASS: - vdd->volt_scale = omap_vc_bypass_scale_voltage; + vdd->volt_scale = omap_vc_bypass_scale; return; default: pr_warning("%s: Trying to change the method of voltage scaling" @@ -802,10 +802,12 @@ int __init omap_voltage_late_init(void) if (!voltdm->scalable) continue; + if (voltdm->vc) + omap_vc_init_channel(voltdm); + if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) continue; - omap_vc_init_channel(voltdm); vp_init(voltdm); vdd_debugfs_init(voltdm); } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 5063ab3..4885764 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -58,6 +58,7 @@ struct omap_vfsm_instance_data { * @scalable: Whether or not this voltage domain is scalable * @node: list_head linking all voltage domains * @pwrdm_list: list_head linking all powerdomains in this voltagedomain + * @vc: pointer to VC channel associated with this voltagedomain * @vdd: to be removed */ struct voltagedomain { @@ -65,6 +66,8 @@ struct voltagedomain { bool scalable; struct list_head node; struct list_head pwrdm_list; + struct omap_vc_channel *vc; + struct omap_vdd_info *vdd; }; @@ -124,8 +127,6 @@ struct omap_volt_pmic_info { * @vp_data : the register values, shifts, masks for various * vp registers * @vp_rt_data : VP data derived at runtime, not predefined - * @vc_data : structure containing various various vc registers, - * shifts, masks etc. * @vfsm : voltage manager FSM data * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. @@ -138,7 +139,6 @@ struct omap_vdd_info { struct omap_volt_pmic_info *pmic_info; struct omap_vp_instance_data *vp_data; struct omap_vp_runtime_data vp_rt_data; - struct omap_vc_instance_data *vc_data; const struct omap_vfsm_instance_data *vfsm; struct dentry *debug_dir; u32 curr_volt; diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index d7e1052..7cb27ec 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -41,7 +41,6 @@ static struct omap_vdd_info omap3_vdd1_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, - .vc_data = &omap3_vc1_data, .vfsm = &omap3_vdd1_vfsm_data, }; @@ -55,19 +54,20 @@ static struct omap_vdd_info omap3_vdd2_info = { .prm_irqst_mod = OCP_MOD, .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, - .vc_data = &omap3_vc2_data, .vfsm = &omap3_vdd2_vfsm_data, }; static struct voltagedomain omap3_voltdm_mpu = { .name = "mpu_iva", .scalable = true, + .vc = &omap3_vc_mpu, .vdd = &omap3_vdd1_info, }; static struct voltagedomain omap3_voltdm_core = { .name = "core", .scalable = true, + .vc = &omap3_vc_core, .vdd = &omap3_vdd2_info, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 9a17b5e..a05d90a 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -40,7 +40,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, - .vc_data = &omap4_vc_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, }; @@ -52,7 +51,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, - .vc_data = &omap4_vc_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, }; @@ -64,25 +62,27 @@ static struct omap_vdd_info omap4_vdd_core_info = { .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, - .vc_data = &omap4_vc_core_data, .vfsm = &omap4_vdd_core_vfsm_data, }; static struct voltagedomain omap4_voltdm_mpu = { .name = "mpu", .scalable = true, + .vc = &omap4_vc_mpu, .vdd = &omap4_vdd_mpu_info, }; static struct voltagedomain omap4_voltdm_iva = { .name = "iva", .scalable = true, + .vc = &omap4_vc_iva, .vdd = &omap4_vdd_iva_info, }; static struct voltagedomain omap4_voltdm_core = { .name = "core", .scalable = true, + .vc = &omap4_vc_core, .vdd = &omap4_vdd_core_info, }; -- cgit v0.10.2 From 4d47506a85a9f2e745dc63215594e9f799aff3dc Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 18 Jul 2011 15:48:22 -0700 Subject: OMAP2+: voltage: enable VC bypass scale method when VC is initialized VC is initialized first, set default scaling method to VC bypass. If/when VP is initialized, default scaling method will be changed to VP force-update. Enabling VC bypass as default as soon as VC is initialized allows for VC bypass scaling to work when no VP is configured/initialized for a given voltage domain. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index c6352e3..e1a22a3 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -802,8 +802,10 @@ int __init omap_voltage_late_init(void) if (!voltdm->scalable) continue; - if (voltdm->vc) + if (voltdm->vc) { + voltdm->vdd->volt_scale = omap_vc_bypass_scale; omap_vc_init_channel(voltdm); + } if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) -- cgit v0.10.2 From 01f48d308db1cfcfb0151d8d91153fd73e84ae40 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 21 Mar 2011 14:29:13 -0700 Subject: OMAP2+: voltage: split out voltage processor (VP) code into new layer This patch is primarily a move of VP specific code from voltage.c into its own code in vp.c and adds prototypes to vp.h No functional changes, except debugfs... VP debugfs moved to 'vp' subdir of /voltage/ and 'vp_' prefixes removed from all debugfs filenames. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 59db6d9..8247189 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ # OMAP voltage domains ifeq ($(CONFIG_PM),y) -voltagedomain-common := voltage.o vc.o +voltagedomain-common := voltage.o vc.o vp.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ voltagedomains2xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index e1a22a3..9b9f019 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -46,10 +46,6 @@ static LIST_HEAD(voltdm_list); #define VOLTAGE_DIR_SIZE 16 static struct dentry *voltage_dir; -/* Init function pointers */ -static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt); - static u32 omap3_voltage_read_reg(u16 mod, u8 offset) { return omap2_prm_read_mod_reg(mod, offset); @@ -105,7 +101,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) sys_clk_speed /= 1000; /* Generic voltage parameters */ - vdd->volt_scale = vp_forceupdate_scale_voltage; + vdd->volt_scale = omap_vp_forceupdate_scale; vdd->vp_enabled = false; vdd->vp_rt_data.vpconfig_erroroffset = @@ -127,30 +123,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) return 0; } -/* Voltage debugfs support */ -static int vp_volt_debug_get(void *data, u64 *val) -{ - struct voltagedomain *voltdm = (struct voltagedomain *)data; - struct omap_vdd_info *vdd = voltdm->vdd; - u8 vsel; - - if (!vdd) { - pr_warning("Wrong paramater passed\n"); - return -EINVAL; - } - - vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - if (!vdd->pmic_info->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" - "in uV not registerd\n"); - return -EINVAL; - } - - *val = vdd->pmic_info->vsel_to_uv(vsel); - return 0; -} - static int nom_volt_debug_get(void *data, u64 *val) { struct voltagedomain *voltdm = (struct voltagedomain *)data; @@ -165,85 +137,8 @@ static int nom_volt_debug_get(void *data, u64 *val) return 0; } -DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, "%llu\n"); -static void vp_latch_vsel(struct voltagedomain *voltdm) -{ - u32 vpconfig; - unsigned long uvdc; - char vsel; - struct omap_vdd_info *vdd = voltdm->vdd; - - uvdc = omap_voltage_get_nom_volt(voltdm); - if (!uvdc) { - pr_warning("%s: unable to find current voltage for vdd_%s\n", - __func__, voltdm->name); - return; - } - - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { - pr_warning("%s: PMIC function to convert voltage in uV to" - " vsel not registered\n", __func__); - return; - } - - vsel = vdd->pmic_info->uv_to_vsel(uvdc); - - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | - vdd->vp_data->vp_common->vpconfig_initvdd); - vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; - - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), - vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Clear initVDD copy trigger bit */ - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); -} - -/* Generic voltage init functions */ -static void __init vp_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val; - - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; - } - - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | - (vdd->vp_rt_data.vpconfig_errorgain << - vdd->vp_data->vp_common->vpconfig_errorgain_shift) | - vdd->vp_data->vp_common->vpconfig_timeouten; - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << - vdd->vp_data->vp_common->vstepmin_stepmin_shift)); - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << - vdd->vp_data->vp_common->vstepmax_stepmax_shift)); - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vdd->vp_data->vp_common->vlimitto_vddmax_shift) | - (vdd->vp_rt_data.vlimitto_vddmin << - vdd->vp_data->vp_common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << - vdd->vp_data->vp_common->vlimitto_timeout_shift)); - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); -} - static void __init vdd_debugfs_init(struct voltagedomain *voltdm) { char *name; @@ -268,125 +163,11 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) return; } - (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vpconfig_errorgain)); - (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO, - vdd->debug_dir, - &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); - (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vstepmin_stepmin)); - (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO, - vdd->debug_dir, - &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); - (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vstepmax_stepmax)); - (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vlimitto_vddmax)); - (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vlimitto_vddmin)); - (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, - &(vdd->vp_rt_data.vlimitto_timeout)); - (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, - (void *) voltdm, &vp_volt_debug_fops); (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, vdd->debug_dir, (void *) voltdm, &nom_volt_debug_fops); } -/* VP force update method of voltage scaling */ -static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, - unsigned long target_volt) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vpconfig; - u8 target_vsel, current_vsel; - int ret, timeout = 0; - - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); - if (ret) - return ret; - - /* - * Clear all pending TransactionDone interrupt/status. Typical latency - * is <3us - */ - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, vdd->prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); - } - if (timeout >= VP_TRANXDONE_TIMEOUT) { - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." - "Voltage change aborted", __func__, voltdm->name); - return -ETIMEDOUT; - } - - /* Configure for VP-Force Update */ - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | - vdd->vp_data->vp_common->vpconfig_forceupdate | - vdd->vp_data->vp_common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << - vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* Force update of voltage */ - vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* - * Wait for TransactionDone. Typical latency is <200us. - * Depends on SMPSWAITTIMEMIN/MAX and voltage change - */ - timeout = 0; - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, - vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status), - VP_TRANXDONE_TIMEOUT, timeout); - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." - "TRANXDONE never got set after the voltage update\n", - __func__, voltdm->name); - - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); - - /* - * Disable TransactionDone interrupt , clear all status, clear - * control registers - */ - timeout = 0; - while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, vdd->prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vdd->vp_data->prm_irqst_data->tranxdone_status)) - break; - udelay(1); - } - - if (timeout >= VP_TRANXDONE_TIMEOUT) - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" - "to clear the TRANXDONE status\n", - __func__, voltdm->name); - - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - /* Clear initVDD copy trigger bit */ - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - /* Clear force bit */ - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - return 0; -} - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) { struct omap_vdd_info *vdd = voltdm->vdd; @@ -439,129 +220,6 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) } /** - * omap_vp_get_curr_volt() - API to get the current vp voltage. - * @voltdm: pointer to the VDD. - * - * This API returns the current voltage for the specified voltage processor - */ -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd; - u8 curr_vsel; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return 0; - } - - vdd = voltdm->vdd; - if (!vdd->read_reg) { - pr_err("%s: No read API for reading vdd_%s regs\n", - __func__, voltdm->name); - return 0; - } - - curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); - - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" - "in uV not registerd\n", __func__); - return 0; - } - - return vdd->pmic_info->vsel_to_uv(curr_vsel); -} - -/** - * omap_vp_enable() - API to enable a particular VP - * @voltdm: pointer to the VDD whose VP is to be enabled. - * - * This API enables a particular voltage processor. Needed by the smartreflex - * class drivers. - */ -void omap_vp_enable(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd; - u32 vpconfig; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return; - } - - vdd = voltdm->vdd; - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; - } - - /* If VP is already enabled, do nothing. Return */ - if (vdd->vp_enabled) - return; - - vp_latch_vsel(voltdm); - - /* Enable VP */ - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vdd->vp_enabled = true; -} - -/** - * omap_vp_disable() - API to disable a particular VP - * @voltdm: pointer to the VDD whose VP is to be disabled. - * - * This API disables a particular voltage processor. Needed by the smartreflex - * class drivers. - */ -void omap_vp_disable(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd; - u32 vpconfig; - int timeout; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return; - } - - vdd = voltdm->vdd; - if (!vdd->read_reg || !vdd->write_reg) { - pr_err("%s: No read/write API for accessing vdd_%s regs\n", - __func__, voltdm->name); - return; - } - - /* If VP is already disabled, do nothing. Return */ - if (!vdd->vp_enabled) { - pr_warning("%s: Trying to disable VP for vdd_%s when" - "it is already disabled\n", __func__, voltdm->name); - return; - } - - /* Disable VP */ - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); - - /* - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us - */ - omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), - VP_IDLE_TIMEOUT, timeout); - - if (timeout >= VP_IDLE_TIMEOUT) - pr_warning("%s: vdd_%s idle timedout\n", - __func__, voltdm->name); - - vdd->vp_enabled = false; - - return; -} - -/** * omap_voltage_scale_vdd() - API to scale voltage of a particular * voltage domain. * @voltdm: pointer to the VDD which is to be scaled. @@ -766,7 +424,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, switch (voltscale_method) { case VOLTSCALE_VPFORCEUPDATE: - vdd->volt_scale = vp_forceupdate_scale_voltage; + vdd->volt_scale = omap_vp_forceupdate_scale; return; case VOLTSCALE_VCBYPASS: vdd->volt_scale = omap_vc_bypass_scale; @@ -810,8 +468,8 @@ int __init omap_voltage_late_init(void) if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) continue; - vp_init(voltdm); vdd_debugfs_init(voltdm); + omap_vp_init(voltdm); } } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 4885764..ea6bb98 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -152,9 +152,6 @@ struct omap_vdd_info { unsigned long target_volt); }; -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); -void omap_vp_enable(struct voltagedomain *voltdm); -void omap_vp_disable(struct voltagedomain *voltdm); int omap_voltage_scale_vdd(struct voltagedomain *voltdm, unsigned long target_volt); void omap_voltage_reset(struct voltagedomain *voltdm); diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c new file mode 100644 index 0000000..f3503de --- /dev/null +++ b/arch/arm/mach-omap2/vp.c @@ -0,0 +1,374 @@ +#include +#include +#include + +#include + +#include "voltage.h" +#include "vp.h" +#include "prm-regbits-34xx.h" +#include "prm-regbits-44xx.h" +#include "prm44xx.h" + +static void __init vp_debugfs_init(struct voltagedomain *voltdm); + +static void vp_latch_vsel(struct voltagedomain *voltdm) +{ + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + u32 vpconfig; + unsigned long uvdc; + char vsel; + struct omap_vdd_info *vdd = voltdm->vdd; + + uvdc = omap_voltage_get_nom_volt(voltdm); + if (!uvdc) { + pr_warning("%s: unable to find current voltage for vdd_%s\n", + __func__, voltdm->name); + return; + } + + if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { + pr_warning("%s: PMIC function to convert voltage in uV to" + " vsel not registered\n", __func__); + return; + } + + vsel = vdd->pmic_info->uv_to_vsel(uvdc); + + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | + vp->vp_common->vpconfig_initvdd); + vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; + + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + /* Trigger initVDD value copy to voltage processor */ + vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), + vp->vp_common->prm_mod, vp->vpconfig); + + /* Clear initVDD copy trigger bit */ + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); +} + +/* Generic voltage init functions */ +void __init omap_vp_init(struct voltagedomain *voltdm) +{ + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vdd_info *vdd = voltdm->vdd; + u32 vp_val; + + if (!vdd->read_reg || !vdd->write_reg) { + pr_err("%s: No read/write API for accessing vdd_%s regs\n", + __func__, voltdm->name); + return; + } + + vp_val = vdd->vp_rt_data.vpconfig_erroroffset | + (vdd->vp_rt_data.vpconfig_errorgain << + vp->vp_common->vpconfig_errorgain_shift) | + vp->vp_common->vpconfig_timeouten; + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); + + vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << + vp->vp_common->vstepmin_smpswaittimemin_shift) | + (vdd->vp_rt_data.vstepmin_stepmin << + vp->vp_common->vstepmin_stepmin_shift)); + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); + + vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << + vp->vp_common->vstepmax_smpswaittimemax_shift) | + (vdd->vp_rt_data.vstepmax_stepmax << + vp->vp_common->vstepmax_stepmax_shift)); + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); + + vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << + vp->vp_common->vlimitto_vddmax_shift) | + (vdd->vp_rt_data.vlimitto_vddmin << + vp->vp_common->vlimitto_vddmin_shift) | + (vdd->vp_rt_data.vlimitto_timeout << + vp->vp_common->vlimitto_timeout_shift)); + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); + + vp_debugfs_init(voltdm); +} + +/* VP force update method of voltage scaling */ +int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, + unsigned long target_volt) +{ + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vdd_info *vdd = voltdm->vdd; + u32 vpconfig; + u8 target_vsel, current_vsel; + int ret, timeout = 0; + + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); + if (ret) + return ret; + + /* + * Clear all pending TransactionDone interrupt/status. Typical latency + * is <3us + */ + while (timeout++ < VP_TRANXDONE_TIMEOUT) { + vdd->write_reg(vp->prm_irqst_data->tranxdone_status, + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & + vp->prm_irqst_data->tranxdone_status)) + break; + udelay(1); + } + if (timeout >= VP_TRANXDONE_TIMEOUT) { + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." + "Voltage change aborted", __func__, voltdm->name); + return -ETIMEDOUT; + } + + /* Configure for VP-Force Update */ + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig &= ~(vp->vp_common->vpconfig_initvdd | + vp->vp_common->vpconfig_forceupdate | + vp->vp_common->vpconfig_initvoltage_mask); + vpconfig |= ((target_vsel << + vp->vp_common->vpconfig_initvoltage_shift)); + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + /* Trigger initVDD value copy to voltage processor */ + vpconfig |= vp->vp_common->vpconfig_initvdd; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + /* Force update of voltage */ + vpconfig |= vp->vp_common->vpconfig_forceupdate; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + /* + * Wait for TransactionDone. Typical latency is <200us. + * Depends on SMPSWAITTIMEMIN/MAX and voltage change + */ + timeout = 0; + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, + vdd->prm_irqst_reg) & + vp->prm_irqst_data->tranxdone_status), + VP_TRANXDONE_TIMEOUT, timeout); + if (timeout >= VP_TRANXDONE_TIMEOUT) + pr_err("%s: vdd_%s TRANXDONE timeout exceeded." + "TRANXDONE never got set after the voltage update\n", + __func__, voltdm->name); + + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); + + /* + * Disable TransactionDone interrupt , clear all status, clear + * control registers + */ + timeout = 0; + while (timeout++ < VP_TRANXDONE_TIMEOUT) { + vdd->write_reg(vp->prm_irqst_data->tranxdone_status, + vdd->prm_irqst_mod, vdd->prm_irqst_reg); + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & + vp->prm_irqst_data->tranxdone_status)) + break; + udelay(1); + } + + if (timeout >= VP_TRANXDONE_TIMEOUT) + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" + "to clear the TRANXDONE status\n", + __func__, voltdm->name); + + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + /* Clear initVDD copy trigger bit */ + vpconfig &= ~vp->vp_common->vpconfig_initvdd; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + /* Clear force bit */ + vpconfig &= ~vp->vp_common->vpconfig_forceupdate; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + return 0; +} + +/** + * omap_vp_get_curr_volt() - API to get the current vp voltage. + * @voltdm: pointer to the VDD. + * + * This API returns the current voltage for the specified voltage processor + */ +unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) +{ + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vdd_info *vdd; + u8 curr_vsel; + + if (!voltdm || IS_ERR(voltdm)) { + pr_warning("%s: VDD specified does not exist!\n", __func__); + return 0; + } + + vdd = voltdm->vdd; + if (!vdd->read_reg) { + pr_err("%s: No read API for reading vdd_%s regs\n", + __func__, voltdm->name); + return 0; + } + + curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); + + if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { + pr_warning("%s: PMIC function to convert vsel to voltage" + "in uV not registerd\n", __func__); + return 0; + } + + return vdd->pmic_info->vsel_to_uv(curr_vsel); +} + +/** + * omap_vp_enable() - API to enable a particular VP + * @voltdm: pointer to the VDD whose VP is to be enabled. + * + * This API enables a particular voltage processor. Needed by the smartreflex + * class drivers. + */ +void omap_vp_enable(struct voltagedomain *voltdm) +{ + struct omap_vp_instance_data *vp; + struct omap_vdd_info *vdd; + u32 vpconfig; + + if (!voltdm || IS_ERR(voltdm)) { + pr_warning("%s: VDD specified does not exist!\n", __func__); + return; + } + + vdd = voltdm->vdd; + vp = voltdm->vdd->vp_data; + if (!vdd->read_reg || !vdd->write_reg) { + pr_err("%s: No read/write API for accessing vdd_%s regs\n", + __func__, voltdm->name); + return; + } + + /* If VP is already enabled, do nothing. Return */ + if (vdd->vp_enabled) + return; + + vp_latch_vsel(voltdm); + + /* Enable VP */ + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig |= vp->vp_common->vpconfig_vpenable; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + vdd->vp_enabled = true; +} + +/** + * omap_vp_disable() - API to disable a particular VP + * @voltdm: pointer to the VDD whose VP is to be disabled. + * + * This API disables a particular voltage processor. Needed by the smartreflex + * class drivers. + */ +void omap_vp_disable(struct voltagedomain *voltdm) +{ + struct omap_vp_instance_data *vp; + struct omap_vdd_info *vdd; + u32 vpconfig; + int timeout; + + if (!voltdm || IS_ERR(voltdm)) { + pr_warning("%s: VDD specified does not exist!\n", __func__); + return; + } + + vdd = voltdm->vdd; + vp = voltdm->vdd->vp_data; + if (!vdd->read_reg || !vdd->write_reg) { + pr_err("%s: No read/write API for accessing vdd_%s regs\n", + __func__, voltdm->name); + return; + } + + /* If VP is already disabled, do nothing. Return */ + if (!vdd->vp_enabled) { + pr_warning("%s: Trying to disable VP for vdd_%s when" + "it is already disabled\n", __func__, voltdm->name); + return; + } + + /* Disable VP */ + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig &= ~vp->vp_common->vpconfig_vpenable; + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + + /* + * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us + */ + omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), + VP_IDLE_TIMEOUT, timeout); + + if (timeout >= VP_IDLE_TIMEOUT) + pr_warning("%s: vdd_%s idle timedout\n", + __func__, voltdm->name); + + vdd->vp_enabled = false; + + return; +} + +/* Voltage debugfs support */ +static int vp_volt_debug_get(void *data, u64 *val) +{ + struct voltagedomain *voltdm = (struct voltagedomain *)data; + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vdd_info *vdd = voltdm->vdd; + u8 vsel; + + if (!vdd) { + pr_warning("Wrong paramater passed\n"); + return -EINVAL; + } + + vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); + + if (!vdd->pmic_info->vsel_to_uv) { + pr_warning("PMIC function to convert vsel to voltage" + "in uV not registerd\n"); + return -EINVAL; + } + + *val = vdd->pmic_info->vsel_to_uv(vsel); + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); + +static void __init vp_debugfs_init(struct voltagedomain *voltdm) +{ + struct omap_vdd_info *vdd = voltdm->vdd; + struct dentry *debug_dir; + + debug_dir = debugfs_create_dir("vp", vdd->debug_dir); + if (IS_ERR(debug_dir)) + pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); + + (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vpconfig_errorgain)); + (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, + debug_dir, + &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); + (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vstepmin_stepmin)); + (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, + debug_dir, + &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); + (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vstepmax_stepmax)); + (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vlimitto_vddmax)); + (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vlimitto_vddmin)); + (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, + &(vdd->vp_rt_data.vlimitto_timeout)); + (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, + (void *) voltdm, &vp_volt_debug_fops); +} diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 5406b08..025cf16 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -19,6 +19,8 @@ #include +struct voltagedomain; + /* XXX document */ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 @@ -139,4 +141,11 @@ extern struct omap_vp_instance_data omap4_vp_mpu_data; extern struct omap_vp_instance_data omap4_vp_iva_data; extern struct omap_vp_instance_data omap4_vp_core_data; +void omap_vp_init(struct voltagedomain *voltdm); +void omap_vp_enable(struct voltagedomain *voltdm); +void omap_vp_disable(struct voltagedomain *voltdm); +unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); +int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, + unsigned long target_volt); + #endif -- cgit v0.10.2 From e74e44054f8297d60fbd2ed1d412d84055afee8c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 22 Mar 2011 14:12:37 -0700 Subject: OMAP2+: VC: support PMICs with separate voltage and command registers The VC layer can support PMICs with separate voltage and command registers by putting the different registers in the PRM_VC_SMPS_VOL_RA and PRCM_VC_SMPS_CMD_RA registers respectively. The PMIC data must supply at least a voltage register address (volt_reg_addr). The command register address (cmd_reg_addr) is optional. If the PMIC data does not supply a separate command register address, the VC will use the voltage register address for both. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 760487b..3249fe3 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -158,7 +158,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, - .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, + .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; @@ -178,7 +178,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, - .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, + .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; @@ -198,7 +198,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, + .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; @@ -218,7 +218,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, + .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; @@ -238,7 +238,7 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, - .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, + .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index b62363d..1bdbe7c 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -115,7 +115,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, vc_valid = vc->common->valid; vc_bypass_val_reg = vc->common->bypass_val_reg; vc_bypass_value = (target_vsel << vc->common->data_shift) | - (vdd->pmic_info->pmic_reg << + (vdd->pmic_info->volt_reg_addr << vc->common->regaddr_shift) | (vdd->pmic_info->i2c_slave_addr << vc->common->slaveaddr_shift); @@ -264,7 +264,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc_val = vdd->read_reg(vc->common->prm_mod, vc->common->smps_volra_reg); vc_val &= ~vc->smps_volra_mask; - vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; + vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; vdd->write_reg(vc_val, vc->common->prm_mod, vc->common->smps_volra_reg); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index ea6bb98..5ca30fc 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -96,6 +96,8 @@ struct omap_volt_data { * @step_size: PMIC voltage step size (in uv) * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. + * @volt_reg_addr: voltage configuration register address + * @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address */ struct omap_volt_pmic_info { int slew_rate; @@ -112,7 +114,8 @@ struct omap_volt_pmic_info { u8 vp_vddmax; u8 vp_timeout_us; u8 i2c_slave_addr; - u8 pmic_reg; + u8 volt_reg_addr; + u8 cmd_reg_addr; unsigned long (*vsel_to_uv) (const u8 vsel); u8 (*uv_to_vsel) (unsigned long uV); }; -- cgit v0.10.2 From 58aaa599a97308c0f4a68ef07039157807fa8324 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 10:52:04 -0700 Subject: OMAP2+: add PRM VP functions for checking/clearing VP TX done status Add SoC specific PRM VP helper functions for checking and clearing the VP transaction done status. Longer term, these events should be handled by the forthcoming PRCM interrupt handler. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 051213f..58c5c87 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -20,6 +20,8 @@ #include #include +#include "vp.h" + #include "prm2xxx_3xxx.h" #include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" @@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +/* PRM VP */ + +/* + * struct omap3_vp - OMAP3 VP register access description. + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg + */ +struct omap3_vp { + u32 tranxdone_status; +}; + +struct omap3_vp omap3_vp[] = { + [OMAP3_VP_VDD_MPU_ID] = { + .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, + }, + [OMAP3_VP_VDD_CORE_ID] = { + .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, + }, +}; + +#define MAX_VP_ID ARRAY_SIZE(omap3_vp); + +u32 omap3_prm_vp_check_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + u32 irqstatus; + + irqstatus = omap2_prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + return irqstatus & vp->tranxdone_status; +} + +void omap3_prm_vp_clear_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + + omap2_prm_write_mod_reg(vp->tranxdone_status, + OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); +} diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index a1fc62a..5112526 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); +/* OMAP3-specific VP functions */ +u32 omap3_prm_vp_check_txdone(u8 vp_id); +void omap3_prm_vp_clear_txdone(u8 vp_id); + #endif /* CONFIG_ARCH_OMAP4 */ #endif diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 0016555..390e32c 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -21,6 +21,7 @@ #include #include +#include "vp.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" @@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) return v; } + +/* PRM VP */ + +/* + * struct omap4_vp - OMAP4 VP register access description. + * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg + */ +struct omap4_vp { + u32 irqstatus_mpu; + u32 tranxdone_status; +}; + +static struct omap4_vp omap4_vp[] = { + [OMAP4_VP_VDD_MPU_ID] = { + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, + .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, + }, + [OMAP4_VP_VDD_IVA_ID] = { + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, + .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, + }, + [OMAP4_VP_VDD_CORE_ID] = { + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, + .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, + }, +}; + +u32 omap4_prm_vp_check_txdone(u8 vp_id) +{ + struct omap4_vp *vp = &omap4_vp[vp_id]; + u32 irqstatus; + + irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_OCP_SOCKET_INST, + vp->irqstatus_mpu); + return irqstatus & vp->tranxdone_status; +} + +void omap4_prm_vp_clear_txdone(u8 vp_id) +{ + struct omap4_vp *vp = &omap4_vp[vp_id]; + + omap4_prminst_write_inst_reg(vp->tranxdone_status, + OMAP4430_PRM_PARTITION, + OMAP4430_PRM_OCP_SOCKET_INST, + vp->irqstatus_mpu); +}; diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 7dfa379..b28c87d 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); +/* OMAP4-specific VP functions */ +u32 omap4_prm_vp_check_txdone(u8 vp_id); +void omap4_prm_vp_clear_txdone(u8 vp_id); + # endif #endif diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 025cf16..1ccf741 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -21,10 +21,28 @@ struct voltagedomain; +/* + * Voltage Processor (VP) identifiers + */ +#define OMAP3_VP_VDD_MPU_ID 0 +#define OMAP3_VP_VDD_CORE_ID 1 +#define OMAP4_VP_VDD_CORE_ID 0 +#define OMAP4_VP_VDD_IVA_ID 1 +#define OMAP4_VP_VDD_MPU_ID 2 + /* XXX document */ #define VP_IDLE_TIMEOUT 200 #define VP_TRANXDONE_TIMEOUT 300 +/** + * struct omap_vp_ops - per-VP operations + * @check_txdone: check for VP transaction done + * @clear_txdone: clear VP transaction done status + */ +struct omap_vp_ops { + u32 (*check_txdone)(u8 vp_id); + void (*clear_txdone)(u8 vp_id); +}; /** * struct omap_vp_common_data - register data common to all VDDs @@ -68,41 +86,31 @@ struct omap_vp_common_data { u8 vlimitto_vddmin_shift; u8 vlimitto_vddmax_shift; u8 vlimitto_timeout_shift; -}; -/** - * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - * - * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a - * hardware bug - * XXX This structure is probably not needed - */ -struct omap_vp_prm_irqst_data { - u32 tranxdone_status; + const struct omap_vp_ops *ops; }; /** * struct omap_vp_instance_data - VP register offsets (per-VDD) * @vp_common: pointer to struct omap_vp_common_data * for this SoC - * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start + * @id: Unique identifier for VP instance. * * XXX vp_common is probably not needed since it is per-SoC */ struct omap_vp_instance_data { const struct omap_vp_common_data *vp_common; - const struct omap_vp_prm_irqst_data *prm_irqst_data; u8 vpconfig; u8 vstepmin; u8 vstepmax; u8 vlimitto; u8 vstatus; u8 voltage; + u8 id; }; /** diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index a8ea045..0372c1a 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -25,6 +25,12 @@ #include "voltage.h" #include "vp.h" +#include "prm2xxx_3xxx.h" + +static const struct omap_vp_ops omap3_vp_ops = { + .check_txdone = omap3_prm_vp_check_txdone, + .clear_txdone = omap3_prm_vp_clear_txdone, +}; /* * VP data common to 34xx/36xx chips @@ -48,13 +54,11 @@ static const struct omap_vp_common_data omap3_vp_common = { .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, -}; - -static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, + .ops = &omap3_vp_ops, }; struct omap_vp_instance_data omap3_vp1_data = { + .id = OMAP3_VP_VDD_MPU_ID, .vp_common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, @@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = { .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, - .prm_irqst_data = &omap3_vp1_prm_irqst_data, -}; - -static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, }; struct omap_vp_instance_data omap3_vp2_data = { + .id = OMAP3_VP_VDD_CORE_ID, .vp_common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, @@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = { .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, - .prm_irqst_data = &omap3_vp2_prm_irqst_data, }; diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 0957c24..738ba04 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -27,6 +27,11 @@ #include "vp.h" +static const struct omap_vp_ops omap4_vp_ops = { + .check_txdone = omap4_prm_vp_check_txdone, + .clear_txdone = omap4_prm_vp_clear_txdone, +}; + /* * VP data common to 44xx chips * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. @@ -49,13 +54,11 @@ static const struct omap_vp_common_data omap4_vp_common = { .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, -}; - -static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, + .ops = &omap4_vp_ops, }; struct omap_vp_instance_data omap4_vp_mpu_data = { + .id = OMAP4_VP_VDD_MPU_ID, .vp_common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, @@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, - .prm_irqst_data = &omap4_vp_mpu_prm_irqst_data, -}; - -static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, }; struct omap_vp_instance_data omap4_vp_iva_data = { + .id = OMAP4_VP_VDD_IVA_ID, .vp_common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, @@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = { .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, - .prm_irqst_data = &omap4_vp_iva_prm_irqst_data, -}; - -static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, }; struct omap_vp_instance_data omap4_vp_core_data = { + .id = OMAP4_VP_VDD_CORE_ID, .vp_common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, @@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = { .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, - .prm_irqst_data = &omap4_vp_core_prm_irqst_data, }; - -- cgit v0.10.2 From 842ec22852cf843558828e6f7a6da2bf72f341a5 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 11:57:18 -0700 Subject: OMAP3+ VP: replace transaction done check/clear with VP ops Replace the VP tranxdone check/clear with helper functions from the PRM layer. In the process, remove prm_irqst_* voltage structure fields for IRQ status checking which are no longer needed. Since these reads/writes of the IRQ status bits were the only PRM accesses that were not to VC/VP registers, this allows the rest of the register accesses in the VC/VP code to use VC/VP specific register access functions (done in the following patch.) Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 5ca30fc..04e06266 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -133,7 +133,6 @@ struct omap_volt_pmic_info { * @vfsm : voltage manager FSM data * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. - * @prm_irqst_mod : PRM module id used for PRM IRQ status register access * @vp_enabled : flag to keep track of whether vp is enabled or not * @volt_scale : API to scale the voltage of the vdd. */ @@ -147,8 +146,6 @@ struct omap_vdd_info { u32 curr_volt; bool vp_enabled; - s16 prm_irqst_mod; - u8 prm_irqst_reg; u32 (*read_reg) (u16 mod, u8 offset); void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct voltagedomain *voltdm, diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 7cb27ec..ad8f05b 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { }; static struct omap_vdd_info omap3_vdd1_info = { - .prm_irqst_mod = OCP_MOD, - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp1_data, .vfsm = &omap3_vdd1_vfsm_data, }; @@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { }; static struct omap_vdd_info omap3_vdd2_info = { - .prm_irqst_mod = OCP_MOD, - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap3_vp2_data, .vfsm = &omap3_vdd2_vfsm_data, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index a05d90a..43e1d38 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_mpu_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, .vp_data = &omap4_vp_mpu_data, .vfsm = &omap4_vdd_mpu_vfsm_data, }; @@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_iva_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_iva_data, .vfsm = &omap4_vdd_iva_vfsm_data, }; @@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { }; static struct omap_vdd_info omap4_vdd_core_info = { - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .vp_data = &omap4_vp_core_data, .vfsm = &omap4_vdd_core_vfsm_data, }; diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index f3503de..113c839 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, * is <3us */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vp->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, vdd->prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vp->prm_irqst_data->tranxdone_status)) + vp->vp_common->ops->clear_txdone(vp->id); + if (!vp->vp_common->ops->check_txdone(vp->id)) break; udelay(1); } @@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ timeout = 0; - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, - vdd->prm_irqst_reg) & - vp->prm_irqst_data->tranxdone_status), + omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) pr_err("%s: vdd_%s TRANXDONE timeout exceeded." @@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, */ timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vdd->write_reg(vp->prm_irqst_data->tranxdone_status, - vdd->prm_irqst_mod, vdd->prm_irqst_reg); - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & - vp->prm_irqst_data->tranxdone_status)) + vp->vp_common->ops->clear_txdone(vp->id); + if (!vp->vp_common->ops->check_txdone(vp->id)) break; udelay(1); } -- cgit v0.10.2 From 4bb73adec43bbf63d39e1c2021de0aab0c60ea34 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 10:25:12 -0700 Subject: OMAP2+: PRM: add register access functions for VC/VP On OMAP3+, the voltage controller (VC) and voltage processor (VP) are inside the PRM. Add some PRM helper functions for register access to these module registers. Thanks to Nishanth Menon for finding/fixing a sparse problem. Cc: Nishanth Menon Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 58c5c87..f02d87f 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -169,7 +169,7 @@ struct omap3_vp { u32 tranxdone_status; }; -struct omap3_vp omap3_vp[] = { +static struct omap3_vp omap3_vp[] = { [OMAP3_VP_VDD_MPU_ID] = { .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, }, @@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) omap2_prm_write_mod_reg(vp->tranxdone_status, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); } + +u32 omap3_prm_vcvp_read(u8 offset) +{ + return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); +} + +void omap3_prm_vcvp_write(u32 val, u8 offset) +{ + omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); +} + +u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); +} diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 5112526..cef533d 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); u32 omap3_prm_vp_check_txdone(u8 vp_id); void omap3_prm_vp_clear_txdone(u8 vp_id); +/* + * OMAP3 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap3_prm_vcvp_read(u8 offset); +extern void omap3_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); #endif /* CONFIG_ARCH_OMAP4 */ + #endif /* diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 390e32c..495a31a 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -24,6 +24,8 @@ #include "vp.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" +#include "prcm44xx.h" +#include "prminst44xx.h" /* PRM low-level functions */ @@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id) OMAP4430_PRM_OCP_SOCKET_INST, vp->irqstatus_mpu); }; + +u32 omap4_prm_vcvp_read(u8 offset) +{ + return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, offset); +} + +void omap4_prm_vcvp_write(u32 val, u8 offset) +{ + omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, offset); +} + +u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap4_prminst_rmw_inst_reg_bits(mask, bits, + OMAP4430_PRM_PARTITION, + OMAP4430_PRM_DEVICE_INST, + offset); +} diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index b28c87d..3d66ccd 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); u32 omap4_prm_vp_check_txdone(u8 vp_id); void omap4_prm_vp_clear_txdone(u8 vp_id); +/* + * OMAP4 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap4_prm_vcvp_read(u8 offset); +extern void omap4_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); + # endif #endif -- cgit v0.10.2 From 4bcc475ebd06a04e1531254c27c6cf508ef8ebf9 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 28 Mar 2011 10:40:15 -0700 Subject: OMAP3+: voltage: convert to PRM register access functions Convert VC/VP register access to use PRM VC/VP accessor functions. In the process, move the read/write function pointers from vdd_info into struct voltagedomain. No functional changes. Additional cleanup: - remove prm_mod field from VC/VP data structures, the PRM register access functions know which PRM module to use. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 1bdbe7c..f1c73cb 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -46,7 +46,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, return -ENODATA; } - if (!vdd->read_reg || !vdd->write_reg) { + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); return -EINVAL; @@ -58,24 +58,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, volt_data = NULL; *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); + *current_vsel = voltdm->read(vdd->vp_data->voltage); /* Setting the ON voltage to the new target voltage */ - vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); + vc_cmdval = voltdm->read(vc->cmdval_reg); vc_cmdval &= ~vc->common->cmd_on_mask; vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); - vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); + voltdm->write(vc_cmdval, vc->cmdval_reg); /* Setting vp errorgain based on the voltage */ if (volt_data) { - vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); + vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << vp_common->vpconfig_errorgain_shift; - vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, - vdd->vp_data->vpconfig); + voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); } return 0; @@ -120,11 +118,10 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, (vdd->pmic_info->i2c_slave_addr << vc->common->slaveaddr_shift); - vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); - vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, - vc_bypass_val_reg); + voltdm->write(vc_bypass_value, vc_bypass_val_reg); + voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); - vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); + vc_bypass_value = voltdm->read(vc_bypass_val_reg); /* * Loop till the bypass command is acknowledged from the SMPS. * NOTE: This is legacy code. The loop count and retry count needs @@ -143,8 +140,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, loop_cnt = 0; udelay(10); } - vc_bypass_value = vdd->read_reg(vc->common->prm_mod, - vc_bypass_val_reg); + vc_bypass_value = voltdm->read(vc_bypass_val_reg); } omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); @@ -153,18 +149,13 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, static void __init omap3_vfsm_init(struct voltagedomain *voltdm) { - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - /* * Voltage Manager FSM parameters init * XXX This data should be passed in from the board file */ - vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); - vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, - OMAP3_PRM_VOLTOFFSET_OFFSET); - vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, - OMAP3_PRM_VOLTSETUP2_OFFSET); + voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET); + voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET); + voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET); } static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) @@ -187,16 +178,16 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) (onlp_vsel << vc->common->cmd_onlp_shift) | (ret_vsel << vc->common->cmd_ret_shift) | (off_vsel << vc->common->cmd_off_shift)); - vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); + voltdm->write(vc_val, vc->cmdval_reg); /* * Generic VC parameters init * XXX This data should be abstracted out */ - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, - OMAP3_PRM_VC_CH_CONF_OFFSET); - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, - OMAP3_PRM_VC_I2C_CFG_OFFSET); + voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, + OMAP3_PRM_VC_CH_CONF_OFFSET); + voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, + OMAP3_PRM_VC_I2C_CFG_OFFSET); omap3_vfsm_init(voltdm); @@ -207,8 +198,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) /* OMAP4 specific voltage init functions */ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) { - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; u32 vc_val; @@ -224,11 +213,11 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); - vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); + voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); /* XXX These are magic numbers and do not belong! */ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); - vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); + voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); is_initialized = true; } @@ -246,34 +235,30 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) return; } - if (!vdd->read_reg || !vdd->write_reg) { + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); return; } /* Set up the SMPS_SA(i2c slave address in VC */ - vc_val = vdd->read_reg(vc->common->prm_mod, - vc->common->smps_sa_reg); + vc_val = voltdm->read(vc->common->smps_sa_reg); vc_val &= ~vc->smps_sa_mask; vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; - vdd->write_reg(vc_val, vc->common->prm_mod, - vc->common->smps_sa_reg); + voltdm->write(vc_val, vc->common->smps_sa_reg); /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = vdd->read_reg(vc->common->prm_mod, - vc->common->smps_volra_reg); + vc_val = voltdm->read(vc->common->smps_volra_reg); vc_val &= ~vc->smps_volra_mask; vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; - vdd->write_reg(vc_val, vc->common->prm_mod, - vc->common->smps_volra_reg); + voltdm->write(vc_val, vc->common->smps_volra_reg); /* Configure the setup times */ - vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); + vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); vc_val &= ~vdd->vfsm->voltsetup_mask; vc_val |= vdd->pmic_info->volt_setup_time << vdd->vfsm->voltsetup_shift; - vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); + voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); if (cpu_is_omap34xx()) omap3_vc_init_channel(voltdm); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 51d36a8..d0050f0 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -25,7 +25,6 @@ struct voltagedomain; * struct omap_vc_common - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register - * @prm_mod: PRM module id used for PRM register access * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start @@ -43,7 +42,6 @@ struct voltagedomain; struct omap_vc_common { u32 cmd_on_mask; u32 valid; - s16 prm_mod; u8 smps_sa_reg; u8 smps_volra_reg; u8 bypass_val_reg; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index 1a17ed4..6b67203 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -30,7 +30,6 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static struct omap_vc_common omap3_vc_common = { - .prm_mod = OMAP3430_GR_MOD, .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 56f3f4a..e3125a3 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -31,7 +31,6 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static const struct omap_vc_common omap4_vc_common = { - .prm_mod = OMAP4430_PRM_DEVICE_INST, .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 9b9f019..9f9f014 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list); #define VOLTAGE_DIR_SIZE 16 static struct dentry *voltage_dir; -static u32 omap3_voltage_read_reg(u16 mod, u8 offset) -{ - return omap2_prm_read_mod_reg(mod, offset); -} - -static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset) -{ - omap2_prm_write_mod_reg(val, mod, offset); -} - -static u32 omap4_voltage_read_reg(u16 mod, u8 offset) -{ - return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - mod, offset); -} - -static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) -{ - omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); -} - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { char *sys_ck_name; @@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) goto ovdc_out; - if (cpu_is_omap34xx()) { - vdd->read_reg = omap3_voltage_read_reg; - vdd->write_reg = omap3_voltage_write_reg; - ret = 0; - } else if (cpu_is_omap44xx()) { - vdd->read_reg = omap4_voltage_read_reg; - vdd->write_reg = omap4_voltage_write_reg; - ret = 0; - } + ret = 0; ovdc_out: return ret; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 04e06266..6a19cf3 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -59,6 +59,9 @@ struct omap_vfsm_instance_data { * @node: list_head linking all voltage domains * @pwrdm_list: list_head linking all powerdomains in this voltagedomain * @vc: pointer to VC channel associated with this voltagedomain + * @read: read a VC/VP register + * @write: write a VC/VP register + * @read: read-modify-write a VC/VP register * @vdd: to be removed */ struct voltagedomain { @@ -68,6 +71,11 @@ struct voltagedomain { struct list_head pwrdm_list; struct omap_vc_channel *vc; + /* VC/VP register access functions: SoC specific */ + u32 (*read) (u8 offset); + void (*write) (u32 val, u8 offset); + u32 (*rmw)(u32 mask, u32 bits, u8 offset); + struct omap_vdd_info *vdd; }; @@ -146,8 +154,6 @@ struct omap_vdd_info { u32 curr_volt; bool vp_enabled; - u32 (*read_reg) (u16 mod, u8 offset); - void (*write_reg) (u32 val, u16 mod, u8 offset); int (*volt_scale) (struct voltagedomain *voltdm, unsigned long target_volt); }; diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index ad8f05b..1d66749 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -56,6 +56,9 @@ static struct omap_vdd_info omap3_vdd2_info = { static struct voltagedomain omap3_voltdm_mpu = { .name = "mpu_iva", .scalable = true, + .read = omap3_prm_vcvp_read, + .write = omap3_prm_vcvp_write, + .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_mpu, .vdd = &omap3_vdd1_info, }; @@ -63,6 +66,9 @@ static struct voltagedomain omap3_voltdm_mpu = { static struct voltagedomain omap3_voltdm_core = { .name = "core", .scalable = true, + .read = omap3_prm_vcvp_read, + .write = omap3_prm_vcvp_write, + .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_core, .vdd = &omap3_vdd2_info, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 43e1d38..e435795 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -62,6 +62,9 @@ static struct omap_vdd_info omap4_vdd_core_info = { static struct voltagedomain omap4_voltdm_mpu = { .name = "mpu", .scalable = true, + .read = omap4_prm_vcvp_read, + .write = omap4_prm_vcvp_write, + .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_mpu, .vdd = &omap4_vdd_mpu_info, }; @@ -69,6 +72,9 @@ static struct voltagedomain omap4_voltdm_mpu = { static struct voltagedomain omap4_voltdm_iva = { .name = "iva", .scalable = true, + .read = omap4_prm_vcvp_read, + .write = omap4_prm_vcvp_write, + .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_iva, .vdd = &omap4_vdd_iva_info, }; @@ -76,6 +82,9 @@ static struct voltagedomain omap4_voltdm_iva = { static struct voltagedomain omap4_voltdm_core = { .name = "core", .scalable = true, + .read = omap4_prm_vcvp_read, + .write = omap4_prm_vcvp_write, + .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_core, .vdd = &omap4_vdd_core_info, }; diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 113c839..88ac742 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -35,19 +35,19 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) vsel = vdd->pmic_info->uv_to_vsel(uvdc); - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | vp->vp_common->vpconfig_initvdd); vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ - vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), - vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), + vp->vpconfig); /* Clear initVDD copy trigger bit */ - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); } /* Generic voltage init functions */ @@ -57,7 +57,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) struct omap_vdd_info *vdd = voltdm->vdd; u32 vp_val; - if (!vdd->read_reg || !vdd->write_reg) { + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); return; @@ -67,19 +67,19 @@ void __init omap_vp_init(struct voltagedomain *voltdm) (vdd->vp_rt_data.vpconfig_errorgain << vp->vp_common->vpconfig_errorgain_shift) | vp->vp_common->vpconfig_timeouten; - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vp_val, vp->vpconfig); vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << vp->vp_common->vstepmin_smpswaittimemin_shift) | (vdd->vp_rt_data.vstepmin_stepmin << vp->vp_common->vstepmin_stepmin_shift)); - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); + voltdm->write(vp_val, vp->vstepmin); vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << vp->vp_common->vstepmax_smpswaittimemax_shift) | (vdd->vp_rt_data.vstepmax_stepmax << vp->vp_common->vstepmax_stepmax_shift)); - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); + voltdm->write(vp_val, vp->vstepmax); vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << vp->vp_common->vlimitto_vddmax_shift) | @@ -87,7 +87,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) vp->vp_common->vlimitto_vddmin_shift) | (vdd->vp_rt_data.vlimitto_timeout << vp->vp_common->vlimitto_timeout_shift)); - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); + voltdm->write(vp_val, vp->vlimitto); vp_debugfs_init(voltdm); } @@ -97,7 +97,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, unsigned long target_volt) { struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; - struct omap_vdd_info *vdd = voltdm->vdd; u32 vpconfig; u8 target_vsel, current_vsel; int ret, timeout = 0; @@ -123,21 +122,21 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, } /* Configure for VP-Force Update */ - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~(vp->vp_common->vpconfig_initvdd | vp->vp_common->vpconfig_forceupdate | vp->vp_common->vpconfig_initvoltage_mask); vpconfig |= ((target_vsel << vp->vp_common->vpconfig_initvoltage_shift)); - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ vpconfig |= vp->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* Force update of voltage */ vpconfig |= vp->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* * Wait for TransactionDone. Typical latency is <200us. @@ -170,13 +169,13 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, "to clear the TRANXDONE status\n", __func__, voltdm->name); - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig = voltdm->read(vp->vpconfig); /* Clear initVDD copy trigger bit */ vpconfig &= ~vp->vp_common->vpconfig_initvdd; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* Clear force bit */ vpconfig &= ~vp->vp_common->vpconfig_forceupdate; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); return 0; } @@ -199,13 +198,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) } vdd = voltdm->vdd; - if (!vdd->read_reg) { + if (!voltdm->read) { pr_err("%s: No read API for reading vdd_%s regs\n", __func__, voltdm->name); return 0; } - curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); + curr_vsel = voltdm->read(vp->voltage); if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { pr_warning("%s: PMIC function to convert vsel to voltage" @@ -236,7 +235,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) vdd = voltdm->vdd; vp = voltdm->vdd->vp_data; - if (!vdd->read_reg || !vdd->write_reg) { + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); return; @@ -249,9 +248,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) vp_latch_vsel(voltdm); /* Enable VP */ - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig = voltdm->read(vp->vpconfig); vpconfig |= vp->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); vdd->vp_enabled = true; } @@ -276,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) vdd = voltdm->vdd; vp = voltdm->vdd->vp_data; - if (!vdd->read_reg || !vdd->write_reg) { + if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); return; @@ -290,15 +289,15 @@ void omap_vp_disable(struct voltagedomain *voltdm) } /* Disable VP */ - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); + vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~vp->vp_common->vpconfig_vpenable; - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); + voltdm->write(vpconfig, vp->vpconfig); /* * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us */ - omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), - VP_IDLE_TIMEOUT, timeout); + omap_test_timeout((voltdm->read(vp->vstatus)), + VP_IDLE_TIMEOUT, timeout); if (timeout >= VP_IDLE_TIMEOUT) pr_warning("%s: vdd_%s idle timedout\n", @@ -322,7 +321,7 @@ static int vp_volt_debug_get(void *data, u64 *val) return -EINVAL; } - vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); + vsel = voltdm->read(vp->voltage); if (!vdd->pmic_info->vsel_to_uv) { pr_warning("PMIC function to convert vsel to voltage" diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 1ccf741..382fef1 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -62,7 +62,6 @@ struct omap_vp_ops { * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg - * @prm_mod: PRM module id used for PRM register access * * XXX It it not necessary to have both a mask and a shift for the same * bitfield - remove one @@ -75,7 +74,6 @@ struct omap_vp_common_data { u32 vpconfig_initvdd; u32 vpconfig_forceupdate; u32 vpconfig_vpenable; - s16 prm_mod; u8 vpconfig_erroroffset_shift; u8 vpconfig_errorgain_shift; u8 vpconfig_initvoltage_shift; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 0372c1a..b01d333 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -37,7 +37,6 @@ static const struct omap_vp_ops omap3_vp_ops = { * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. */ static const struct omap_vp_common_data omap3_vp_common = { - .prm_mod = OMAP3430_GR_MOD, .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 738ba04..9704c7b 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -37,7 +37,6 @@ static const struct omap_vp_ops omap4_vp_ops = { * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. */ static const struct omap_vp_common_data omap4_vp_common = { - .prm_mod = OMAP4430_PRM_DEVICE_INST, .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, -- cgit v0.10.2 From ba112a4e86ba8f0f9546bd953374cde064b507ca Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 29 Mar 2011 14:02:36 -0700 Subject: OMAP3+: VC: cleanup i2c slave address configuration - Add an i2c_slave_address field to the omap_vc_channel - use VC/VP read/modify/write helper instead of open-coding - remove smps_sa_shift, use __ffs(mask) for shift value - I2C addresses 10-bit, change size to u16 Special thanks to Shweta Gulati for suggesting the use of __ffs(x) instead of ffs(x) - 1. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index f1c73cb..d5e792f 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -241,11 +241,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) return; } - /* Set up the SMPS_SA(i2c slave address in VC */ - vc_val = voltdm->read(vc->common->smps_sa_reg); - vc_val &= ~vc->smps_sa_mask; - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; - voltdm->write(vc_val, vc->common->smps_sa_reg); + /* get PMIC/board specific settings */ + vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; + + /* Configure the i2c slave address for this VC */ + voltdm->rmw(vc->smps_sa_mask, + vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), + vc->common->smps_sa_reg); /* Setup the VOLRA(pmic reg addr) in VC */ vc_val = voltdm->read(vc->common->smps_volra_reg); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index d0050f0..69ca900 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -56,21 +56,24 @@ struct omap_vc_common { /** * struct omap_vc_channel - VC per-instance data + * @i2c_slave_addr: I2C slave address of PMIC for this VC channel * @common: pointer to VC common data for this platform - * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register + * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register - * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register * * XXX It is not necessary to have both a *_mask and a *_shift - * remove one */ struct omap_vc_channel { + /* channel state */ + u16 i2c_slave_addr; + + /* register access data */ const struct omap_vc_common *common; u32 smps_sa_mask; u32 smps_volra_mask; u8 cmdval_reg; - u8 smps_sa_shift; u8 smps_volra_shift; }; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index 6b67203..86be50c 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = { struct omap_vc_channel omap3_vc_mpu = { .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, .smps_volra_mask = OMAP3430_VOLRA0_MASK, @@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = { struct omap_vc_channel omap3_vc_core = { .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, .smps_volra_mask = OMAP3430_VOLRA1_MASK, diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index e3125a3..af922b4 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -49,7 +49,6 @@ static const struct omap_vc_common omap4_vc_common = { struct omap_vc_channel omap4_vc_mpu = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, @@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = { struct omap_vc_channel omap4_vc_iva = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, @@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = { struct omap_vc_channel omap4_vc_core = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, - .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 6a19cf3..5903849 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -102,6 +102,7 @@ struct omap_volt_data { * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. * @slew_rate: PMIC slew rate (in uv/us) * @step_size: PMIC voltage step size (in uv) + * @i2c_slave_addr: I2C slave address of PMIC * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. * @volt_reg_addr: voltage configuration register address @@ -115,13 +116,13 @@ struct omap_volt_pmic_info { u32 ret_volt; u32 off_volt; u16 volt_setup_time; + u16 i2c_slave_addr; u8 vp_erroroffset; u8 vp_vstepmin; u8 vp_vstepmax; u8 vp_vddmin; u8 vp_vddmax; u8 vp_timeout_us; - u8 i2c_slave_addr; u8 volt_reg_addr; u8 cmd_reg_addr; unsigned long (*vsel_to_uv) (const u8 vsel); -- cgit v0.10.2 From e4e021c5491537783f5f65a6defa92e6098a3658 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 9 Jun 2011 11:01:55 -0700 Subject: OMAP3+: VC: cleanup PMIC register address configuration - support both voltage register address and command register address for each VC channel - add fields for voltage register address (volra) and command register address (cmdra) to struct omap_vc_channel - use VC/VP register access read/modify/write helper - remove volra_shift field (use __ffs(mask) for shift value) - I2C addresses 10-bit, change size to u16 Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index d5e792f..22db6e6 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -243,17 +243,24 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) /* get PMIC/board specific settings */ vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; + vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; + vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; /* Configure the i2c slave address for this VC */ voltdm->rmw(vc->smps_sa_mask, vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), vc->common->smps_sa_reg); - /* Setup the VOLRA(pmic reg addr) in VC */ - vc_val = voltdm->read(vc->common->smps_volra_reg); - vc_val &= ~vc->smps_volra_mask; - vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; - voltdm->write(vc_val, vc->common->smps_volra_reg); + /* + * Configure the PMIC register addresses. + */ + voltdm->rmw(vc->smps_volra_mask, + vc->volt_reg_addr << __ffs(vc->smps_volra_mask), + vc->common->smps_volra_reg); + if (vc->cmd_reg_addr) + voltdm->rmw(vc->smps_cmdra_mask, + vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), + vc->common->smps_cmdra_reg); /* Configure the setup times */ vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 69ca900..43a0c5c 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -27,6 +27,7 @@ struct voltagedomain; * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start + * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register @@ -44,6 +45,7 @@ struct omap_vc_common { u32 valid; u8 smps_sa_reg; u8 smps_volra_reg; + u8 smps_cmdra_reg; u8 bypass_val_reg; u8 data_shift; u8 slaveaddr_shift; @@ -57,24 +59,26 @@ struct omap_vc_common { /** * struct omap_vc_channel - VC per-instance data * @i2c_slave_addr: I2C slave address of PMIC for this VC channel + * @volt_reg_addr: voltage configuration register address + * @cmd_reg_addr: command configuration register address * @common: pointer to VC common data for this platform * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register - * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register - * - * XXX It is not necessary to have both a *_mask and a *_shift - - * remove one + * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register + * @cmdval_reg: register for on/ret/off voltage level values for this channel */ struct omap_vc_channel { /* channel state */ u16 i2c_slave_addr; + u16 volt_reg_addr; + u16 cmd_reg_addr; /* register access data */ const struct omap_vc_common *common; u32 smps_sa_mask; u32 smps_volra_mask; + u32 smps_cmdra_mask; u8 cmdval_reg; - u8 smps_volra_shift; }; extern struct omap_vc_channel omap3_vc_mpu; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index 86be50c..df8bd5e 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -32,6 +32,7 @@ static struct omap_vc_common omap3_vc_common = { .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, + .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, .data_shift = OMAP3430_DATA_SHIFT, .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, @@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = { .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, - .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, .smps_volra_mask = OMAP3430_VOLRA0_MASK, + .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, }; struct omap_vc_channel omap3_vc_core = { .common = &omap3_vc_common, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, - .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, .smps_volra_mask = OMAP3430_VOLRA1_MASK, + .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, }; diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index af922b4..5d104ff 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -33,6 +33,7 @@ static const struct omap_vc_common omap4_vc_common = { .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, .data_shift = OMAP4430_DATA_SHIFT, .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, @@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, }; struct omap_vc_channel omap4_vc_iva = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, }; struct omap_vc_channel omap4_vc_core = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, }; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 5903849..3f49807 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -103,10 +103,10 @@ struct omap_volt_data { * @slew_rate: PMIC slew rate (in uv/us) * @step_size: PMIC voltage step size (in uv) * @i2c_slave_addr: I2C slave address of PMIC - * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. - * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. * @volt_reg_addr: voltage configuration register address * @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address + * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. + * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. */ struct omap_volt_pmic_info { int slew_rate; @@ -117,14 +117,14 @@ struct omap_volt_pmic_info { u32 off_volt; u16 volt_setup_time; u16 i2c_slave_addr; + u16 volt_reg_addr; + u16 cmd_reg_addr; u8 vp_erroroffset; u8 vp_vstepmin; u8 vp_vstepmax; u8 vp_vddmin; u8 vp_vddmax; u8 vp_timeout_us; - u8 volt_reg_addr; - u8 cmd_reg_addr; unsigned long (*vsel_to_uv) (const u8 vsel); u8 (*uv_to_vsel) (unsigned long uV); }; -- cgit v0.10.2 From 78614e0f8f32dca52beebaadfb53c2a3acf1604a Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 29 Mar 2011 14:24:47 -0700 Subject: OMAP3+: VC bypass: use fields from VC struct instead of PMIC info The PMIC configurable variables should be isolated to VC initialization. The rest of the VC functions (like VC bypass) should use the i2c slave address and voltage register address fields from struct omap_vc_channel. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 22db6e6..8f0105a 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -100,7 +100,6 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, unsigned long target_volt) { struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; u32 loop_cnt = 0, retries_cnt = 0; u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; u8 target_vsel, current_vsel; @@ -113,10 +112,8 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, vc_valid = vc->common->valid; vc_bypass_val_reg = vc->common->bypass_val_reg; vc_bypass_value = (target_vsel << vc->common->data_shift) | - (vdd->pmic_info->volt_reg_addr << - vc->common->regaddr_shift) | - (vdd->pmic_info->i2c_slave_addr << - vc->common->slaveaddr_shift); + (vc->volt_reg_addr << vc->common->regaddr_shift) | + (vc->i2c_slave_addr << vc->common->slaveaddr_shift); voltdm->write(vc_bypass_value, vc_bypass_val_reg); voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); -- cgit v0.10.2 From 5892bb1fc6430d086f5c2a4216f9ed00070e31ad Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 29 Mar 2011 14:36:04 -0700 Subject: OMAP3+: VC: cleanup voltage setup time configuration - add setup_time field to struct omap_vc_channel (init'd from PMIC data) - use VC/VP register access helper for read/modify/write - move VFSM structure from omap_vdd_info into struct voltagedomain - remove redunant _data suffix from VFSM structures and variables - remove voltsetup_shift, use ffs() on the mask value to find the shift Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 8f0105a..f78e62a 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -223,7 +223,6 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) { struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; - u32 vc_val; if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { pr_err("%s: PMIC info requried to configure vc for" @@ -242,6 +241,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; + vc->setup_time = vdd->pmic_info->volt_setup_time; /* Configure the i2c slave address for this VC */ voltdm->rmw(vc->smps_sa_mask, @@ -260,11 +260,9 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc->common->smps_cmdra_reg); /* Configure the setup times */ - vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); - vc_val &= ~vdd->vfsm->voltsetup_mask; - vc_val |= vdd->pmic_info->volt_setup_time << - vdd->vfsm->voltsetup_shift; - voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); + voltdm->rmw(voltdm->vfsm->voltsetup_mask, + vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), + voltdm->vfsm->voltsetup_reg); if (cpu_is_omap34xx()) omap3_vc_init_channel(voltdm); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 43a0c5c..6e8806b 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -61,6 +61,7 @@ struct omap_vc_common { * @i2c_slave_addr: I2C slave address of PMIC for this VC channel * @volt_reg_addr: voltage configuration register address * @cmd_reg_addr: command configuration register address + * @setup_time: setup time (in sys_clk cycles) of regulator for this channel * @common: pointer to VC common data for this platform * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register @@ -72,6 +73,7 @@ struct omap_vc_channel { u16 i2c_slave_addr; u16 volt_reg_addr; u16 cmd_reg_addr; + u16 setup_time; /* register access data */ const struct omap_vc_common *common; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 3f49807..99df2d1 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -36,20 +36,16 @@ struct powerdomain; struct omap_vdd_info; /** - * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield + * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield * data * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base - * @voltsetup_shift: SETUP_TIME* field shift in the PRM_VOLTSETUP* register * * XXX What about VOLTOFFSET/VOLTCTRL? - * XXX It is not necessary to have both a _mask and a _shift for the same - * bitfield - remove one! */ -struct omap_vfsm_instance_data { +struct omap_vfsm_instance { u32 voltsetup_mask; u8 voltsetup_reg; - u8 voltsetup_shift; }; /** @@ -70,6 +66,7 @@ struct voltagedomain { struct list_head node; struct list_head pwrdm_list; struct omap_vc_channel *vc; + const struct omap_vfsm_instance *vfsm; /* VC/VP register access functions: SoC specific */ u32 (*read) (u8 offset); @@ -139,7 +136,6 @@ struct omap_volt_pmic_info { * @vp_data : the register values, shifts, masks for various * vp registers * @vp_rt_data : VP data derived at runtime, not predefined - * @vfsm : voltage manager FSM data * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. * @vp_enabled : flag to keep track of whether vp is enabled or not @@ -150,7 +146,6 @@ struct omap_vdd_info { struct omap_volt_pmic_info *pmic_info; struct omap_vp_instance_data *vp_data; struct omap_vp_runtime_data vp_rt_data; - const struct omap_vfsm_instance_data *vfsm; struct dentry *debug_dir; u32 curr_volt; bool vp_enabled; diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 1d66749..ce5a797 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -31,26 +31,22 @@ * VDD data */ -static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { +static const struct omap_vfsm_instance omap3_vdd1_vfsm = { .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, - .voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT, .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, }; static struct omap_vdd_info omap3_vdd1_info = { .vp_data = &omap3_vp1_data, - .vfsm = &omap3_vdd1_vfsm_data, }; -static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { +static const struct omap_vfsm_instance omap3_vdd2_vfsm = { .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, - .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, }; static struct omap_vdd_info omap3_vdd2_info = { .vp_data = &omap3_vp2_data, - .vfsm = &omap3_vdd2_vfsm_data, }; static struct voltagedomain omap3_voltdm_mpu = { @@ -60,6 +56,7 @@ static struct voltagedomain omap3_voltdm_mpu = { .write = omap3_prm_vcvp_write, .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_mpu, + .vfsm = &omap3_vdd1_vfsm, .vdd = &omap3_vdd1_info, }; @@ -70,6 +67,7 @@ static struct voltagedomain omap3_voltdm_core = { .write = omap3_prm_vcvp_write, .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_core, + .vfsm = &omap3_vdd2_vfsm, .vdd = &omap3_vdd2_info, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index e435795..dd4bd22 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -32,31 +32,28 @@ #include "vc.h" #include "vp.h" -static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { +static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, }; static struct omap_vdd_info omap4_vdd_mpu_info = { .vp_data = &omap4_vp_mpu_data, - .vfsm = &omap4_vdd_mpu_vfsm_data, }; -static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { +static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, }; static struct omap_vdd_info omap4_vdd_iva_info = { .vp_data = &omap4_vp_iva_data, - .vfsm = &omap4_vdd_iva_vfsm_data, }; -static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { +static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, }; static struct omap_vdd_info omap4_vdd_core_info = { .vp_data = &omap4_vp_core_data, - .vfsm = &omap4_vdd_core_vfsm_data, }; static struct voltagedomain omap4_voltdm_mpu = { @@ -66,6 +63,7 @@ static struct voltagedomain omap4_voltdm_mpu = { .write = omap4_prm_vcvp_write, .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_mpu, + .vfsm = &omap4_vdd_mpu_vfsm, .vdd = &omap4_vdd_mpu_info, }; @@ -76,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = { .write = omap4_prm_vcvp_write, .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_iva, + .vfsm = &omap4_vdd_iva_vfsm, .vdd = &omap4_vdd_iva_info, }; @@ -86,6 +85,7 @@ static struct voltagedomain omap4_voltdm_core = { .write = omap4_prm_vcvp_write, .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_core, + .vfsm = &omap4_vdd_core_vfsm, .vdd = &omap4_vdd_core_info, }; -- cgit v0.10.2 From 08d1c9a3e2dc7a285db7c689c42963d0f5271c1f Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 29 Mar 2011 15:14:38 -0700 Subject: OMAP3+: VC: move on/onlp/ret/off command configuration into common init Configuring the on/onlp/ret/off command values is common to OMAP3 & 4. Move from OMAP3-only init into common VC init. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index f78e62a..72c9cb6 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -157,26 +157,11 @@ static void __init omap3_vfsm_init(struct voltagedomain *voltdm) static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) { - struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; static bool is_initialized; - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; - u32 vc_val; if (is_initialized) return; - /* Set up the on, inactive, retention and off voltage */ - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); - vc_val = ((on_vsel << vc->common->cmd_on_shift) | - (onlp_vsel << vc->common->cmd_onlp_shift) | - (ret_vsel << vc->common->cmd_ret_shift) | - (off_vsel << vc->common->cmd_off_shift)); - voltdm->write(vc_val, vc->cmdval_reg); - /* * Generic VC parameters init * XXX This data should be abstracted out @@ -201,8 +186,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) if (is_initialized) return; - /* TODO: Configure setup times and CMD_VAL values*/ - /* * Generic VC parameters init * XXX This data should be abstracted out @@ -223,6 +206,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) { struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; + u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; + u32 val; if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { pr_err("%s: PMIC info requried to configure vc for" @@ -259,6 +244,17 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), vc->common->smps_cmdra_reg); + /* Set up the on, inactive, retention and off voltage */ + on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); + onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); + ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); + off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); + val = ((on_vsel << vc->common->cmd_on_shift) | + (onlp_vsel << vc->common->cmd_onlp_shift) | + (ret_vsel << vc->common->cmd_ret_shift) | + (off_vsel << vc->common->cmd_off_shift)); + voltdm->write(val, vc->cmdval_reg); + /* Configure the setup times */ voltdm->rmw(voltdm->vfsm->voltsetup_mask, vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), -- cgit v0.10.2 From 24d3194a2c9bc4d2315117915d4d22c395c07fd5 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 29 Mar 2011 15:57:16 -0700 Subject: OMAP3+: VC: abstract out channel configuration VC channel configuration is programmed based on settings coming from the PMIC configuration. Currently, the VC channel to PMIC mapping is a simple one-to-one mapping. Whenever a VC channel parameter is configured (i2c slave addres, PMIC register address, on/ret/off command), the corresponding bits are enabled in the VC channel configuration register. If necessary, the programmability of channel configuration settings could be extended to board/PMIC files, however, because this patch changes the channel configuration to be programmed based on existing values from the PMIC settings, it may not be required. Also note that starting with OMAP4, where there are more than 2 channels, one channel is identified as the "default" channel. When any of the bits in the channel config for the other channels are zero, it means to use the default channel. The OMAP4 TRM (at least through NDA version Q) is wrong in describing which is the default channel. The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 72c9cb6..1791f79 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -19,6 +19,52 @@ #include "prm-regbits-44xx.h" #include "prm44xx.h" +/* + * Channel configuration bits, common for OMAP3 & 4 + * OMAP3 register: PRM_VC_CH_CONF + * OMAP4 register: PRM_VC_CFG_CHANNEL + */ +#define CFG_CHANNEL_SA BIT(0) +#define CFG_CHANNEL_RAV BIT(1) +#define CFG_CHANNEL_RAC BIT(2) +#define CFG_CHANNEL_RACEN BIT(3) +#define CFG_CHANNEL_CMD BIT(4) +#define CFG_CHANNEL_MASK 0x3f + +/** + * omap_vc_config_channel - configure VC channel to PMIC mappings + * @voltdm: pointer to voltagdomain defining the desired VC channel + * + * Configures the VC channel to PMIC mappings for the following + * PMIC settings + * - i2c slave address (SA) + * - voltage configuration address (RAV) + * - command configuration address (RAC) and enable bit (RACEN) + * - command values for ON, ONLP, RET and OFF (CMD) + * + * This function currently only allows flexible configuration of the + * non-default channel. Starting with OMAP4, there are more than 2 + * channels, with one defined as the default (on OMAP4, it's MPU.) + * Only the non-default channel can be configured. + */ +static int omap_vc_config_channel(struct voltagedomain *voltdm) +{ + struct omap_vc_channel *vc = voltdm->vc; + + /* + * For default channel, the only configurable bit is RACEN. + * All others must stay at zero (see function comment above.) + */ + if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) + vc->cfg_channel &= CFG_CHANNEL_RACEN; + + voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, + vc->cfg_channel << vc->cfg_channel_sa_shift, + vc->common->cfg_channel_reg); + + return 0; +} + /* Voltage scale and accessory APIs */ int omap_vc_pre_scale(struct voltagedomain *voltdm, unsigned long target_volt, @@ -166,8 +212,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) * Generic VC parameters init * XXX This data should be abstracted out */ - voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, - OMAP3_PRM_VC_CH_CONF_OFFSET); voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, OMAP3_PRM_VC_I2C_CFG_OFFSET); @@ -186,15 +230,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) if (is_initialized) return; - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); - voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); - /* XXX These are magic numbers and do not belong! */ vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); @@ -222,6 +257,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) return; } + vc->cfg_channel = 0; + /* get PMIC/board specific settings */ vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; @@ -232,6 +269,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) voltdm->rmw(vc->smps_sa_mask, vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), vc->common->smps_sa_reg); + vc->cfg_channel |= CFG_CHANNEL_SA; /* * Configure the PMIC register addresses. @@ -239,10 +277,14 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) voltdm->rmw(vc->smps_volra_mask, vc->volt_reg_addr << __ffs(vc->smps_volra_mask), vc->common->smps_volra_reg); - if (vc->cmd_reg_addr) + vc->cfg_channel |= CFG_CHANNEL_RAV; + + if (vc->cmd_reg_addr) { voltdm->rmw(vc->smps_cmdra_mask, vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), vc->common->smps_cmdra_reg); + vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; + } /* Set up the on, inactive, retention and off voltage */ on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); @@ -254,6 +296,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) (ret_vsel << vc->common->cmd_ret_shift) | (off_vsel << vc->common->cmd_off_shift)); voltdm->write(val, vc->cmdval_reg); + vc->cfg_channel |= CFG_CHANNEL_CMD; + + /* Channel configuration */ + omap_vc_config_channel(voltdm); /* Configure the setup times */ voltdm->rmw(voltdm->vfsm->voltsetup_mask, diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 6e8806b..4e19137 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -54,8 +54,12 @@ struct omap_vc_common { u8 cmd_onlp_shift; u8 cmd_ret_shift; u8 cmd_off_shift; + u8 cfg_channel_reg; }; +/* omap_vc_channel.flags values */ +#define OMAP_VC_CHANNEL_DEFAULT BIT(0) + /** * struct omap_vc_channel - VC per-instance data * @i2c_slave_addr: I2C slave address of PMIC for this VC channel @@ -67,6 +71,7 @@ struct omap_vc_common { * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register * @cmdval_reg: register for on/ret/off voltage level values for this channel + * @flags: VC channel-specific flags (optional) */ struct omap_vc_channel { /* channel state */ @@ -74,6 +79,7 @@ struct omap_vc_channel { u16 volt_reg_addr; u16 cmd_reg_addr; u16 setup_time; + u8 cfg_channel; /* register access data */ const struct omap_vc_common *common; @@ -81,6 +87,8 @@ struct omap_vc_channel { u32 smps_volra_mask; u32 smps_cmdra_mask; u8 cmdval_reg; + u8 cfg_channel_sa_shift; + u8 flags; }; extern struct omap_vc_channel omap3_vc_mpu; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index df8bd5e..f4449eb 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -43,6 +43,7 @@ static struct omap_vc_common omap3_vc_common = { .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, + .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, }; struct omap_vc_channel omap3_vc_mpu = { @@ -51,6 +52,7 @@ struct omap_vc_channel omap3_vc_mpu = { .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, .smps_volra_mask = OMAP3430_VOLRA0_MASK, .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, + .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, }; struct omap_vc_channel omap3_vc_core = { @@ -59,4 +61,5 @@ struct omap_vc_channel omap3_vc_core = { .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, .smps_volra_mask = OMAP3430_VOLRA1_MASK, .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, + .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, }; diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 5d104ff..1610bde 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -44,15 +44,18 @@ static const struct omap_vc_common omap4_vc_common = { .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, .cmd_ret_shift = OMAP4430_RET_SHIFT, .cmd_off_shift = OMAP4430_OFF_SHIFT, + .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, }; /* VC instance data for each controllable voltage line */ struct omap_vc_channel omap4_vc_mpu = { + .flags = OMAP_VC_CHANNEL_DEFAULT, .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, + .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, }; struct omap_vc_channel omap4_vc_iva = { @@ -61,6 +64,7 @@ struct omap_vc_channel omap4_vc_iva = { .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, + .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, }; struct omap_vc_channel omap4_vc_core = { @@ -69,5 +73,6 @@ struct omap_vc_channel omap4_vc_core = { .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, + .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, }; -- cgit v0.10.2 From ce8ebe0dfb1f8713337cebf82499d3dced288328 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 30 Mar 2011 11:01:10 -0700 Subject: OMAP3+: voltage domain: move PMIC struct from vdd_info into struct voltagedomain Move structure containing PMIC configurable settings into struct voltagedomain. In the process, rename from omap_volt_pmic_info to omap_voltdm_pmic (_info suffix is not helpful.) No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 3249fe3..e467d45 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -143,7 +143,7 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) return DIV_ROUND_UP(uv - 600000, 12500) + 1; } -static struct omap_volt_pmic_info omap3_mpu_volt_info = { +static struct omap_voltdm_pmic omap3_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, @@ -163,7 +163,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { .uv_to_vsel = twl4030_uv_to_vsel, }; -static struct omap_volt_pmic_info omap3_core_volt_info = { +static struct omap_voltdm_pmic omap3_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1200000, @@ -183,7 +183,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { .uv_to_vsel = twl4030_uv_to_vsel, }; -static struct omap_volt_pmic_info omap4_mpu_volt_info = { +static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1350000, @@ -203,7 +203,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { .uv_to_vsel = twl6030_uv_to_vsel, }; -static struct omap_volt_pmic_info omap4_iva_volt_info = { +static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, @@ -223,7 +223,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { .uv_to_vsel = twl6030_uv_to_vsel, }; -static struct omap_volt_pmic_info omap4_core_volt_info = { +static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12500, .on_volt = 1100000, @@ -251,13 +251,13 @@ int __init omap4_twl_init(void) return -ENODEV; voltdm = voltdm_lookup("mpu"); - omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); + omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); voltdm = voltdm_lookup("iva"); - omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); + omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); voltdm = voltdm_lookup("core"); - omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); + omap_voltage_register_pmic(voltdm, &omap4_core_pmic); return 0; } @@ -270,10 +270,10 @@ int __init omap3_twl_init(void) return -ENODEV; if (cpu_is_omap3630()) { - omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; - omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; - omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; - omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; + omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; + omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; + omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; + omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; } /* @@ -289,10 +289,10 @@ int __init omap3_twl_init(void) omap3_twl_set_sr_bit(true); voltdm = voltdm_lookup("mpu_iva"); - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); + omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); voltdm = voltdm_lookup("core"); - omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); + omap_voltage_register_pmic(voltdm, &omap3_core_pmic); return 0; } diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 1791f79..4ac7614 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -79,13 +79,13 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, vp_common = vdd->vp_data->vp_common; /* Check if sufficient pmic info is available for this vdd */ - if (!vdd->pmic_info) { + if (!voltdm->pmic) { pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", __func__, voltdm->name); return -EINVAL; } - if (!vdd->pmic_info->uv_to_vsel) { + if (!voltdm->pmic->uv_to_vsel) { pr_err("%s: PMIC function to convert voltage in uV to" "vsel not registered. Hence unable to scale voltage" "for vdd_%s\n", __func__, voltdm->name); @@ -103,7 +103,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, if (IS_ERR(volt_data)) volt_data = NULL; - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); + *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); *current_vsel = voltdm->read(vdd->vp_data->voltage); /* Setting the ON voltage to the new target voltage */ @@ -134,8 +134,8 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, smps_steps = abs(target_vsel - current_vsel); /* SMPS slew rate / step size. 2us added as buffer. */ - smps_delay = ((smps_steps * vdd->pmic_info->step_size) / - vdd->pmic_info->slew_rate) + 2; + smps_delay = ((smps_steps * voltdm->pmic->step_size) / + voltdm->pmic->slew_rate) + 2; udelay(smps_delay); vdd->curr_volt = target_volt; @@ -240,11 +240,10 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) void __init omap_vc_init_channel(struct voltagedomain *voltdm) { struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; u32 val; - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { + if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { pr_err("%s: PMIC info requried to configure vc for" "vdd_%s not populated.Hence cannot initialize vc\n", __func__, voltdm->name); @@ -260,10 +259,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc->cfg_channel = 0; /* get PMIC/board specific settings */ - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; - vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; - vc->setup_time = vdd->pmic_info->volt_setup_time; + vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; + vc->volt_reg_addr = voltdm->pmic->volt_reg_addr; + vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr; + vc->setup_time = voltdm->pmic->volt_setup_time; /* Configure the i2c slave address for this VC */ voltdm->rmw(vc->smps_sa_mask, @@ -287,10 +286,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) } /* Set up the on, inactive, retention and off voltage */ - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); + on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt); + onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt); + ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt); + off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt); val = ((on_vsel << vc->common->cmd_on_shift) | (onlp_vsel << vc->common->cmd_onlp_shift) | (ret_vsel << vc->common->cmd_ret_shift) | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 4e19137..fd38528 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -36,6 +36,7 @@ struct voltagedomain; * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register + * @cfg_channel_reg: VC channel configuration register * * XXX One of cmd_on_mask and cmd_on_shift are not needed * XXX VALID should probably be a shift, not a mask @@ -66,11 +67,14 @@ struct omap_vc_common { * @volt_reg_addr: voltage configuration register address * @cmd_reg_addr: command configuration register address * @setup_time: setup time (in sys_clk cycles) of regulator for this channel + * @cfg_channel: current value of VC channel configuration register + * * @common: pointer to VC common data for this platform * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register * @cmdval_reg: register for on/ret/off voltage level values for this channel + * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register * @flags: VC channel-specific flags (optional) */ struct omap_vc_channel { diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 9f9f014..94f7fc4 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -84,20 +84,20 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) vdd->vp_enabled = false; vdd->vp_rt_data.vpconfig_erroroffset = - (vdd->pmic_info->vp_erroroffset << + (voltdm->pmic->vp_erroroffset << vdd->vp_data->vp_common->vpconfig_erroroffset_shift); - timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000; + timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; vdd->vp_rt_data.vlimitto_timeout = timeout_val; - vdd->vp_rt_data.vlimitto_vddmin = vdd->pmic_info->vp_vddmin; - vdd->vp_rt_data.vlimitto_vddmax = vdd->pmic_info->vp_vddmax; + vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; + vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; - waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) * + waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * sys_clk_speed) / 1000; vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; - vdd->vp_rt_data.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin; - vdd->vp_rt_data.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax; + vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; + vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; return 0; } @@ -149,10 +149,9 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) { - struct omap_vdd_info *vdd = voltdm->vdd; int ret = -EINVAL; - if (!vdd->pmic_info) { + if (!voltdm->pmic) { pr_err("%s: PMIC info requried to configure vdd_%s not" "populated.Hence cannot initialize vdd_%s\n", __func__, voltdm->name, voltdm->name); @@ -324,24 +323,20 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, * omap_voltage_register_pmic() - API to register PMIC specific data * @voltdm: pointer to the VDD for which the PMIC specific data is * to be registered - * @pmic_info: the structure containing pmic info + * @pmic: the structure containing pmic info * * This API is to be called by the SOC/PMIC file to specify the - * pmic specific info as present in omap_volt_pmic_info structure. + * pmic specific info as present in omap_voltdm_pmic structure. */ int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_volt_pmic_info *pmic_info) + struct omap_voltdm_pmic *pmic) { - struct omap_vdd_info *vdd; - if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return -EINVAL; } - vdd = voltdm->vdd; - - vdd->pmic_info = pmic_info; + voltdm->pmic = pmic; return 0; } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 99df2d1..43ee7bf 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -67,6 +67,7 @@ struct voltagedomain { struct list_head pwrdm_list; struct omap_vc_channel *vc; const struct omap_vfsm_instance *vfsm; + struct omap_voltdm_pmic *pmic; /* VC/VP register access functions: SoC specific */ u32 (*read) (u8 offset); @@ -96,7 +97,7 @@ struct omap_volt_data { }; /** - * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. + * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. * @slew_rate: PMIC slew rate (in uv/us) * @step_size: PMIC voltage step size (in uv) * @i2c_slave_addr: I2C slave address of PMIC @@ -105,7 +106,7 @@ struct omap_volt_data { * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. */ -struct omap_volt_pmic_info { +struct omap_voltdm_pmic { int slew_rate; int step_size; u32 on_volt; @@ -131,8 +132,6 @@ struct omap_volt_pmic_info { * * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. - * @pmic_info : pmic specific parameters which should be populted by - * the pmic drivers. * @vp_data : the register values, shifts, masks for various * vp registers * @vp_rt_data : VP data derived at runtime, not predefined @@ -143,7 +142,6 @@ struct omap_volt_pmic_info { */ struct omap_vdd_info { struct omap_volt_data *volt_data; - struct omap_volt_pmic_info *pmic_info; struct omap_vp_instance_data *vp_data; struct omap_vp_runtime_data vp_rt_data; struct dentry *debug_dir; @@ -165,13 +163,13 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); #ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_volt_pmic_info *pmic_info); + struct omap_voltdm_pmic *pmic); void omap_change_voltscale_method(struct voltagedomain *voltdm, int voltscale_method); int omap_voltage_late_init(void); #else static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_volt_pmic_info *pmic_info) + struct omap_voltdm_pmic *pmic) { return -EINVAL; } diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 88ac742..a3afcbe 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -18,7 +18,6 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) u32 vpconfig; unsigned long uvdc; char vsel; - struct omap_vdd_info *vdd = voltdm->vdd; uvdc = omap_voltage_get_nom_volt(voltdm); if (!uvdc) { @@ -27,13 +26,13 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) return; } - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { + if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { pr_warning("%s: PMIC function to convert voltage in uV to" " vsel not registered\n", __func__); return; } - vsel = vdd->pmic_info->uv_to_vsel(uvdc); + vsel = voltdm->pmic->uv_to_vsel(uvdc); vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | @@ -206,13 +205,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) curr_vsel = voltdm->read(vp->voltage); - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { + if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { pr_warning("%s: PMIC function to convert vsel to voltage" "in uV not registerd\n", __func__); return 0; } - return vdd->pmic_info->vsel_to_uv(curr_vsel); + return voltdm->pmic->vsel_to_uv(curr_vsel); } /** @@ -323,13 +322,13 @@ static int vp_volt_debug_get(void *data, u64 *val) vsel = voltdm->read(vp->voltage); - if (!vdd->pmic_info->vsel_to_uv) { + if (!voltdm->pmic->vsel_to_uv) { pr_warning("PMIC function to convert vsel to voltage" "in uV not registerd\n"); return -EINVAL; } - *val = vdd->pmic_info->vsel_to_uv(vsel); + *val = voltdm->pmic->vsel_to_uv(vsel); return 0; } -- cgit v0.10.2 From f5395480f5088a86cc8594d29b5c2f07f6995c3d Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 30 Mar 2011 16:36:30 -0700 Subject: OMAP3+: VC: make I2C config programmable with PMIC-specific settings Remove hard-coded I2C configuration in favor of settings that can be configured from PMIC-specific values. Currently only high-speed mode and the master-code value are supported, since they were the only fields currently used, but extending this is now trivial. Thanks to Nishanth Menon for reporting/fixing a sparse problem and making omap_vc_i2c_init() static, as well as finding and fixing a problem with the shift/mask of mcode. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index e467d45..6b247d1 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, + .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; @@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, + .i2c_high_speed = true, .vsel_to_uv = twl4030_vsel_to_uv, .uv_to_vsel = twl4030_uv_to_vsel, }; @@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, + .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; @@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, + .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 4ac7614..5d54563 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -208,13 +208,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) if (is_initialized) return; - /* - * Generic VC parameters init - * XXX This data should be abstracted out - */ - voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, - OMAP3_PRM_VC_I2C_CFG_OFFSET); - omap3_vfsm_init(voltdm); is_initialized = true; @@ -237,6 +230,48 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) is_initialized = true; } +/** + * omap_vc_i2c_init - initialize I2C interface to PMIC + * @voltdm: voltage domain containing VC data + * + * Use PMIC supplied seetings for I2C high-speed mode and + * master code (if set) and program the VC I2C configuration + * register. + * + * The VC I2C configuration is common to all VC channels, + * so this function only configures I2C for the first VC + * channel registers. All other VC channels will use the + * same configuration. + */ +static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) +{ + struct omap_vc_channel *vc = voltdm->vc; + static bool initialized; + static bool i2c_high_speed; + u8 mcode; + + if (initialized) { + if (voltdm->pmic->i2c_high_speed != i2c_high_speed) + pr_warn("%s: I2C config for all channels must match.", + __func__); + return; + } + + i2c_high_speed = voltdm->pmic->i2c_high_speed; + if (i2c_high_speed) + voltdm->rmw(vc->common->i2c_cfg_hsen_mask, + vc->common->i2c_cfg_hsen_mask, + vc->common->i2c_cfg_reg); + + mcode = voltdm->pmic->i2c_mcode; + if (mcode) + voltdm->rmw(vc->common->i2c_mcode_mask, + mcode << __ffs(vc->common->i2c_mcode_mask), + vc->common->i2c_cfg_reg); + + initialized = true; +} + void __init omap_vc_init_channel(struct voltagedomain *voltdm) { struct omap_vc_channel *vc = voltdm->vc; @@ -305,6 +340,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), voltdm->vfsm->voltsetup_reg); + omap_vc_i2c_init(voltdm); + if (cpu_is_omap34xx()) omap3_vc_init_channel(voltdm); else if (cpu_is_omap44xx()) diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index fd38528..c863013 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -37,6 +37,9 @@ struct voltagedomain; * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register * @cfg_channel_reg: VC channel configuration register + * @i2c_cfg_reg: I2C configuration register offset + * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register + * @i2c_mcode_mask: MCODE field mask for I2C config register * * XXX One of cmd_on_mask and cmd_on_shift are not needed * XXX VALID should probably be a shift, not a mask @@ -56,6 +59,9 @@ struct omap_vc_common { u8 cmd_ret_shift; u8 cmd_off_shift; u8 cfg_channel_reg; + u8 i2c_cfg_reg; + u8 i2c_cfg_hsen_mask; + u8 i2c_mcode_mask; }; /* omap_vc_channel.flags values */ @@ -68,6 +74,7 @@ struct omap_vc_common { * @cmd_reg_addr: command configuration register address * @setup_time: setup time (in sys_clk cycles) of regulator for this channel * @cfg_channel: current value of VC channel configuration register + * @i2c_high_speed: whether or not to use I2C high-speed mode * * @common: pointer to VC common data for this platform * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register @@ -84,6 +91,7 @@ struct omap_vc_channel { u16 cmd_reg_addr; u16 setup_time; u8 cfg_channel; + bool i2c_high_speed; /* register access data */ const struct omap_vc_common *common; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index f4449eb..95d7701 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = { .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, + .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, + .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, + .i2c_mcode_mask = OMAP3430_MCODE_MASK, }; struct omap_vc_channel omap3_vc_mpu = { diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 1610bde..148be18 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -45,6 +45,9 @@ static const struct omap_vc_common omap4_vc_common = { .cmd_ret_shift = OMAP4430_RET_SHIFT, .cmd_off_shift = OMAP4430_OFF_SHIFT, .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, + .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, + .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, + .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, }; /* VC instance data for each controllable voltage line */ diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 43ee7bf..a36d2cf 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -103,6 +103,8 @@ struct omap_volt_data { * @i2c_slave_addr: I2C slave address of PMIC * @volt_reg_addr: voltage configuration register address * @cmd_reg_addr: command (on, on-LP, ret, off) configuration register address + * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC + * @i2c_mcode: master code value for I2C high-speed preamble transmission * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. */ @@ -123,6 +125,8 @@ struct omap_voltdm_pmic { u8 vp_vddmin; u8 vp_vddmax; u8 vp_timeout_us; + bool i2c_high_speed; + u8 i2c_mcode; unsigned long (*vsel_to_uv) (const u8 vsel); u8 (*uv_to_vsel) (unsigned long uV); }; -- cgit v0.10.2 From 8abc0b58fdb89124d8278f110f523b27c666d36c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 2 Jun 2011 17:28:13 -0700 Subject: OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel On OMAP3+, all VC channels have the the same bitfield ordering for all VC channels, except the OMAP4 MPU channel. This appears to be a freak accident as all other VC channel (including OMAP5) have the standard configuration. Handle the mutant case by adding a per-channel flag to signal the deformity and handle it during VC init. Special thanks to Nishanth Menon for finding this problem and for proposing the initial solution. Cc: Nishanth Menon Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 5d54563..f53d1f5 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -19,17 +19,51 @@ #include "prm-regbits-44xx.h" #include "prm44xx.h" -/* - * Channel configuration bits, common for OMAP3 & 4 +/** + * struct omap_vc_channel_cfg - describe the cfg_channel bitfield + * @sa: bit for slave address + * @rav: bit for voltage configuration register + * @rac: bit for command configuration register + * @racen: enable bit for RAC + * @cmd: bit for command value set selection + * + * Channel configuration bits, common for OMAP3+ * OMAP3 register: PRM_VC_CH_CONF * OMAP4 register: PRM_VC_CFG_CHANNEL + * OMAP5 register: PRM_VC_SMPS__CONFIG */ -#define CFG_CHANNEL_SA BIT(0) -#define CFG_CHANNEL_RAV BIT(1) -#define CFG_CHANNEL_RAC BIT(2) -#define CFG_CHANNEL_RACEN BIT(3) -#define CFG_CHANNEL_CMD BIT(4) -#define CFG_CHANNEL_MASK 0x3f +struct omap_vc_channel_cfg { + u8 sa; + u8 rav; + u8 rac; + u8 racen; + u8 cmd; +}; + +static struct omap_vc_channel_cfg vc_default_channel_cfg = { + .sa = BIT(0), + .rav = BIT(1), + .rac = BIT(2), + .racen = BIT(3), + .cmd = BIT(4), +}; + +/* + * On OMAP3+, all VC channels have the above default bitfield + * configuration, except the OMAP4 MPU channel. This appears + * to be a freak accident as every other VC channel has the + * default configuration, thus creating a mutant channel config. + */ +static struct omap_vc_channel_cfg vc_mutant_channel_cfg = { + .sa = BIT(0), + .rav = BIT(2), + .rac = BIT(3), + .racen = BIT(4), + .cmd = BIT(1), +}; + +static struct omap_vc_channel_cfg *vc_cfg_bits; +#define CFG_CHANNEL_MASK 0x1f /** * omap_vc_config_channel - configure VC channel to PMIC mappings @@ -56,7 +90,7 @@ static int omap_vc_config_channel(struct voltagedomain *voltdm) * All others must stay at zero (see function comment above.) */ if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) - vc->cfg_channel &= CFG_CHANNEL_RACEN; + vc->cfg_channel &= vc_cfg_bits->racen; voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, vc->cfg_channel << vc->cfg_channel_sa_shift, @@ -292,6 +326,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) } vc->cfg_channel = 0; + if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT) + vc_cfg_bits = &vc_mutant_channel_cfg; + else + vc_cfg_bits = &vc_default_channel_cfg; /* get PMIC/board specific settings */ vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; @@ -303,7 +341,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) voltdm->rmw(vc->smps_sa_mask, vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), vc->common->smps_sa_reg); - vc->cfg_channel |= CFG_CHANNEL_SA; + vc->cfg_channel |= vc_cfg_bits->sa; /* * Configure the PMIC register addresses. @@ -311,13 +349,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) voltdm->rmw(vc->smps_volra_mask, vc->volt_reg_addr << __ffs(vc->smps_volra_mask), vc->common->smps_volra_reg); - vc->cfg_channel |= CFG_CHANNEL_RAV; + vc->cfg_channel |= vc_cfg_bits->rav; if (vc->cmd_reg_addr) { voltdm->rmw(vc->smps_cmdra_mask, vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), vc->common->smps_cmdra_reg); - vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; + vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; } /* Set up the on, inactive, retention and off voltage */ @@ -330,7 +368,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) (ret_vsel << vc->common->cmd_ret_shift) | (off_vsel << vc->common->cmd_off_shift)); voltdm->write(val, vc->cmdval_reg); - vc->cfg_channel |= CFG_CHANNEL_CMD; + vc->cfg_channel |= vc_cfg_bits->cmd; /* Channel configuration */ omap_vc_config_channel(voltdm); diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index c863013..7ed70e0 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -66,6 +66,7 @@ struct omap_vc_common { /* omap_vc_channel.flags values */ #define OMAP_VC_CHANNEL_DEFAULT BIT(0) +#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) /** * struct omap_vc_channel - VC per-instance data diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 148be18..0a4fc37 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -52,7 +52,7 @@ static const struct omap_vc_common omap4_vc_common = { /* VC instance data for each controllable voltage line */ struct omap_vc_channel omap4_vc_mpu = { - .flags = OMAP_VC_CHANNEL_DEFAULT, + .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, -- cgit v0.10.2 From d7b0de2b46803062148345ae6a976c1e44a457b6 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 18 Jul 2011 15:31:00 -0700 Subject: OMAP3+: VC: use last nominal voltage setting to get current_vsel Instead of reading current vsel value from the VP's voltage register, just use current nominal voltage translated into vsel via the PMIC. Doing this allows VC bypass scaling to work even without a VP configured. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index f53d1f5..21ffde8 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -138,7 +138,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, volt_data = NULL; *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); - *current_vsel = voltdm->read(vdd->vp_data->voltage); + *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); /* Setting the ON voltage to the new target voltage */ vc_cmdval = voltdm->read(vc->cmdval_reg); -- cgit v0.10.2 From b7ea803e55769768d1eff3b32e4f99837fa6ddb5 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 4 Apr 2011 15:25:07 -0700 Subject: OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames - move VP instance struct from vdd_info into struct voltage domain - remove _data suffix from structure name - rename vp_ prefix from vp_common field: accesses are now vp->common - move vp_enabled bool from vdd_info into VP instance - remove remaining references to omap_vdd_info No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 21ffde8..e872a03 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -107,11 +107,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, struct omap_vc_channel *vc = voltdm->vc; struct omap_vdd_info *vdd = voltdm->vdd; struct omap_volt_data *volt_data; - const struct omap_vp_common_data *vp_common; u32 vc_cmdval, vp_errgain_val; - vp_common = vdd->vp_data->vp_common; - /* Check if sufficient pmic info is available for this vdd */ if (!voltdm->pmic) { pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", @@ -148,12 +145,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, /* Setting vp errorgain based on the voltage */ if (volt_data) { - vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); + vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; + vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - vp_common->vpconfig_errorgain_shift; - voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); + voltdm->vp->common->vpconfig_errorgain_shift; + voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); } return 0; diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 94f7fc4..c22b53c 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -81,11 +81,11 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) /* Generic voltage parameters */ vdd->volt_scale = omap_vp_forceupdate_scale; - vdd->vp_enabled = false; + voltdm->vp->enabled = false; vdd->vp_rt_data.vpconfig_erroroffset = (voltdm->pmic->vp_erroroffset << - vdd->vp_data->vp_common->vpconfig_erroroffset_shift); + voltdm->vp->common->vpconfig_erroroffset_shift); timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; vdd->vp_rt_data.vlimitto_timeout = timeout_val; diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index a36d2cf..1ea7354 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -55,6 +55,7 @@ struct omap_vfsm_instance { * @node: list_head linking all voltage domains * @pwrdm_list: list_head linking all powerdomains in this voltagedomain * @vc: pointer to VC channel associated with this voltagedomain + * @vp: pointer to VP associated with this voltagedomain * @read: read a VC/VP register * @write: write a VC/VP register * @read: read-modify-write a VC/VP register @@ -67,6 +68,7 @@ struct voltagedomain { struct list_head pwrdm_list; struct omap_vc_channel *vc; const struct omap_vfsm_instance *vfsm; + struct omap_vp_instance *vp; struct omap_voltdm_pmic *pmic; /* VC/VP register access functions: SoC specific */ @@ -136,21 +138,16 @@ struct omap_voltdm_pmic { * * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. - * @vp_data : the register values, shifts, masks for various - * vp registers * @vp_rt_data : VP data derived at runtime, not predefined * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. - * @vp_enabled : flag to keep track of whether vp is enabled or not * @volt_scale : API to scale the voltage of the vdd. */ struct omap_vdd_info { struct omap_volt_data *volt_data; - struct omap_vp_instance_data *vp_data; struct omap_vp_runtime_data vp_rt_data; struct dentry *debug_dir; u32 curr_volt; - bool vp_enabled; int (*volt_scale) (struct voltagedomain *voltdm, unsigned long target_volt); diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index ce5a797..35117fc 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -36,18 +36,14 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, }; -static struct omap_vdd_info omap3_vdd1_info = { - .vp_data = &omap3_vp1_data, -}; +static struct omap_vdd_info omap3_vdd1_info; static const struct omap_vfsm_instance omap3_vdd2_vfsm = { .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, }; -static struct omap_vdd_info omap3_vdd2_info = { - .vp_data = &omap3_vp2_data, -}; +static struct omap_vdd_info omap3_vdd2_info; static struct voltagedomain omap3_voltdm_mpu = { .name = "mpu_iva", @@ -57,6 +53,7 @@ static struct voltagedomain omap3_voltdm_mpu = { .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_mpu, .vfsm = &omap3_vdd1_vfsm, + .vp = &omap3_vp_mpu, .vdd = &omap3_vdd1_info, }; @@ -68,6 +65,7 @@ static struct voltagedomain omap3_voltdm_core = { .rmw = omap3_prm_vcvp_rmw, .vc = &omap3_vc_core, .vfsm = &omap3_vdd2_vfsm, + .vp = &omap3_vp_core, .vdd = &omap3_vdd2_info, }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index dd4bd22..3e7cb4e 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -36,25 +36,19 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_mpu_info = { - .vp_data = &omap4_vp_mpu_data, -}; +static struct omap_vdd_info omap4_vdd_mpu_info; static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_iva_info = { - .vp_data = &omap4_vp_iva_data, -}; +static struct omap_vdd_info omap4_vdd_iva_info; static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_core_info = { - .vp_data = &omap4_vp_core_data, -}; +static struct omap_vdd_info omap4_vdd_core_info; static struct voltagedomain omap4_voltdm_mpu = { .name = "mpu", @@ -64,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = { .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_mpu, .vfsm = &omap4_vdd_mpu_vfsm, + .vp = &omap4_vp_mpu, .vdd = &omap4_vdd_mpu_info, }; @@ -75,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = { .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_iva, .vfsm = &omap4_vdd_iva_vfsm, + .vp = &omap4_vp_iva, .vdd = &omap4_vdd_iva_info, }; @@ -86,6 +82,7 @@ static struct voltagedomain omap4_voltdm_core = { .rmw = omap4_prm_vcvp_rmw, .vc = &omap4_vc_core, .vfsm = &omap4_vdd_core_vfsm, + .vp = &omap4_vp_core, .vdd = &omap4_vdd_core_info, }; diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index a3afcbe..53d6018 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -14,7 +14,7 @@ static void __init vp_debugfs_init(struct voltagedomain *voltdm); static void vp_latch_vsel(struct voltagedomain *voltdm) { - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vp_instance *vp = voltdm->vp; u32 vpconfig; unsigned long uvdc; char vsel; @@ -35,14 +35,14 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) vsel = voltdm->pmic->uv_to_vsel(uvdc); vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | - vp->vp_common->vpconfig_initvdd); - vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; + vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | + vp->common->vpconfig_initvdd); + vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ - voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), + voltdm->write((vpconfig | vp->common->vpconfig_initvdd), vp->vpconfig); /* Clear initVDD copy trigger bit */ @@ -52,7 +52,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) /* Generic voltage init functions */ void __init omap_vp_init(struct voltagedomain *voltdm) { - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vp_instance *vp = voltdm->vp; struct omap_vdd_info *vdd = voltdm->vdd; u32 vp_val; @@ -64,28 +64,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) vp_val = vdd->vp_rt_data.vpconfig_erroroffset | (vdd->vp_rt_data.vpconfig_errorgain << - vp->vp_common->vpconfig_errorgain_shift) | - vp->vp_common->vpconfig_timeouten; + vp->common->vpconfig_errorgain_shift) | + vp->common->vpconfig_timeouten; voltdm->write(vp_val, vp->vpconfig); vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vp->vp_common->vstepmin_smpswaittimemin_shift) | + vp->common->vstepmin_smpswaittimemin_shift) | (vdd->vp_rt_data.vstepmin_stepmin << - vp->vp_common->vstepmin_stepmin_shift)); + vp->common->vstepmin_stepmin_shift)); voltdm->write(vp_val, vp->vstepmin); vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vp->vp_common->vstepmax_smpswaittimemax_shift) | + vp->common->vstepmax_smpswaittimemax_shift) | (vdd->vp_rt_data.vstepmax_stepmax << - vp->vp_common->vstepmax_stepmax_shift)); + vp->common->vstepmax_stepmax_shift)); voltdm->write(vp_val, vp->vstepmax); vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vp->vp_common->vlimitto_vddmax_shift) | + vp->common->vlimitto_vddmax_shift) | (vdd->vp_rt_data.vlimitto_vddmin << - vp->vp_common->vlimitto_vddmin_shift) | + vp->common->vlimitto_vddmin_shift) | (vdd->vp_rt_data.vlimitto_timeout << - vp->vp_common->vlimitto_timeout_shift)); + vp->common->vlimitto_timeout_shift)); voltdm->write(vp_val, vp->vlimitto); vp_debugfs_init(voltdm); @@ -95,7 +95,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, unsigned long target_volt) { - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vp_instance *vp = voltdm->vp; u32 vpconfig; u8 target_vsel, current_vsel; int ret, timeout = 0; @@ -109,8 +109,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, * is <3us */ while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vp->vp_common->ops->clear_txdone(vp->id); - if (!vp->vp_common->ops->check_txdone(vp->id)) + vp->common->ops->clear_txdone(vp->id); + if (!vp->common->ops->check_txdone(vp->id)) break; udelay(1); } @@ -122,19 +122,19 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, /* Configure for VP-Force Update */ vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->vp_common->vpconfig_initvdd | - vp->vp_common->vpconfig_forceupdate | - vp->vp_common->vpconfig_initvoltage_mask); + vpconfig &= ~(vp->common->vpconfig_initvdd | + vp->common->vpconfig_forceupdate | + vp->common->vpconfig_initvoltage_mask); vpconfig |= ((target_vsel << - vp->vp_common->vpconfig_initvoltage_shift)); + vp->common->vpconfig_initvoltage_shift)); voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ - vpconfig |= vp->vp_common->vpconfig_initvdd; + vpconfig |= vp->common->vpconfig_initvdd; voltdm->write(vpconfig, vp->vpconfig); /* Force update of voltage */ - vpconfig |= vp->vp_common->vpconfig_forceupdate; + vpconfig |= vp->common->vpconfig_forceupdate; voltdm->write(vpconfig, vp->vpconfig); /* @@ -142,7 +142,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, * Depends on SMPSWAITTIMEMIN/MAX and voltage change */ timeout = 0; - omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), + omap_test_timeout(vp->common->ops->check_txdone(vp->id), VP_TRANXDONE_TIMEOUT, timeout); if (timeout >= VP_TRANXDONE_TIMEOUT) pr_err("%s: vdd_%s TRANXDONE timeout exceeded." @@ -157,8 +157,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, */ timeout = 0; while (timeout++ < VP_TRANXDONE_TIMEOUT) { - vp->vp_common->ops->clear_txdone(vp->id); - if (!vp->vp_common->ops->check_txdone(vp->id)) + vp->common->ops->clear_txdone(vp->id); + if (!vp->common->ops->check_txdone(vp->id)) break; udelay(1); } @@ -170,10 +170,10 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, vpconfig = voltdm->read(vp->vpconfig); /* Clear initVDD copy trigger bit */ - vpconfig &= ~vp->vp_common->vpconfig_initvdd; + vpconfig &= ~vp->common->vpconfig_initvdd; voltdm->write(vpconfig, vp->vpconfig); /* Clear force bit */ - vpconfig &= ~vp->vp_common->vpconfig_forceupdate; + vpconfig &= ~vp->common->vpconfig_forceupdate; voltdm->write(vpconfig, vp->vpconfig); return 0; @@ -187,8 +187,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, */ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) { - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; - struct omap_vdd_info *vdd; + struct omap_vp_instance *vp = voltdm->vp; u8 curr_vsel; if (!voltdm || IS_ERR(voltdm)) { @@ -196,7 +195,6 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) return 0; } - vdd = voltdm->vdd; if (!voltdm->read) { pr_err("%s: No read API for reading vdd_%s regs\n", __func__, voltdm->name); @@ -223,8 +221,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) */ void omap_vp_enable(struct voltagedomain *voltdm) { - struct omap_vp_instance_data *vp; - struct omap_vdd_info *vdd; + struct omap_vp_instance *vp; u32 vpconfig; if (!voltdm || IS_ERR(voltdm)) { @@ -232,8 +229,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) return; } - vdd = voltdm->vdd; - vp = voltdm->vdd->vp_data; + vp = voltdm->vp; if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); @@ -241,16 +237,16 @@ void omap_vp_enable(struct voltagedomain *voltdm) } /* If VP is already enabled, do nothing. Return */ - if (vdd->vp_enabled) + if (vp->enabled) return; vp_latch_vsel(voltdm); /* Enable VP */ vpconfig = voltdm->read(vp->vpconfig); - vpconfig |= vp->vp_common->vpconfig_vpenable; + vpconfig |= vp->common->vpconfig_vpenable; voltdm->write(vpconfig, vp->vpconfig); - vdd->vp_enabled = true; + vp->enabled = true; } /** @@ -262,8 +258,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) */ void omap_vp_disable(struct voltagedomain *voltdm) { - struct omap_vp_instance_data *vp; - struct omap_vdd_info *vdd; + struct omap_vp_instance *vp; u32 vpconfig; int timeout; @@ -272,8 +267,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) return; } - vdd = voltdm->vdd; - vp = voltdm->vdd->vp_data; + vp = voltdm->vp; if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", __func__, voltdm->name); @@ -281,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) } /* If VP is already disabled, do nothing. Return */ - if (!vdd->vp_enabled) { + if (!vp->enabled) { pr_warning("%s: Trying to disable VP for vdd_%s when" "it is already disabled\n", __func__, voltdm->name); return; @@ -289,7 +283,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) /* Disable VP */ vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~vp->vp_common->vpconfig_vpenable; + vpconfig &= ~vp->common->vpconfig_vpenable; voltdm->write(vpconfig, vp->vpconfig); /* @@ -302,7 +296,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) pr_warning("%s: vdd_%s idle timedout\n", __func__, voltdm->name); - vdd->vp_enabled = false; + vp->enabled = false; return; } @@ -311,7 +305,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) static int vp_volt_debug_get(void *data, u64 *val) { struct voltagedomain *voltdm = (struct voltagedomain *)data; - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; + struct omap_vp_instance *vp = voltdm->vp; struct omap_vdd_info *vdd = voltdm->vdd; u8 vsel; diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 382fef1..b50ca91 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -45,7 +45,7 @@ struct omap_vp_ops { }; /** - * struct omap_vp_common_data - register data common to all VDDs + * struct omap_vp_common - register data common to all VDDs * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg @@ -67,7 +67,7 @@ struct omap_vp_ops { * bitfield - remove one * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! */ -struct omap_vp_common_data { +struct omap_vp_common { u32 vpconfig_errorgain_mask; u32 vpconfig_initvoltage_mask; u32 vpconfig_timeouten; @@ -89,19 +89,20 @@ struct omap_vp_common_data { }; /** - * struct omap_vp_instance_data - VP register offsets (per-VDD) - * @vp_common: pointer to struct omap_vp_common_data * for this SoC + * struct omap_vp_instance - VP register offsets (per-VDD) + * @common: pointer to struct omap_vp_common * for this SoC * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start * @id: Unique identifier for VP instance. + * @enabled: flag to keep track of whether vp is enabled or not * * XXX vp_common is probably not needed since it is per-SoC */ -struct omap_vp_instance_data { - const struct omap_vp_common_data *vp_common; +struct omap_vp_instance { + const struct omap_vp_common *common; u8 vpconfig; u8 vstepmin; u8 vstepmax; @@ -109,6 +110,7 @@ struct omap_vp_instance_data { u8 vstatus; u8 voltage; u8 id; + bool enabled; }; /** @@ -140,12 +142,12 @@ struct omap_vp_runtime_data { u8 vlimitto_vddmax; }; -extern struct omap_vp_instance_data omap3_vp1_data; -extern struct omap_vp_instance_data omap3_vp2_data; +extern struct omap_vp_instance omap3_vp_mpu; +extern struct omap_vp_instance omap3_vp_core; -extern struct omap_vp_instance_data omap4_vp_mpu_data; -extern struct omap_vp_instance_data omap4_vp_iva_data; -extern struct omap_vp_instance_data omap4_vp_core_data; +extern struct omap_vp_instance omap4_vp_mpu; +extern struct omap_vp_instance omap4_vp_iva; +extern struct omap_vp_instance omap4_vp_core; void omap_vp_init(struct voltagedomain *voltdm); void omap_vp_enable(struct voltagedomain *voltdm); diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index b01d333..79c3df9 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -36,7 +36,7 @@ static const struct omap_vp_ops omap3_vp_ops = { * VP data common to 34xx/36xx chips * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. */ -static const struct omap_vp_common_data omap3_vp_common = { +static const struct omap_vp_common omap3_vp_common = { .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, @@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap3_vp_common = { .ops = &omap3_vp_ops, }; -struct omap_vp_instance_data omap3_vp1_data = { +struct omap_vp_instance omap3_vp_mpu = { .id = OMAP3_VP_VDD_MPU_ID, - .vp_common = &omap3_vp_common, + .common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, @@ -67,9 +67,9 @@ struct omap_vp_instance_data omap3_vp1_data = { .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, }; -struct omap_vp_instance_data omap3_vp2_data = { +struct omap_vp_instance omap3_vp_core = { .id = OMAP3_VP_VDD_CORE_ID, - .vp_common = &omap3_vp_common, + .common = &omap3_vp_common, .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 9704c7b..8f75cd9 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -36,7 +36,7 @@ static const struct omap_vp_ops omap4_vp_ops = { * VP data common to 44xx chips * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. */ -static const struct omap_vp_common_data omap4_vp_common = { +static const struct omap_vp_common omap4_vp_common = { .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, @@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap4_vp_common = { .ops = &omap4_vp_ops, }; -struct omap_vp_instance_data omap4_vp_mpu_data = { +struct omap_vp_instance omap4_vp_mpu = { .id = OMAP4_VP_VDD_MPU_ID, - .vp_common = &omap4_vp_common, + .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET, @@ -67,9 +67,9 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, }; -struct omap_vp_instance_data omap4_vp_iva_data = { +struct omap_vp_instance omap4_vp_iva = { .id = OMAP4_VP_VDD_IVA_ID, - .vp_common = &omap4_vp_common, + .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET, @@ -78,9 +78,9 @@ struct omap_vp_instance_data omap4_vp_iva_data = { .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, }; -struct omap_vp_instance_data omap4_vp_core_data = { +struct omap_vp_instance omap4_vp_core = { .id = OMAP4_VP_VDD_CORE_ID, - .vp_common = &omap4_vp_common, + .common = &omap4_vp_common, .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET, -- cgit v0.10.2 From 633ef8b7475a224b6be662d7c698cd705157064f Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 5 Apr 2011 14:39:11 -0700 Subject: OMAP3+: voltage: remove unneeded debugfs interface Remove read-only debugfs interface to VP values. Most of the values are init-time only and never change. Current voltage value should be retreived from the (eventual) regulator framework interface to the voltage domain. Fixes to original version provided by Nishanth Menon Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 34c01a7..bb606c9 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -62,6 +62,7 @@ static LIST_HEAD(sr_list); static struct omap_sr_class_data *sr_class; static struct omap_sr_pmic_data *sr_pmic_data; +static struct dentry *sr_dbg_dir; static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) { @@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device *pdev) struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); struct omap_sr_data *pdata = pdev->dev.platform_data; struct resource *mem, *irq; - struct dentry *vdd_dbg_dir, *nvalue_dir; + struct dentry *nvalue_dir; struct omap_volt_data *volt_data; int i, ret = 0; + char *name; if (!sr_info) { dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", @@ -899,18 +901,25 @@ static int __init omap_sr_probe(struct platform_device *pdev) } dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); + if (!sr_dbg_dir) { + sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); + if (!sr_dbg_dir) { + ret = PTR_ERR(sr_dbg_dir); + pr_err("%s:sr debugfs dir creation failed(%d)\n", + __func__, ret); + goto err_iounmap; + } + } - /* - * If the voltage domain debugfs directory is not created, do - * not try to create rest of the debugfs entries. - */ - vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); - if (!vdd_dbg_dir) { - ret = -EINVAL; + name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); + if (!name) { + dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", + __func__); + ret = -ENOMEM; goto err_iounmap; } - - sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); + sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); + kfree(name); if (IS_ERR(sr_info->dbg_dir)) { dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", __func__); diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index c22b53c..eaa5f93 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -43,9 +43,6 @@ static LIST_HEAD(voltdm_list); -#define VOLTAGE_DIR_SIZE 16 -static struct dentry *voltage_dir; - static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { char *sys_ck_name; @@ -102,51 +99,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) return 0; } -static int nom_volt_debug_get(void *data, u64 *val) -{ - struct voltagedomain *voltdm = (struct voltagedomain *)data; - - if (!voltdm) { - pr_warning("Wrong paramater passed\n"); - return -EINVAL; - } - - *val = omap_voltage_get_nom_volt(voltdm); - - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, - "%llu\n"); -static void __init vdd_debugfs_init(struct voltagedomain *voltdm) -{ - char *name; - struct omap_vdd_info *vdd = voltdm->vdd; - - name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); - if (!name) { - pr_warning("%s: Unable to allocate memory for debugfs" - " directory name for vdd_%s", - __func__, voltdm->name); - return; - } - strcpy(name, "vdd_"); - strcat(name, voltdm->name); - - vdd->debug_dir = debugfs_create_dir(name, voltage_dir); - kfree(name); - if (IS_ERR(vdd->debug_dir)) { - pr_warning("%s: Unable to create debugfs directory for" - " vdd_%s\n", __func__, voltdm->name); - vdd->debug_dir = NULL; - return; - } - - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, - vdd->debug_dir, (void *) voltdm, - &nom_volt_debug_fops); -} - static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) { int ret = -EINVAL; @@ -342,31 +294,6 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, } /** - * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory - * corresponding to a voltage domain. - * - * @voltdm: pointer to the VDD whose debug directory is required. - * - * This API returns pointer to the debugfs directory corresponding - * to the voltage domain. Should be used by drivers requiring to - * add any debug entry for a particular voltage domain. Returns NULL - * in case of error. - */ -struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return NULL; - } - - vdd = voltdm->vdd; - - return vdd->debug_dir; -} - -/** * omap_change_voltscale_method() - API to change the voltage scaling method. * @voltdm: pointer to the VDD whose voltage scaling method * has to be changed. @@ -418,10 +345,6 @@ int __init omap_voltage_late_init(void) return -EINVAL; } - voltage_dir = debugfs_create_dir("voltage", NULL); - if (IS_ERR(voltage_dir)) - pr_err("%s: Unable to create voltage debugfs main dir\n", - __func__); list_for_each_entry(voltdm, &voltdm_list, node) { if (!voltdm->scalable) continue; @@ -434,7 +357,6 @@ int __init omap_voltage_late_init(void) if (voltdm->vdd) { if (omap_vdd_data_configure(voltdm)) continue; - vdd_debugfs_init(voltdm); omap_vp_init(voltdm); } } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 1ea7354..eafcc92 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -139,14 +139,12 @@ struct omap_voltdm_pmic { * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. * @vp_rt_data : VP data derived at runtime, not predefined - * @debug_dir : debug directory for this voltage domain. * @curr_volt : current voltage for this vdd. * @volt_scale : API to scale the voltage of the vdd. */ struct omap_vdd_info { struct omap_volt_data *volt_data; struct omap_vp_runtime_data vp_rt_data; - struct dentry *debug_dir; u32 curr_volt; int (*volt_scale) (struct voltagedomain *voltdm, @@ -161,7 +159,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); -struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); #ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_voltdm_pmic *pmic); diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 53d6018..c9a315f 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -1,6 +1,5 @@ #include #include -#include #include @@ -10,8 +9,6 @@ #include "prm-regbits-44xx.h" #include "prm44xx.h" -static void __init vp_debugfs_init(struct voltagedomain *voltdm); - static void vp_latch_vsel(struct voltagedomain *voltdm) { struct omap_vp_instance *vp = voltdm->vp; @@ -87,8 +84,6 @@ void __init omap_vp_init(struct voltagedomain *voltdm) (vdd->vp_rt_data.vlimitto_timeout << vp->common->vlimitto_timeout_shift)); voltdm->write(vp_val, vp->vlimitto); - - vp_debugfs_init(voltdm); } /* VP force update method of voltage scaling */ @@ -300,61 +295,3 @@ void omap_vp_disable(struct voltagedomain *voltdm) return; } - -/* Voltage debugfs support */ -static int vp_volt_debug_get(void *data, u64 *val) -{ - struct voltagedomain *voltdm = (struct voltagedomain *)data; - struct omap_vp_instance *vp = voltdm->vp; - struct omap_vdd_info *vdd = voltdm->vdd; - u8 vsel; - - if (!vdd) { - pr_warning("Wrong paramater passed\n"); - return -EINVAL; - } - - vsel = voltdm->read(vp->voltage); - - if (!voltdm->pmic->vsel_to_uv) { - pr_warning("PMIC function to convert vsel to voltage" - "in uV not registerd\n"); - return -EINVAL; - } - - *val = voltdm->pmic->vsel_to_uv(vsel); - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); - -static void __init vp_debugfs_init(struct voltagedomain *voltdm) -{ - struct omap_vdd_info *vdd = voltdm->vdd; - struct dentry *debug_dir; - - debug_dir = debugfs_create_dir("vp", vdd->debug_dir); - if (IS_ERR(debug_dir)) - pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); - - (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vpconfig_errorgain)); - (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, - debug_dir, - &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); - (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vstepmin_stepmin)); - (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, - debug_dir, - &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); - (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vstepmax_stepmax)); - (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vlimitto_vddmax)); - (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vlimitto_vddmin)); - (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, - &(vdd->vp_rt_data.vlimitto_timeout)); - (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, - (void *) voltdm, &vp_volt_debug_fops); -} -- cgit v0.10.2 From 0ec3041e91cf365a76c81b224e85d3c2574fec23 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 4 Apr 2011 16:02:28 -0700 Subject: OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask) In struct omap_vp_common, the shift value can be derived from the mask value by using __ffs(), so remove the shift value for the various VPCONFIG bitfields, and use __ffs() in the code for the shift value. While here, rename field names in kerneldoc comment to match actual field names in structure. Also, cleanup indendentaion for other VP register accesses in omap_vp_init(). No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index e872a03..7b87ea1 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -149,7 +149,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - voltdm->vp->common->vpconfig_errorgain_shift; + __ffs(voltdm->vp->common->vpconfig_errorgain_mask); voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); } diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index eaa5f93..5b16fd1 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -82,7 +82,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) vdd->vp_rt_data.vpconfig_erroroffset = (voltdm->pmic->vp_erroroffset << - voltdm->vp->common->vpconfig_erroroffset_shift); + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; vdd->vp_rt_data.vlimitto_timeout = timeout_val; diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index c9a315f..297d094 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -34,8 +34,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | vp->common->vpconfig_initvdd); - vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; - + vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ @@ -61,28 +60,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) vp_val = vdd->vp_rt_data.vpconfig_erroroffset | (vdd->vp_rt_data.vpconfig_errorgain << - vp->common->vpconfig_errorgain_shift) | + __ffs(vp->common->vpconfig_errorgain_mask)) | vp->common->vpconfig_timeouten; voltdm->write(vp_val, vp->vpconfig); vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vp->common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << - vp->common->vstepmin_stepmin_shift)); + vp->common->vstepmin_smpswaittimemin_shift) | + (vdd->vp_rt_data.vstepmin_stepmin << + vp->common->vstepmin_stepmin_shift)); voltdm->write(vp_val, vp->vstepmin); vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vp->common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << - vp->common->vstepmax_stepmax_shift)); + vp->common->vstepmax_smpswaittimemax_shift) | + (vdd->vp_rt_data.vstepmax_stepmax << + vp->common->vstepmax_stepmax_shift)); voltdm->write(vp_val, vp->vstepmax); vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vp->common->vlimitto_vddmax_shift) | - (vdd->vp_rt_data.vlimitto_vddmin << - vp->common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << - vp->common->vlimitto_timeout_shift)); + vp->common->vlimitto_vddmax_shift) | + (vdd->vp_rt_data.vlimitto_vddmin << + vp->common->vlimitto_vddmin_shift) | + (vdd->vp_rt_data.vlimitto_timeout << + vp->common->vlimitto_timeout_shift)); voltdm->write(vp_val, vp->vlimitto); } @@ -121,7 +120,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, vp->common->vpconfig_forceupdate | vp->common->vpconfig_initvoltage_mask); vpconfig |= ((target_vsel << - vp->common->vpconfig_initvoltage_shift)); + __ffs(vp->common->vpconfig_initvoltage_mask))); voltdm->write(vpconfig, vp->vpconfig); /* Trigger initVDD value copy to voltage processor */ diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index b50ca91..1cfde5a 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -46,37 +46,32 @@ struct omap_vp_ops { /** * struct omap_vp_common - register data common to all VDDs + * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg - * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg + * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg - * @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg - * @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg - * @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg - * @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg - * - * XXX It it not necessary to have both a mask and a shift for the same - * bitfield - remove one - * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! + * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg + * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg + * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg + * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg + * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg + * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg + * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg */ struct omap_vp_common { + u32 vpconfig_erroroffset_mask; u32 vpconfig_errorgain_mask; u32 vpconfig_initvoltage_mask; - u32 vpconfig_timeouten; - u32 vpconfig_initvdd; - u32 vpconfig_forceupdate; - u32 vpconfig_vpenable; - u8 vpconfig_erroroffset_shift; - u8 vpconfig_errorgain_shift; - u8 vpconfig_initvoltage_shift; + u8 vpconfig_timeouten; + u8 vpconfig_initvdd; + u8 vpconfig_forceupdate; + u8 vpconfig_vpenable; u8 vstepmin_stepmin_shift; u8 vstepmin_smpswaittimemin_shift; u8 vstepmax_stepmax_shift; @@ -128,7 +123,6 @@ struct omap_vp_instance { * XXX Is this structure really needed? Why not just program the * device directly? They are in PRM space, therefore in the WKUP * powerdomain, so register contents should not be lost in off-mode. - * XXX Some of these fields are incorrectly named, e.g., vstep* */ struct omap_vp_runtime_data { u32 vpconfig_erroroffset; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index 79c3df9..d429c44 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -37,10 +37,8 @@ static const struct omap_vp_ops omap3_vp_ops = { * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. */ static const struct omap_vp_common omap3_vp_common = { - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, + .vpconfig_erroroffset_mask = OMAP3430_ERROROFFSET_MASK, .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, - .vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT, .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK, .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK, .vpconfig_initvdd = OMAP3430_INITVDD_MASK, diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 8f75cd9..0daf2a4 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -37,10 +37,8 @@ static const struct omap_vp_ops omap4_vp_ops = { * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. */ static const struct omap_vp_common omap4_vp_common = { - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, + .vpconfig_erroroffset_mask = OMAP4430_ERROROFFSET_MASK, .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, - .vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT, .vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK, .vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK, .vpconfig_initvdd = OMAP4430_INITVDD_MASK, -- cgit v0.10.2 From 0e2f3d9cb8f3c6464ac24c489fa713699c037dd4 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 4 Apr 2011 17:22:28 -0700 Subject: OMAP3+: VP: move SoC-specific sys clock rate retreival late init Add sys clock name and rate to struct voltage domain. SoC specific voltagedomain init code initializes sys clock name. After clock framework is initialized, voltage late init will then use use the sys_clk rate to calculate the various timing that depend on that rate. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 5b16fd1..533ea38 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -21,10 +21,10 @@ #include #include -#include #include #include #include +#include #include @@ -45,36 +45,12 @@ static LIST_HEAD(voltdm_list); static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { - char *sys_ck_name; - struct clk *sys_ck; - u32 sys_clk_speed, timeout_val, waittime; struct omap_vdd_info *vdd = voltdm->vdd; + u32 sys_clk_rate, timeout_val, waittime; - /* - * XXX Clockfw should handle this, or this should be in a - * struct record - */ - if (cpu_is_omap24xx() || cpu_is_omap34xx()) - sys_ck_name = "sys_ck"; - else if (cpu_is_omap44xx()) - sys_ck_name = "sys_clkin_ck"; - else - return -EINVAL; - - /* - * Sys clk rate is require to calculate vp timeout value and - * smpswaittimemin and smpswaittimemax. - */ - sys_ck = clk_get(NULL, sys_ck_name); - if (IS_ERR(sys_ck)) { - pr_warning("%s: Could not get the sys clk to calculate" - "various vdd_%s params\n", __func__, voltdm->name); - return -EINVAL; - } - sys_clk_speed = clk_get_rate(sys_ck); - clk_put(sys_ck); /* Divide to avoid overflow */ - sys_clk_speed /= 1000; + sys_clk_rate = voltdm->sys_clk.rate / 1000; + WARN_ON(!sys_clk_rate); /* Generic voltage parameters */ vdd->volt_scale = omap_vp_forceupdate_scale; @@ -84,13 +60,13 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) (voltdm->pmic->vp_erroroffset << __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; + timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; vdd->vp_rt_data.vlimitto_timeout = timeout_val; vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * - sys_clk_speed) / 1000; + sys_clk_rate) / 1000; vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; @@ -346,9 +322,20 @@ int __init omap_voltage_late_init(void) } list_for_each_entry(voltdm, &voltdm_list, node) { + struct clk *sys_ck; + if (!voltdm->scalable) continue; + sys_ck = clk_get(NULL, voltdm->sys_clk.name); + if (IS_ERR(sys_ck)) { + pr_warning("%s: Could not get sys clk.\n", __func__); + return -EINVAL; + } + voltdm->sys_clk.rate = clk_get_rate(sys_ck); + WARN_ON(!voltdm->sys_clk.rate); + clk_put(sys_ck); + if (voltdm->vc) { voltdm->vdd->volt_scale = omap_vc_bypass_scale; omap_vc_init_channel(voltdm); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index eafcc92..3e16329 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -59,6 +59,7 @@ struct omap_vfsm_instance { * @read: read a VC/VP register * @write: write a VC/VP register * @read: read-modify-write a VC/VP register + * @sys_clk: system clock name/frequency, used for various timing calculations * @vdd: to be removed */ struct voltagedomain { @@ -76,6 +77,11 @@ struct voltagedomain { void (*write) (u32 val, u8 offset); u32 (*rmw)(u32 mask, u32 bits, u8 offset); + union { + const char *name; + u32 rate; + } sys_clk; + struct omap_vdd_info *vdd; }; diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 35117fc..7bbec74 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -80,8 +80,13 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = { NULL, }; +static const char *sys_clk_name __initdata = "sys_ck"; + void __init omap3xxx_voltagedomains_init(void) { + struct voltagedomain *voltdm; + int i; + /* * XXX Will depend on the process, validation, and binning * for the currently-running IC @@ -94,5 +99,8 @@ void __init omap3xxx_voltagedomains_init(void) omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; } + for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) + voltdm->sys_clk.name = sys_clk_name; + voltdm_init(voltagedomains_omap3); }; diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 3e7cb4e..9c20fbb 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -98,8 +98,13 @@ static struct voltagedomain *voltagedomains_omap4[] __initdata = { NULL, }; +static const char *sys_clk_name __initdata = "sys_clkin_ck"; + void __init omap44xx_voltagedomains_init(void) { + struct voltagedomain *voltdm; + int i; + /* * XXX Will depend on the process, validation, and binning * for the currently-running IC @@ -108,5 +113,8 @@ void __init omap44xx_voltagedomains_init(void) omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; + for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) + voltdm->sys_clk.name = sys_clk_name; + voltdm_init(voltagedomains_omap4); }; -- cgit v0.10.2 From 6f56727383ca3233f40af5e792a08bf07b18f5fd Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 14 Jul 2011 11:10:27 -0700 Subject: OMAP3+: VP: move timing calculation/config into VP init Move VP timing calcluation (based on sys clock) and register programming into VP init. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 533ea38..4a15668 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list); static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { struct omap_vdd_info *vdd = voltdm->vdd; - u32 sys_clk_rate, timeout_val, waittime; - - /* Divide to avoid overflow */ - sys_clk_rate = voltdm->sys_clk.rate / 1000; - WARN_ON(!sys_clk_rate); /* Generic voltage parameters */ vdd->volt_scale = omap_vp_forceupdate_scale; - voltdm->vp->enabled = false; - - vdd->vp_rt_data.vpconfig_erroroffset = - (voltdm->pmic->vp_erroroffset << - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); - - timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; - - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * - sys_clk_rate) / 1000; - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; - vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; return 0; } diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 297d094..ea61a47 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) { struct omap_vp_instance *vp = voltdm->vp; struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val; + u32 vp_val, sys_clk_rate, timeout_val, waittime; if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", @@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain *voltdm) return; } + vp->enabled = false; + + /* Divide to avoid overflow */ + sys_clk_rate = voltdm->sys_clk.rate / 1000; + + vdd->vp_rt_data.vpconfig_erroroffset = + (voltdm->pmic->vp_erroroffset << + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); + + timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; + vdd->vp_rt_data.vlimitto_timeout = timeout_val; + vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; + vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; + + waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * + sys_clk_rate) / 1000; + vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; + vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; + vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; + vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; + vp_val = vdd->vp_rt_data.vpconfig_erroroffset | (vdd->vp_rt_data.vpconfig_errorgain << __ffs(vp->common->vpconfig_errorgain_mask)) | -- cgit v0.10.2 From 76ea7424f80350884b4d70ae54cfa51f7f9b2a48 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 5 Apr 2011 15:15:31 -0700 Subject: OMAP3+: VP: create VP helper function for updating error gain Create new helper function in VP layer for updating VP error gain. Currently used during pre-scale for VP force update and VC bypass. TODO: determine if this can be removed from the pre-scale path and moved to VP enable path. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 7b87ea1..f8bdd51 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -105,9 +105,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, u8 *target_vsel, u8 *current_vsel) { struct omap_vc_channel *vc = voltdm->vc; - struct omap_vdd_info *vdd = voltdm->vdd; - struct omap_volt_data *volt_data; - u32 vc_cmdval, vp_errgain_val; + u32 vc_cmdval; /* Check if sufficient pmic info is available for this vdd */ if (!voltdm->pmic) { @@ -129,11 +127,6 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, return -EINVAL; } - /* Get volt_data corresponding to target_volt */ - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); - if (IS_ERR(volt_data)) - volt_data = NULL; - *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); @@ -143,15 +136,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); voltdm->write(vc_cmdval, vc->cmdval_reg); - /* Setting vp errorgain based on the voltage */ - if (volt_data) { - vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; - vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << - __ffs(voltdm->vp->common->vpconfig_errorgain_mask); - voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); - } + omap_vp_update_errorgain(voltdm, target_volt); return 0; } diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index ea61a47..f68a6db 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -106,6 +106,25 @@ void __init omap_vp_init(struct voltagedomain *voltdm) voltdm->write(vp_val, vp->vlimitto); } +int omap_vp_update_errorgain(struct voltagedomain *voltdm, + unsigned long target_volt) +{ + struct omap_volt_data *volt_data; + + /* Get volt_data corresponding to target_volt */ + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); + if (IS_ERR(volt_data)) + return -EINVAL; + + /* Setting vp errorgain based on the voltage */ + voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask, + volt_data->vp_errgain << + __ffs(voltdm->vp->common->vpconfig_errorgain_mask), + voltdm->vp->vpconfig); + + return 0; +} + /* VP force update method of voltage scaling */ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, unsigned long target_volt) diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 1cfde5a..bb4c78e 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -149,5 +149,7 @@ void omap_vp_disable(struct voltagedomain *voltdm); unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, unsigned long target_volt); +int omap_vp_update_errorgain(struct voltagedomain *voltdm, + unsigned long target_volt); #endif -- cgit v0.10.2 From 667216d6a435a27f5aed64aa30de583ddccc58c8 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 4 Apr 2011 17:58:21 -0700 Subject: OMAP3+: VP: remove omap_vp_runtime_data Remove the "runtime" VP data in favor of direct programming of VP registers. The VP is in the PRM, which is in the wakeup powerdomain, so there is no need to keep the state dynamically. Fixes to original version from Nishanth Menon Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 3e16329..d14e0f4 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -144,13 +144,11 @@ struct omap_voltdm_pmic { * * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. - * @vp_rt_data : VP data derived at runtime, not predefined * @curr_volt : current voltage for this vdd. * @volt_scale : API to scale the voltage of the vdd. */ struct omap_vdd_info { struct omap_volt_data *volt_data; - struct omap_vp_runtime_data vp_rt_data; u32 curr_volt; int (*volt_scale) (struct voltagedomain *voltdm, diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index f68a6db..e7d38f6 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) void __init omap_vp_init(struct voltagedomain *voltdm) { struct omap_vp_instance *vp = voltdm->vp; - struct omap_vdd_info *vdd = voltdm->vdd; - u32 vp_val, sys_clk_rate, timeout_val, waittime; + u32 val, sys_clk_rate, timeout, waittime; + u32 vddmin, vddmax, vstepmin, vstepmax; if (!voltdm->read || !voltdm->write) { pr_err("%s: No read/write API for accessing vdd_%s regs\n", @@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain *voltdm) /* Divide to avoid overflow */ sys_clk_rate = voltdm->sys_clk.rate / 1000; - vdd->vp_rt_data.vpconfig_erroroffset = - (voltdm->pmic->vp_erroroffset << - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); - - timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; - vdd->vp_rt_data.vlimitto_timeout = timeout_val; - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; + timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; + vddmin = voltdm->pmic->vp_vddmin; + vddmax = voltdm->pmic->vp_vddmax; waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * sys_clk_rate) / 1000; - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; - vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; - - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | - (vdd->vp_rt_data.vpconfig_errorgain << - __ffs(vp->common->vpconfig_errorgain_mask)) | + vstepmin = voltdm->pmic->vp_vstepmin; + vstepmax = voltdm->pmic->vp_vstepmax; + + /* + * VP_CONFIG: error gain is not set here, it will be updated + * on each scale, based on OPP. + */ + val = (voltdm->pmic->vp_erroroffset << + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) | vp->common->vpconfig_timeouten; - voltdm->write(vp_val, vp->vpconfig); - - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << - vp->common->vstepmin_smpswaittimemin_shift) | - (vdd->vp_rt_data.vstepmin_stepmin << - vp->common->vstepmin_stepmin_shift)); - voltdm->write(vp_val, vp->vstepmin); - - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << - vp->common->vstepmax_smpswaittimemax_shift) | - (vdd->vp_rt_data.vstepmax_stepmax << - vp->common->vstepmax_stepmax_shift)); - voltdm->write(vp_val, vp->vstepmax); - - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << - vp->common->vlimitto_vddmax_shift) | - (vdd->vp_rt_data.vlimitto_vddmin << - vp->common->vlimitto_vddmin_shift) | - (vdd->vp_rt_data.vlimitto_timeout << - vp->common->vlimitto_timeout_shift)); - voltdm->write(vp_val, vp->vlimitto); + voltdm->write(val, vp->vpconfig); + + /* VSTEPMIN */ + val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) | + (vstepmin << vp->common->vstepmin_stepmin_shift); + voltdm->write(val, vp->vstepmin); + + /* VSTEPMAX */ + val = (vstepmax << vp->common->vstepmax_stepmax_shift) | + (waittime << vp->common->vstepmax_smpswaittimemax_shift); + voltdm->write(val, vp->vstepmax); + + /* VLIMITTO */ + val = (vddmax << vp->common->vlimitto_vddmax_shift) | + (vddmin << vp->common->vlimitto_vddmin_shift) | + (timeout << vp->common->vlimitto_timeout_shift); + voltdm->write(val, vp->vlimitto); } int omap_vp_update_errorgain(struct voltagedomain *voltdm, diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index bb4c78e..96bbb23 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -108,34 +108,6 @@ struct omap_vp_instance { bool enabled; }; -/** - * struct omap_vp_runtime_data - VP data populated at runtime by code - * @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG - * @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG - * @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN - * @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX - * @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO - * @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN - * @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX - * @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO - * @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO - * - * XXX Is this structure really needed? Why not just program the - * device directly? They are in PRM space, therefore in the WKUP - * powerdomain, so register contents should not be lost in off-mode. - */ -struct omap_vp_runtime_data { - u32 vpconfig_erroroffset; - u16 vpconfig_errorgain; - u16 vstepmin_smpswaittimemin; - u16 vstepmax_smpswaittimemax; - u16 vlimitto_timeout; - u8 vstepmin_stepmin; - u8 vstepmax_stepmax; - u8 vlimitto_vddmin; - u8 vlimitto_vddmax; -}; - extern struct omap_vp_instance omap3_vp_mpu; extern struct omap_vp_instance omap3_vp_core; -- cgit v0.10.2 From 0f01565a353e06f1f1d7757b212c51e61c6fea58 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 14 Jul 2011 11:12:32 -0700 Subject: OMAP3+: VP: move voltage scale function pointer into struct voltagedomain Function pointer used for actual voltage scaling (e.g. VP force update or VC bypass) is moved from omap_vdd_info into struct voltagedomain, resulting in renames s/vdd->volt_scale/voltdm->scale/ No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 4a15668..32f0873 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -45,10 +45,8 @@ static LIST_HEAD(voltdm_list); static int __init _config_common_vdd_data(struct voltagedomain *voltdm) { - struct omap_vdd_info *vdd = voltdm->vdd; - /* Generic voltage parameters */ - vdd->volt_scale = omap_vp_forceupdate_scale; + voltdm->scale = omap_vp_forceupdate_scale; return 0; } @@ -107,22 +105,18 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) int omap_voltage_scale_vdd(struct voltagedomain *voltdm, unsigned long target_volt) { - struct omap_vdd_info *vdd; - if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return -EINVAL; } - vdd = voltdm->vdd; - - if (!vdd->volt_scale) { + if (!voltdm->scale) { pr_err("%s: No voltage scale API registered for vdd_%s\n", __func__, voltdm->name); return -ENODATA; } - return vdd->volt_scale(voltdm, target_volt); + return voltdm->scale(voltdm, target_volt); } /** @@ -258,23 +252,19 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, * defined in voltage.h */ void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method) + int voltscale_method) { - struct omap_vdd_info *vdd; - if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return; } - vdd = voltdm->vdd; - switch (voltscale_method) { case VOLTSCALE_VPFORCEUPDATE: - vdd->volt_scale = omap_vp_forceupdate_scale; + voltdm->scale = omap_vp_forceupdate_scale; return; case VOLTSCALE_VCBYPASS: - vdd->volt_scale = omap_vc_bypass_scale; + voltdm->scale = omap_vc_bypass_scale; return; default: pr_warning("%s: Trying to change the method of voltage scaling" @@ -315,7 +305,7 @@ int __init omap_voltage_late_init(void) clk_put(sys_ck); if (voltdm->vc) { - voltdm->vdd->volt_scale = omap_vc_bypass_scale; + voltdm->scale = omap_vc_bypass_scale; omap_vc_init_channel(voltdm); } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index d14e0f4..dcc7ea6 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -61,6 +61,7 @@ struct omap_vfsm_instance { * @read: read-modify-write a VC/VP register * @sys_clk: system clock name/frequency, used for various timing calculations * @vdd: to be removed + * @scale: function used to scale the voltage of the voltagedomain */ struct voltagedomain { char *name; @@ -82,6 +83,9 @@ struct voltagedomain { u32 rate; } sys_clk; + int (*scale) (struct voltagedomain *voltdm, + unsigned long target_volt); + struct omap_vdd_info *vdd; }; @@ -145,14 +149,10 @@ struct omap_voltdm_pmic { * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. * @curr_volt : current voltage for this vdd. - * @volt_scale : API to scale the voltage of the vdd. */ struct omap_vdd_info { struct omap_volt_data *volt_data; u32 curr_volt; - - int (*volt_scale) (struct voltagedomain *voltdm, - unsigned long target_volt); }; int omap_voltage_scale_vdd(struct voltagedomain *voltdm, -- cgit v0.10.2 From bea30ed65fb2432097f362ce17042e22febcb616 Mon Sep 17 00:00:00 2001 From: Todd Poynor Date: Fri, 27 May 2011 19:15:59 -0700 Subject: OMAP: VP: Explicitly mask VPVOLTAGE field Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field in the upper bits. Make this explicit using the mask symbol already defined, added as a new field in struct omap_vp_common. Signed-off-by: Todd Poynor Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index e7d38f6..3807620 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -227,7 +227,8 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) return 0; } - curr_vsel = voltdm->read(vp->voltage); + curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) + >> __ffs(vp->common->vpvoltage_mask); if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { pr_warning("%s: PMIC function to convert vsel to voltage" diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 96bbb23..7dc5cb3 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -63,6 +63,7 @@ struct omap_vp_ops { * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg + * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg */ struct omap_vp_common { u32 vpconfig_erroroffset_mask; @@ -79,6 +80,7 @@ struct omap_vp_common { u8 vlimitto_vddmin_shift; u8 vlimitto_vddmax_shift; u8 vlimitto_timeout_shift; + u8 vpvoltage_mask; const struct omap_vp_ops *ops; }; diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c index d429c44..260c554 100644 --- a/arch/arm/mach-omap2/vp3xxx_data.c +++ b/arch/arm/mach-omap2/vp3xxx_data.c @@ -51,6 +51,8 @@ static const struct omap_vp_common omap3_vp_common = { .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, + .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK, + .ops = &omap3_vp_ops, }; diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c index 0daf2a4..b4e7704 100644 --- a/arch/arm/mach-omap2/vp44xx_data.c +++ b/arch/arm/mach-omap2/vp44xx_data.c @@ -51,6 +51,7 @@ static const struct omap_vp_common omap4_vp_common = { .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, + .vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK, .ops = &omap4_vp_ops, }; -- cgit v0.10.2 From 8798c4ab56d8f726092870cb2cf15c5a7a0a93bf Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 18 Jul 2011 15:31:43 -0700 Subject: OMAP3+: VP: update_errorgain(): return error if VP Add check for valid VP in omap_vp_update_errorgain() Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 3807620..29698ac 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -103,6 +103,9 @@ int omap_vp_update_errorgain(struct voltagedomain *voltdm, { struct omap_volt_data *volt_data; + if (!voltdm->vp) + return -EINVAL; + /* Get volt_data corresponding to target_volt */ volt_data = omap_voltage_get_voltdata(voltdm, target_volt); if (IS_ERR(volt_data)) -- cgit v0.10.2 From cc6962dbab223ae51b47c8057d39d89ac6af0d35 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 15 Jul 2011 16:38:10 -0700 Subject: OMAP3+: VP: remove unused omap_vp_get_curr_volt() Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 29698ac..24020ea 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -209,40 +209,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, } /** - * omap_vp_get_curr_volt() - API to get the current vp voltage. - * @voltdm: pointer to the VDD. - * - * This API returns the current voltage for the specified voltage processor - */ -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) -{ - struct omap_vp_instance *vp = voltdm->vp; - u8 curr_vsel; - - if (!voltdm || IS_ERR(voltdm)) { - pr_warning("%s: VDD specified does not exist!\n", __func__); - return 0; - } - - if (!voltdm->read) { - pr_err("%s: No read API for reading vdd_%s regs\n", - __func__, voltdm->name); - return 0; - } - - curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) - >> __ffs(vp->common->vpvoltage_mask); - - if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { - pr_warning("%s: PMIC function to convert vsel to voltage" - "in uV not registerd\n", __func__); - return 0; - } - - return voltdm->pmic->vsel_to_uv(curr_vsel); -} - -/** * omap_vp_enable() - API to enable a particular VP * @voltdm: pointer to the VDD whose VP is to be enabled. * diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h index 7dc5cb3..7c155d2 100644 --- a/arch/arm/mach-omap2/vp.h +++ b/arch/arm/mach-omap2/vp.h @@ -120,7 +120,6 @@ extern struct omap_vp_instance omap4_vp_core; void omap_vp_init(struct voltagedomain *voltdm); void omap_vp_enable(struct voltagedomain *voltdm); void omap_vp_disable(struct voltagedomain *voltdm); -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, unsigned long target_volt); int omap_vp_update_errorgain(struct voltagedomain *voltdm, -- cgit v0.10.2 From b666b4767d3e6a23634b4d485c8511bd42d50023 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 15 Jul 2011 17:05:48 -0700 Subject: OMAP3+: VP: combine setting init voltage into common function combine VPCONFIG init voltage setup into common function and use from both vp_enable and from vp_forceupdate_scale(). NOTE: this patch changes the sequence of when the initVDD bit is cleared. The bit is now cleared immediately after it was written. Since only the rising edge of this bit has any affect according to the TRM, the exact timing of clearing of this bit should not have any effect. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index 24020ea..66bd700 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -9,31 +9,18 @@ #include "prm-regbits-44xx.h" #include "prm44xx.h" -static void vp_latch_vsel(struct voltagedomain *voltdm) +static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt) { struct omap_vp_instance *vp = voltdm->vp; u32 vpconfig; - unsigned long uvdc; char vsel; - uvdc = omap_voltage_get_nom_volt(voltdm); - if (!uvdc) { - pr_warning("%s: unable to find current voltage for vdd_%s\n", - __func__, voltdm->name); - return; - } - - if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { - pr_warning("%s: PMIC function to convert voltage in uV to" - " vsel not registered\n", __func__); - return; - } - - vsel = voltdm->pmic->uv_to_vsel(uvdc); + vsel = voltdm->pmic->uv_to_vsel(volt); vpconfig = voltdm->read(vp->vpconfig); vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | - vp->common->vpconfig_initvdd); + vp->common->vpconfig_forceupdate | + vp->common->vpconfig_initvdd); vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); voltdm->write(vpconfig, vp->vpconfig); @@ -43,6 +30,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) /* Clear initVDD copy trigger bit */ voltdm->write(vpconfig, vp->vpconfig); + + return vpconfig; } /* Generic voltage init functions */ @@ -149,22 +138,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, return -ETIMEDOUT; } - /* Configure for VP-Force Update */ - vpconfig = voltdm->read(vp->vpconfig); - vpconfig &= ~(vp->common->vpconfig_initvdd | - vp->common->vpconfig_forceupdate | - vp->common->vpconfig_initvoltage_mask); - vpconfig |= ((target_vsel << - __ffs(vp->common->vpconfig_initvoltage_mask))); - voltdm->write(vpconfig, vp->vpconfig); - - /* Trigger initVDD value copy to voltage processor */ - vpconfig |= vp->common->vpconfig_initvdd; - voltdm->write(vpconfig, vp->vpconfig); + vpconfig = _vp_set_init_voltage(voltdm, target_volt); /* Force update of voltage */ - vpconfig |= vp->common->vpconfig_forceupdate; - voltdm->write(vpconfig, vp->vpconfig); + voltdm->write(vpconfig | vp->common->vpconfig_forceupdate, + voltdm->vp->vpconfig); /* * Wait for TransactionDone. Typical latency is <200us. @@ -197,12 +175,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, "to clear the TRANXDONE status\n", __func__, voltdm->name); - vpconfig = voltdm->read(vp->vpconfig); - /* Clear initVDD copy trigger bit */ - vpconfig &= ~vp->common->vpconfig_initvdd; - voltdm->write(vpconfig, vp->vpconfig); /* Clear force bit */ - vpconfig &= ~vp->common->vpconfig_forceupdate; voltdm->write(vpconfig, vp->vpconfig); return 0; @@ -218,7 +191,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, void omap_vp_enable(struct voltagedomain *voltdm) { struct omap_vp_instance *vp; - u32 vpconfig; + u32 vpconfig, volt; if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); @@ -236,12 +209,19 @@ void omap_vp_enable(struct voltagedomain *voltdm) if (vp->enabled) return; - vp_latch_vsel(voltdm); + volt = voltdm_get_voltage(voltdm); + if (!volt) { + pr_warning("%s: unable to find current voltage for %s\n", + __func__, voltdm->name); + return; + } + + vpconfig = _vp_set_init_voltage(voltdm, volt); /* Enable VP */ - vpconfig = voltdm->read(vp->vpconfig); vpconfig |= vp->common->vpconfig_vpenable; voltdm->write(vpconfig, vp->vpconfig); + vp->enabled = true; } -- cgit v0.10.2 From 5e5651be29d8bd08d0cc2bc617c43acff95e2229 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 5 Apr 2011 16:27:21 -0700 Subject: OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix Rename voltage scaling related functions to use voltdm_ prefix intead of omap_voltage_, and cleanup kerneldoc comments in the process. s/omap_voltage_scale_vdd/voltdm_scale/ s/omap_voltage_reset/voltdm_reset/ Also, in voltdm_reset() s/target_uvdc/target_volt/ to be consistent with naming throughout the file. No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 1e1feda..d34fc52 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -212,7 +212,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, goto exit; } - omap_voltage_scale_vdd(voltdm, bootup_volt); + voltdm_scale(voltdm, bootup_volt); return 0; exit: diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c index f438cf4..4eac1bc 100644 --- a/arch/arm/mach-omap2/smartreflex-class3.c +++ b/arch/arm/mach-omap2/smartreflex-class3.c @@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) omap_vp_disable(voltdm); sr_disable(voltdm); if (is_volt_reset) - omap_voltage_reset(voltdm); + voltdm_reset(voltdm); return 0; } diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 32f0873..4afb368 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -94,16 +94,15 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) } /** - * omap_voltage_scale_vdd() - API to scale voltage of a particular - * voltage domain. - * @voltdm: pointer to the VDD which is to be scaled. - * @target_volt: The target voltage of the voltage domain + * voltdm_scale() - API to scale voltage of a particular voltage domain. + * @voltdm: pointer to the voltage domain which is to be scaled. + * @target_volt: The target voltage of the voltage domain * * This API should be called by the kernel to do the voltage scaling - * for a particular voltage domain during dvfs or any other situation. + * for a particular voltage domain during DVFS. */ -int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - unsigned long target_volt) +int voltdm_scale(struct voltagedomain *voltdm, + unsigned long target_volt) { if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); @@ -120,31 +119,31 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, } /** - * omap_voltage_reset() - Resets the voltage of a particular voltage domain - * to that of the current OPP. - * @voltdm: pointer to the VDD whose voltage is to be reset. + * voltdm_reset() - Resets the voltage of a particular voltage domain + * to that of the current OPP. + * @voltdm: pointer to the voltage domain whose voltage is to be reset. * * This API finds out the correct voltage the voltage domain is supposed * to be at and resets the voltage to that level. Should be used especially * while disabling any voltage compensation modules. */ -void omap_voltage_reset(struct voltagedomain *voltdm) +void voltdm_reset(struct voltagedomain *voltdm) { - unsigned long target_uvdc; + unsigned long target_volt; if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return; } - target_uvdc = omap_voltage_get_nom_volt(voltdm); - if (!target_uvdc) { + target_volt = omap_voltage_get_nom_volt(voltdm); + if (!target_volt) { pr_err("%s: unable to find current voltage for vdd_%s\n", __func__, voltdm->name); return; } - omap_voltage_scale_vdd(voltdm, target_uvdc); + voltdm_scale(voltdm, target_volt); } /** diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index dcc7ea6..7f8b00a 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -155,9 +155,6 @@ struct omap_vdd_info { u32 curr_volt; }; -int omap_voltage_scale_vdd(struct voltagedomain *voltdm, - unsigned long target_volt); -void omap_voltage_reset(struct voltagedomain *voltdm); void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data **volt_data); struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, @@ -195,4 +192,6 @@ int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, int (*fn)(struct voltagedomain *voltdm, struct powerdomain *pwrdm)); +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); +void voltdm_reset(struct voltagedomain *voltdm); #endif -- cgit v0.10.2 From 7590f608aacba64c42edd5a8d9560264b049f403 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 5 Apr 2011 16:55:22 -0700 Subject: OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain Track current nominal voltage as part of struct voltagedomain instead of omap_vdd_info, which will soon be removed. Also renames field from curr_volt to nominal_volt. No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index f8bdd51..d9e6994 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -128,7 +128,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, } *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); - *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); + *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt); /* Setting the ON voltage to the new target voltage */ vc_cmdval = voltdm->read(vc->cmdval_reg); @@ -145,7 +145,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, unsigned long target_volt, u8 target_vsel, u8 current_vsel) { - struct omap_vdd_info *vdd = voltdm->vdd; u32 smps_steps = 0, smps_delay = 0; smps_steps = abs(target_vsel - current_vsel); @@ -154,7 +153,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, voltdm->pmic->slew_rate) + 2; udelay(smps_delay); - vdd->curr_volt = target_volt; + voltdm->nominal_volt = target_volt; } /* vc_bypass_scale - VC bypass method of voltage scaling */ diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 4afb368..1b39e68 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -81,16 +81,12 @@ ovdc_out: */ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) { - struct omap_vdd_info *vdd; - if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return 0; } - vdd = voltdm->vdd; - - return vdd->curr_volt; + return voltdm->nominal_volt; } /** diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 7f8b00a..0bd71a2 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -62,6 +62,7 @@ struct omap_vfsm_instance { * @sys_clk: system clock name/frequency, used for various timing calculations * @vdd: to be removed * @scale: function used to scale the voltage of the voltagedomain + * @nominal_volt: current nominal voltage for this voltage domain */ struct voltagedomain { char *name; @@ -85,6 +86,7 @@ struct voltagedomain { int (*scale) (struct voltagedomain *voltdm, unsigned long target_volt); + u32 nominal_volt; struct omap_vdd_info *vdd; }; @@ -148,11 +150,9 @@ struct omap_voltdm_pmic { * * @volt_data : voltage table having the distinct voltages supported * by the domain and other associated per voltage data. - * @curr_volt : current voltage for this vdd. */ struct omap_vdd_info { struct omap_volt_data *volt_data; - u32 curr_volt; }; void omap_voltage_get_volttable(struct voltagedomain *voltdm, -- cgit v0.10.2 From e32778804930ed3141ffc55242d88e086d71ac24 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 14 Jul 2011 11:29:06 -0700 Subject: OMAP3+: voltdm: final removal of omap_vdd_info Remove last remaining member (volt_data) from omap_vdd_info into struct voltagedomain and removal remaining usage and reference to omap_vdd_info. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 1b39e68..2ba276f 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -43,34 +43,6 @@ static LIST_HEAD(voltdm_list); -static int __init _config_common_vdd_data(struct voltagedomain *voltdm) -{ - /* Generic voltage parameters */ - voltdm->scale = omap_vp_forceupdate_scale; - - return 0; -} - -static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) -{ - int ret = -EINVAL; - - if (!voltdm->pmic) { - pr_err("%s: PMIC info requried to configure vdd_%s not" - "populated.Hence cannot initialize vdd_%s\n", - __func__, voltdm->name, voltdm->name); - goto ovdc_out; - } - - if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) - goto ovdc_out; - - ret = 0; - -ovdc_out: - return ret; -} - /* Public functions */ /** * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage @@ -155,18 +127,14 @@ void voltdm_reset(struct voltagedomain *voltdm) * */ void omap_voltage_get_volttable(struct voltagedomain *voltdm, - struct omap_volt_data **volt_data) + struct omap_volt_data **volt_data) { - struct omap_vdd_info *vdd; - if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return; } - vdd = voltdm->vdd; - - *volt_data = vdd->volt_data; + *volt_data = voltdm->volt_data; } /** @@ -185,9 +153,8 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, * domain or if there is no matching entry. */ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, - unsigned long volt) + unsigned long volt) { - struct omap_vdd_info *vdd; int i; if (!voltdm || IS_ERR(voltdm)) { @@ -195,17 +162,15 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, return ERR_PTR(-EINVAL); } - vdd = voltdm->vdd; - - if (!vdd->volt_data) { + if (!voltdm->volt_data) { pr_warning("%s: voltage table does not exist for vdd_%s\n", __func__, voltdm->name); return ERR_PTR(-ENODATA); } - for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) { - if (vdd->volt_data[i].volt_nominal == volt) - return &vdd->volt_data[i]; + for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) { + if (voltdm->volt_data[i].volt_nominal == volt) + return &voltdm->volt_data[i]; } pr_notice("%s: Unable to match the current voltage with the voltage" @@ -304,9 +269,8 @@ int __init omap_voltage_late_init(void) omap_vc_init_channel(voltdm); } - if (voltdm->vdd) { - if (omap_vdd_data_configure(voltdm)) - continue; + if (voltdm->vp) { + voltdm->scale = omap_vp_forceupdate_scale; omap_vp_init(voltdm); } } diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 0bd71a2..962d808 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -33,8 +33,6 @@ struct powerdomain; #define OMAP3_VOLTOFFSET 0xff #define OMAP3_VOLTSETUP2 0xff -struct omap_vdd_info; - /** * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield * data @@ -60,9 +58,10 @@ struct omap_vfsm_instance { * @write: write a VC/VP register * @read: read-modify-write a VC/VP register * @sys_clk: system clock name/frequency, used for various timing calculations - * @vdd: to be removed * @scale: function used to scale the voltage of the voltagedomain * @nominal_volt: current nominal voltage for this voltage domain + * @volt_data: voltage table having the distinct voltages supported + * by the domain and other associated per voltage data. */ struct voltagedomain { char *name; @@ -86,9 +85,9 @@ struct voltagedomain { int (*scale) (struct voltagedomain *voltdm, unsigned long target_volt); - u32 nominal_volt; - struct omap_vdd_info *vdd; + u32 nominal_volt; + struct omap_volt_data *volt_data; }; /** @@ -145,16 +144,6 @@ struct omap_voltdm_pmic { u8 (*uv_to_vsel) (unsigned long uV); }; -/** - * omap_vdd_info - Per Voltage Domain info - * - * @volt_data : voltage table having the distinct voltages supported - * by the domain and other associated per voltage data. - */ -struct omap_vdd_info { - struct omap_volt_data *volt_data; -}; - void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data **volt_data); struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index 7bbec74..071101d 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c @@ -36,15 +36,11 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, }; -static struct omap_vdd_info omap3_vdd1_info; - static const struct omap_vfsm_instance omap3_vdd2_vfsm = { .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, }; -static struct omap_vdd_info omap3_vdd2_info; - static struct voltagedomain omap3_voltdm_mpu = { .name = "mpu_iva", .scalable = true, @@ -54,7 +50,6 @@ static struct voltagedomain omap3_voltdm_mpu = { .vc = &omap3_vc_mpu, .vfsm = &omap3_vdd1_vfsm, .vp = &omap3_vp_mpu, - .vdd = &omap3_vdd1_info, }; static struct voltagedomain omap3_voltdm_core = { @@ -66,7 +61,6 @@ static struct voltagedomain omap3_voltdm_core = { .vc = &omap3_vc_core, .vfsm = &omap3_vdd2_vfsm, .vp = &omap3_vp_core, - .vdd = &omap3_vdd2_info, }; static struct voltagedomain omap3_voltdm_wkup = { @@ -92,11 +86,11 @@ void __init omap3xxx_voltagedomains_init(void) * for the currently-running IC */ if (cpu_is_omap3630()) { - omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data; - omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data; + omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; + omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; } else { - omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data; - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; + omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; + omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; } for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 9c20fbb..c4584e9 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c @@ -36,20 +36,14 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_mpu_info; - static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_iva_info; - static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, }; -static struct omap_vdd_info omap4_vdd_core_info; - static struct voltagedomain omap4_voltdm_mpu = { .name = "mpu", .scalable = true, @@ -59,7 +53,6 @@ static struct voltagedomain omap4_voltdm_mpu = { .vc = &omap4_vc_mpu, .vfsm = &omap4_vdd_mpu_vfsm, .vp = &omap4_vp_mpu, - .vdd = &omap4_vdd_mpu_info, }; static struct voltagedomain omap4_voltdm_iva = { @@ -71,7 +64,6 @@ static struct voltagedomain omap4_voltdm_iva = { .vc = &omap4_vc_iva, .vfsm = &omap4_vdd_iva_vfsm, .vp = &omap4_vp_iva, - .vdd = &omap4_vdd_iva_info, }; static struct voltagedomain omap4_voltdm_core = { @@ -83,7 +75,6 @@ static struct voltagedomain omap4_voltdm_core = { .vc = &omap4_vc_core, .vfsm = &omap4_vdd_core_vfsm, .vp = &omap4_vp_core, - .vdd = &omap4_vdd_core_info, }; static struct voltagedomain omap4_voltdm_wkup = { @@ -109,9 +100,9 @@ void __init omap44xx_voltagedomains_init(void) * XXX Will depend on the process, validation, and binning * for the currently-running IC */ - omap4_vdd_mpu_info.volt_data = omap44xx_vdd_mpu_volt_data; - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; + omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; + omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; + omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) voltdm->sys_clk.name = sys_clk_name; -- cgit v0.10.2 From d5c128289f5066a7c6bf27d6ba27a6ae425be757 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 15 Jul 2011 16:05:12 -0700 Subject: OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage Use preferred voltdm_ naming for getting current nominal voltage. No functional changes. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c index 4eac1bc..53d9d0a 100644 --- a/arch/arm/mach-omap2/smartreflex-class3.c +++ b/arch/arm/mach-omap2/smartreflex-class3.c @@ -15,7 +15,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm) { - unsigned long volt = omap_voltage_get_nom_volt(voltdm); + unsigned long volt = voltdm_get_voltage(voltdm); if (!volt) { pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n", diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 2ba276f..441c2d9 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -45,13 +45,13 @@ static LIST_HEAD(voltdm_list); /* Public functions */ /** - * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage - * @voltdm: pointer to the VDD for which current voltage info is needed + * voltdm_get_voltage() - Gets the current non-auto-compensated voltage + * @voltdm: pointer to the voltdm for which current voltage info is needed * - * API to get the current non-auto-compensated voltage for a VDD. - * Returns 0 in case of error else returns the current voltage for the VDD. + * API to get the current non-auto-compensated voltage for a voltage domain. + * Returns 0 in case of error else returns the current voltage. */ -unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) { if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); @@ -72,6 +72,8 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt) { + int ret; + if (!voltdm || IS_ERR(voltdm)) { pr_warning("%s: VDD specified does not exist!\n", __func__); return -EINVAL; @@ -104,7 +106,7 @@ void voltdm_reset(struct voltagedomain *voltdm) return; } - target_volt = omap_voltage_get_nom_volt(voltdm); + target_volt = voltdm_get_voltage(voltdm); if (!target_volt) { pr_err("%s: unable to find current voltage for vdd_%s\n", __func__, voltdm->name); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 962d808..4c09809 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -148,7 +148,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data **volt_data); struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); -unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); #ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_voltdm_pmic *pmic); @@ -183,4 +182,5 @@ int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm)); int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); void voltdm_reset(struct voltagedomain *voltdm); +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); #endif -- cgit v0.10.2 From 6a62b78d9aa6661cae1a7d30b574daf435a14c47 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 18 Jul 2011 16:24:17 -0700 Subject: OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale Currently, the nominal voltage is updated in the VC post-scale function which is common to both scaling methods. However, this has readabiliy problems as this update is not where it might be expected. Instead, move the updated into voltdm_scale() upon a successful return of voltdm->scale() Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index d9e6994..6e58676 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -152,8 +152,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, smps_delay = ((smps_steps * voltdm->pmic->step_size) / voltdm->pmic->slew_rate) + 2; udelay(smps_delay); - - voltdm->nominal_volt = target_volt; } /* vc_bypass_scale - VC bypass method of voltage scaling */ diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 441c2d9..64070ac 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -85,7 +85,11 @@ int voltdm_scale(struct voltagedomain *voltdm, return -ENODATA; } - return voltdm->scale(voltdm, target_volt); + ret = voltdm->scale(voltdm, target_volt); + if (!ret) + voltdm->nominal_volt = target_volt; + + return ret; } /** -- cgit v0.10.2 From 5876c940c0dee298e38fbf47ce67c9e220b0572c Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 20 Jul 2011 16:35:46 -0700 Subject: OMAP2+: VC: more registers are per-channel starting with OMAP5 Starting with OMAP5, the following registers are per-channel and not common to a all VC channels: - SMPS I2C slave address - SMPS voltage register address offset - SMPS cmd/value register address offset - VC channel configuration register Move these from the channel-common struct into the per-channel struct to support OMAP5. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 6e58676..031d116 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -94,7 +94,7 @@ static int omap_vc_config_channel(struct voltagedomain *voltdm) voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, vc->cfg_channel << vc->cfg_channel_sa_shift, - vc->common->cfg_channel_reg); + vc->cfg_channel_reg); return 0; } @@ -319,7 +319,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) /* Configure the i2c slave address for this VC */ voltdm->rmw(vc->smps_sa_mask, vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), - vc->common->smps_sa_reg); + vc->smps_sa_reg); vc->cfg_channel |= vc_cfg_bits->sa; /* @@ -327,13 +327,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) */ voltdm->rmw(vc->smps_volra_mask, vc->volt_reg_addr << __ffs(vc->smps_volra_mask), - vc->common->smps_volra_reg); + vc->smps_volra_reg); vc->cfg_channel |= vc_cfg_bits->rav; if (vc->cmd_reg_addr) { voltdm->rmw(vc->smps_cmdra_mask, vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), - vc->common->smps_cmdra_reg); + vc->smps_cmdra_reg); vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; } diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h index 7ed70e0..478bf6b 100644 --- a/arch/arm/mach-omap2/vc.h +++ b/arch/arm/mach-omap2/vc.h @@ -25,9 +25,6 @@ struct voltagedomain; * struct omap_vc_common - per-VC register/bitfield data * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register - * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start - * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start - * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register @@ -36,7 +33,6 @@ struct voltagedomain; * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register - * @cfg_channel_reg: VC channel configuration register * @i2c_cfg_reg: I2C configuration register offset * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register * @i2c_mcode_mask: MCODE field mask for I2C config register @@ -47,9 +43,6 @@ struct voltagedomain; struct omap_vc_common { u32 cmd_on_mask; u32 valid; - u8 smps_sa_reg; - u8 smps_volra_reg; - u8 smps_cmdra_reg; u8 bypass_val_reg; u8 data_shift; u8 slaveaddr_shift; @@ -58,7 +51,6 @@ struct omap_vc_common { u8 cmd_onlp_shift; u8 cmd_ret_shift; u8 cmd_off_shift; - u8 cfg_channel_reg; u8 i2c_cfg_reg; u8 i2c_cfg_hsen_mask; u8 i2c_mcode_mask; @@ -82,6 +74,10 @@ struct omap_vc_common { * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register * @cmdval_reg: register for on/ret/off voltage level values for this channel + * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start + * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start + * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start + * @cfg_channel_reg: VC channel configuration register * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register * @flags: VC channel-specific flags (optional) */ @@ -100,6 +96,10 @@ struct omap_vc_channel { u32 smps_volra_mask; u32 smps_cmdra_mask; u8 cmdval_reg; + u8 smps_sa_reg; + u8 smps_volra_reg; + u8 smps_cmdra_reg; + u8 cfg_channel_reg; u8 cfg_channel_sa_shift; u8 flags; }; diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c index 95d7701..cfe348e 100644 --- a/arch/arm/mach-omap2/vc3xxx_data.c +++ b/arch/arm/mach-omap2/vc3xxx_data.c @@ -30,9 +30,6 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static struct omap_vc_common omap3_vc_common = { - .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, - .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, .data_shift = OMAP3430_DATA_SHIFT, .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, @@ -43,7 +40,6 @@ static struct omap_vc_common omap3_vc_common = { .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, - .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, .i2c_mcode_mask = OMAP3430_MCODE_MASK, @@ -51,6 +47,10 @@ static struct omap_vc_common omap3_vc_common = { struct omap_vc_channel omap3_vc_mpu = { .common = &omap3_vc_common, + .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, + .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, + .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, + .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, .smps_volra_mask = OMAP3430_VOLRA0_MASK, @@ -60,6 +60,10 @@ struct omap_vc_channel omap3_vc_mpu = { struct omap_vc_channel omap3_vc_core = { .common = &omap3_vc_common, + .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, + .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, + .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, + .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, .smps_volra_mask = OMAP3430_VOLRA1_MASK, diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 0a4fc37..2740a96 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -31,9 +31,6 @@ * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. */ static const struct omap_vc_common omap4_vc_common = { - .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, - .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, - .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, .data_shift = OMAP4430_DATA_SHIFT, .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, @@ -44,7 +41,6 @@ static const struct omap_vc_common omap4_vc_common = { .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, .cmd_ret_shift = OMAP4430_RET_SHIFT, .cmd_off_shift = OMAP4430_OFF_SHIFT, - .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, @@ -54,6 +50,10 @@ static const struct omap_vc_common omap4_vc_common = { struct omap_vc_channel omap4_vc_mpu = { .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, .common = &omap4_vc_common, + .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, + .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, + .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, @@ -63,6 +63,10 @@ struct omap_vc_channel omap4_vc_mpu = { struct omap_vc_channel omap4_vc_iva = { .common = &omap4_vc_common, + .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, + .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, + .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, @@ -72,6 +76,10 @@ struct omap_vc_channel omap4_vc_iva = { struct omap_vc_channel omap4_vc_core = { .common = &omap4_vc_common, + .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, + .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, + .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, -- cgit v0.10.2 From 42b43945e0f115412dd0b7f0c3609a8b6f24f5e5 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Thu, 28 Jul 2011 14:48:56 +0300 Subject: omap: voltage: add a stub header file for external/regulator use Needed as some of the voltage layer functionality is accessed from the SMPS regulator driver. Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h new file mode 100644 index 0000000..0a6a482 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/voltage.h @@ -0,0 +1,20 @@ +/* + * OMAP Voltage Management Routines + * + * Copyright (C) 2011, Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_VOLTAGE_H +#define __ARCH_ARM_OMAP_VOLTAGE_H + +struct voltagedomain; + +struct voltagedomain *voltdm_lookup(const char *name); +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); + +#endif -- cgit v0.10.2 From 58e241f7be8dfbb19fa8f5bf8b2e56bb6d655752 Mon Sep 17 00:00:00 2001 From: Patrick Titiano Date: Wed, 18 May 2011 00:17:30 -0500 Subject: OMAP4: PM: TWL6030: fix voltage conversion formula omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect conversion formula. It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and voltage step: - Voltage Step is now 12.66mV (instead of 12.5mV) - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision (instead of 600mV) This leads to setting voltages potentially higher than expected, and so potentially some (limited) power overconsumption. For reference, see formula and tables in section 8.5.2.3 "Output Voltage Selection (Standard Mode / Extended Mode with or without offset)" in TWL6030 functional specifications document. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon Signed-off-by: Patrick Titiano diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 6b247d1..a66bf6b 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -106,9 +106,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) return 1350000; if (smps_offset & 0x8) - return ((((vsel - 1) * 125) + 7000)) * 100; + return ((((vsel - 1) * 1266) + 70900)) * 10; else - return ((((vsel - 1) * 125) + 6000)) * 100; + return ((((vsel - 1) * 1266) + 60770)) * 10; } static u8 twl6030_uv_to_vsel(unsigned long uv) @@ -138,9 +138,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) return 0x3A; if (smps_offset & 0x8) - return DIV_ROUND_UP(uv - 700000, 12500) + 1; + return DIV_ROUND_UP(uv - 709000, 12660) + 1; else - return DIV_ROUND_UP(uv - 600000, 12500) + 1; + return DIV_ROUND_UP(uv - 607700, 12660) + 1; } static struct omap_voltdm_pmic omap3_mpu_pmic = { @@ -187,7 +187,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, - .step_size = 12500, + .step_size = 12660, .on_volt = 1350000, .onlp_volt = 1350000, .ret_volt = 837500, @@ -208,7 +208,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, - .step_size = 12500, + .step_size = 12660, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, @@ -229,7 +229,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, - .step_size = 12500, + .step_size = 12660, .on_volt = 1100000, .onlp_volt = 1100000, .ret_volt = 837500, -- cgit v0.10.2 From 366494250b60af14fbab4d94d6bb1d1b6d17f10b Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 18 May 2011 00:17:31 -0500 Subject: OMAP4: PM: TWL6030: fix uv to voltage for >0x39 using 1.35V as a check is not correct, we know that beyond 0x39, voltages are non linear - hence use the conversion iff uV greater than that for 0x39. For example, with 709mV as the smps offset, the max linear is actually 1.41V(0x39vsel)! Signed-off-by: Nishanth Menon diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index a66bf6b..5def7c2 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -134,8 +134,13 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) * hardcoding only for 1.35 V which is used for 1GH OPP for * OMAP4430. */ - if (uv == 1350000) + if (uv > twl6030_vsel_to_uv(0x39)) { + if (uv == 1350000) + return 0x3A; + pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n", + __func__, uv, twl6030_vsel_to_uv(0x39)); return 0x3A; + } if (smps_offset & 0x8) return DIV_ROUND_UP(uv - 709000, 12660) + 1; -- cgit v0.10.2 From 2aed5b9e8877237886453f138be7ecea224b32b0 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 18 May 2011 00:17:32 -0500 Subject: OMAP4: PM: TWL6030: address 0V conversions 0V conversions should be mapped to 0 as it is meant to denote off voltages. Signed-off-by: Nishanth Menon diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 5def7c2..b30adf3 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -95,6 +95,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) is_offset_valid = true; } + if (!vsel) + return 0; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded @@ -127,6 +129,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) is_offset_valid = true; } + if (!uv) + return 0x00; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded -- cgit v0.10.2 From 63f60a43e640c2f56be902c69503ea28d1010416 Mon Sep 17 00:00:00 2001 From: Patrick Titiano Date: Wed, 18 May 2011 00:17:33 -0500 Subject: OMAP4: PM: TWL6030: fix ON/RET/OFF voltages According to latest OMAP4430 Data Manual v0.4 dated March 2011: - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. This allows saving a little more power in retention states. - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. This allows saving a little power when CPU wakes up until Smart-Reflex is not yet resumed. [nm@ti.com: ported to voltdm_c] Signed-off-by: Nishanth Menon Signed-off-by: Patrick Titiano diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index b30adf3..4bc99fb 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -197,10 +197,10 @@ static struct omap_voltdm_pmic omap3_core_pmic = { static struct omap_voltdm_pmic omap4_mpu_pmic = { .slew_rate = 4000, .step_size = 12660, - .on_volt = 1350000, - .onlp_volt = 1350000, - .ret_volt = 837500, - .off_volt = 600000, + .on_volt = 1375000, + .onlp_volt = 1375000, + .ret_volt = 830000, + .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, @@ -218,10 +218,10 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { static struct omap_voltdm_pmic omap4_iva_pmic = { .slew_rate = 4000, .step_size = 12660, - .on_volt = 1100000, - .onlp_volt = 1100000, - .ret_volt = 837500, - .off_volt = 600000, + .on_volt = 1188000, + .onlp_volt = 1188000, + .ret_volt = 830000, + .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, @@ -239,10 +239,10 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { static struct omap_voltdm_pmic omap4_core_pmic = { .slew_rate = 4000, .step_size = 12660, - .on_volt = 1100000, - .onlp_volt = 1100000, - .ret_volt = 837500, - .off_volt = 600000, + .on_volt = 1200000, + .onlp_volt = 1200000, + .ret_volt = 830000, + .off_volt = 0, .volt_setup_time = 0, .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, -- cgit v0.10.2 From ee7fbba63e334481049a7939b8071160824447d3 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 18 May 2011 00:17:34 -0500 Subject: OMAP4: PM: TWL6030: add cmd register Without the command register, ON/ONLP/RET/OFF voltages are useless. and TWL will be unable to use these Signed-off-by: Nishanth Menon diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 4bc99fb..f515a1a 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -42,8 +42,11 @@ #define OMAP4_SRI2C_SLAVE_ADDR 0x12 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 +#define OMAP4_VDD_MPU_SR_CMD_REG 0x56 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B +#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 +#define OMAP4_VDD_CORE_SR_CMD_REG 0x62 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 @@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, + .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, @@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, + .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, .i2c_high_speed = true, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, @@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = { .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, + .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, .vsel_to_uv = twl6030_vsel_to_uv, .uv_to_vsel = twl6030_uv_to_vsel, }; -- cgit v0.10.2 From 796ba283b076466df0b10b6ee54af45b9c1d4d04 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Fri, 1 Jul 2011 08:52:32 +0000 Subject: omap: mcbsp: Remove omap device API struct omap_device *od is only set with find_omap_device_by_dev but not used otherwise so remove them and references to omap device API. Acked-by: Kevin Hilman Signed-off-by: Jarkko Nikula diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 6c62af1..4b233e8 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -24,7 +24,6 @@ #include #include -#include #include /* XXX These "sideways" includes are a sign that something is wrong */ @@ -258,19 +257,9 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); #ifdef CONFIG_ARCH_OMAP3 -static struct omap_device *find_omap_device_by_dev(struct device *dev) -{ - struct platform_device *pdev = container_of(dev, - struct platform_device, dev); - return container_of(pdev, struct omap_device, pdev); -} - static void omap_st_on(struct omap_mcbsp *mcbsp) { unsigned int w; - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); /* * Sidetone uses McBSP ICLK - which must not idle when sidetones @@ -292,9 +281,6 @@ static void omap_st_on(struct omap_mcbsp *mcbsp) static void omap_st_off(struct omap_mcbsp *mcbsp) { unsigned int w; - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); w = MCBSP_ST_READ(mcbsp, SSELCR); MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN)); @@ -310,9 +296,6 @@ static void omap_st_off(struct omap_mcbsp *mcbsp) static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) { u16 val, i; - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); val = MCBSP_ST_READ(mcbsp, SSELCR); @@ -340,9 +323,6 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp) { u16 w; struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); w = MCBSP_ST_READ(mcbsp, SSELCR); @@ -685,9 +665,6 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) { - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); /* * Enable wakup behavior, smart idle and all wakeups * REVISIT: some wakeups may be unnecessary @@ -699,10 +676,6 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) { - struct omap_device *od; - - od = find_omap_device_by_dev(mcbsp->dev); - /* * Disable wakup behavior, smart idle and all wakeups */ -- cgit v0.10.2 From 49882c99401fa2777157908479169accf039cab7 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Jul 2011 09:58:36 -0700 Subject: OMAP: omap_device: replace debug/warning/error prints with dev_* macros For consistency in kernel printk output for devices, use dev_dbg(), dev_warn(), dev_err() instead of pr_debug(), pr_warning() and pr_err(), some of which currently use direct access of name from platform_device and others of which use dev_name(). Using the dev_* versions uses the standard device naming from the driver core. Some pr_* prints were not converted with this patch since they are used before the platform_device and struct device are created so neither the dev_* prints or dev_name() is valid. Reported-by: Russell King Reviewed-by: Felipe Balbi Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 02609ee..334bfd2 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -114,7 +114,7 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) { struct timespec a, b, c; - pr_debug("omap_device: %s: activating\n", od->pdev.name); + dev_dbg(&od->pdev.dev, "omap_device: activating\n"); while (od->pm_lat_level > 0) { struct omap_device_pm_latency *odpl; @@ -138,25 +138,24 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) c = timespec_sub(b, a); act_lat = timespec_to_ns(&c); - pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time " - "%llu nsec\n", od->pdev.name, od->pm_lat_level, - act_lat); + dev_dbg(&od->pdev.dev, + "omap_device: pm_lat %d: activate: elapsed time " + "%llu nsec\n", od->pm_lat_level, act_lat); if (act_lat > odpl->activate_lat) { odpl->activate_lat_worst = act_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->activate_lat = act_lat; - pr_warning("omap_device: %s.%d: new worst case " - "activate latency %d: %llu\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, act_lat); + dev_warn(&od->pdev.dev, + "new worst case activate latency " + "%d: %llu\n", + od->pm_lat_level, act_lat); } else - pr_warning("omap_device: %s.%d: activate " - "latency %d higher than exptected. " - "(%llu > %d)\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, act_lat, - odpl->activate_lat); + dev_warn(&od->pdev.dev, + "activate latency %d " + "higher than exptected. (%llu > %d)\n", + od->pm_lat_level, act_lat, + odpl->activate_lat); } od->dev_wakeup_lat -= odpl->activate_lat; @@ -183,7 +182,7 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) { struct timespec a, b, c; - pr_debug("omap_device: %s: deactivating\n", od->pdev.name); + dev_dbg(&od->pdev.dev, "omap_device: deactivating\n"); while (od->pm_lat_level < od->pm_lats_cnt) { struct omap_device_pm_latency *odpl; @@ -206,28 +205,26 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) c = timespec_sub(b, a); deact_lat = timespec_to_ns(&c); - pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time " - "%llu nsec\n", od->pdev.name, od->pm_lat_level, - deact_lat); + dev_dbg(&od->pdev.dev, + "omap_device: pm_lat %d: deactivate: elapsed time " + "%llu nsec\n", od->pm_lat_level, deact_lat); if (deact_lat > odpl->deactivate_lat) { odpl->deactivate_lat_worst = deact_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->deactivate_lat = deact_lat; - pr_warning("omap_device: %s.%d: new worst case " - "deactivate latency %d: %llu\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, deact_lat); + dev_warn(&od->pdev.dev, + "new worst case deactivate latency " + "%d: %llu\n", + od->pm_lat_level, deact_lat); } else - pr_warning("omap_device: %s.%d: deactivate " - "latency %d higher than exptected. " - "(%llu > %d)\n", - od->pdev.name, od->pdev.id, - od->pm_lat_level, deact_lat, - odpl->deactivate_lat); + dev_warn(&od->pdev.dev, + "deactivate latency %d " + "higher than exptected. (%llu > %d)\n", + od->pm_lat_level, deact_lat, + odpl->deactivate_lat); } - od->dev_wakeup_lat += odpl->activate_lat; od->pm_lat_level++; @@ -245,28 +242,27 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, if (!clk_alias || !clk_name) return; - pr_debug("omap_device: %s: Creating %s -> %s\n", - dev_name(&od->pdev.dev), clk_alias, clk_name); + dev_dbg(&od->pdev.dev, "Creating %s -> %s\n", clk_alias, clk_name); r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); if (!IS_ERR(r)) { - pr_warning("omap_device: %s: alias %s already exists\n", - dev_name(&od->pdev.dev), clk_alias); + dev_warn(&od->pdev.dev, + "alias %s already exists\n", clk_alias); clk_put(r); return; } r = omap_clk_get_by_name(clk_name); if (IS_ERR(r)) { - pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", - dev_name(&od->pdev.dev), clk_name); + dev_err(&od->pdev.dev, + "omap_clk_get_by_name for %s failed\n", clk_name); return; } l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); if (!l) { - pr_err("omap_device: %s: clkdev_alloc for %s failed\n", - dev_name(&od->pdev.dev), clk_alias); + dev_err(&od->pdev.dev, + "clkdev_alloc for %s failed\n", clk_alias); return; } @@ -671,8 +667,9 @@ int omap_device_enable(struct platform_device *pdev) od = to_omap_device(pdev); if (od->_state == OMAP_DEVICE_STATE_ENABLED) { - WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", - od->pdev.name, od->pdev.id, __func__, od->_state); + dev_warn(&pdev->dev, + "omap_device: %s() called from invalid state %d\n", + __func__, od->_state); return -EINVAL; } @@ -710,8 +707,9 @@ int omap_device_idle(struct platform_device *pdev) od = to_omap_device(pdev); if (od->_state != OMAP_DEVICE_STATE_ENABLED) { - WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", - od->pdev.name, od->pdev.id, __func__, od->_state); + dev_warn(&pdev->dev, + "omap_device: %s() called from invalid state %d\n", + __func__, od->_state); return -EINVAL; } @@ -742,8 +740,9 @@ int omap_device_shutdown(struct platform_device *pdev) if (od->_state != OMAP_DEVICE_STATE_ENABLED && od->_state != OMAP_DEVICE_STATE_IDLE) { - WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", - od->pdev.name, od->pdev.id, __func__, od->_state); + dev_warn(&pdev->dev, + "omap_device: %s() called from invalid state %d\n", + __func__, od->_state); return -EINVAL; } -- cgit v0.10.2 From 47c3e5d8060406d8b3be1b4db91e2543673dd225 Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Mon, 25 Jul 2011 16:18:24 +0300 Subject: OMAP: omap_device: make latency autoadjust messages debug During normal system operation warning messages similar to this are appearing quite often: omap_device: omap4-keypad.-1: new worst case activate latency 0: 61035 This doesn't seem to be reporting a problem, nor is it very useful for non-developers, so reduce it to debug level. Acked-by: Steve Sakoman Signed-off-by: Grazvydas Ignotas Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 334bfd2..142bbd8 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -146,10 +146,10 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) odpl->activate_lat_worst = act_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->activate_lat = act_lat; - dev_warn(&od->pdev.dev, - "new worst case activate latency " - "%d: %llu\n", - od->pm_lat_level, act_lat); + dev_dbg(&od->pdev.dev, + "new worst case activate latency " + "%d: %llu\n", + od->pm_lat_level, act_lat); } else dev_warn(&od->pdev.dev, "activate latency %d " @@ -213,10 +213,10 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) odpl->deactivate_lat_worst = deact_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->deactivate_lat = deact_lat; - dev_warn(&od->pdev.dev, - "new worst case deactivate latency " - "%d: %llu\n", - od->pm_lat_level, deact_lat); + dev_dbg(&od->pdev.dev, + "new worst case deactivate latency " + "%d: %llu\n", + od->pm_lat_level, deact_lat); } else dev_warn(&od->pdev.dev, "deactivate latency %d " -- cgit v0.10.2 From a2a28ad9969616fa6d7b243ecf334dc6983992cf Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Jul 2011 14:14:35 -0700 Subject: OMAP: omap_device: remove internal functions from omap_device.h The *_device_register() functions and the count/fill resources functions are internal to omap_device and do not need to be in the header. Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index ee405b36..61d14b3 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -88,9 +88,6 @@ int omap_device_shutdown(struct platform_device *pdev); /* Core code interface */ -int omap_device_count_resources(struct omap_device *od); -int omap_device_fill_resources(struct omap_device *od, struct resource *res); - struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, struct omap_hwmod *oh, void *pdata, int pdata_len, @@ -103,9 +100,6 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, struct omap_device_pm_latency *pm_lats, int pm_lats_cnt, int is_early_device); -int omap_device_register(struct omap_device *od); -int omap_early_device_register(struct omap_device *od); - void __iomem *omap_device_get_rt_va(struct omap_device *od); /* OMAP PM interface */ diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 142bbd8..d3fdf51 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -94,6 +94,9 @@ #define USE_WAKEUP_LAT 0 #define IGNORE_WAKEUP_LAT 1 +static int omap_device_register(struct omap_device *od); +static int omap_early_device_register(struct omap_device *od); + /* Private functions */ /** @@ -339,7 +342,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev) * much memory to allocate before calling * omap_device_fill_resources(). Returns the count. */ -int omap_device_count_resources(struct omap_device *od) +static int omap_device_count_resources(struct omap_device *od) { int c = 0; int i; @@ -370,7 +373,8 @@ int omap_device_count_resources(struct omap_device *od) * functions to get device resources. Hacking around the existing * platform_device code wastes memory. Returns 0. */ -int omap_device_fill_resources(struct omap_device *od, struct resource *res) +static int omap_device_fill_resources(struct omap_device *od, + struct resource *res) { int c = 0; int i, r; @@ -534,7 +538,7 @@ odbs_exit1: * platform_early_add_device() on the underlying platform_device. * Returns 0 by default. */ -int omap_early_device_register(struct omap_device *od) +static int omap_early_device_register(struct omap_device *od) { struct platform_device *devices[1]; @@ -634,7 +638,7 @@ static struct dev_pm_domain omap_device_pm_domain = { * platform_device_register() on the underlying platform_device. * Returns the return value of platform_device_register(). */ -int omap_device_register(struct omap_device *od) +static int omap_device_register(struct omap_device *od) { pr_debug("omap_device: %s: registering\n", od->pdev.name); -- cgit v0.10.2 From 3528c58eb9e818b7821501afa2916eb12131994a Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Jul 2011 13:48:45 -0700 Subject: OMAP: omap_device: when building return platform_device instead of omap_device All of the device init and device driver interaction with omap_device is done using platform_device pointers. To make this more explicit, have omap_device return a platform_device pointer instead of an omap_device pointer. All current users of the omap_device pointer were only using it to get at the platform_device pointer or struct device pointer, so fixing all of the users was trivial. This also makes it more difficult for device init code to directly access members of struct omap_device, and allows for easier changing of omap_device internals. Cc: Paul Walmsley Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 1077ad6..10adf66 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -44,7 +44,7 @@ static int __init omap3_l3_init(void) { int l; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; /* @@ -61,12 +61,12 @@ static int __init omap3_l3_init(void) if (!oh) pr_err("could not look up %s\n", oh_name); - od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, + pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, NULL, 0, 0); - WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); - return IS_ERR(od) ? PTR_ERR(od) : 0; + return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; } postcore_initcall(omap3_l3_init); @@ -74,7 +74,7 @@ static int __init omap4_l3_init(void) { int l, i; struct omap_hwmod *oh[3]; - struct omap_device *od; + struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; /* @@ -92,12 +92,12 @@ static int __init omap4_l3_init(void) pr_err("could not look up %s\n", oh_name); } - od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, + pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 0, NULL, 0, 0); - WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); + WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); - return IS_ERR(od) ? PTR_ERR(od) : 0; + return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; } postcore_initcall(omap4_l3_init); @@ -232,7 +232,7 @@ struct omap_device_pm_latency omap_keyboard_latency[] = { int __init omap4_keyboard_init(struct omap4_keypad_platform_data *sdp4430_keypad_data, struct omap_board_data *bdata) { - struct omap_device *od; + struct platform_device *pdev; struct omap_hwmod *oh; struct omap4_keypad_platform_data *keypad_data; unsigned int id = -1; @@ -247,15 +247,15 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data keypad_data = sdp4430_keypad_data; - od = omap_device_build(name, id, oh, keypad_data, + pdev = omap_device_build(name, id, oh, keypad_data, sizeof(struct omap4_keypad_platform_data), omap_keyboard_latency, ARRAY_SIZE(omap_keyboard_latency), 0); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); @@ -274,7 +274,7 @@ static struct omap_device_pm_latency mbox_latencies[] = { static inline void omap_init_mbox(void) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; oh = omap_hwmod_lookup("mailbox"); if (!oh) { @@ -282,10 +282,10 @@ static inline void omap_init_mbox(void) return; } - od = omap_device_build("omap-mailbox", -1, oh, NULL, 0, + pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); - WARN(IS_ERR(od), "%s: could not build device, err %ld\n", - __func__, PTR_ERR(od)); + WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", + __func__, PTR_ERR(pdev)); } #else static inline void omap_init_mbox(void) { } @@ -344,7 +344,7 @@ struct omap_device_pm_latency omap_mcspi_latency[] = { static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; char *name = "omap2_mcspi"; struct omap2_mcspi_platform_config *pdata; static int spi_num; @@ -371,10 +371,10 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) } spi_num++; - od = omap_device_build(name, spi_num, oh, pdata, + pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata), omap_mcspi_latency, ARRAY_SIZE(omap_mcspi_latency), 0); - WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n", + WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", name, oh->name); kfree(pdata); return 0; @@ -709,7 +709,7 @@ static struct omap_device_pm_latency omap_wdt_latency[] = { static int __init omap_init_wdt(void) { int id = -1; - struct omap_device *od; + struct platform_device *pdev; struct omap_hwmod *oh; char *oh_name = "wd_timer2"; char *dev_name = "omap_wdt"; @@ -723,10 +723,10 @@ static int __init omap_init_wdt(void) return -EINVAL; } - od = omap_device_build(dev_name, id, oh, NULL, 0, + pdev = omap_device_build(dev_name, id, oh, NULL, 0, omap_wdt_latency, ARRAY_SIZE(omap_wdt_latency), 0); - WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n", + WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", dev_name, oh->name); return 0; } diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index a5b7a23..18693f6 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -78,7 +78,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) { int r = 0; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; int i, oh_count; struct omap_display_platform_data pdata; const struct omap_dss_hwmod_data *curr_dss_hwmod; @@ -108,13 +108,13 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) return -ENODEV; } - od = omap_device_build(curr_dss_hwmod[i].dev_name, + pdev = omap_device_build(curr_dss_hwmod[i].dev_name, curr_dss_hwmod[i].id, oh, &pdata, sizeof(struct omap_display_platform_data), omap_dss_latency, ARRAY_SIZE(omap_dss_latency), 0); - if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n", + if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n", curr_dss_hwmod[i].oh_name)) return -ENODEV; } diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index c9ff0e7..ae8cb3f 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -228,7 +228,7 @@ static u32 configure_dma_errata(void) /* One time initializations */ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; struct omap_system_dma_plat_info *p; struct resource *mem; char *name = "omap_dma_system"; @@ -258,23 +258,23 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) p->errata = configure_dma_errata(); - od = omap_device_build(name, 0, oh, p, sizeof(*p), + pdev = omap_device_build(name, 0, oh, p, sizeof(*p), omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); kfree(p); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } - mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mem) { - dev_err(&od->pdev.dev, "%s: no mem resource\n", __func__); + dev_err(&pdev->dev, "%s: no mem resource\n", __func__); return -EINVAL; } dma_base = ioremap(mem->start, resource_size(mem)); if (!dma_base) { - dev_err(&od->pdev.dev, "%s: ioremap fail\n", __func__); + dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); return -ENOMEM; } @@ -283,7 +283,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) (d->lch_count), GFP_KERNEL); if (!d->chan) { - dev_err(&od->pdev.dev, "%s: kzalloc fail\n", __func__); + dev_err(&pdev->dev, "%s: kzalloc fail\n", __func__); return -ENOMEM; } return 0; diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 2765cdc..76abdcb 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -34,7 +34,7 @@ static struct omap_device_pm_latency omap_gpio_latency[] = { static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) { - struct omap_device *od; + struct platform_device *pdev; struct omap_gpio_platform_data *pdata; struct omap_gpio_dev_attr *dev_attr; char *name = "omap_gpio"; @@ -107,16 +107,16 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) return -EINVAL; } - od = omap_device_build(name, id - 1, oh, pdata, + pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata), omap_gpio_latency, ARRAY_SIZE(omap_gpio_latency), false); kfree(pdata); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } omap_device_disable_idle_on_suspend(od); diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index a9b45c7..cc87919 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -430,7 +430,7 @@ static struct omap_device_pm_latency omap_hsmmc_latency[] = { void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; struct omap_device_pm_latency *ohl; char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; struct omap_mmc_platform_data *mmc_data; @@ -471,9 +471,9 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) mmc_data->controller_flags = mmc_dev_attr->flags; } - od = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, + pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); kfree(mmc_data->slots[0].name); goto done; @@ -482,7 +482,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) * return device handle to board setup code * required to populate for regulator framework structure */ - hsmmcinfo->dev = &od->pdev.dev; + hsmmcinfo->dev = &pdev->dev; done: kfree(mmc_data); diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 06d4a80..0b3ae9d 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -35,7 +35,7 @@ int __init hwspinlocks_init(void) { int retval = 0; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; const char *oh_name = "spinlock"; const char *dev_name = "omap_hwspinlock"; @@ -48,13 +48,13 @@ int __init hwspinlocks_init(void) if (oh == NULL) return -EINVAL; - od = omap_device_build(dev_name, 0, oh, NULL, 0, + pdev = omap_device_build(dev_name, 0, oh, NULL, 0, omap_spinlock_latency, ARRAY_SIZE(omap_spinlock_latency), false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("Can't build omap_device for %s:%s\n", dev_name, oh_name); - retval = PTR_ERR(od); + retval = PTR_ERR(pdev); } return retval; diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 4a6ef6a..7a42f32 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -116,7 +116,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) char *name = "omap-mcbsp"; struct omap_hwmod *oh_device[2]; struct omap_mcbsp_platform_data *pdata = NULL; - struct omap_device *od; + struct platform_device *pdev; sscanf(oh->name, "mcbsp%d", &id); @@ -144,14 +144,14 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); count++; } - od = omap_device_build_ss(name, id, oh_device, count, pdata, + pdev = omap_device_build_ss(name, id, oh_device, count, pdata, sizeof(*pdata), omap2_mcbsp_latency, ARRAY_SIZE(omap2_mcbsp_latency), false); kfree(pdata); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, name, oh->name); - return PTR_ERR(od); + return PTR_ERR(pdev); } omap_mcbsp_count++; return 0; diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 472bf22..e7cd794 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -60,19 +60,19 @@ EXPORT_SYMBOL(omap4_get_dsp_device); static int _init_omap_device(char *name, struct device **new_dev) { struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; oh = omap_hwmod_lookup(name); if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", __func__, name)) return -ENODEV; - od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); - if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n", + pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); + if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n", __func__, name)) return -ENODEV; - *new_dev = &od->pdev.dev; + *new_dev = &pdev->dev; return 0; } diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 466fc722..53b6808 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -711,7 +711,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) { struct omap_uart_state *uart; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; void *pdata = NULL; u32 pdata_size = 0; char *name; @@ -799,10 +799,10 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) if (WARN_ON(!oh)) return; - od = omap_device_build(name, uart->num, oh, pdata, pdata_size, + pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, omap_uart_latency, ARRAY_SIZE(omap_uart_latency), false); - WARN(IS_ERR(od), "Could not build omap_device for %s: %s.\n", + WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", name, oh->name); omap_device_disable_idle_on_suspend(od); @@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) uart->regshift = 2; uart->mapbase = oh->slaves[0]->addr->pa_start; uart->membase = omap_hwmod_get_mpu_rt_va(oh); - uart->pdev = &od->pdev; + uart->pdev = pdev; oh->dev_attr = uart; @@ -846,8 +846,8 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) if ((cpu_is_omap34xx() && uart->padconf) || (uart->wk_en && uart->wk_mask)) { - device_init_wakeup(&od->pdev.dev, true); - DEV_CREATE_FILE(&od->pdev.dev, &dev_attr_sleep_timeout); + device_init_wakeup(&pdev->dev, true); + DEV_CREATE_FILE(&pdev->dev, &dev_attr_sleep_timeout); } /* Enable the MDR1 errata for OMAP3 */ diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 10d3c5e..624264d 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -80,7 +80,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, static int sr_dev_init(struct omap_hwmod *oh, void *user) { struct omap_sr_data *sr_data; - struct omap_device *od; + struct platform_device *pdev; struct omap_volt_data *volt_data; char *name = "smartreflex"; static int i; @@ -120,10 +120,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->enable_on_init = sr_enable_on_init; - od = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), + pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), omap_sr_latency, ARRAY_SIZE(omap_sr_latency), 0); - if (IS_ERR(od)) + if (IS_ERR(pdev)) pr_warning("%s: Could not build omap_device for %s: %s.\n\n", __func__, name, oh->name); exit: diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 3341ca4..0c7caf2 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -135,7 +135,7 @@ static inline int omap2_i2c_add_bus(int bus_id) { int l; struct omap_hwmod *oh; - struct omap_device *od; + struct platform_device *pdev; char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; struct omap_i2c_bus_platform_data *pdata; @@ -160,12 +160,12 @@ static inline int omap2_i2c_add_bus(int bus_id) */ if (cpu_is_omap34xx()) pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; - od = omap_device_build(name, bus_id, oh, pdata, + pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(struct omap_i2c_bus_platform_data), omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0); - WARN(IS_ERR(od), "Could not build omap_device for %s\n", name); + WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); - return PTR_ERR(od); + return PTR_ERR(pdev); } #else static inline int omap2_i2c_add_bus(int bus_id) diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 61d14b3..750f401 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -88,13 +88,13 @@ int omap_device_shutdown(struct platform_device *pdev); /* Core code interface */ -struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, +struct platform_device *omap_device_build(const char *pdev_name, int pdev_id, struct omap_hwmod *oh, void *pdata, int pdata_len, struct omap_device_pm_latency *pm_lats, int pm_lats_cnt, int is_early_device); -struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, +struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, struct omap_hwmod **oh, int oh_cnt, void *pdata, int pdata_len, struct omap_device_pm_latency *pm_lats, diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index d3fdf51..3e8a17b 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -405,7 +405,7 @@ static int omap_device_fill_resources(struct omap_device *od, * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise, * passes along the return value of omap_device_build_ss(). */ -struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, +struct platform_device *omap_device_build(const char *pdev_name, int pdev_id, struct omap_hwmod *oh, void *pdata, int pdata_len, struct omap_device_pm_latency *pm_lats, @@ -438,7 +438,7 @@ struct omap_device *omap_device_build(const char *pdev_name, int pdev_id, * platform_device record. Returns an ERR_PTR() on error, or passes * along the return value of omap_device_register(). */ -struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, +struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, struct omap_hwmod **ohs, int oh_cnt, void *pdata, int pdata_len, struct omap_device_pm_latency *pm_lats, @@ -513,7 +513,7 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, if (ret) goto odbs_exit4; - return od; + return &od->pdev; odbs_exit4: kfree(res); -- cgit v0.10.2 From bfae4f8ffa8249c7cdd1483320cf1adc0ec954ff Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Jul 2011 14:47:53 -0700 Subject: OMAP: omap_device: device register functions now take platform_device pointer The internal device register functions do not need or use any omap_device internals, so pass in a platform_device pointer instead of an omap_device pointer. Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 3e8a17b..a69567e 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -94,8 +94,8 @@ #define USE_WAKEUP_LAT 0 #define IGNORE_WAKEUP_LAT 1 -static int omap_device_register(struct omap_device *od); -static int omap_early_device_register(struct omap_device *od); +static int omap_device_register(struct platform_device *pdev); +static int omap_early_device_register(struct platform_device *pdev); /* Private functions */ @@ -501,9 +501,9 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, od->pm_lats_cnt = pm_lats_cnt; if (is_early_device) - ret = omap_early_device_register(od); + ret = omap_early_device_register(&od->pdev); else - ret = omap_device_register(od); + ret = omap_device_register(&od->pdev); for (i = 0; i < oh_cnt; i++) { hwmods[i]->od = od; @@ -538,11 +538,11 @@ odbs_exit1: * platform_early_add_device() on the underlying platform_device. * Returns 0 by default. */ -static int omap_early_device_register(struct omap_device *od) +static int omap_early_device_register(struct platform_device *pdev) { struct platform_device *devices[1]; - devices[0] = &(od->pdev); + devices[0] = pdev; early_platform_add_devices(devices, 1); return 0; } @@ -638,13 +638,13 @@ static struct dev_pm_domain omap_device_pm_domain = { * platform_device_register() on the underlying platform_device. * Returns the return value of platform_device_register(). */ -static int omap_device_register(struct omap_device *od) +static int omap_device_register(struct platform_device *pdev) { - pr_debug("omap_device: %s: registering\n", od->pdev.name); + pr_debug("omap_device: %s: registering\n", pdev->name); - od->pdev.dev.parent = &omap_device_parent; - od->pdev.dev.pm_domain = &omap_device_pm_domain; - return platform_device_register(&od->pdev); + pdev->dev.parent = &omap_device_parent; + pdev->dev.pm_domain = &omap_device_pm_domain; + return platform_device_register(pdev); } -- cgit v0.10.2 From 9f8b6949d78f1306eef0edc14bc1fbcaf3e58ad0 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 1 Aug 2011 09:33:13 -0700 Subject: OMAP: omap_device: _disable_idle_on_suspend() takes platform_device pointer Public omap_device functions need to take platform_device pointers, conversion to omap_device pointers is done internal to the omap_device layer. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 76abdcb..652ccc5 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -119,7 +119,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) return PTR_ERR(pdev); } - omap_device_disable_idle_on_suspend(od); + omap_device_disable_idle_on_suspend(pdev); gpio_bank_count++; return 0; diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 53b6808..3d1c1d3 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -805,7 +805,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", name, oh->name); - omap_device_disable_idle_on_suspend(od); + omap_device_disable_idle_on_suspend(pdev); oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); uart->irq = oh->mpu_irqs[0].irq; diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 750f401..4f98770 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -116,11 +116,6 @@ int omap_device_enable_hwmods(struct omap_device *od); int omap_device_disable_clocks(struct omap_device *od); int omap_device_enable_clocks(struct omap_device *od); -static inline void omap_device_disable_idle_on_suspend(struct omap_device *od) -{ - od->flags |= OMAP_DEVICE_NO_IDLE_ON_SUSPEND; -} - /* * Entries should be kept in latency order ascending * @@ -153,4 +148,12 @@ struct omap_device_pm_latency { /* Get omap_device pointer from platform_device pointer */ #define to_omap_device(x) container_of((x), struct omap_device, pdev) +static inline +void omap_device_disable_idle_on_suspend(struct platform_device *pdev) +{ + struct omap_device *od = to_omap_device(pdev); + + od->flags |= OMAP_DEVICE_NO_IDLE_ON_SUSPEND; +} + #endif -- cgit v0.10.2 From d66b3fe436a296f102e8944247972fc0c17ddf26 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 21 Jul 2011 13:58:51 -0700 Subject: OMAP: omap_device: decouple platform_device from omap_device Rather than embedding a struct platform_device inside a struct omap_device, decouple them, leaving only a pointer to the platform_device inside the omap_device. Use the arch-specific data field of the platform_device (pdev_archdata) to add an omap_device pointer after the platform_device has been created. Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c index ab8b35b..9262a6b 100644 --- a/arch/arm/mach-omap2/opp.c +++ b/arch/arm/mach-omap2/opp.c @@ -69,7 +69,7 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, opp_def->hwmod_name, i); return -EINVAL; } - dev = &oh->od->pdev.dev; + dev = &oh->od->pdev->dev; r = opp_add(dev, opp_def->freq, opp_def->u_volt); if (r) { diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 4f98770..d4d9b96 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -68,7 +68,7 @@ extern struct device omap_device_parent; * */ struct omap_device { - struct platform_device pdev; + struct platform_device *pdev; struct omap_hwmod **hwmods; struct omap_device_pm_latency *pm_lats; u32 dev_wakeup_lat; @@ -146,7 +146,10 @@ struct omap_device_pm_latency { #define OMAP_DEVICE_LATENCY_AUTO_ADJUST BIT(1) /* Get omap_device pointer from platform_device pointer */ -#define to_omap_device(x) container_of((x), struct omap_device, pdev) +static inline struct omap_device *to_omap_device(struct platform_device *pdev) +{ + return pdev ? pdev->archdata.od : NULL; +} static inline void omap_device_disable_idle_on_suspend(struct platform_device *pdev) diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index a69567e..26aee5c 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -117,7 +117,7 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) { struct timespec a, b, c; - dev_dbg(&od->pdev.dev, "omap_device: activating\n"); + dev_dbg(&od->pdev->dev, "omap_device: activating\n"); while (od->pm_lat_level > 0) { struct omap_device_pm_latency *odpl; @@ -141,7 +141,7 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) c = timespec_sub(b, a); act_lat = timespec_to_ns(&c); - dev_dbg(&od->pdev.dev, + dev_dbg(&od->pdev->dev, "omap_device: pm_lat %d: activate: elapsed time " "%llu nsec\n", od->pm_lat_level, act_lat); @@ -149,12 +149,12 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) odpl->activate_lat_worst = act_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->activate_lat = act_lat; - dev_dbg(&od->pdev.dev, + dev_dbg(&od->pdev->dev, "new worst case activate latency " "%d: %llu\n", od->pm_lat_level, act_lat); } else - dev_warn(&od->pdev.dev, + dev_warn(&od->pdev->dev, "activate latency %d " "higher than exptected. (%llu > %d)\n", od->pm_lat_level, act_lat, @@ -185,7 +185,7 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) { struct timespec a, b, c; - dev_dbg(&od->pdev.dev, "omap_device: deactivating\n"); + dev_dbg(&od->pdev->dev, "omap_device: deactivating\n"); while (od->pm_lat_level < od->pm_lats_cnt) { struct omap_device_pm_latency *odpl; @@ -208,7 +208,7 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) c = timespec_sub(b, a); deact_lat = timespec_to_ns(&c); - dev_dbg(&od->pdev.dev, + dev_dbg(&od->pdev->dev, "omap_device: pm_lat %d: deactivate: elapsed time " "%llu nsec\n", od->pm_lat_level, deact_lat); @@ -216,12 +216,12 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) odpl->deactivate_lat_worst = deact_lat; if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { odpl->deactivate_lat = deact_lat; - dev_dbg(&od->pdev.dev, + dev_dbg(&od->pdev->dev, "new worst case deactivate latency " "%d: %llu\n", od->pm_lat_level, deact_lat); } else - dev_warn(&od->pdev.dev, + dev_warn(&od->pdev->dev, "deactivate latency %d " "higher than exptected. (%llu > %d)\n", od->pm_lat_level, deact_lat, @@ -245,11 +245,11 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, if (!clk_alias || !clk_name) return; - dev_dbg(&od->pdev.dev, "Creating %s -> %s\n", clk_alias, clk_name); + dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name); - r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); + r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias); if (!IS_ERR(r)) { - dev_warn(&od->pdev.dev, + dev_warn(&od->pdev->dev, "alias %s already exists\n", clk_alias); clk_put(r); return; @@ -257,14 +257,14 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, r = omap_clk_get_by_name(clk_name); if (IS_ERR(r)) { - dev_err(&od->pdev.dev, + dev_err(&od->pdev->dev, "omap_clk_get_by_name for %s failed\n", clk_name); return; } - l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); + l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev->dev)); if (!l) { - dev_err(&od->pdev.dev, + dev_err(&od->pdev->dev, "clkdev_alloc for %s failed\n", clk_alias); return; } @@ -351,7 +351,7 @@ static int omap_device_count_resources(struct omap_device *od) c += omap_hwmod_count_resources(od->hwmods[i]); pr_debug("omap_device: %s: counted %d total resources across %d " - "hwmods\n", od->pdev.name, c, od->hwmods_cnt); + "hwmods\n", od->pdev->name, c, od->hwmods_cnt); return c; } @@ -445,8 +445,8 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, int pm_lats_cnt, int is_early_device) { int ret = -ENOMEM; + struct platform_device *pdev; struct omap_device *od; - char *pdev_name2; struct resource *res = NULL; int i, res_count; struct omap_hwmod **hwmods; @@ -457,72 +457,76 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, if (!pdata && pdata_len > 0) return ERR_PTR(-EINVAL); + pdev = platform_device_alloc(pdev_name, pdev_id); + if (!pdev) { + ret = -ENOMEM; + goto odbs_exit; + } + pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name, oh_cnt); od = kzalloc(sizeof(struct omap_device), GFP_KERNEL); - if (!od) - return ERR_PTR(-ENOMEM); - + if (!od) { + ret = -ENOMEM; + goto odbs_exit1; + } od->hwmods_cnt = oh_cnt; hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt, GFP_KERNEL); if (!hwmods) - goto odbs_exit1; + goto odbs_exit2; memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt); od->hwmods = hwmods; - - pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL); - if (!pdev_name2) - goto odbs_exit2; - strcpy(pdev_name2, pdev_name); - - od->pdev.name = pdev_name2; - od->pdev.id = pdev_id; + od->pdev = pdev; res_count = omap_device_count_resources(od); if (res_count > 0) { res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL); if (!res) goto odbs_exit3; - } - omap_device_fill_resources(od, res); - od->pdev.num_resources = res_count; - od->pdev.resource = res; + omap_device_fill_resources(od, res); - ret = platform_device_add_data(&od->pdev, pdata, pdata_len); + ret = platform_device_add_resources(pdev, res, res_count); + kfree(res); + + if (ret) + goto odbs_exit3; + } + + ret = platform_device_add_data(pdev, pdata, pdata_len); if (ret) - goto odbs_exit4; + goto odbs_exit3; - od->pm_lats = pm_lats; - od->pm_lats_cnt = pm_lats_cnt; + pdev->archdata.od = od; if (is_early_device) - ret = omap_early_device_register(&od->pdev); + ret = omap_early_device_register(pdev); else - ret = omap_device_register(&od->pdev); + ret = omap_device_register(pdev); + if (ret) + goto odbs_exit3; + + od->pm_lats = pm_lats; + od->pm_lats_cnt = pm_lats_cnt; for (i = 0; i < oh_cnt; i++) { hwmods[i]->od = od; _add_hwmod_clocks_clkdev(od, hwmods[i]); } - if (ret) - goto odbs_exit4; - - return &od->pdev; + return pdev; -odbs_exit4: - kfree(res); odbs_exit3: - kfree(pdev_name2); -odbs_exit2: kfree(hwmods); -odbs_exit1: +odbs_exit2: kfree(od); +odbs_exit1: + platform_device_put(pdev); +odbs_exit: pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret); @@ -644,7 +648,7 @@ static int omap_device_register(struct platform_device *pdev) pdev->dev.parent = &omap_device_parent; pdev->dev.pm_domain = &omap_device_pm_domain; - return platform_device_register(pdev); + return platform_device_add(pdev); } -- cgit v0.10.2 From dca2d0eb5917ff132d9be13f0afa9ae5d4e80580 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 13 Sep 2011 11:18:44 -0700 Subject: OMAP3: PM: fix UART handling when using no_console_suspend During the idle/suspend path, we expect the console lock to be held so that no console output is done during/after the UARTs are idled. However, when using the no_console_suspend argument on the command-line, the console driver does not take the console lock. This allows the possibility of console activity after UARTs have been disabled. To fix, update the current is_suspending() to also check the console_suspend_enabled flag. Reported-by: Abhilash Koyamangalath Tested-by: Abhilash Koyamangalath Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 7255d9b..c8cbd00 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -55,7 +55,7 @@ static suspend_state_t suspend_state = PM_SUSPEND_ON; static inline bool is_suspending(void) { - return (suspend_state != PM_SUSPEND_ON); + return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled; } #else static inline bool is_suspending(void) -- cgit v0.10.2 From ee17f1147f010898e97dea2524b2aa3bcd2447a4 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 16 Sep 2011 15:44:20 -0700 Subject: ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed Tested-by: Hemant Pedanekar Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index cf1de7d..69466f3 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -78,7 +78,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_gpt; - __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); + __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW); evt->event_handler(evt); return IRQ_HANDLED; @@ -93,7 +93,7 @@ static struct irqaction omap2_gp_timer_irq = { static int omap2_gp_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { - __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, + __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, 0xffffffff - cycles, 1); return 0; @@ -104,16 +104,16 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, { u32 period; - __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); + __omap_dm_timer_stop(&clkev, 1, clkev.rate); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: period = clkev.rate / HZ; period -= 1; /* Looks like we need to first set the load value separately */ - __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, + __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, 0xffffffff - period, 1); - __omap_dm_timer_load_start(clkev.io_base, + __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, 0xffffffff - period, 1); break; @@ -189,7 +189,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, clk_put(src); } } - __omap_dm_timer_reset(timer->io_base, 1, 1); + __omap_dm_timer_init_regs(timer); + __omap_dm_timer_reset(timer, 1, 1); timer->posted = 1; timer->rate = clk_get_rate(timer->fclk); @@ -210,7 +211,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, omap2_gp_timer_irq.dev_id = (void *)&clkev; setup_irq(clkev.irq, &omap2_gp_timer_irq); - __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); + __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, clockevent_gpt.shift); @@ -251,7 +252,7 @@ static struct omap_dm_timer clksrc; static DEFINE_CLOCK_DATA(cd); static cycle_t clocksource_read_cycles(struct clocksource *cs) { - return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); + return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1); } static struct clocksource clocksource_gpt = { @@ -266,7 +267,7 @@ static void notrace dmtimer_update_sched_clock(void) { u32 cyc; - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); + cyc = __omap_dm_timer_read_counter(&clksrc, 1); update_sched_clock(&cd, cyc, (u32)~0); } @@ -276,7 +277,7 @@ unsigned long long notrace sched_clock(void) u32 cyc = 0; if (clksrc.reserved) - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); + cyc = __omap_dm_timer_read_counter(&clksrc, 1); return cyc_to_sched_clock(&cd, cyc, (u32)~0); } @@ -293,7 +294,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id, pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", gptimer_id, clksrc.rate); - __omap_dm_timer_load_start(clksrc.io_base, + __omap_dm_timer_load_start(&clksrc, OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1); init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 75a847d..e23b7cf 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -170,7 +170,8 @@ static spinlock_t dm_timer_lock; */ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) { - return __omap_dm_timer_read(timer->io_base, reg, timer->posted); + WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); + return __omap_dm_timer_read(timer, reg, timer->posted); } /* @@ -182,15 +183,19 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, u32 value) { - __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); + WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET); + __omap_dm_timer_write(timer, reg, value, timer->posted); } static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) { int c; + if (!timer->sys_stat) + return; + c = 0; - while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) { + while (!(__raw_readl(timer->sys_stat) & 1)) { c++; if (c > 100000) { printk(KERN_ERR "Timer failed to reset\n"); @@ -219,7 +224,7 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) if (cpu_class_is_omap2()) wakeup = 1; - __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); + __omap_dm_timer_reset(timer, autoidle, wakeup); timer->posted = 1; } @@ -401,7 +406,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer) rate = clk_get_rate(timer->fclk); #endif - __omap_dm_timer_stop(timer->io_base, timer->posted, rate); + __omap_dm_timer_stop(timer, timer->posted, rate); } EXPORT_SYMBOL_GPL(omap_dm_timer_stop); @@ -466,7 +471,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, } l |= OMAP_TIMER_CTRL_ST; - __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); + __omap_dm_timer_load_start(timer, l, load, timer->posted); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); @@ -519,7 +524,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value) { - __omap_dm_timer_int_enable(timer->io_base, value); + __omap_dm_timer_int_enable(timer, value); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); @@ -527,7 +532,7 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) { unsigned int l; - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG); + l = __raw_readl(timer->irq_stat); return l; } @@ -535,13 +540,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { - __omap_dm_timer_write_status(timer->io_base, value); + __omap_dm_timer_write_status(timer, value); } EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) { - return __omap_dm_timer_read_counter(timer->io_base, timer->posted); + return __omap_dm_timer_read_counter(timer, timer->posted); } EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); @@ -601,6 +606,9 @@ static int __init omap_dm_timer_init(void) dm_timer_count = omap4_dm_timer_count; dm_source_names = omap4_dm_source_names; dm_source_clocks = omap4_dm_source_clocks; + + pr_err("dmtimers disabled for omap4 until hwmod conversion\n"); + return -ENODEV; } if (cpu_class_is_omap2()) @@ -630,8 +638,12 @@ static int __init omap_dm_timer_init(void) if (sys_timer_reserved & (1 << i)) { timer->reserved = 1; timer->posted = 1; + continue; } #endif + omap_dm_timer_enable(timer); + __omap_dm_timer_init_regs(timer); + omap_dm_timer_disable(timer); } return 0; diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index eb5d16c..ad554d3 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -98,12 +98,30 @@ int omap_dm_timers_active(void); * used by dmtimer.c and sys_timer related code. */ -/* register offsets */ -#define _OMAP_TIMER_ID_OFFSET 0x00 -#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 -#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 -#define _OMAP_TIMER_STAT_OFFSET 0x18 -#define _OMAP_TIMER_INT_EN_OFFSET 0x1c +/* + * The interrupt registers are different between v1 and v2 ip. + * These registers are offsets from timer->iobase. + */ +#define OMAP_TIMER_ID_OFFSET 0x00 +#define OMAP_TIMER_OCP_CFG_OFFSET 0x10 + +#define OMAP_TIMER_V1_SYS_STAT_OFFSET 0x14 +#define OMAP_TIMER_V1_STAT_OFFSET 0x18 +#define OMAP_TIMER_V1_INT_EN_OFFSET 0x1c + +#define OMAP_TIMER_V2_IRQSTATUS_RAW 0x24 +#define OMAP_TIMER_V2_IRQSTATUS 0x28 +#define OMAP_TIMER_V2_IRQENABLE_SET 0x2c +#define OMAP_TIMER_V2_IRQENABLE_CLR 0x30 + +/* + * The functional registers have a different base on v1 and v2 ip. + * These registers are offsets from timer->func_base. The func_base + * is samae as io_base for v1 and io_base + 0x14 for v2 ip. + * + */ +#define OMAP_TIMER_V2_FUNC_OFFSET 0x14 + #define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 #define _OMAP_TIMER_CTRL_OFFSET 0x24 #define OMAP_TIMER_CTRL_GPOCFG (1 << 14) @@ -147,21 +165,6 @@ int omap_dm_timers_active(void); /* register offsets with the write pending bit encoded */ #define WPSHIFT 16 -#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ - | (WP_NONE << WPSHIFT)) - -#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ - | (WP_NONE << WPSHIFT)) - #define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ | (WP_NONE << WPSHIFT)) @@ -213,7 +216,14 @@ struct omap_dm_timer { #ifdef CONFIG_ARCH_OMAP2PLUS struct clk *iclk, *fclk; #endif - void __iomem *io_base; + void __iomem *io_base; + void __iomem *sys_stat; /* TISTAT timer status */ + void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */ + void __iomem *irq_ena; /* irq enable */ + void __iomem *irq_dis; /* irq disable, only on v2 ip */ + void __iomem *pend; /* write pending */ + void __iomem *func_base; /* function register base */ + unsigned long rate; unsigned reserved:1; unsigned enabled:1; @@ -223,35 +233,59 @@ struct omap_dm_timer { extern u32 sys_timer_reserved; void omap_dm_timer_prepare(struct omap_dm_timer *timer); -static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, +static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, int posted) { if (posted) - while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) - & (reg >> WPSHIFT)) + while (__raw_readl(timer->pend) & (reg >> WPSHIFT)) cpu_relax(); - return __raw_readl(base + (reg & 0xff)); + return __raw_readl(timer->func_base + (reg & 0xff)); } -static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val, - int posted) +static inline void __omap_dm_timer_write(struct omap_dm_timer *timer, + u32 reg, u32 val, int posted) { if (posted) - while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) - & (reg >> WPSHIFT)) + while (__raw_readl(timer->pend) & (reg >> WPSHIFT)) cpu_relax(); - __raw_writel(val, base + (reg & 0xff)); + __raw_writel(val, timer->func_base + (reg & 0xff)); +} + +static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) +{ + u32 tidr; + + /* Assume v1 ip if bits [31:16] are zero */ + tidr = __raw_readl(timer->io_base); + if (!(tidr >> 16)) { + timer->sys_stat = timer->io_base + + OMAP_TIMER_V1_SYS_STAT_OFFSET; + timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; + timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; + timer->irq_dis = 0; + timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; + timer->func_base = timer->io_base; + } else { + timer->sys_stat = 0; + timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; + timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; + timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; + timer->pend = timer->io_base + + _OMAP_TIMER_WRITE_PEND_OFFSET + + OMAP_TIMER_V2_FUNC_OFFSET; + timer->func_base = timer->io_base + OMAP_TIMER_V2_FUNC_OFFSET; + } } /* Assumes the source clock has been set by caller */ -static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, - int wakeup) +static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer, + int autoidle, int wakeup) { u32 l; - l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0); + l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET); l |= 0x02 << 3; /* Set to smart-idle mode */ l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ @@ -261,10 +295,10 @@ static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, if (wakeup) l |= 1 << 2; - __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0); + __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET); /* Match hardware reset default of posted mode */ - __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG, + __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, OMAP_TIMER_CTRL_POSTED, 0); } @@ -286,18 +320,18 @@ static inline int __omap_dm_timer_set_source(struct clk *timer_fck, return ret; } -static inline void __omap_dm_timer_stop(void __iomem *base, int posted, - unsigned long rate) +static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, + int posted, unsigned long rate) { u32 l; - l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); + l = __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted); if (l & OMAP_TIMER_CTRL_ST) { l &= ~0x1; - __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted); + __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, l, posted); #ifdef CONFIG_ARCH_OMAP2PLUS /* Readback to make sure write has completed */ - __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); + __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted); /* * Wait for functional clock period x 3.5 to make sure that * timer is stopped @@ -307,34 +341,34 @@ static inline void __omap_dm_timer_stop(void __iomem *base, int posted, } /* Ack possibly pending interrupt */ - __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, - OMAP_TIMER_INT_OVERFLOW, 0); + __raw_writel(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat); } -static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl, - unsigned int load, int posted) +static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer, + u32 ctrl, unsigned int load, + int posted) { - __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted); - __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted); + __omap_dm_timer_write(timer, OMAP_TIMER_COUNTER_REG, load, posted); + __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, ctrl, posted); } -static inline void __omap_dm_timer_int_enable(void __iomem *base, +static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer, unsigned int value) { - __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0); - __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0); + __raw_writel(value, timer->irq_ena); + __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0); } -static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base, - int posted) +static inline unsigned int +__omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted) { - return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted); + return __omap_dm_timer_read(timer, OMAP_TIMER_COUNTER_REG, posted); } -static inline void __omap_dm_timer_write_status(void __iomem *base, +static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { - __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0); + __raw_writel(value, timer->irq_stat); } #endif /* __ASM_ARCH_DMTIMER_H */ -- cgit v0.10.2 From f8cf8e47fb87e3b27e63d36fc8d61b11273f37bc Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 20 Sep 2011 15:57:39 -0700 Subject: ARM: OMAP2+: Fix missing inline functions for Makefile cleanup Commit f41caddbe73f52a42f529d668ce47b4d693fd2c0 (omap2+: Use Kconfig symbol in Makefile instead of obj-y) cleaned up the omap2+ Makefile. However this did not account for the inline functions that are now needed for board_flash_init and board_nand_init. Reported-by: Arnd Bergmann Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c index aa1b0cb..30a6f52 100644 --- a/arch/arm/mach-omap2/board-flash.c +++ b/arch/arm/mach-omap2/board-flash.c @@ -148,11 +148,6 @@ __init board_nand_init(struct mtd_partition *nand_parts, board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs; gpmc_nand_init(&board_nand_data); } -#else -void -__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type) -{ -} #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ /** diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h index c240a3f..d25503a 100644 --- a/arch/arm/mach-omap2/board-flash.h +++ b/arch/arm/mach-omap2/board-flash.h @@ -24,7 +24,26 @@ struct flash_partitions { int nr_parts; }; +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) || \ + defined(CONFIG_MTD_ONENAND_OMAP2) || \ + defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) extern void board_flash_init(struct flash_partitions [], char chip_sel[][GPMC_CS_NUM], int nand_type); +#else +static inline void board_flash_init(struct flash_partitions part[], + char chip_sel[][GPMC_CS_NUM], int nand_type) +{ +} +#endif + +#if defined(CONFIG_MTD_NAND_OMAP2) || \ + defined(CONFIG_MTD_NAND_OMAP2_MODULE) extern void board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type); +#else +static inline void board_nand_init(struct mtd_partition *nand_parts, + u8 nr_parts, u8 cs, int nand_type) +{ +} +#endif -- cgit v0.10.2 From 2edc7ba5e8fdba327e16d3d0086e831c5fe6f577 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Wed, 21 Sep 2011 09:24:53 -0700 Subject: ARM: OMAP: voltage: voltage layer present, even when CONFIG_PM=n Even when CONFIG_PM=n, we try to scale the boot voltage to a sane, known value using OPP table to find matching voltage based on boot frequency. This should be done, even when CONFIG_PM=n to avoid mis-configured bootloaders and/or boot voltage assumptions made by boot loaders. Also fixes various compile problems due to depenencies between voltage domain and powerdomain code (also present when CONFIG_PM=n). Reported-by: Arnd Bergmann Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 8247189..ef77a00 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -89,7 +89,6 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ vp44xx_data.o # OMAP voltage domains -ifeq ($(CONFIG_PM),y) voltagedomain-common := voltage.o vc.o vp.o obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ voltagedomains2xxx_data.o @@ -97,7 +96,6 @@ obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ voltagedomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ voltagedomains44xx_data.o -endif # OMAP powerdomain framework powerdomain-common += powerdomain.o powerdomain-common.o diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index 4c09809..16a1b09 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -148,25 +148,11 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, struct omap_volt_data **volt_data); struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); -#ifdef CONFIG_PM int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_voltdm_pmic *pmic); void omap_change_voltscale_method(struct voltagedomain *voltdm, int voltscale_method); int omap_voltage_late_init(void); -#else -static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, - struct omap_voltdm_pmic *pmic) -{ - return -EINVAL; -} -static inline void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method) {} -static inline int omap_voltage_late_init(void) -{ - return -EINVAL; -} -#endif extern void omap2xxx_voltagedomains_init(void); extern void omap3xxx_voltagedomains_init(void); -- cgit v0.10.2 From fbe01f51a8260c1f0a66e8730c4fd2c5160ecb91 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 6 Sep 2011 21:04:10 +0100 Subject: ARM: 7082/1: platform_device: pdev_archdata: add omap_device pointer Add omap_device pointer to the ARM-specific arch data in the platform_device. This will be used to attach OMAP-specific device-data to the platform device with device lifetime. Suggested-by: Russell King Acked-by: Grant Likely Signed-off-by: Kevin Hilman Signed-off-by: Russell King diff --git a/arch/arm/include/asm/device.h b/arch/arm/include/asm/device.h index 9f390ce..b5c9f5b 100644 --- a/arch/arm/include/asm/device.h +++ b/arch/arm/include/asm/device.h @@ -12,7 +12,12 @@ struct dev_archdata { #endif }; +struct omap_device; + struct pdev_archdata { +#ifdef CONFIG_ARCH_OMAP + struct omap_device *od; +#endif }; #endif -- cgit v0.10.2 From 318c3e15cd55c73a26ae22a65a8183655b3003f9 Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:16 +0530 Subject: ARM: OMAP2+: dmtimer: add device names to flck nodes Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be retrieved by doing a clk_get with the corresponding device pointers or device names. Reviewed-by: Santosh Shilimkar Signed-off-by: Tarun Kanti DebBarma Signed-off-by: Thara Gopinath Acked-by: Cousson, Benoit [tony@atomide.com: fixed typo in email address] Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index debc040..14a6277 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1898,6 +1898,54 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "pka_ick", &pka_ick, CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_242X), CLK("musb-hdrc", "fck", &osc_ck, CK_242X), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_242X), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_242X), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_242X), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_242X), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_242X), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_242X), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_242X), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_242X), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_242X), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_242X), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_242X), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_242X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 96a942e..ea6717c 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1998,6 +1998,54 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), CLK("omap_hsmmc.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), CLK("omap_hsmmc.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_243X), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_243X), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_243X), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_243X), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_243X), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_243X), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_243X), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_243X), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_243X), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_243X), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_243X), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_243X), + CLK("omap_timer.1", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.2", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.3", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.4", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.5", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.6", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.7", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.8", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.9", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.10", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.11", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.12", "32k_ck", &func_32k_ck, CK_243X), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_243X), + CLK("omap_timer.1", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.2", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.3", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.4", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.5", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.6", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.7", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.8", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.9", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.10", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.11", "alt_ck", &alt_ck, CK_243X), + CLK("omap_timer.12", "alt_ck", &alt_ck, CK_243X), }; /* diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index dadb8c6..65dd363 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3464,6 +3464,42 @@ static struct omap_clk omap3xxx_clks[] = { CLK("musb-am35x", "fck", &hsotgusb_fck_am35xx, CK_AM35XX), CLK(NULL, "hecc_ck", &hecc_ck, CK_AM35XX), CLK(NULL, "uart4_ick", &uart4_ick_am35xx, CK_AM35XX), + CLK("omap_timer.1", "fck", &gpt1_fck, CK_3XXX), + CLK("omap_timer.2", "fck", &gpt2_fck, CK_3XXX), + CLK("omap_timer.3", "fck", &gpt3_fck, CK_3XXX), + CLK("omap_timer.4", "fck", &gpt4_fck, CK_3XXX), + CLK("omap_timer.5", "fck", &gpt5_fck, CK_3XXX), + CLK("omap_timer.6", "fck", &gpt6_fck, CK_3XXX), + CLK("omap_timer.7", "fck", &gpt7_fck, CK_3XXX), + CLK("omap_timer.8", "fck", &gpt8_fck, CK_3XXX), + CLK("omap_timer.9", "fck", &gpt9_fck, CK_3XXX), + CLK("omap_timer.10", "fck", &gpt10_fck, CK_3XXX), + CLK("omap_timer.11", "fck", &gpt11_fck, CK_3XXX), + CLK("omap_timer.12", "fck", &gpt12_fck, CK_3XXX), + CLK("omap_timer.1", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.2", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.3", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.4", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.5", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.6", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.7", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.8", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.9", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.10", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.11", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.12", "32k_ck", &omap_32k_fck, CK_3XXX), + CLK("omap_timer.1", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.2", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.3", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.4", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.5", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.6", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.7", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.8", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.9", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.10", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.11", "sys_ck", &sys_ck, CK_3XXX), + CLK("omap_timer.12", "sys_ck", &sys_ck, CK_3XXX), }; diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c0b6fbd..946bf04 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3363,6 +3363,39 @@ static struct omap_clk omap44xx_clks[] = { CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), CLK("omap_wdt", "ick", &dummy_ck, CK_443X), + CLK("omap_timer.1", "fck", &timer1_fck, CK_443X), + CLK("omap_timer.2", "fck", &timer2_fck, CK_443X), + CLK("omap_timer.3", "fck", &timer3_fck, CK_443X), + CLK("omap_timer.4", "fck", &timer4_fck, CK_443X), + CLK("omap_timer.5", "fck", &timer5_fck, CK_443X), + CLK("omap_timer.6", "fck", &timer6_fck, CK_443X), + CLK("omap_timer.7", "fck", &timer7_fck, CK_443X), + CLK("omap_timer.8", "fck", &timer8_fck, CK_443X), + CLK("omap_timer.9", "fck", &timer9_fck, CK_443X), + CLK("omap_timer.10", "fck", &timer10_fck, CK_443X), + CLK("omap_timer.11", "fck", &timer11_fck, CK_443X), + CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.4", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.5", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.6", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.7", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.8", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.9", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.10", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.11", "32k_ck", &sys_32k_ck, CK_443X), + CLK("omap_timer.1", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.2", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.3", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.4", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.9", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.10", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.11", "sys_ck", &sys_clkin_ck, CK_443X), + CLK("omap_timer.5", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.6", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.7", "sys_ck", &syc_clk_div_ck, CK_443X), + CLK("omap_timer.8", "sys_ck", &syc_clk_div_ck, CK_443X), }; int __init omap4xxx_clk_init(void) -- cgit v0.10.2 From 97933d6ced601de013f17ad3f589e72cf2266bba Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:17 +0530 Subject: ARM: OMAP1: dmtimer: conversion to platform devices Convert OMAP1 dmtimers into a platform devices and then registers with device model framework so that it can be bound to corresponding driver. Signed-off-by: Thara Gopinath Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar Acked-by: Cousson, Benoit Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 5b114d1..11c85cd2 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o -obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o +obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c new file mode 100644 index 0000000..6e90665 --- /dev/null +++ b/arch/arm/mach-omap1/timer.c @@ -0,0 +1,173 @@ +/** + * OMAP1 Dual-Mode Timers - platform device registration + * + * Contains first level initialization routines which internally + * generates timer device information and registers with linux + * device model. It also has low level function to chnage the timer + * input clock source. + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Tarun Kanti DebBarma + * Thara Gopinath + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +#include + +#include + +#define OMAP1610_GPTIMER1_BASE 0xfffb1400 +#define OMAP1610_GPTIMER2_BASE 0xfffb1c00 +#define OMAP1610_GPTIMER3_BASE 0xfffb2400 +#define OMAP1610_GPTIMER4_BASE 0xfffb2c00 +#define OMAP1610_GPTIMER5_BASE 0xfffb3400 +#define OMAP1610_GPTIMER6_BASE 0xfffb3c00 +#define OMAP1610_GPTIMER7_BASE 0xfffb7400 +#define OMAP1610_GPTIMER8_BASE 0xfffbd400 + +#define OMAP1_DM_TIMER_COUNT 8 + +static int omap1_dm_timer_set_src(struct platform_device *pdev, + int source) +{ + int n = (pdev->id - 1) << 1; + u32 l; + + l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); + l |= source << n; + __raw_writel(l, MOD_CONF_CTRL_1); + + return 0; +} + + +int __init omap1_dm_timer_init(void) +{ + int i; + int ret; + struct dmtimer_platform_data *pdata; + struct platform_device *pdev; + + if (!cpu_is_omap16xx()) + return 0; + + for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) { + struct resource res[2]; + u32 base, irq; + + switch (i) { + case 1: + base = OMAP1610_GPTIMER1_BASE; + irq = INT_1610_GPTIMER1; + break; + case 2: + base = OMAP1610_GPTIMER2_BASE; + irq = INT_1610_GPTIMER2; + break; + case 3: + base = OMAP1610_GPTIMER3_BASE; + irq = INT_1610_GPTIMER3; + break; + case 4: + base = OMAP1610_GPTIMER4_BASE; + irq = INT_1610_GPTIMER4; + break; + case 5: + base = OMAP1610_GPTIMER5_BASE; + irq = INT_1610_GPTIMER5; + break; + case 6: + base = OMAP1610_GPTIMER6_BASE; + irq = INT_1610_GPTIMER6; + break; + case 7: + base = OMAP1610_GPTIMER7_BASE; + irq = INT_1610_GPTIMER7; + break; + case 8: + base = OMAP1610_GPTIMER8_BASE; + irq = INT_1610_GPTIMER8; + break; + default: + /* + * not supposed to reach here. + * this is to remove warning. + */ + return -EINVAL; + } + + pdev = platform_device_alloc("omap_timer", i); + if (!pdev) { + pr_err("%s: Failed to device alloc for dmtimer%d\n", + __func__, i); + return -ENOMEM; + } + + memset(res, 0, 2 * sizeof(struct resource)); + res[0].start = base; + res[0].end = base + 0x46; + res[0].flags = IORESOURCE_MEM; + res[1].start = irq; + res[1].end = irq; + res[1].flags = IORESOURCE_IRQ; + ret = platform_device_add_resources(pdev, res, + ARRAY_SIZE(res)); + if (ret) { + dev_err(&pdev->dev, "%s: Failed to add resources.\n", + __func__); + goto err_free_pdev; + } + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) { + dev_err(&pdev->dev, "%s: Failed to allocate pdata.\n", + __func__); + ret = -ENOMEM; + goto err_free_pdata; + } + + pdata->set_timer_src = omap1_dm_timer_set_src; + pdata->needs_manual_reset = 1; + + ret = platform_device_add_data(pdev, pdata, sizeof(*pdata)); + if (ret) { + dev_err(&pdev->dev, "%s: Failed to add platform data.\n", + __func__); + goto err_free_pdata; + } + + ret = platform_device_add(pdev); + if (ret) { + dev_err(&pdev->dev, "%s: Failed to add platform device.\n", + __func__); + goto err_free_pdata; + } + + dev_dbg(&pdev->dev, " Registered.\n"); + } + + return 0; + +err_free_pdata: + kfree(pdata); + +err_free_pdev: + platform_device_unregister(pdev); + + return ret; +} +arch_initcall(omap1_dm_timer_init); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index e23b7cf..571c14b 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -3,6 +3,12 @@ * * OMAP Dual-Mode Timers * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Tarun Kanti DebBarma + * Thara Gopinath + * + * dmtimer adaptation to platform_driver. + * * Copyright (C) 2005 Nokia Corporation * OMAP2 support by Juha Yrjola * API improvements and OMAP2 clock framework support by Timo Teras @@ -43,25 +49,6 @@ static int dm_timer_count; -#ifdef CONFIG_ARCH_OMAP1 -static struct omap_dm_timer omap1_dm_timers[] = { - { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 }, - { .phys_base = 0xfffb1c00, .irq = INT_1610_GPTIMER2 }, - { .phys_base = 0xfffb2400, .irq = INT_1610_GPTIMER3 }, - { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 }, - { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 }, - { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 }, - { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 }, - { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 }, -}; - -static const int omap1_dm_timer_count = ARRAY_SIZE(omap1_dm_timers); - -#else -#define omap1_dm_timers NULL -#define omap1_dm_timer_count 0 -#endif /* CONFIG_ARCH_OMAP1 */ - #ifdef CONFIG_ARCH_OMAP2 static struct omap_dm_timer omap2_dm_timers[] = { { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, @@ -410,35 +397,20 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer) } EXPORT_SYMBOL_GPL(omap_dm_timer_stop); -#ifdef CONFIG_ARCH_OMAP1 - -int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) -{ - int n = (timer - dm_timers) << 1; - u32 l; - - l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); - l |= source << n; - omap_writel(l, MOD_CONF_CTRL_1); - - return 0; -} -EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); - -#else - int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { if (source < 0 || source >= 3) return -EINVAL; +#ifdef CONFIG_ARCH_OMAP2PLUS return __omap_dm_timer_set_source(timer->fclk, dm_source_clocks[source]); +#else + return 0; +#endif } EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); -#endif - void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int load) { @@ -582,16 +554,12 @@ static int __init omap_dm_timer_init(void) struct omap_dm_timer *timer; int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ - if (!(cpu_is_omap16xx() || cpu_class_is_omap2())) + if (!cpu_class_is_omap2()) return -ENODEV; spin_lock_init(&dm_timer_lock); - if (cpu_class_is_omap1()) { - dm_timers = omap1_dm_timers; - dm_timer_count = omap1_dm_timer_count; - map_size = SZ_2K; - } else if (cpu_is_omap24xx()) { + if (cpu_is_omap24xx()) { dm_timers = omap2_dm_timers; dm_timer_count = omap2_dm_timer_count; dm_source_names = omap2_dm_source_names; diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index ad554d3..1751751 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -35,6 +35,7 @@ #include #include #include +#include #ifndef __ASM_ARCH_DMTIMER_H #define __ASM_ARCH_DMTIMER_H @@ -62,6 +63,12 @@ struct omap_dm_timer; struct clk; +struct dmtimer_platform_data { + int (*set_timer_src)(struct platform_device *pdev, int source); + int timer_ip_version; + u32 needs_manual_reset:1; +}; + struct omap_dm_timer *omap_dm_timer_request(void); struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); void omap_dm_timer_free(struct omap_dm_timer *timer); @@ -228,6 +235,7 @@ struct omap_dm_timer { unsigned reserved:1; unsigned enabled:1; unsigned posted:1; + struct platform_device *pdev; }; extern u32 sys_timer_reserved; -- cgit v0.10.2 From c345c8b09d7a131f3571af55341038054a79efbd Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:18 +0530 Subject: ARM: OMAP2+: dmtimer: convert to platform devices Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma Signed-off-by: Thara Gopinath Reviewed-by: Santosh Shilimkar Acked-by: Cousson, Benoit Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b6ea69a..6d72062 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -269,6 +269,16 @@ static struct omap_hwmod omap2420_iva_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; @@ -309,6 +319,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -345,6 +356,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -381,6 +393,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -417,6 +430,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -453,6 +467,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -490,6 +505,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -526,6 +542,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -562,6 +579,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -598,6 +616,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -634,6 +653,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -670,6 +690,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -706,6 +727,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 56de8d6..a2580d0 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -343,6 +343,16 @@ static struct omap_hwmod omap2430_iva_hwmod = { .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap2430_timer1_hwmod; @@ -383,6 +393,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -419,6 +430,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -455,6 +467,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -491,6 +504,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -527,6 +541,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -563,6 +578,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -599,6 +615,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -635,6 +652,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2430_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -671,6 +689,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -707,6 +726,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -743,6 +763,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), .class = &omap2xxx_timer_hwmod_class, @@ -779,6 +800,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2430_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), .class = &omap2xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index ab35acb..2e4852d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -564,6 +564,21 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .rev = OMAP_TIMER_IP_VERSION_1, }; +/* secure timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_secure_dev_attr = { + .timer_capability = OMAP_TIMER_SECURE, +}; + +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap3xxx_timer1_hwmod; @@ -604,6 +619,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer1_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -649,6 +665,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer2_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -694,6 +711,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer3_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -739,6 +757,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer4_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -784,6 +803,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer5_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -829,6 +849,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer6_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -874,6 +895,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap3xxx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer7_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -919,6 +941,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer8_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -964,6 +987,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer9_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -1000,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer10_slaves), .class = &omap3xxx_timer_1ms_hwmod_class, @@ -1036,6 +1061,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap3xxx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer11_slaves), .class = &omap3xxx_timer_hwmod_class, @@ -1085,6 +1111,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = { .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_secure_dev_attr, .slaves = omap3xxx_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_timer12_slaves), .class = &omap3xxx_timer_hwmod_class, diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index caaf409..393afac 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "omap_hwmod_common_data.h" @@ -4201,6 +4202,16 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { .sysc = &omap44xx_timer_sysc, }; +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, +}; + +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, +}; + /* timer1 */ static struct omap_hwmod omap44xx_timer1_hwmod; static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { @@ -4244,6 +4255,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves), }; @@ -4291,6 +4303,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer2_slaves), }; @@ -4338,6 +4351,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer3_slaves), }; @@ -4385,6 +4399,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer4_slaves), }; @@ -4451,6 +4466,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer5_slaves), }; @@ -4518,6 +4534,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer6_slaves), }; @@ -4584,6 +4601,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap44xx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer7_slaves), }; @@ -4650,6 +4668,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer8_slaves), }; @@ -4697,6 +4716,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer9_slaves), }; @@ -4744,6 +4764,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer10_slaves), }; @@ -4791,6 +4812,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap44xx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_timer11_slaves), }; diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 69466f3..b2829ee 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include @@ -42,6 +43,7 @@ #include #include #include +#include /* Parent clocks, eventually these will come from the clock framework */ @@ -342,3 +344,137 @@ static void __init omap4_timer_init(void) } OMAP_SYS_TIMER(4) #endif + +/** + * omap2_dm_timer_set_src - change the timer input clock source + * @pdev: timer platform device pointer + * @source: array index of parent clock source + */ +static int omap2_dm_timer_set_src(struct platform_device *pdev, int source) +{ + int ret; + struct dmtimer_platform_data *pdata = pdev->dev.platform_data; + struct clk *fclk, *parent; + char *parent_name = NULL; + + fclk = clk_get(&pdev->dev, "fck"); + if (IS_ERR_OR_NULL(fclk)) { + dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n", + __func__, __LINE__); + return -EINVAL; + } + + switch (source) { + case OMAP_TIMER_SRC_SYS_CLK: + parent_name = "sys_ck"; + break; + + case OMAP_TIMER_SRC_32_KHZ: + parent_name = "32k_ck"; + break; + + case OMAP_TIMER_SRC_EXT_CLK: + if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) { + parent_name = "alt_ck"; + break; + } + dev_err(&pdev->dev, "%s: %d: invalid clk src.\n", + __func__, __LINE__); + clk_put(fclk); + return -EINVAL; + } + + parent = clk_get(&pdev->dev, parent_name); + if (IS_ERR_OR_NULL(parent)) { + dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n", + __func__, __LINE__, parent_name); + clk_put(fclk); + return -EINVAL; + } + + ret = clk_set_parent(fclk, parent); + if (IS_ERR_VALUE(ret)) { + dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n", + __func__, parent_name); + ret = -EINVAL; + } + + clk_put(parent); + clk_put(fclk); + + return ret; +} + +struct omap_device_pm_latency omap2_dmtimer_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +/** + * omap_timer_init - build and register timer device with an + * associated timer hwmod + * @oh: timer hwmod pointer to be used to build timer device + * @user: parameter that can be passed from calling hwmod API + * + * Called by omap_hwmod_for_each_by_class to register each of the timer + * devices present in the system. The number of timer devices is known + * by parsing through the hwmod database for a given class name. At the + * end of function call memory is allocated for timer device and it is + * registered to the framework ready to be proved by the driver. + */ +static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) +{ + int id; + int ret = 0; + char *name = "omap_timer"; + struct dmtimer_platform_data *pdata; + struct omap_device *od; + struct omap_timer_capability_dev_attr *timer_dev_attr; + + pr_debug("%s: %s\n", __func__, oh->name); + + /* on secure device, do not register secure timer */ + timer_dev_attr = oh->dev_attr; + if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr) + if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE) + return ret; + + pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); + if (!pdata) { + pr_err("%s: No memory for [%s]\n", __func__, oh->name); + return -ENOMEM; + } + + /* + * Extract the IDs from name field in hwmod database + * and use the same for constructing ids' for the + * timer devices. In a way, we are avoiding usage of + * static variable witin the function to do the same. + * CAUTION: We have to be careful and make sure the + * name in hwmod database does not change in which case + * we might either make corresponding change here or + * switch back static variable mechanism. + */ + sscanf(oh->name, "timer%2d", &id); + + pdata->set_timer_src = omap2_dm_timer_set_src; + pdata->timer_ip_version = oh->class->rev; + + od = omap_device_build(name, id, oh, pdata, sizeof(*pdata), + omap2_dmtimer_latency, + ARRAY_SIZE(omap2_dmtimer_latency), + 0); + + if (IS_ERR(od)) { + pr_err("%s: Can't build omap_device for %s: %s.\n", + __func__, name, oh->name); + ret = -EINVAL; + } + + kfree(pdata); + + return ret; +} diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 1751751..9ed08df 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -1,5 +1,5 @@ /* - * arch/arm/plat-omap/include/mach/dmtimer.h + * arch/arm/plat-omap/include/plat/dmtimer.h * * OMAP Dual-Mode Timers * @@ -60,6 +60,16 @@ * in OMAP4 can be distinguished. */ #define OMAP_TIMER_IP_VERSION_1 0x1 + +/* timer capabilities used in hwmod database */ +#define OMAP_TIMER_SECURE 0x80000000 +#define OMAP_TIMER_ALWON 0x40000000 +#define OMAP_TIMER_HAS_PWM 0x20000000 + +struct omap_timer_capability_dev_attr { + u32 timer_capability; +}; + struct omap_dm_timer; struct clk; -- cgit v0.10.2 From df28472a1b28f5d2a6e5cf66265aa328995fde6b Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:19 +0530 Subject: ARM: OMAP: dmtimer: platform driver Add dmtimer platform driver functions which include: (1) platform driver initialization (2) driver probe function (3) driver remove function Signed-off-by: Tarun Kanti DebBarma Signed-off-by: Thara Gopinath Reviewed-by: Santosh Shilimkar Acked-by: Cousson, Benoit Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 571c14b..92d5aff 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -35,14 +35,9 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include -#include -#include -#include -#include -#include #include #include +#include #include #include #include @@ -149,6 +144,7 @@ static const char **dm_source_names; static struct clk **dm_source_clocks; static spinlock_t dm_timer_lock; +static LIST_HEAD(omap_timer_list); /* * Reads timer registers in posted and non-posted mode. The posted mode bit @@ -549,6 +545,137 @@ int omap_dm_timers_active(void) } EXPORT_SYMBOL_GPL(omap_dm_timers_active); +/** + * omap_dm_timer_probe - probe function called for every registered device + * @pdev: pointer to current timer platform device + * + * Called by driver framework at the end of device registration for all + * timer devices. + */ +static int __devinit omap_dm_timer_probe(struct platform_device *pdev) +{ + int ret; + unsigned long flags; + struct omap_dm_timer *timer; + struct resource *mem, *irq, *ioarea; + struct dmtimer_platform_data *pdata = pdev->dev.platform_data; + + if (!pdata) { + dev_err(&pdev->dev, "%s: no platform data.\n", __func__); + return -ENODEV; + } + + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (unlikely(!irq)) { + dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__); + return -ENODEV; + } + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (unlikely(!mem)) { + dev_err(&pdev->dev, "%s: no memory resource.\n", __func__); + return -ENODEV; + } + + ioarea = request_mem_region(mem->start, resource_size(mem), + pdev->name); + if (!ioarea) { + dev_err(&pdev->dev, "%s: region already claimed.\n", __func__); + return -EBUSY; + } + + timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL); + if (!timer) { + dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n", + __func__); + ret = -ENOMEM; + goto err_free_ioregion; + } + + timer->io_base = ioremap(mem->start, resource_size(mem)); + if (!timer->io_base) { + dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__); + ret = -ENOMEM; + goto err_free_mem; + } + + timer->id = pdev->id; + timer->irq = irq->start; + timer->pdev = pdev; + __omap_dm_timer_init_regs(timer); + + /* add the timer element to the list */ + spin_lock_irqsave(&dm_timer_lock, flags); + list_add_tail(&timer->node, &omap_timer_list); + spin_unlock_irqrestore(&dm_timer_lock, flags); + + dev_dbg(&pdev->dev, "Device Probed.\n"); + + return 0; + +err_free_mem: + kfree(timer); + +err_free_ioregion: + release_mem_region(mem->start, resource_size(mem)); + + return ret; +} + +/** + * omap_dm_timer_remove - cleanup a registered timer device + * @pdev: pointer to current timer platform device + * + * Called by driver framework whenever a timer device is unregistered. + * In addition to freeing platform resources it also deletes the timer + * entry from the local list. + */ +static int __devexit omap_dm_timer_remove(struct platform_device *pdev) +{ + struct omap_dm_timer *timer; + unsigned long flags; + int ret = -EINVAL; + + spin_lock_irqsave(&dm_timer_lock, flags); + list_for_each_entry(timer, &omap_timer_list, node) + if (timer->pdev->id == pdev->id) { + list_del(&timer->node); + kfree(timer); + ret = 0; + break; + } + spin_unlock_irqrestore(&dm_timer_lock, flags); + + return ret; +} + +static struct platform_driver omap_dm_timer_driver = { + .probe = omap_dm_timer_probe, + .remove = omap_dm_timer_remove, + .driver = { + .name = "omap_timer", + }, +}; + +static int __init omap_dm_timer_driver_init(void) +{ + return platform_driver_register(&omap_dm_timer_driver); +} + +static void __exit omap_dm_timer_driver_exit(void) +{ + platform_driver_unregister(&omap_dm_timer_driver); +} + +early_platform_init("earlytimer", &omap_dm_timer_driver); +module_init(omap_dm_timer_driver_init); +module_exit(omap_dm_timer_driver_exit); + +MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRIVER_NAME); +MODULE_AUTHOR("Texas Instruments Inc"); + static int __init omap_dm_timer_init(void) { struct omap_dm_timer *timer; diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 9ed08df..98f186e 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -229,6 +229,7 @@ int omap_dm_timers_active(void); struct omap_dm_timer { unsigned long phys_base; + int id; int irq; #ifdef CONFIG_ARCH_OMAP2PLUS struct clk *iclk, *fclk; @@ -246,6 +247,7 @@ struct omap_dm_timer { unsigned enabled:1; unsigned posted:1; struct platform_device *pdev; + struct list_head node; }; extern u32 sys_timer_reserved; -- cgit v0.10.2 From 3392cdd33a0419e3226910a08b8bdc43b56c95d0 Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:20 +0530 Subject: ARM: OMAP: dmtimer: switch-over to platform device driver Register timer devices by going through hwmod database using hwmod API. The driver probes each of the registered devices. Functionality which are already performed by hwmod framework are removed from timer code. New set of timers present on OMAP4 are now supported. Signed-off-by: Tarun Kanti DebBarma Acked-by: Cousson, Benoit [tony@atomide.com: folded in spinlock changes, left out is_omap2] Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index b2829ee..9c2f588 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -478,3 +478,23 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) return ret; } + +/** + * omap2_dm_timer_init - top level regular device initialization + * + * Uses dedicated hwmod api to parse through hwmod database for + * given class name and then build and register the timer device. + */ +static int __init omap2_dm_timer_init(void) +{ + int ret; + + ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL); + if (unlikely(ret)) { + pr_err("%s: device registration failed.\n", __func__); + return -EINVAL; + } + + return 0; +} +arch_initcall(omap2_dm_timer_init); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 92d5aff..60192086 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -36,120 +36,22 @@ */ #include -#include #include -#include -#include -#include - -static int dm_timer_count; - -#ifdef CONFIG_ARCH_OMAP2 -static struct omap_dm_timer omap2_dm_timers[] = { - { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, - { .phys_base = 0x4802a000, .irq = INT_24XX_GPTIMER2 }, - { .phys_base = 0x48078000, .irq = INT_24XX_GPTIMER3 }, - { .phys_base = 0x4807a000, .irq = INT_24XX_GPTIMER4 }, - { .phys_base = 0x4807c000, .irq = INT_24XX_GPTIMER5 }, - { .phys_base = 0x4807e000, .irq = INT_24XX_GPTIMER6 }, - { .phys_base = 0x48080000, .irq = INT_24XX_GPTIMER7 }, - { .phys_base = 0x48082000, .irq = INT_24XX_GPTIMER8 }, - { .phys_base = 0x48084000, .irq = INT_24XX_GPTIMER9 }, - { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, - { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, - { .phys_base = 0x4808a000, .irq = INT_24XX_GPTIMER12 }, -}; - -static const char *omap2_dm_source_names[] __initdata = { - "sys_ck", - "func_32k_ck", - "alt_ck", - NULL -}; - -static struct clk *omap2_dm_source_clocks[3]; -static const int omap2_dm_timer_count = ARRAY_SIZE(omap2_dm_timers); - -#else -#define omap2_dm_timers NULL -#define omap2_dm_timer_count 0 -#define omap2_dm_source_names NULL -#define omap2_dm_source_clocks NULL -#endif /* CONFIG_ARCH_OMAP2 */ - -#ifdef CONFIG_ARCH_OMAP3 -static struct omap_dm_timer omap3_dm_timers[] = { - { .phys_base = 0x48318000, .irq = INT_24XX_GPTIMER1 }, - { .phys_base = 0x49032000, .irq = INT_24XX_GPTIMER2 }, - { .phys_base = 0x49034000, .irq = INT_24XX_GPTIMER3 }, - { .phys_base = 0x49036000, .irq = INT_24XX_GPTIMER4 }, - { .phys_base = 0x49038000, .irq = INT_24XX_GPTIMER5 }, - { .phys_base = 0x4903A000, .irq = INT_24XX_GPTIMER6 }, - { .phys_base = 0x4903C000, .irq = INT_24XX_GPTIMER7 }, - { .phys_base = 0x4903E000, .irq = INT_24XX_GPTIMER8 }, - { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 }, - { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, - { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, - { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ }, -}; - -static const char *omap3_dm_source_names[] __initdata = { - "sys_ck", - "omap_32k_fck", - NULL -}; - -static struct clk *omap3_dm_source_clocks[2]; -static const int omap3_dm_timer_count = ARRAY_SIZE(omap3_dm_timers); - -#else -#define omap3_dm_timers NULL -#define omap3_dm_timer_count 0 -#define omap3_dm_source_names NULL -#define omap3_dm_source_clocks NULL -#endif /* CONFIG_ARCH_OMAP3 */ - -#ifdef CONFIG_ARCH_OMAP4 -static struct omap_dm_timer omap4_dm_timers[] = { - { .phys_base = 0x4a318000, .irq = OMAP44XX_IRQ_GPT1 }, - { .phys_base = 0x48032000, .irq = OMAP44XX_IRQ_GPT2 }, - { .phys_base = 0x48034000, .irq = OMAP44XX_IRQ_GPT3 }, - { .phys_base = 0x48036000, .irq = OMAP44XX_IRQ_GPT4 }, - { .phys_base = 0x40138000, .irq = OMAP44XX_IRQ_GPT5 }, - { .phys_base = 0x4013a000, .irq = OMAP44XX_IRQ_GPT6 }, - { .phys_base = 0x4013a000, .irq = OMAP44XX_IRQ_GPT7 }, - { .phys_base = 0x4013e000, .irq = OMAP44XX_IRQ_GPT8 }, - { .phys_base = 0x4803e000, .irq = OMAP44XX_IRQ_GPT9 }, - { .phys_base = 0x48086000, .irq = OMAP44XX_IRQ_GPT10 }, - { .phys_base = 0x48088000, .irq = OMAP44XX_IRQ_GPT11 }, - { .phys_base = 0x4a320000, .irq = OMAP44XX_IRQ_GPT12 }, -}; -static const char *omap4_dm_source_names[] __initdata = { - "sys_clkin_ck", - "sys_32k_ck", - NULL -}; -static struct clk *omap4_dm_source_clocks[2]; -static const int omap4_dm_timer_count = ARRAY_SIZE(omap4_dm_timers); +#include -#else -#define omap4_dm_timers NULL -#define omap4_dm_timer_count 0 -#define omap4_dm_source_names NULL -#define omap4_dm_source_clocks NULL -#endif /* CONFIG_ARCH_OMAP4 */ - -static struct omap_dm_timer *dm_timers; -static const char **dm_source_names; -static struct clk **dm_source_clocks; +#include -static spinlock_t dm_timer_lock; static LIST_HEAD(omap_timer_list); +static DEFINE_SPINLOCK(dm_timer_lock); -/* - * Reads timer registers in posted and non-posted mode. The posted mode bit - * is encoded in reg. Note that in posted mode write pending bit must be - * checked. Otherwise a read of a non completed write will produce an error. +/** + * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode + * @timer: timer pointer over which read operation to perform + * @reg: lowest byte holds the register offset + * + * The posted mode bit is encoded in reg. Note that in posted mode write + * pending bit must be checked. Otherwise a read of a non completed write + * will produce an error. */ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) { @@ -157,11 +59,15 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) return __omap_dm_timer_read(timer, reg, timer->posted); } -/* - * Writes timer registers in posted and non-posted mode. The posted mode bit - * is encoded in reg. Note that in posted mode the write pending bit must be - * checked. Otherwise a write on a register which has a pending write will be - * lost. +/** + * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode + * @timer: timer pointer over which write operation is to perform + * @reg: lowest byte holds the register offset + * @value: data to write into the register + * + * The posted mode bit is encoded in reg. Note that in posted mode the write + * pending bit must be checked. Otherwise a write on a register which has a + * pending write will be lost. */ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, u32 value) @@ -189,53 +95,65 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) static void omap_dm_timer_reset(struct omap_dm_timer *timer) { - int autoidle = 0, wakeup = 0; - - if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { + if (timer->pdev->id != 1) { omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); omap_dm_timer_wait_for_reset(timer); } - omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); - - /* Enable autoidle on OMAP2+ */ - if (cpu_class_is_omap2()) - autoidle = 1; - - /* - * Enable wake-up on OMAP2 CPUs. - */ - if (cpu_class_is_omap2()) - wakeup = 1; - __omap_dm_timer_reset(timer, autoidle, wakeup); + __omap_dm_timer_reset(timer, 0, 0); timer->posted = 1; } -void omap_dm_timer_prepare(struct omap_dm_timer *timer) +int omap_dm_timer_prepare(struct omap_dm_timer *timer) { + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + int ret; + + timer->fclk = clk_get(&timer->pdev->dev, "fck"); + if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) { + timer->fclk = NULL; + dev_err(&timer->pdev->dev, ": No fclk handle.\n"); + return -EINVAL; + } + omap_dm_timer_enable(timer); - omap_dm_timer_reset(timer); + + if (pdata->needs_manual_reset) + omap_dm_timer_reset(timer); + + ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); + + timer->posted = 1; + return ret; } struct omap_dm_timer *omap_dm_timer_request(void) { - struct omap_dm_timer *timer = NULL; + struct omap_dm_timer *timer = NULL, *t; unsigned long flags; - int i; + int ret = 0; spin_lock_irqsave(&dm_timer_lock, flags); - for (i = 0; i < dm_timer_count; i++) { - if (dm_timers[i].reserved) + list_for_each_entry(t, &omap_timer_list, node) { + if (t->reserved) continue; - timer = &dm_timers[i]; + timer = t; timer->reserved = 1; break; } + + if (timer) { + ret = omap_dm_timer_prepare(timer); + if (ret) { + timer->reserved = 0; + timer = NULL; + } + } spin_unlock_irqrestore(&dm_timer_lock, flags); - if (timer != NULL) - omap_dm_timer_prepare(timer); + if (!timer) + pr_debug("%s: timer request failed!\n", __func__); return timer; } @@ -243,23 +161,30 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_request); struct omap_dm_timer *omap_dm_timer_request_specific(int id) { - struct omap_dm_timer *timer; + struct omap_dm_timer *timer = NULL, *t; unsigned long flags; + int ret = 0; spin_lock_irqsave(&dm_timer_lock, flags); - if (id <= 0 || id > dm_timer_count || dm_timers[id-1].reserved) { - spin_unlock_irqrestore(&dm_timer_lock, flags); - printk("BUG: warning at %s:%d/%s(): unable to get timer %d\n", - __FILE__, __LINE__, __func__, id); - dump_stack(); - return NULL; + list_for_each_entry(t, &omap_timer_list, node) { + if (t->pdev->id == id && !t->reserved) { + timer = t; + timer->reserved = 1; + break; + } } - timer = &dm_timers[id-1]; - timer->reserved = 1; + if (timer) { + ret = omap_dm_timer_prepare(timer); + if (ret) { + timer->reserved = 0; + timer = NULL; + } + } spin_unlock_irqrestore(&dm_timer_lock, flags); - omap_dm_timer_prepare(timer); + if (!timer) + pr_debug("%s: timer%d request failed!\n", __func__, id); return timer; } @@ -267,9 +192,8 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); void omap_dm_timer_free(struct omap_dm_timer *timer) { - omap_dm_timer_enable(timer); - omap_dm_timer_reset(timer); omap_dm_timer_disable(timer); + clk_put(timer->fclk); WARN_ON(!timer->reserved); timer->reserved = 0; @@ -278,15 +202,15 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_free); void omap_dm_timer_enable(struct omap_dm_timer *timer) { + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + if (timer->enabled) return; -#ifdef CONFIG_ARCH_OMAP2PLUS - if (cpu_class_is_omap2()) { + if (!pdata->needs_manual_reset) { clk_enable(timer->fclk); clk_enable(timer->iclk); } -#endif timer->enabled = 1; } @@ -294,15 +218,15 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable); void omap_dm_timer_disable(struct omap_dm_timer *timer) { + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + if (!timer->enabled) return; -#ifdef CONFIG_ARCH_OMAP2PLUS - if (cpu_class_is_omap2()) { + if (!pdata->needs_manual_reset) { clk_disable(timer->iclk); clk_disable(timer->fclk); } -#endif timer->enabled = 0; } @@ -322,24 +246,29 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq); */ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) { - int i; + int i = 0; + struct omap_dm_timer *timer = NULL; + unsigned long flags; /* If ARMXOR cannot be idled this function call is unnecessary */ if (!(inputmask & (1 << 1))) return inputmask; /* If any active timer is using ARMXOR return modified mask */ - for (i = 0; i < dm_timer_count; i++) { + spin_lock_irqsave(&dm_timer_lock, flags); + list_for_each_entry(timer, &omap_timer_list, node) { u32 l; - l = omap_dm_timer_read_reg(&dm_timers[i], OMAP_TIMER_CTRL_REG); + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (l & OMAP_TIMER_CTRL_ST) { if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0) inputmask &= ~(1 << 1); else inputmask &= ~(1 << 2); } + i++; } + spin_unlock_irqrestore(&dm_timer_lock, flags); return inputmask; } @@ -384,10 +313,10 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); void omap_dm_timer_stop(struct omap_dm_timer *timer) { unsigned long rate = 0; + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; -#ifdef CONFIG_ARCH_OMAP2PLUS - rate = clk_get_rate(timer->fclk); -#endif + if (!pdata->needs_manual_reset) + rate = clk_get_rate(timer->fclk); __omap_dm_timer_stop(timer, timer->posted, rate); } @@ -395,15 +324,17 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop); int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { + int ret; + struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + if (source < 0 || source >= 3) return -EINVAL; -#ifdef CONFIG_ARCH_OMAP2PLUS - return __omap_dm_timer_set_source(timer->fclk, - dm_source_clocks[source]); -#else - return 0; -#endif + omap_dm_timer_disable(timer); + ret = pdata->set_timer_src(timer->pdev, source); + omap_dm_timer_enable(timer); + + return ret; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); @@ -526,13 +457,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter); int omap_dm_timers_active(void) { - int i; - - for (i = 0; i < dm_timer_count; i++) { - struct omap_dm_timer *timer; - - timer = &dm_timers[i]; + struct omap_dm_timer *timer; + list_for_each_entry(timer, &omap_timer_list, node) { if (!timer->enabled) continue; @@ -602,7 +529,6 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) timer->id = pdev->id; timer->irq = irq->start; timer->pdev = pdev; - __omap_dm_timer_init_regs(timer); /* add the timer element to the list */ spin_lock_irqsave(&dm_timer_lock, flags); @@ -675,73 +601,3 @@ MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS("platform:" DRIVER_NAME); MODULE_AUTHOR("Texas Instruments Inc"); - -static int __init omap_dm_timer_init(void) -{ - struct omap_dm_timer *timer; - int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ - - if (!cpu_class_is_omap2()) - return -ENODEV; - - spin_lock_init(&dm_timer_lock); - - if (cpu_is_omap24xx()) { - dm_timers = omap2_dm_timers; - dm_timer_count = omap2_dm_timer_count; - dm_source_names = omap2_dm_source_names; - dm_source_clocks = omap2_dm_source_clocks; - } else if (cpu_is_omap34xx()) { - dm_timers = omap3_dm_timers; - dm_timer_count = omap3_dm_timer_count; - dm_source_names = omap3_dm_source_names; - dm_source_clocks = omap3_dm_source_clocks; - } else if (cpu_is_omap44xx()) { - dm_timers = omap4_dm_timers; - dm_timer_count = omap4_dm_timer_count; - dm_source_names = omap4_dm_source_names; - dm_source_clocks = omap4_dm_source_clocks; - - pr_err("dmtimers disabled for omap4 until hwmod conversion\n"); - return -ENODEV; - } - - if (cpu_class_is_omap2()) - for (i = 0; dm_source_names[i] != NULL; i++) - dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]); - - if (cpu_is_omap243x()) - dm_timers[0].phys_base = 0x49018000; - - for (i = 0; i < dm_timer_count; i++) { - timer = &dm_timers[i]; - - /* Static mapping, never released */ - timer->io_base = ioremap(timer->phys_base, map_size); - BUG_ON(!timer->io_base); - -#ifdef CONFIG_ARCH_OMAP2PLUS - if (cpu_class_is_omap2()) { - char clk_name[16]; - sprintf(clk_name, "gpt%d_ick", i + 1); - timer->iclk = clk_get(NULL, clk_name); - sprintf(clk_name, "gpt%d_fck", i + 1); - timer->fclk = clk_get(NULL, clk_name); - } - - /* One or two timers may be set up early for sys_timer */ - if (sys_timer_reserved & (1 << i)) { - timer->reserved = 1; - timer->posted = 1; - continue; - } -#endif - omap_dm_timer_enable(timer); - __omap_dm_timer_init_regs(timer); - omap_dm_timer_disable(timer); - } - - return 0; -} - -arch_initcall(omap_dm_timer_init); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 98f186e..2ac7538 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -231,9 +231,8 @@ struct omap_dm_timer { unsigned long phys_base; int id; int irq; -#ifdef CONFIG_ARCH_OMAP2PLUS struct clk *iclk, *fclk; -#endif + void __iomem *io_base; void __iomem *sys_stat; /* TISTAT timer status */ void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */ @@ -251,7 +250,7 @@ struct omap_dm_timer { }; extern u32 sys_timer_reserved; -void omap_dm_timer_prepare(struct omap_dm_timer *timer); +int omap_dm_timer_prepare(struct omap_dm_timer *timer); static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, int posted) -- cgit v0.10.2 From ffe07ceae1ae4b00b776c59694eddd9dd615dcea Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:21 +0530 Subject: ARM: OMAP: dmtimer: pm_runtime support Add pm_runtime feature to dmtimer whereby *_runtime_get_sync() is called within omap_dm_timer_enable(), pm_runtime_put() is called in omap_dm_timer_disable(). In addition to calling pm_runtime_enable, we are calling pm_runtime_irq_safe so that they can be called from interrupt context. Signed-off-by: Tarun Kanti DebBarma Signed-off-by: Partha Basak Reviewed-by: Santosh Shilimkar Acked-by: Cousson, Benoit Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 60192086..ac904c2 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -38,6 +38,7 @@ #include #include #include +#include #include @@ -202,33 +203,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_free); void omap_dm_timer_enable(struct omap_dm_timer *timer) { - struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; - - if (timer->enabled) - return; - - if (!pdata->needs_manual_reset) { - clk_enable(timer->fclk); - clk_enable(timer->iclk); - } - - timer->enabled = 1; + pm_runtime_get_sync(&timer->pdev->dev); } EXPORT_SYMBOL_GPL(omap_dm_timer_enable); void omap_dm_timer_disable(struct omap_dm_timer *timer) { - struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; - - if (!timer->enabled) - return; - - if (!pdata->needs_manual_reset) { - clk_disable(timer->iclk); - clk_disable(timer->fclk); - } - - timer->enabled = 0; + pm_runtime_put(&timer->pdev->dev); } EXPORT_SYMBOL_GPL(omap_dm_timer_disable); @@ -460,7 +441,7 @@ int omap_dm_timers_active(void) struct omap_dm_timer *timer; list_for_each_entry(timer, &omap_timer_list, node) { - if (!timer->enabled) + if (!timer->reserved) continue; if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) & @@ -530,6 +511,12 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) timer->irq = irq->start; timer->pdev = pdev; + /* Skip pm_runtime_enable for OMAP1 */ + if (!pdata->needs_manual_reset) { + pm_runtime_enable(&pdev->dev); + pm_runtime_irq_safe(&pdev->dev); + } + /* add the timer element to the list */ spin_lock_irqsave(&dm_timer_lock, flags); list_add_tail(&timer->node, &omap_timer_list); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 2ac7538..4e3a326 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -243,7 +243,6 @@ struct omap_dm_timer { unsigned long rate; unsigned reserved:1; - unsigned enabled:1; unsigned posted:1; struct platform_device *pdev; struct list_head node; -- cgit v0.10.2 From 0dad9faeaeb0fa3524068a94e1745b91e5597c17 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 21 Sep 2011 16:38:51 -0700 Subject: ARM: OMAP: dmtimer: skip reserved timers Pass the reserved flag in pdata and use it. We can now make sys_timer_reserved static to mach-omap2/timer.c. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 9c2f588..f1e3ec1 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -69,7 +69,7 @@ /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ #define MAX_GPTIMER_ID 12 -u32 sys_timer_reserved; +static u32 sys_timer_reserved; /* Clockevent code */ @@ -463,6 +463,10 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) pdata->set_timer_src = omap2_dm_timer_set_src; pdata->timer_ip_version = oh->class->rev; + /* Mark clocksource and clockevent timers as reserved */ + if ((sys_timer_reserved >> (id - 1)) & 0x1) + pdata->reserved = 1; + od = omap_device_build(name, id, oh, pdata, sizeof(*pdata), omap2_dmtimer_latency, ARRAY_SIZE(omap2_dmtimer_latency), diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index ac904c2..c8df3c3 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -509,6 +509,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) timer->id = pdev->id; timer->irq = irq->start; + timer->reserved = pdata->reserved; timer->pdev = pdev; /* Skip pm_runtime_enable for OMAP1 */ @@ -517,6 +518,12 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) pm_runtime_irq_safe(&pdev->dev); } + if (!timer->reserved) { + pm_runtime_get_sync(&pdev->dev); + __omap_dm_timer_init_regs(timer); + pm_runtime_put(&pdev->dev); + } + /* add the timer element to the list */ spin_lock_irqsave(&dm_timer_lock, flags); list_add_tail(&timer->node, &omap_timer_list); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 4e3a326..29764c3 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -77,6 +77,7 @@ struct dmtimer_platform_data { int (*set_timer_src)(struct platform_device *pdev, int source); int timer_ip_version; u32 needs_manual_reset:1; + bool reserved; }; struct omap_dm_timer *omap_dm_timer_request(void); @@ -248,7 +249,6 @@ struct omap_dm_timer { struct list_head node; }; -extern u32 sys_timer_reserved; int omap_dm_timer_prepare(struct omap_dm_timer *timer); static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg, -- cgit v0.10.2 From b481113a8af65f49afed46d4c9132b7af9426684 Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:24 +0530 Subject: ARM: OMAP: dmtimer: low-power mode support Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index f1e3ec1..1140e98 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -44,6 +44,9 @@ #include #include #include +#include + +#include "powerdomain.h" /* Parent clocks, eventually these will come from the clock framework */ @@ -433,6 +436,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) struct dmtimer_platform_data *pdata; struct omap_device *od; struct omap_timer_capability_dev_attr *timer_dev_attr; + struct powerdomain *pwrdm; pr_debug("%s: %s\n", __func__, oh->name); @@ -467,6 +471,11 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) if ((sys_timer_reserved >> (id - 1)) & 0x1) pdata->reserved = 1; + pwrdm = omap_hwmod_get_pwrdm(oh); + pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); +#ifdef CONFIG_PM + pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; +#endif od = omap_device_build(name, id, oh, pdata, sizeof(*pdata), omap2_dmtimer_latency, ARRAY_SIZE(omap2_dmtimer_latency), diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index c8df3c3..43eb750 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -77,6 +77,29 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, __omap_dm_timer_write(timer, reg, value, timer->posted); } +static void omap_timer_restore_context(struct omap_dm_timer *timer) +{ + omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET, + timer->context.tiocp_cfg); + if (timer->revision > 1) + __raw_writel(timer->context.tistat, timer->sys_stat); + + __raw_writel(timer->context.tisr, timer->irq_stat); + omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, + timer->context.twer); + omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, + timer->context.tcrr); + omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, + timer->context.tldr); + omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, + timer->context.tmar); + omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, + timer->context.tsicr); + __raw_writel(timer->context.tier, timer->irq_ena); + omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, + timer->context.tclr); +} + static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) { int c; @@ -96,12 +119,14 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) static void omap_dm_timer_reset(struct omap_dm_timer *timer) { + omap_dm_timer_enable(timer); if (timer->pdev->id != 1) { omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); omap_dm_timer_wait_for_reset(timer); } __omap_dm_timer_reset(timer, 0, 0); + omap_dm_timer_disable(timer); timer->posted = 1; } @@ -117,8 +142,6 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer) return -EINVAL; } - omap_dm_timer_enable(timer); - if (pdata->needs_manual_reset) omap_dm_timer_reset(timer); @@ -193,7 +216,6 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); void omap_dm_timer_free(struct omap_dm_timer *timer) { - omap_dm_timer_disable(timer); clk_put(timer->fclk); WARN_ON(!timer->reserved); @@ -275,6 +297,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); void omap_dm_timer_trigger(struct omap_dm_timer *timer) { + if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + return; + } + omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); } EXPORT_SYMBOL_GPL(omap_dm_timer_trigger); @@ -283,11 +310,23 @@ void omap_dm_timer_start(struct omap_dm_timer *timer) { u32 l; + omap_dm_timer_enable(timer); + + if (timer->loses_context) { + u32 ctx_loss_cnt_after = + timer->get_context_loss_count(&timer->pdev->dev); + if (ctx_loss_cnt_after != timer->ctx_loss_count) + omap_timer_restore_context(timer); + } + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (!(l & OMAP_TIMER_CTRL_ST)) { l |= OMAP_TIMER_CTRL_ST; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); } + + /* Save the context */ + timer->context.tclr = l; } EXPORT_SYMBOL_GPL(omap_dm_timer_start); @@ -311,9 +350,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) if (source < 0 || source >= 3) return -EINVAL; - omap_dm_timer_disable(timer); ret = pdata->set_timer_src(timer->pdev, source); - omap_dm_timer_enable(timer); return ret; } @@ -324,6 +361,7 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, { u32 l; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (autoreload) l |= OMAP_TIMER_CTRL_AR; @@ -333,6 +371,10 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); + /* Save the context */ + timer->context.tclr = l; + timer->context.tldr = load; + omap_dm_timer_disable(timer); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load); @@ -342,6 +384,15 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, { u32 l; + omap_dm_timer_enable(timer); + + if (timer->loses_context) { + u32 ctx_loss_cnt_after = + timer->get_context_loss_count(&timer->pdev->dev); + if (ctx_loss_cnt_after != timer->ctx_loss_count) + omap_timer_restore_context(timer); + } + l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (autoreload) { l |= OMAP_TIMER_CTRL_AR; @@ -352,6 +403,11 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, l |= OMAP_TIMER_CTRL_ST; __omap_dm_timer_load_start(timer, l, load, timer->posted); + + /* Save the context */ + timer->context.tclr = l; + timer->context.tldr = load; + timer->context.tcrr = load; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); @@ -360,6 +416,7 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, { u32 l; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (enable) l |= OMAP_TIMER_CTRL_CE; @@ -367,6 +424,11 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, l &= ~OMAP_TIMER_CTRL_CE; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); + + /* Save the context */ + timer->context.tclr = l; + timer->context.tmar = match; + omap_dm_timer_disable(timer); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_match); @@ -375,6 +437,7 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, { u32 l; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | OMAP_TIMER_CTRL_PT | (0x03 << 10)); @@ -384,6 +447,10 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, l |= OMAP_TIMER_CTRL_PT; l |= trigger << 10; omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + + /* Save the context */ + timer->context.tclr = l; + omap_dm_timer_disable(timer); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm); @@ -391,6 +458,7 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) { u32 l; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2)); if (prescaler >= 0x00 && prescaler <= 0x07) { @@ -398,13 +466,23 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) l |= prescaler << 2; } omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); + + /* Save the context */ + timer->context.tclr = l; + omap_dm_timer_disable(timer); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value) { + omap_dm_timer_enable(timer); __omap_dm_timer_int_enable(timer, value); + + /* Save the context */ + timer->context.tier = value; + timer->context.twer = value; + omap_dm_timer_disable(timer); } EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); @@ -412,6 +490,11 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) { unsigned int l; + if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + return 0; + } + l = __raw_readl(timer->irq_stat); return l; @@ -421,18 +504,33 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { __omap_dm_timer_write_status(timer, value); + /* Save the context */ + timer->context.tisr = value; } EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) { + if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + return 0; + } + return __omap_dm_timer_read_counter(timer, timer->posted); } EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) { + if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + return; + } + omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); + + /* Save the context */ + timer->context.tcrr = value; } EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter); @@ -511,6 +609,8 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev) timer->irq = irq->start; timer->reserved = pdata->reserved; timer->pdev = pdev; + timer->loses_context = pdata->loses_context; + timer->get_context_loss_count = pdata->get_context_loss_count; /* Skip pm_runtime_enable for OMAP1 */ if (!pdata->needs_manual_reset) { diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 29764c3..9519d87 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -73,11 +73,38 @@ struct omap_timer_capability_dev_attr { struct omap_dm_timer; struct clk; +struct timer_regs { + u32 tidr; + u32 tiocp_cfg; + u32 tistat; + u32 tisr; + u32 tier; + u32 twer; + u32 tclr; + u32 tcrr; + u32 tldr; + u32 ttrg; + u32 twps; + u32 tmar; + u32 tcar1; + u32 tsicr; + u32 tcar2; + u32 tpir; + u32 tnir; + u32 tcvr; + u32 tocr; + u32 towr; +}; + struct dmtimer_platform_data { int (*set_timer_src)(struct platform_device *pdev, int source); int timer_ip_version; u32 needs_manual_reset:1; bool reserved; + + bool loses_context; + + u32 (*get_context_loss_count)(struct device *dev); }; struct omap_dm_timer *omap_dm_timer_request(void); @@ -245,8 +272,14 @@ struct omap_dm_timer { unsigned long rate; unsigned reserved:1; unsigned posted:1; + struct timer_regs context; + bool loses_context; + int ctx_loss_count; + int revision; struct platform_device *pdev; struct list_head node; + + u32 (*get_context_loss_count)(struct device *dev); }; int omap_dm_timer_prepare(struct omap_dm_timer *timer); @@ -278,6 +311,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) /* Assume v1 ip if bits [31:16] are zero */ tidr = __raw_readl(timer->io_base); if (!(tidr >> 16)) { + timer->revision = 1; timer->sys_stat = timer->io_base + OMAP_TIMER_V1_SYS_STAT_OFFSET; timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; @@ -286,6 +320,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; timer->func_base = timer->io_base; } else { + timer->revision = 2; timer->sys_stat = 0; timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; -- cgit v0.10.2 From ab4eb8b098c7591459b066cec0325a63792e463b Mon Sep 17 00:00:00 2001 From: Tarun Kanti DebBarma Date: Tue, 20 Sep 2011 17:00:26 +0530 Subject: ARM: OMAP: dmtimer: add error handling to export APIs Add error handling code to export APIs. Signed-off-by: Tarun Kanti DebBarma Reviewed-by: Santosh Shilimkar Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 43eb750..de7896f 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -214,12 +214,16 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) } EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific); -void omap_dm_timer_free(struct omap_dm_timer *timer) +int omap_dm_timer_free(struct omap_dm_timer *timer) { + if (unlikely(!timer)) + return -EINVAL; + clk_put(timer->fclk); WARN_ON(!timer->reserved); timer->reserved = 0; + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_free); @@ -237,7 +241,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_disable); int omap_dm_timer_get_irq(struct omap_dm_timer *timer) { - return timer->irq; + if (timer) + return timer->irq; + return -EINVAL; } EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq); @@ -281,7 +287,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) { - return timer->fclk; + if (timer) + return timer->fclk; + return NULL; } EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk); @@ -295,21 +303,25 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask); #endif -void omap_dm_timer_trigger(struct omap_dm_timer *timer) +int omap_dm_timer_trigger(struct omap_dm_timer *timer) { - if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { - pr_err("%s: timer%d not enabled.\n", __func__, timer->id); - return; + if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer not available or enabled.\n", __func__); + return -EINVAL; } omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_trigger); -void omap_dm_timer_start(struct omap_dm_timer *timer) +int omap_dm_timer_start(struct omap_dm_timer *timer) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); if (timer->loses_context) { @@ -327,25 +339,36 @@ void omap_dm_timer_start(struct omap_dm_timer *timer) /* Save the context */ timer->context.tclr = l; + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_start); -void omap_dm_timer_stop(struct omap_dm_timer *timer) +int omap_dm_timer_stop(struct omap_dm_timer *timer) { unsigned long rate = 0; struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + if (unlikely(!timer)) + return -EINVAL; + if (!pdata->needs_manual_reset) rate = clk_get_rate(timer->fclk); __omap_dm_timer_stop(timer, timer->posted, rate); + + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_stop); int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) { int ret; - struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data; + struct dmtimer_platform_data *pdata; + + if (unlikely(!timer)) + return -EINVAL; + + pdata = timer->pdev->dev.platform_data; if (source < 0 || source >= 3) return -EINVAL; @@ -356,11 +379,14 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) } EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); -void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, +int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int load) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (autoreload) @@ -375,15 +401,19 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, timer->context.tclr = l; timer->context.tldr = load; omap_dm_timer_disable(timer); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load); /* Optimized set_load which removes costly spin wait in timer_start */ -void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, +int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int load) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); if (timer->loses_context) { @@ -408,14 +438,18 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, timer->context.tclr = l; timer->context.tldr = load; timer->context.tcrr = load; + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); -void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, +int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); if (enable) @@ -429,14 +463,18 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, timer->context.tclr = l; timer->context.tmar = match; omap_dm_timer_disable(timer); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_match); -void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, +int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM | @@ -451,13 +489,17 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, /* Save the context */ timer->context.tclr = l; omap_dm_timer_disable(timer); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm); -void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) +int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) { u32 l; + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2)); @@ -470,12 +512,16 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) /* Save the context */ timer->context.tclr = l; omap_dm_timer_disable(timer); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); -void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, +int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value) { + if (unlikely(!timer)) + return -EINVAL; + omap_dm_timer_enable(timer); __omap_dm_timer_int_enable(timer, value); @@ -483,6 +529,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, timer->context.tier = value; timer->context.twer = value; omap_dm_timer_disable(timer); + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); @@ -490,8 +537,8 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) { unsigned int l; - if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { - pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer not available or enabled.\n", __func__); return 0; } @@ -501,18 +548,22 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) } EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); -void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) +int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { + if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) + return -EINVAL; + __omap_dm_timer_write_status(timer, value); /* Save the context */ timer->context.tisr = value; + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) { - if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { - pr_err("%s: timer%d not enabled.\n", __func__, timer->id); + if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer not iavailable or enabled.\n", __func__); return 0; } @@ -520,17 +571,18 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) } EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); -void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) +int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) { - if (unlikely(pm_runtime_suspended(&timer->pdev->dev))) { - pr_err("%s: timer%d not enabled.\n", __func__, timer->id); - return; + if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) { + pr_err("%s: timer not available or enabled.\n", __func__); + return -EINVAL; } omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); /* Save the context */ timer->context.tcrr = value; + return 0; } EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter); diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h index 9519d87..d11025e 100644 --- a/arch/arm/plat-omap/include/plat/dmtimer.h +++ b/arch/arm/plat-omap/include/plat/dmtimer.h @@ -109,7 +109,7 @@ struct dmtimer_platform_data { struct omap_dm_timer *omap_dm_timer_request(void); struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); -void omap_dm_timer_free(struct omap_dm_timer *timer); +int omap_dm_timer_free(struct omap_dm_timer *timer); void omap_dm_timer_enable(struct omap_dm_timer *timer); void omap_dm_timer_disable(struct omap_dm_timer *timer); @@ -118,23 +118,23 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer); u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer); -void omap_dm_timer_trigger(struct omap_dm_timer *timer); -void omap_dm_timer_start(struct omap_dm_timer *timer); -void omap_dm_timer_stop(struct omap_dm_timer *timer); +int omap_dm_timer_trigger(struct omap_dm_timer *timer); +int omap_dm_timer_start(struct omap_dm_timer *timer); +int omap_dm_timer_stop(struct omap_dm_timer *timer); int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); -void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); -void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); -void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); -void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger); -void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); +int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); +int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); +int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); +int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger); +int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); -void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); +int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); -void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); +int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); -void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value); +int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value); int omap_dm_timers_active(void); -- cgit v0.10.2 From 342fd144292a6b64ea869e4052eb250486c8f326 Mon Sep 17 00:00:00 2001 From: Todd Poynor Date: Wed, 24 Aug 2011 19:11:39 +0530 Subject: OMAP: Improve register access in L3 Error handler. * Changed the way of accessing L3 target registers from standard base rather than relative to STDERRLOG_MAIN. * Use ffs() to find error source from the L3_FLAGMUX_REGERRn register. * Remove extra l3_base[] entry. * Modified L3 custom error message. Signed-off-by: Todd Poynor Signed-off-by: sricharan Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 7b9f190..d560c88 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -56,10 +56,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { struct omap4_l3 *l3 = _l3; - int inttype, i, j; + int inttype, i; int err_src = 0; - u32 std_err_main_addr, std_err_main, err_reg; - u32 base, slave_addr, clear; + u32 std_err_main, err_reg, clear, base, l3_targ_base; char *source_name; /* Get the Type of interrupt */ @@ -71,42 +70,43 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) * to determine the source */ base = (u32)l3->l3_base[i]; - err_reg = readl(base + l3_flagmux[i] + (inttype << 3)); + err_reg = readl(base + l3_flagmux[i] + + + L3_FLAGMUX_REGERR0 + (inttype << 3)); /* Get the corresponding error and analyse */ if (err_reg) { /* Identify the source from control status register */ - for (j = 0; !(err_reg & (1 << j)); j++) - ; + err_src = __ffs(err_reg); - err_src = j; /* Read the stderrlog_main_source from clk domain */ - std_err_main_addr = base + *(l3_targ[i] + err_src); - std_err_main = readl(std_err_main_addr); + l3_targ_base = base + *(l3_targ[i] + err_src); + std_err_main = readl(l3_targ_base + + L3_TARG_STDERRLOG_MAIN); switch (std_err_main & CUSTOM_ERROR) { case STANDARD_ERROR: source_name = - l3_targ_stderrlog_main_name[i][err_src]; - - slave_addr = std_err_main_addr + - L3_SLAVE_ADDRESS_OFFSET; + l3_targ_inst_name[i][err_src]; WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", - source_name, readl(slave_addr)); + source_name, + readl(l3_targ_base + + L3_TARG_STDERRLOG_SLVOFSLSB)); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; case CUSTOM_ERROR: source_name = - l3_targ_stderrlog_main_name[i][err_src]; + l3_targ_inst_name[i][err_src]; - WARN(true, "CUSTOM SRESP error with SOURCE:%s\n", - source_name); + WARN(true, "L3 custom error: SOURCE:%s\n", + source_name); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; default: @@ -123,9 +123,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) static int __init omap4_l3_probe(struct platform_device *pdev) { static struct omap4_l3 *l3; - struct resource *res; - int ret; - int irq; + struct resource *res; + int ret, irq; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 359b833..22c0d57 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -23,63 +23,60 @@ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H -/* - * L3 register offsets - */ #define L3_MODULES 3 #define CLEAR_STDERR_LOG (1 << 31) #define CUSTOM_ERROR 0x2 #define STANDARD_ERROR 0x0 #define INBAND_ERROR 0x0 -#define EMIF_KERRLOG_OFFSET 0x10 -#define L3_SLAVE_ADDRESS_OFFSET 0x14 -#define LOGICAL_ADDR_ERRORLOG 0x4 #define L3_APPLICATION_ERROR 0x0 #define L3_DEBUG_ERROR 0x1 +/* L3 TARG register offsets */ +#define L3_TARG_STDERRLOG_MAIN 0x48 +#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c +#define L3_FLAGMUX_REGERR0 0xc + u32 l3_flagmux[L3_MODULES] = { - 0x50C, - 0x100C, - 0X020C + 0x500, + 0x1000, + 0X0200 }; -/* - * L3 Target standard Error register offsets - */ -u32 l3_targ_stderrlog_main_clk1[] = { - 0x148, /* DMM1 */ - 0x248, /* DMM2 */ - 0x348, /* ABE */ - 0x448, /* L4CFG */ - 0x648 /* CLK2 PWR DISC */ +/* L3 Target standard Error register offsets */ +u32 l3_targ_inst_clk1[] = { + 0x100, /* DMM1 */ + 0x200, /* DMM2 */ + 0x300, /* ABE */ + 0x400, /* L4CFG */ + 0x600 /* CLK2 PWR DISC */ }; -u32 l3_targ_stderrlog_main_clk2[] = { - 0x548, /* CORTEX M3 */ - 0x348, /* DSS */ - 0x148, /* GPMC */ - 0x448, /* ISS */ - 0x748, /* IVAHD */ - 0xD48, /* missing in TRM corresponds to AES1*/ - 0x948, /* L4 PER0*/ - 0x248, /* OCMRAM */ - 0x148, /* missing in TRM corresponds to GPMC sERROR*/ - 0x648, /* SGX */ - 0x848, /* SL2 */ - 0x1648, /* C2C */ - 0x1148, /* missing in TRM corresponds PWR DISC CLK1*/ - 0xF48, /* missing in TRM corrsponds to SHA1*/ - 0xE48, /* missing in TRM corresponds to AES2*/ - 0xC48, /* L4 PER3 */ - 0xA48, /* L4 PER1*/ - 0xB48 /* L4 PER2*/ +u32 l3_targ_inst_clk2[] = { + 0x500, /* CORTEX M3 */ + 0x300, /* DSS */ + 0x100, /* GPMC */ + 0x400, /* ISS */ + 0x700, /* IVAHD */ + 0xD00, /* missing in TRM corresponds to AES1*/ + 0x900, /* L4 PER0*/ + 0x200, /* OCMRAM */ + 0x100, /* missing in TRM corresponds to GPMC sERROR*/ + 0x600, /* SGX */ + 0x800, /* SL2 */ + 0x1600, /* C2C */ + 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/ + 0xF00, /* missing in TRM corrsponds to SHA1*/ + 0xE00, /* missing in TRM corresponds to AES2*/ + 0xC00, /* L4 PER3 */ + 0xA00, /* L4 PER1*/ + 0xB00 /* L4 PER2*/ }; -u32 l3_targ_stderrlog_main_clk3[] = { - 0x0148 /* EMUSS */ +u32 l3_targ_inst_clk3[] = { + 0x0100 /* EMUSS */ }; -char *l3_targ_stderrlog_main_name[L3_MODULES][18] = { +char *l3_targ_inst_name[L3_MODULES][18] = { { "DMM1", "DMM2", @@ -113,9 +110,9 @@ char *l3_targ_stderrlog_main_name[L3_MODULES][18] = { }; u32 *l3_targ[L3_MODULES] = { - l3_targ_stderrlog_main_clk1, - l3_targ_stderrlog_main_clk2, - l3_targ_stderrlog_main_clk3, + l3_targ_inst_clk1, + l3_targ_inst_clk2, + l3_targ_inst_clk3, }; struct omap4_l3 { @@ -123,10 +120,9 @@ struct omap4_l3 { struct clk *ick; /* memory base */ - void __iomem *l3_base[4]; + void __iomem *l3_base[L3_MODULES]; int debug_irq; int app_irq; }; - #endif diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 873c0e3..fa07edf 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c @@ -191,10 +191,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) } /* identify the error source */ - for (err_source = 0; !(status & (1 << err_source)); err_source++) - ; + err_source = __ffs(status); - base = l3->rt + *(omap3_l3_bases[int_type] + err_source); + base = l3->rt + omap3_l3_bases[int_type][err_source]; error = omap3_l3_readll(base, L3_ERROR_LOG); if (error) { error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h index ba2ed9a..185d77a 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.h +++ b/arch/arm/mach-omap2/omap_l3_smx.h @@ -40,7 +40,7 @@ #define L3_SI_CONTROL 0x020 #define L3_SI_FLAG_STATUS_0 0x510 -const u64 shift = 1; +static const u64 shift = 1; #define L3_STATUS_0_MPUIA_BRST (shift << 0) #define L3_STATUS_0_MPUIA_RSP (shift << 1) -- cgit v0.10.2 From c1df2dcc90dc6f5110726e9bdcd2353db989c29d Mon Sep 17 00:00:00 2001 From: Todd Poynor Date: Mon, 29 Aug 2011 17:42:23 +0530 Subject: OMAP: Fix a BUG in l3 error handler. With the current sequence of registering the irq and assigning it to the app_irq, debug_irq driver variables, there can be corner cases where the pending irq gets triggered immediately after registering, handler gets called resulting in a crash. So changed this sequence. Signed-off-by: sricharan Signed-off-by: Todd Poynor Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index d560c88..cf237dd 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -124,7 +124,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev) { static struct omap4_l3 *l3; struct resource *res; - int ret, irq; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) @@ -176,8 +176,8 @@ static int __init omap4_l3_probe(struct platform_device *pdev) /* * Setup interrupt Handlers */ - irq = platform_get_irq(pdev, 0); - ret = request_irq(irq, + l3->debug_irq = platform_get_irq(pdev, 0); + ret = request_irq(l3->debug_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-dbg-irq", l3); if (ret) { @@ -185,10 +185,9 @@ static int __init omap4_l3_probe(struct platform_device *pdev) OMAP44XX_IRQ_L3_DBG); goto err3; } - l3->debug_irq = irq; - irq = platform_get_irq(pdev, 1); - ret = request_irq(irq, + l3->app_irq = platform_get_irq(pdev, 1); + ret = request_irq(l3->app_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-app-irq", l3); if (ret) { @@ -196,7 +195,6 @@ static int __init omap4_l3_probe(struct platform_device *pdev) OMAP44XX_IRQ_L3_APP); goto err4; } - l3->app_irq = irq; return 0; -- cgit v0.10.2 From ed0e352073ff86c876ff7820ad0b6bac123082b5 Mon Sep 17 00:00:00 2001 From: sricharan Date: Wed, 24 Aug 2011 20:07:45 +0530 Subject: OMAP: Fix indentation issues in l3 error handler. The indentation problems in the l3 noc and smx error handler files are fixed. Signed-off-by: sricharan Signed-off-by: Santosh Shilimkar Reported-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index cf237dd..1f68e95 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -1,25 +1,25 @@ /* - * OMAP4XXX L3 Interconnect error handling driver - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar - * Sricharan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ + * OMAP4XXX L3 Interconnect error handling driver + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar + * Sricharan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include #include #include @@ -55,7 +55,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { - struct omap4_l3 *l3 = _l3; + struct omap4_l3 *l3 = _l3; int inttype, i; int err_src = 0; u32 std_err_main, err_reg, clear, base, l3_targ_base; @@ -122,7 +122,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) static int __init omap4_l3_probe(struct platform_device *pdev) { - static struct omap4_l3 *l3; + static struct omap4_l3 *l3; struct resource *res; int ret; @@ -182,7 +182,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev) IRQF_DISABLED, "l3-dbg-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_DBG); + OMAP44XX_IRQ_L3_DBG); goto err3; } @@ -192,7 +192,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev) IRQF_DISABLED, "l3-app-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_APP); + OMAP44XX_IRQ_L3_APP); goto err4; } @@ -213,7 +213,7 @@ err0: static int __exit omap4_l3_remove(struct platform_device *pdev) { - struct omap4_l3 *l3 = platform_get_drvdata(pdev); + struct omap4_l3 *l3 = platform_get_drvdata(pdev); free_irq(l3->app_irq, l3); free_irq(l3->debug_irq, l3); @@ -226,9 +226,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev) } static struct platform_driver omap4_l3_driver = { - .remove = __exit_p(omap4_l3_remove), - .driver = { - .name = "omap_l3_noc", + .remove = __exit_p(omap4_l3_remove), + .driver = { + .name = "omap_l3_noc", }, }; diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 22c0d57..9120e70 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -1,25 +1,25 @@ - /* - * OMAP4XXX L3 Interconnect error handling driver header - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar - * sricharan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP4XXX L3 Interconnect error handling driver header + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar + * sricharan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H @@ -32,9 +32,9 @@ #define L3_DEBUG_ERROR 0x1 /* L3 TARG register offsets */ -#define L3_TARG_STDERRLOG_MAIN 0x48 -#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c -#define L3_FLAGMUX_REGERR0 0xc +#define L3_TARG_STDERRLOG_MAIN 0x48 +#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c +#define L3_FLAGMUX_REGERR0 0xc u32 l3_flagmux[L3_MODULES] = { 0x500, @@ -78,34 +78,34 @@ u32 l3_targ_inst_clk3[] = { char *l3_targ_inst_name[L3_MODULES][18] = { { - "DMM1", - "DMM2", - "ABE", - "L4CFG", - "CLK2 PWR DISC", + "DMM1", + "DMM2", + "ABE", + "L4CFG", + "CLK2 PWR DISC", }, { - "CORTEX M3" , - "DSS ", - "GPMC ", - "ISS ", - "IVAHD ", - "AES1", - "L4 PER0", - "OCMRAM ", - "GPMC sERROR", - "SGX ", - "SL2 ", - "C2C ", - "PWR DISC CLK1", - "SHA1", - "AES2", - "L4 PER3", - "L4 PER1", - "L4 PER2", + "CORTEX M3" , + "DSS ", + "GPMC ", + "ISS ", + "IVAHD ", + "AES1", + "L4 PER0", + "OCMRAM ", + "GPMC sERROR", + "SGX ", + "SL2 ", + "C2C ", + "PWR DISC CLK1", + "SHA1", + "AES2", + "L4 PER3", + "L4 PER1", + "L4 PER2", }, { - "EMUSS", + "EMUSS", }, }; @@ -116,13 +116,13 @@ u32 *l3_targ[L3_MODULES] = { }; struct omap4_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base */ void __iomem *l3_base[L3_MODULES]; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; }; #endif diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index fa07edf..a05a62f 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi - * Santosh Shilimkar - * Sricharan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi + * Santosh Shilimkar + * Sricharan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include #include @@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid) } } -/** +/* * omap3_l3_block_irq - handles a register block's irq * @l3: struct omap3_l3 * * @base: register block base address @@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid) static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, u64 error, int error_addr) { - u8 code = omap3_l3_decode_error_code(error); - u8 initid = omap3_l3_decode_initid(error); - u8 multi = error & L3_ERROR_LOG_MULTI; - u32 address = omap3_l3_decode_addr(error_addr); + u8 code = omap3_l3_decode_error_code(error); + u8 initid = omap3_l3_decode_initid(error); + u8 multi = error & L3_ERROR_LOG_MULTI; + u32 address = omap3_l3_decode_addr(error_addr); WARN(true, "%s seen by %s %s at address %x\n", - omap3_l3_code_string(code), - omap3_l3_initiator_string(initid), - multi ? "Multiple Errors" : "", - address); + omap3_l3_code_string(code), + omap3_l3_initiator_string(initid), + multi ? "Multiple Errors" : "", address); return IRQ_HANDLED; } static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) { - struct omap3_l3 *l3 = _l3; - u64 status, clear; - u64 error; - u64 error_addr; - u64 err_source = 0; - void __iomem *base; - int int_type; - irqreturn_t ret = IRQ_NONE; + struct omap3_l3 *l3 = _l3; + u64 status, clear; + u64 error; + u64 error_addr; + u64 err_source = 0; + void __iomem *base; + int int_type; + irqreturn_t ret = IRQ_NONE; int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; if (!int_type) { @@ -197,7 +196,6 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) error = omap3_l3_readll(base, L3_ERROR_LOG); if (error) { error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); - ret |= omap3_l3_block_irq(l3, error, error_addr); } @@ -214,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) static int __init omap3_l3_probe(struct platform_device *pdev) { - struct omap3_l3 *l3; - struct resource *res; - int ret; + struct omap3_l3 *l3; + struct resource *res; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h index 185d77a..18e5ec2 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.h +++ b/arch/arm/mach-omap2/omap_l3_smx.h @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver header - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi - * Santosh Shilimkar - * sricharan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver header + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi + * Santosh Shilimkar + * sricharan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H @@ -78,32 +78,32 @@ static const u64 shift = 1; #define L3_STATUS_0_L4EMUTA_REQ (shift << 60) #define L3_STATUS_0_MAD2DTA_REQ (shift << 61) -#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ - | L3_STATUS_0_MPUIA_RSP \ - | L3_STATUS_0_IVAIA_BRST \ - | L3_STATUS_0_IVAIA_RSP \ - | L3_STATUS_0_SGXIA_BRST \ - | L3_STATUS_0_SGXIA_RSP \ - | L3_STATUS_0_CAMIA_BRST \ - | L3_STATUS_0_CAMIA_RSP \ - | L3_STATUS_0_DISPIA_BRST \ - | L3_STATUS_0_DISPIA_RSP \ - | L3_STATUS_0_DMARDIA_BRST \ - | L3_STATUS_0_DMARDIA_RSP \ - | L3_STATUS_0_DMAWRIA_BRST \ - | L3_STATUS_0_DMAWRIA_RSP \ - | L3_STATUS_0_USBOTGIA_BRST \ - | L3_STATUS_0_USBOTGIA_RSP \ - | L3_STATUS_0_USBHOSTIA_BRST \ - | L3_STATUS_0_SMSTA_REQ \ - | L3_STATUS_0_GPMCTA_REQ \ - | L3_STATUS_0_OCMRAMTA_REQ \ - | L3_STATUS_0_OCMROMTA_REQ \ - | L3_STATUS_0_IVATA_REQ \ - | L3_STATUS_0_SGXTA_REQ \ - | L3_STATUS_0_L4CORETA_REQ \ - | L3_STATUS_0_L4PERTA_REQ \ - | L3_STATUS_0_L4EMUTA_REQ \ +#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ + | L3_STATUS_0_MPUIA_RSP \ + | L3_STATUS_0_IVAIA_BRST \ + | L3_STATUS_0_IVAIA_RSP \ + | L3_STATUS_0_SGXIA_BRST \ + | L3_STATUS_0_SGXIA_RSP \ + | L3_STATUS_0_CAMIA_BRST \ + | L3_STATUS_0_CAMIA_RSP \ + | L3_STATUS_0_DISPIA_BRST \ + | L3_STATUS_0_DISPIA_RSP \ + | L3_STATUS_0_DMARDIA_BRST \ + | L3_STATUS_0_DMARDIA_RSP \ + | L3_STATUS_0_DMAWRIA_BRST \ + | L3_STATUS_0_DMAWRIA_RSP \ + | L3_STATUS_0_USBOTGIA_BRST \ + | L3_STATUS_0_USBOTGIA_RSP \ + | L3_STATUS_0_USBHOSTIA_BRST \ + | L3_STATUS_0_SMSTA_REQ \ + | L3_STATUS_0_GPMCTA_REQ \ + | L3_STATUS_0_OCMRAMTA_REQ \ + | L3_STATUS_0_OCMROMTA_REQ \ + | L3_STATUS_0_IVATA_REQ \ + | L3_STATUS_0_SGXTA_REQ \ + | L3_STATUS_0_L4CORETA_REQ \ + | L3_STATUS_0_L4PERTA_REQ \ + | L3_STATUS_0_L4EMUTA_REQ \ | L3_STATUS_0_MAD2DTA_REQ) #define L3_SI_FLAG_STATUS_1 0x530 @@ -137,19 +137,19 @@ static const u64 shift = 1; enum omap3_l3_initiator_id { /* LCD has 1 ID */ - OMAP_L3_LCD = 29, + OMAP_L3_LCD = 29, /* SAD2D has 1 ID */ - OMAP_L3_SAD2D = 28, + OMAP_L3_SAD2D = 28, /* MPU has 5 IDs */ - OMAP_L3_IA_MPU_SS_1 = 27, - OMAP_L3_IA_MPU_SS_2 = 26, - OMAP_L3_IA_MPU_SS_3 = 25, - OMAP_L3_IA_MPU_SS_4 = 24, - OMAP_L3_IA_MPU_SS_5 = 23, + OMAP_L3_IA_MPU_SS_1 = 27, + OMAP_L3_IA_MPU_SS_2 = 26, + OMAP_L3_IA_MPU_SS_3 = 25, + OMAP_L3_IA_MPU_SS_4 = 24, + OMAP_L3_IA_MPU_SS_5 = 23, /* IVA2.2 SS has 3 IDs*/ - OMAP_L3_IA_IVA_SS_1 = 22, - OMAP_L3_IA_IVA_SS_2 = 21, - OMAP_L3_IA_IVA_SS_3 = 20, + OMAP_L3_IA_IVA_SS_1 = 22, + OMAP_L3_IA_IVA_SS_2 = 21, + OMAP_L3_IA_IVA_SS_3 = 20, /* IVA 2.2 SS DMA has 6 IDS */ OMAP_L3_IA_IVA_SS_DMA_1 = 19, OMAP_L3_IA_IVA_SS_DMA_2 = 18, @@ -158,25 +158,25 @@ enum omap3_l3_initiator_id { OMAP_L3_IA_IVA_SS_DMA_5 = 15, OMAP_L3_IA_IVA_SS_DMA_6 = 14, /* SGX has 1 ID */ - OMAP_L3_IA_SGX = 13, + OMAP_L3_IA_SGX = 13, /* CAM has 3 ID */ - OMAP_L3_IA_CAM_1 = 12, - OMAP_L3_IA_CAM_2 = 11, - OMAP_L3_IA_CAM_3 = 10, + OMAP_L3_IA_CAM_1 = 12, + OMAP_L3_IA_CAM_2 = 11, + OMAP_L3_IA_CAM_3 = 10, /* DAP has 1 ID */ - OMAP_L3_IA_DAP = 9, + OMAP_L3_IA_DAP = 9, /* SDMA WR has 2 IDs */ - OMAP_L3_SDMA_WR_1 = 8, - OMAP_L3_SDMA_WR_2 = 7, + OMAP_L3_SDMA_WR_1 = 8, + OMAP_L3_SDMA_WR_2 = 7, /* SDMA RD has 4 IDs */ - OMAP_L3_SDMA_RD_1 = 6, - OMAP_L3_SDMA_RD_2 = 5, - OMAP_L3_SDMA_RD_3 = 4, - OMAP_L3_SDMA_RD_4 = 3, + OMAP_L3_SDMA_RD_1 = 6, + OMAP_L3_SDMA_RD_2 = 5, + OMAP_L3_SDMA_RD_3 = 4, + OMAP_L3_SDMA_RD_4 = 3, /* HSUSB OTG has 1 ID */ - OMAP_L3_USBOTG = 2, + OMAP_L3_USBOTG = 2, /* HSUSB HOST has 1 ID */ - OMAP_L3_USBHOST = 1, + OMAP_L3_USBHOST = 1, }; enum omap3_l3_code { @@ -192,17 +192,17 @@ enum omap3_l3_code { }; struct omap3_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base*/ - void __iomem *rt; + void __iomem *rt; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; /* true when and inband functional error occurs */ - unsigned inband:1; + unsigned inband:1; }; /* offsets for l3 agents in order with the Flag status register */ -- cgit v0.10.2 From 6616aac66d798f3f185d90d9057e47abd7d3c9b3 Mon Sep 17 00:00:00 2001 From: sricharan Date: Tue, 23 Aug 2011 12:58:48 +0530 Subject: OMAP: Fix sparse warnings in l3 error handler. Fix below sparse warnings from the l3-noc and l3-smx error handlers files. arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] * arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static? CC arch/arm/mach-omap2/omap_l3_smx.o CHECK arch/arm/mach-omap2/omap_l3_noc.c arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] * arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] * arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] * arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] * arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] * arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int Signed-off-by: sricharan Signed-off-by: Santosh Shilimkar Reported-by: Paul Walmsley Reviewed-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 1f68e95..8f18357 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) struct omap4_l3 *l3 = _l3; int inttype, i; int err_src = 0; - u32 std_err_main, err_reg, clear, base, l3_targ_base; + u32 std_err_main, err_reg, clear; + void __iomem *base, *l3_targ_base; char *source_name; /* Get the Type of interrupt */ @@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) * Read the regerr register of the clock domain * to determine the source */ - base = (u32)l3->l3_base[i]; - err_reg = readl(base + l3_flagmux[i] + + base = l3->l3_base[i]; + err_reg = __raw_readl(base + l3_flagmux[i] + + L3_FLAGMUX_REGERR0 + (inttype << 3)); /* Get the corresponding error and analyse */ @@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) /* Read the stderrlog_main_source from clk domain */ l3_targ_base = base + *(l3_targ[i] + err_src); - std_err_main = readl(l3_targ_base + + std_err_main = __raw_readl(l3_targ_base + L3_TARG_STDERRLOG_MAIN); switch (std_err_main & CUSTOM_ERROR) { @@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) l3_targ_inst_name[i][err_src]; WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", source_name, - readl(l3_targ_base + + __raw_readl(l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB)); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 9120e70..74c1643 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -36,14 +36,14 @@ #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c #define L3_FLAGMUX_REGERR0 0xc -u32 l3_flagmux[L3_MODULES] = { +static u32 l3_flagmux[L3_MODULES] = { 0x500, 0x1000, 0X0200 }; /* L3 Target standard Error register offsets */ -u32 l3_targ_inst_clk1[] = { +static u32 l3_targ_inst_clk1[] = { 0x100, /* DMM1 */ 0x200, /* DMM2 */ 0x300, /* ABE */ @@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = { 0x600 /* CLK2 PWR DISC */ }; -u32 l3_targ_inst_clk2[] = { +static u32 l3_targ_inst_clk2[] = { 0x500, /* CORTEX M3 */ 0x300, /* DSS */ 0x100, /* GPMC */ @@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = { 0xB00 /* L4 PER2*/ }; -u32 l3_targ_inst_clk3[] = { +static u32 l3_targ_inst_clk3[] = { 0x0100 /* EMUSS */ }; -char *l3_targ_inst_name[L3_MODULES][18] = { +static char *l3_targ_inst_name[L3_MODULES][18] = { { "DMM1", "DMM2", @@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = { }, }; -u32 *l3_targ[L3_MODULES] = { +static u32 *l3_targ[L3_MODULES] = { l3_targ_inst_clk1, l3_targ_inst_clk2, l3_targ_inst_clk3, diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h index 18e5ec2..4f3cebc 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.h +++ b/arch/arm/mach-omap2/omap_l3_smx.h @@ -206,7 +206,7 @@ struct omap3_l3 { }; /* offsets for l3 agents in order with the Flag status register */ -unsigned int __iomem omap3_l3_app_bases[] = { +static unsigned int omap3_l3_app_bases[] = { /* MPU IA */ 0x1400, 0x1400, @@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = { 0, }; -unsigned int __iomem omap3_l3_debug_bases[] = { +static unsigned int omap3_l3_debug_bases[] = { /* MPU DATA IA */ 0x1400, /* RESERVED */ @@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = { /* REST RESERVED */ }; -u32 *omap3_l3_bases[] = { +static u32 *omap3_l3_bases[] = { omap3_l3_app_bases, omap3_l3_debug_bases, }; -- cgit v0.10.2 From 551a9fa9b1f01aa16f9007337b3cc12216c732fa Mon Sep 17 00:00:00 2001 From: sricharan Date: Wed, 7 Sep 2011 17:25:16 +0530 Subject: OMAP: Print Initiator name for l3 custom error. The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging. Based on a internal patch by Devaraj Rangasamy Signed-off-by: sricharan Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 8f18357..07a3d3e 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -56,11 +56,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { struct omap4_l3 *l3 = _l3; - int inttype, i; + int inttype, i, k; int err_src = 0; - u32 std_err_main, err_reg, clear; + u32 std_err_main, err_reg, clear, masterid; void __iomem *base, *l3_targ_base; - char *source_name; + char *target_name, *master_name = "UN IDENTIFIED"; /* Get the Type of interrupt */ inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; @@ -83,13 +83,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) l3_targ_base = base + *(l3_targ[i] + err_src); std_err_main = __raw_readl(l3_targ_base + L3_TARG_STDERRLOG_MAIN); + masterid = __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_MSTADDR); switch (std_err_main & CUSTOM_ERROR) { case STANDARD_ERROR: - source_name = + target_name = l3_targ_inst_name[i][err_src]; - WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", - source_name, + WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n", + target_name, __raw_readl(l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB)); /* clear the std error log*/ @@ -99,11 +101,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) break; case CUSTOM_ERROR: - source_name = + target_name = l3_targ_inst_name[i][err_src]; - - WARN(true, "L3 custom error: SOURCE:%s\n", - source_name); + for (k = 0; k < NUM_OF_L3_MASTERS; k++) { + if (masterid == l3_masters[k].id) + master_name = + l3_masters[k].name; + } + WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n", + master_name, target_name); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; writel(clear, l3_targ_base + diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 74c1643..90b5098 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -34,8 +34,11 @@ /* L3 TARG register offsets */ #define L3_TARG_STDERRLOG_MAIN 0x48 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c +#define L3_TARG_STDERRLOG_MSTADDR 0x68 #define L3_FLAGMUX_REGERR0 0xc +#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0])) + static u32 l3_flagmux[L3_MODULES] = { 0x500, 0x1000, @@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = { 0x0100 /* EMUSS */ }; +static struct l3_masters_data { + u32 id; + char name[10]; +} l3_masters[] = { + { 0x0 , "MPU"}, + { 0x10, "CS_ADP"}, + { 0x14, "xxx"}, + { 0x20, "DSP"}, + { 0x30, "IVAHD"}, + { 0x40, "ISS"}, + { 0x44, "DucatiM3"}, + { 0x48, "FaceDetect"}, + { 0x50, "SDMA_Rd"}, + { 0x54, "SDMA_Wr"}, + { 0x58, "xxx"}, + { 0x5C, "xxx"}, + { 0x60, "SGX"}, + { 0x70, "DSS"}, + { 0x80, "C2C"}, + { 0x88, "xxx"}, + { 0x8C, "xxx"}, + { 0x90, "HSI"}, + { 0xA0, "MMC1"}, + { 0xA4, "MMC2"}, + { 0xA8, "MMC6"}, + { 0xB0, "UNIPRO1"}, + { 0xC0, "USBHOSTHS"}, + { 0xC4, "USBOTGHS"}, + { 0xC8, "USBHOSTFS"} +}; + static char *l3_targ_inst_name[L3_MODULES][18] = { { "DMM1", -- cgit v0.10.2 From cefcadeaa7d5681b88b3ee2272d961c23a70a091 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Fri, 24 Jun 2011 20:31:27 -0500 Subject: OMAP4: Fix the emif and dmm virtual mapping Fix the address overlap with Emulation domain (EMU). The previous mapping was entering into EMU mapping and was not as per comments. Fix the mapping accordingly. Signed-off-by: Girish S G Signed-off-by: Santosh Shilimkar diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index d72ec85..fb5fd24 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -228,13 +228,13 @@ #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE /* 0x4d000000 --> 0xfd200000 */ -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET) #define OMAP44XX_EMIF2_SIZE SZ_1M +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE) #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE /* 0x4e000000 --> 0xfd300000 */ -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET) #define OMAP44XX_DMM_SIZE SZ_1M +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) /* * ---------------------------------------------------------------------------- * Omap specific register access -- cgit v0.10.2 From 00a327c05c31a19ae2e36cdb556ad283a751fc4b Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:37 +0300 Subject: ARM: OMAP: mcbsp: Remove unused variables from platform data These variables got unused after McBSP was converted to use resource structures. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 9882c65..8ab14d8 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -348,14 +348,7 @@ struct omap_mcbsp_ops { }; struct omap_mcbsp_platform_data { - unsigned long phys_base; - u8 dma_rx_sync, dma_tx_sync; - u16 rx_irq, tx_irq; struct omap_mcbsp_ops *ops; -#ifdef CONFIG_ARCH_OMAP3 - /* Sidetone block for McBSP 2 and 3 */ - unsigned long phys_base_st; -#endif u16 buffer_size; unsigned int mcbsp_config_type; }; -- cgit v0.10.2 From 40246e0003f02160a116db249270129b0c600e95 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:38 +0300 Subject: ARM: OMAP: mcbsp: Move out omap_mcbsp_register_board_cfg from plat-omap/devices.c Only OMAP1s are using omap_mcbsp_register_board_cfg after OMAP2+ hwmod conversion so it can be moved to mach-omap1/mcbsp.c. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index ab7395d..3c985ac 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -31,6 +31,7 @@ static int dsp_use; static struct clk *api_clk; static struct clk *dsp_clk; +static struct platform_device **omap_mcbsp_devices; static void omap1_mcbsp_request(unsigned int id) { @@ -369,6 +370,37 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { #define OMAP16XX_MCBSP_COUNT 0 #endif +static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size) +{ + int i; + + omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), + GFP_KERNEL); + if (!omap_mcbsp_devices) { + printk(KERN_ERR "Could not register McBSP devices\n"); + return; + } + + for (i = 0; i < size; i++) { + struct platform_device *new_mcbsp; + int ret; + + new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); + if (!new_mcbsp) + continue; + platform_device_add_resources(new_mcbsp, &res[i * res_count], + res_count); + new_mcbsp->dev.platform_data = &config[i]; + ret = platform_device_add(new_mcbsp); + if (ret) { + platform_device_put(new_mcbsp); + continue; + } + omap_mcbsp_devices[i] = new_mcbsp; + } +} + static int __init omap1_mcbsp_init(void) { if (!cpu_class_is_omap1()) diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index ea28f98..bd9a06b 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -26,54 +26,8 @@ #include #include #include -#include #include -/*-------------------------------------------------------------------------*/ - -#if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE) - -static struct platform_device **omap_mcbsp_devices; - -void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, - struct omap_mcbsp_platform_data *config, int size) -{ - int i; - - omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), - GFP_KERNEL); - if (!omap_mcbsp_devices) { - printk(KERN_ERR "Could not register McBSP devices\n"); - return; - } - - for (i = 0; i < size; i++) { - struct platform_device *new_mcbsp; - int ret; - - new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); - if (!new_mcbsp) - continue; - platform_device_add_resources(new_mcbsp, &res[i * res_count], - res_count); - new_mcbsp->dev.platform_data = &config[i]; - ret = platform_device_add(new_mcbsp); - if (ret) { - platform_device_put(new_mcbsp); - continue; - } - omap_mcbsp_devices[i] = new_mcbsp; - } -} - -#else -void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, - struct omap_mcbsp_platform_data *config, int size) -{ } -#endif - -/*-------------------------------------------------------------------------*/ - #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8ab14d8..7adfd92 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -407,8 +407,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size; #define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; int omap_mcbsp_init(void); -void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, - struct omap_mcbsp_platform_data *config, int size); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); #ifdef CONFIG_ARCH_OMAP3 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); -- cgit v0.10.2 From cdc71514a0f4f3e8c995f18d1119cef01a501dac Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:39 +0300 Subject: ARM: OMAP: mcbsp: Implement generic register access Register access can be made more generic by calculating register address offsets runtime from common register definitions and by using reg_size and reg_step variables that are passed via platform data. Common register definitions are possible since McBSP registers are ordered similarly between OMAP versions. Remove also references to OMAP2+ specific config_type variable from generic McBSP code since other variables and feature flags are better to carry needed information from platform code. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 3c985ac..36ab5d8 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -391,6 +391,8 @@ static void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, continue; platform_device_add_resources(new_mcbsp, &res[i * res_count], res_count); + config[i].reg_size = 2; + config[i].reg_step = 2; new_mcbsp->dev.platform_data = &config[i]; ret = platform_device_add(new_mcbsp); if (ret) { diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 7a42f32..43b9ccf 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -126,7 +126,11 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) return -ENOMEM; } - pdata->mcbsp_config_type = oh->class->rev; + pdata->reg_step = 4; + if (oh->class->rev < MCBSP_CONFIG_TYPE2) + pdata->reg_size = 2; + else + pdata->reg_size = 4; if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (id == 2) diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 7adfd92..14bc1cb 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -51,93 +51,60 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP1610_MCBSP2_BASE 0xfffb1000 #define OMAP1610_MCBSP3_BASE 0xe1017000 -#ifdef CONFIG_ARCH_OMAP1 - -#define OMAP_MCBSP_REG_DRR2 0x00 -#define OMAP_MCBSP_REG_DRR1 0x02 -#define OMAP_MCBSP_REG_DXR2 0x04 -#define OMAP_MCBSP_REG_DXR1 0x06 -#define OMAP_MCBSP_REG_DRR 0x02 -#define OMAP_MCBSP_REG_DXR 0x06 -#define OMAP_MCBSP_REG_SPCR2 0x08 -#define OMAP_MCBSP_REG_SPCR1 0x0a -#define OMAP_MCBSP_REG_RCR2 0x0c -#define OMAP_MCBSP_REG_RCR1 0x0e -#define OMAP_MCBSP_REG_XCR2 0x10 -#define OMAP_MCBSP_REG_XCR1 0x12 -#define OMAP_MCBSP_REG_SRGR2 0x14 -#define OMAP_MCBSP_REG_SRGR1 0x16 -#define OMAP_MCBSP_REG_MCR2 0x18 -#define OMAP_MCBSP_REG_MCR1 0x1a -#define OMAP_MCBSP_REG_RCERA 0x1c -#define OMAP_MCBSP_REG_RCERB 0x1e -#define OMAP_MCBSP_REG_XCERA 0x20 -#define OMAP_MCBSP_REG_XCERB 0x22 -#define OMAP_MCBSP_REG_PCR0 0x24 -#define OMAP_MCBSP_REG_RCERC 0x26 -#define OMAP_MCBSP_REG_RCERD 0x28 -#define OMAP_MCBSP_REG_XCERC 0x2A -#define OMAP_MCBSP_REG_XCERD 0x2C -#define OMAP_MCBSP_REG_RCERE 0x2E -#define OMAP_MCBSP_REG_RCERF 0x30 -#define OMAP_MCBSP_REG_XCERE 0x32 -#define OMAP_MCBSP_REG_XCERF 0x34 -#define OMAP_MCBSP_REG_RCERG 0x36 -#define OMAP_MCBSP_REG_RCERH 0x38 -#define OMAP_MCBSP_REG_XCERG 0x3A -#define OMAP_MCBSP_REG_XCERH 0x3C - -/* Dummy defines, these are not available on omap1 */ -#define OMAP_MCBSP_REG_XCCR 0x00 -#define OMAP_MCBSP_REG_RCCR 0x00 - -#else - -#define OMAP_MCBSP_REG_DRR2 0x00 -#define OMAP_MCBSP_REG_DRR1 0x04 -#define OMAP_MCBSP_REG_DXR2 0x08 -#define OMAP_MCBSP_REG_DXR1 0x0C -#define OMAP_MCBSP_REG_DRR 0x00 -#define OMAP_MCBSP_REG_DXR 0x08 -#define OMAP_MCBSP_REG_SPCR2 0x10 -#define OMAP_MCBSP_REG_SPCR1 0x14 -#define OMAP_MCBSP_REG_RCR2 0x18 -#define OMAP_MCBSP_REG_RCR1 0x1C -#define OMAP_MCBSP_REG_XCR2 0x20 -#define OMAP_MCBSP_REG_XCR1 0x24 -#define OMAP_MCBSP_REG_SRGR2 0x28 -#define OMAP_MCBSP_REG_SRGR1 0x2C -#define OMAP_MCBSP_REG_MCR2 0x30 -#define OMAP_MCBSP_REG_MCR1 0x34 -#define OMAP_MCBSP_REG_RCERA 0x38 -#define OMAP_MCBSP_REG_RCERB 0x3C -#define OMAP_MCBSP_REG_XCERA 0x40 -#define OMAP_MCBSP_REG_XCERB 0x44 -#define OMAP_MCBSP_REG_PCR0 0x48 -#define OMAP_MCBSP_REG_RCERC 0x4C -#define OMAP_MCBSP_REG_RCERD 0x50 -#define OMAP_MCBSP_REG_XCERC 0x54 -#define OMAP_MCBSP_REG_XCERD 0x58 -#define OMAP_MCBSP_REG_RCERE 0x5C -#define OMAP_MCBSP_REG_RCERF 0x60 -#define OMAP_MCBSP_REG_XCERE 0x64 -#define OMAP_MCBSP_REG_XCERF 0x68 -#define OMAP_MCBSP_REG_RCERG 0x6C -#define OMAP_MCBSP_REG_RCERH 0x70 -#define OMAP_MCBSP_REG_XCERG 0x74 -#define OMAP_MCBSP_REG_XCERH 0x78 -#define OMAP_MCBSP_REG_SYSCON 0x8C -#define OMAP_MCBSP_REG_THRSH2 0x90 -#define OMAP_MCBSP_REG_THRSH1 0x94 -#define OMAP_MCBSP_REG_IRQST 0xA0 -#define OMAP_MCBSP_REG_IRQEN 0xA4 -#define OMAP_MCBSP_REG_WAKEUPEN 0xA8 -#define OMAP_MCBSP_REG_XCCR 0xAC -#define OMAP_MCBSP_REG_RCCR 0xB0 -#define OMAP_MCBSP_REG_XBUFFSTAT 0xB4 -#define OMAP_MCBSP_REG_RBUFFSTAT 0xB8 -#define OMAP_MCBSP_REG_SSELCR 0xBC +/* McBSP register numbers. Register address offset = num * reg_step */ +enum { + /* Common registers */ + OMAP_MCBSP_REG_SPCR2 = 4, + OMAP_MCBSP_REG_SPCR1, + OMAP_MCBSP_REG_RCR2, + OMAP_MCBSP_REG_RCR1, + OMAP_MCBSP_REG_XCR2, + OMAP_MCBSP_REG_XCR1, + OMAP_MCBSP_REG_SRGR2, + OMAP_MCBSP_REG_SRGR1, + OMAP_MCBSP_REG_MCR2, + OMAP_MCBSP_REG_MCR1, + OMAP_MCBSP_REG_RCERA, + OMAP_MCBSP_REG_RCERB, + OMAP_MCBSP_REG_XCERA, + OMAP_MCBSP_REG_XCERB, + OMAP_MCBSP_REG_PCR0, + OMAP_MCBSP_REG_RCERC, + OMAP_MCBSP_REG_RCERD, + OMAP_MCBSP_REG_XCERC, + OMAP_MCBSP_REG_XCERD, + OMAP_MCBSP_REG_RCERE, + OMAP_MCBSP_REG_RCERF, + OMAP_MCBSP_REG_XCERE, + OMAP_MCBSP_REG_XCERF, + OMAP_MCBSP_REG_RCERG, + OMAP_MCBSP_REG_RCERH, + OMAP_MCBSP_REG_XCERG, + OMAP_MCBSP_REG_XCERH, + + /* OMAP1-OMAP2420 registers */ + OMAP_MCBSP_REG_DRR2 = 0, + OMAP_MCBSP_REG_DRR1, + OMAP_MCBSP_REG_DXR2, + OMAP_MCBSP_REG_DXR1, + + /* OMAP2430 and onwards */ + OMAP_MCBSP_REG_DRR = 0, + OMAP_MCBSP_REG_DXR = 2, + OMAP_MCBSP_REG_SYSCON = 35, + OMAP_MCBSP_REG_THRSH2, + OMAP_MCBSP_REG_THRSH1, + OMAP_MCBSP_REG_IRQST = 40, + OMAP_MCBSP_REG_IRQEN, + OMAP_MCBSP_REG_WAKEUPEN, + OMAP_MCBSP_REG_XCCR, + OMAP_MCBSP_REG_RCCR, + OMAP_MCBSP_REG_XBUFFSTAT, + OMAP_MCBSP_REG_RBUFFSTAT, + OMAP_MCBSP_REG_SSELCR, +}; +/* OMAP3 sidetone control registers */ #define OMAP_ST_REG_REV 0x00 #define OMAP_ST_REG_SYSCONFIG 0x10 #define OMAP_ST_REG_IRQSTATUS 0x18 @@ -146,8 +113,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_ST_REG_SFIRCR 0x28 #define OMAP_ST_REG_SSELCR 0x2C -#endif - /************************** McBSP SPCR1 bit definitions ***********************/ #define RRST 0x0001 #define RRDY 0x0002 @@ -350,7 +315,8 @@ struct omap_mcbsp_ops { struct omap_mcbsp_platform_data { struct omap_mcbsp_ops *ops; u16 buffer_size; - unsigned int mcbsp_config_type; + u8 reg_size; + u8 reg_step; }; struct omap_mcbsp_st_data { @@ -389,7 +355,6 @@ struct omap_mcbsp { u16 max_rx_thres; #endif void *reg_cache; - unsigned int mcbsp_config_type; }; /** diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 4b233e8..623f2c1 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -35,29 +35,27 @@ int omap_mcbsp_count, omap_mcbsp_cache_size; static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { - if (cpu_class_is_omap1()) { - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val; - __raw_writew((u16)val, mcbsp->io_base + reg); - } else if (cpu_is_omap2420()) { - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val; - __raw_writew((u16)val, mcbsp->io_base + reg); + void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; + + if (mcbsp->pdata->reg_size == 2) { + ((u16 *)mcbsp->reg_cache)[reg] = (u16)val; + __raw_writew((u16)val, addr); } else { - ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val; - __raw_writel(val, mcbsp->io_base + reg); + ((u32 *)mcbsp->reg_cache)[reg] = val; + __raw_writel(val, addr); } } static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) { - if (cpu_class_is_omap1()) { - return !from_cache ? __raw_readw(mcbsp->io_base + reg) : - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)]; - } else if (cpu_is_omap2420()) { - return !from_cache ? __raw_readw(mcbsp->io_base + reg) : - ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)]; + void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; + + if (mcbsp->pdata->reg_size == 2) { + return !from_cache ? __raw_readw(addr) : + ((u16 *)mcbsp->reg_cache)[reg]; } else { - return !from_cache ? __raw_readl(mcbsp->io_base + reg) : - ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)]; + return !from_cache ? __raw_readl(addr) : + ((u32 *)mcbsp->reg_cache)[reg]; } } @@ -238,21 +236,19 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) } mcbsp = id_to_mcbsp_ptr(id); - data_reg = mcbsp->phys_dma_base; - - if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) { + if (mcbsp->pdata->reg_size == 2) { if (stream) - data_reg += OMAP_MCBSP_REG_DRR1; + data_reg = OMAP_MCBSP_REG_DRR1; else - data_reg += OMAP_MCBSP_REG_DXR1; + data_reg = OMAP_MCBSP_REG_DXR1; } else { if (stream) - data_reg += OMAP_MCBSP_REG_DRR; + data_reg = OMAP_MCBSP_REG_DRR; else - data_reg += OMAP_MCBSP_REG_DXR; + data_reg = OMAP_MCBSP_REG_DXR; } - return data_reg; + return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step; } EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); @@ -1337,7 +1333,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; - mcbsp->mcbsp_config_type = pdata->mcbsp_config_type; platform_set_drvdata(pdev, mcbsp); pm_runtime_enable(mcbsp->dev); -- cgit v0.10.2 From 1a6458847dd25e7ade3d633e5a374b836e38b9ae Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:40 +0300 Subject: ARM: OMAP: mcbsp: Make wakeup control generic Currently wakeup control code is compiled only when CONFIG_ARCH_OMAP3 is set even it should be available for CONFIG_ARCH_OMAP4 only builds also. Fix this by making wakeup control generic so that it is executed whenever new feature flag has_wakeup in platform data is set. Currently flag is set for McBSP config types 3 and 4. Remove also old comments about idle mode settings and HW bug workarounds that were not updated during hwmod conversion. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 43b9ccf..de3457d 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -141,6 +141,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) pdata->buffer_size = 0x80; } + if (oh->class->rev >= MCBSP_CONFIG_TYPE3) + pdata->has_wakeup = true; + oh_device[0] = oh; if (oh->dev_attr) { diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 14bc1cb..ac48d83 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -317,6 +317,9 @@ struct omap_mcbsp_platform_data { u16 buffer_size; u8 reg_size; u8 reg_step; + + /* McBSP platform and instance specific features */ + bool has_wakeup; /* Wakeup capability */ }; struct omap_mcbsp_st_data { diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 623f2c1..0338ad0 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -659,35 +659,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id) } EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); -static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) -{ - /* - * Enable wakup behavior, smart idle and all wakeups - * REVISIT: some wakeups may be unnecessary - */ - if (cpu_is_omap34xx() || cpu_is_omap44xx()) { - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); - } -} - -static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) -{ - /* - * Disable wakup behavior, smart idle and all wakeups - */ - if (cpu_is_omap34xx() || cpu_is_omap44xx()) { - /* - * HW bug workaround - If no_idle mode is taken, we need to - * go to smart_idle before going to always_idle, or the - * device will not hit retention anymore. - */ - - MCBSP_WRITE(mcbsp, WAKEUPEN, 0); - } -} #else -static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {} -static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {} static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} #endif @@ -726,8 +698,9 @@ int omap_mcbsp_request(unsigned int id) pm_runtime_get_sync(mcbsp->dev); - /* Do procedure specific to omap34xx arch, if applicable */ - omap34xx_mcbsp_request(mcbsp); + /* Enable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); /* * Make sure that transmitter, receiver and sample-rate generator are @@ -764,8 +737,9 @@ err_clk_disable: if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(id); - /* Do procedure specific to omap34xx arch, if applicable */ - omap34xx_mcbsp_free(mcbsp); + /* Disable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, 0); pm_runtime_put_sync(mcbsp->dev); @@ -794,8 +768,9 @@ void omap_mcbsp_free(unsigned int id) if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(id); - /* Do procedure specific to omap34xx arch, if applicable */ - omap34xx_mcbsp_free(mcbsp); + /* Disable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, 0); pm_runtime_put_sync(mcbsp->dev); -- cgit v0.10.2 From 88408230d2fe752ffca0f292b092642cc5c153f1 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:41 +0300 Subject: ARM: OMAP: mcbsp: Make tranceiver configuration control register access generic McBSP transmit and receive configuration control registers must be set up for OMAP2430 and later. Replace is_omap tests in generic code with a new feature flag has_ccr in platform data so that there is no need to change code for any upcoming OMAP version. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index de3457d..d6cce00 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -127,10 +127,12 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) } pdata->reg_step = 4; - if (oh->class->rev < MCBSP_CONFIG_TYPE2) + if (oh->class->rev < MCBSP_CONFIG_TYPE2) { pdata->reg_size = 2; - else + } else { pdata->reg_size = 4; + pdata->has_ccr = true; + } if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (id == 2) diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index ac48d83..eed20ef 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -320,6 +320,7 @@ struct omap_mcbsp_platform_data { /* McBSP platform and instance specific features */ bool has_wakeup; /* Wakeup capability */ + bool has_ccr; /* Transceiver has configuration control registers */ }; struct omap_mcbsp_st_data { diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 0338ad0..97bcbfa 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -184,7 +184,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) MCBSP_WRITE(mcbsp, MCR2, config->mcr2); MCBSP_WRITE(mcbsp, MCR1, config->mcr1); MCBSP_WRITE(mcbsp, PCR0, config->pcr0); - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->has_ccr) { MCBSP_WRITE(mcbsp, XCCR, config->xccr); MCBSP_WRITE(mcbsp, RCCR, config->rccr); } @@ -848,7 +848,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7)); } - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->has_ccr) { /* Release the transmitter and receiver */ w = MCBSP_READ_CACHE(mcbsp, XCCR); w &= ~(tx ? XDISABLE : 0); @@ -878,7 +878,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) /* Reset transmitter */ tx &= 1; - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->has_ccr) { w = MCBSP_READ_CACHE(mcbsp, XCCR); w |= (tx ? XDISABLE : 0); MCBSP_WRITE(mcbsp, XCCR, w); @@ -888,7 +888,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) /* Reset receiver */ rx &= 1; - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + if (mcbsp->pdata->has_ccr) { w = MCBSP_READ_CACHE(mcbsp, RCCR); w |= (rx ? RDISABLE : 0); MCBSP_WRITE(mcbsp, RCCR, w); -- cgit v0.10.2 From 7bba67ab3aa629f88e17786b07177b76b925cb0e Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:42 +0300 Subject: ARM: OMAP: mcbsp: Make threshold based transfer code generic Remove CONFIG_ARCH_OMAP3 conditional compilation and cpu_is_omap34xx test around buffer threshold based transfer and DMA operating mode control. Use instead the buffer_size in platform data to determine when these sysfs controls are exposed and when to access related McBSP registers. Rationale for this is to make code generic and to allow to use it on OMAP4 that also supports threshold based transfers. Currently buffer_size variable is set only for OMAP3 SoCs but it is easy to extend to OMAP4 and any later OMAP version. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index eed20ef..0fad63c 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -354,10 +354,10 @@ struct omap_mcbsp { struct clk *fclk; #ifdef CONFIG_ARCH_OMAP3 struct omap_mcbsp_st_data *st_data; +#endif int dma_op_mode; u16 max_tx_thres; u16 max_rx_thres; -#endif void *reg_cache; }; @@ -377,7 +377,6 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size; int omap_mcbsp_init(void); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); -#ifdef CONFIG_ARCH_OMAP3 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold); u16 omap_mcbsp_get_max_tx_threshold(unsigned int id); @@ -386,18 +385,6 @@ u16 omap_mcbsp_get_fifo_size(unsigned int id); u16 omap_mcbsp_get_tx_delay(unsigned int id); u16 omap_mcbsp_get_rx_delay(unsigned int id); int omap_mcbsp_get_dma_op_mode(unsigned int id); -#else -static inline void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) -{ } -static inline void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) -{ } -static inline u16 omap_mcbsp_get_max_tx_threshold(unsigned int id) { return 0; } -static inline u16 omap_mcbsp_get_max_rx_threshold(unsigned int id) { return 0; } -static inline u16 omap_mcbsp_get_fifo_size(unsigned int id) { return 0; } -static inline u16 omap_mcbsp_get_tx_delay(unsigned int id) { return 0; } -static inline u16 omap_mcbsp_get_rx_delay(unsigned int id) { return 0; } -static inline int omap_mcbsp_get_dma_op_mode(unsigned int id) { return 0; } -#endif int omap_mcbsp_request(unsigned int id); void omap_mcbsp_free(unsigned int id); void omap_mcbsp_start(unsigned int id, int tx, int rx); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 97bcbfa..234ab16 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -492,6 +492,11 @@ int omap_st_is_enabled(unsigned int id) } EXPORT_SYMBOL(omap_st_is_enabled); +#else +static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} +static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} +#endif + /* * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. * The threshold parameter is 1 based, and it is converted (threshold - 1) @@ -501,14 +506,13 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold) { struct omap_mcbsp *mcbsp; - if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) - return; - if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return; if (threshold && threshold <= mcbsp->max_tx_thres) MCBSP_WRITE(mcbsp, THRSH2, threshold - 1); @@ -524,14 +528,13 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold) { struct omap_mcbsp *mcbsp; - if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) - return; - if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return; if (threshold && threshold <= mcbsp->max_rx_thres) MCBSP_WRITE(mcbsp, THRSH1, threshold - 1); @@ -601,6 +604,8 @@ u16 omap_mcbsp_get_tx_delay(unsigned int id) return -ENODEV; } mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return 0; /* Returns the number of free locations in the buffer */ buffstat = MCBSP_READ(mcbsp, XBUFFSTAT); @@ -624,6 +629,8 @@ u16 omap_mcbsp_get_rx_delay(unsigned int id) return -ENODEV; } mcbsp = id_to_mcbsp_ptr(id); + if (mcbsp->pdata->buffer_size == 0) + return 0; /* Returns the number of used locations in the buffer */ buffstat = MCBSP_READ(mcbsp, RBUFFSTAT); @@ -659,11 +666,6 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id) } EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); -#else -static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} -static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} -#endif - int omap_mcbsp_request(unsigned int id) { struct omap_mcbsp *mcbsp; @@ -937,7 +939,6 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux) } #endif -#ifdef CONFIG_ARCH_OMAP3 #define max_thres(m) (mcbsp->pdata->buffer_size) #define valid_threshold(m, val) ((val) <= max_thres(m)) #define THRESHOLD_PROP_BUILDER(prop) \ @@ -1028,6 +1029,18 @@ unlock: static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store); +static const struct attribute *additional_attrs[] = { + &dev_attr_max_tx_thres.attr, + &dev_attr_max_rx_thres.attr, + &dev_attr_dma_op_mode.attr, + NULL, +}; + +static const struct attribute_group additional_attr_group = { + .attrs = (struct attribute **)additional_attrs, +}; + +#ifdef CONFIG_ARCH_OMAP3 static ssize_t st_taps_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1086,27 +1099,6 @@ out: static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store); -static const struct attribute *additional_attrs[] = { - &dev_attr_max_tx_thres.attr, - &dev_attr_max_rx_thres.attr, - &dev_attr_dma_op_mode.attr, - NULL, -}; - -static const struct attribute_group additional_attr_group = { - .attrs = (struct attribute **)additional_attrs, -}; - -static inline int __devinit omap_additional_add(struct device *dev) -{ - return sysfs_create_group(&dev->kobj, &additional_attr_group); -} - -static inline void __devexit omap_additional_remove(struct device *dev) -{ - sysfs_remove_group(&dev->kobj, &additional_attr_group); -} - static const struct attribute *sidetone_attrs[] = { &dev_attr_st_taps.attr, NULL, @@ -1167,45 +1159,18 @@ static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) { - mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; - if (cpu_is_omap34xx()) { - /* - * Initially configure the maximum thresholds to a safe value. - * The McBSP FIFO usage with these values should not go under - * 16 locations. - * If the whole FIFO without safety buffer is used, than there - * is a possibility that the DMA will be not able to push the - * new data on time, causing channel shifts in runtime. - */ - mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; - mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; - /* - * REVISIT: Set dmap_op_mode to THRESHOLD as default - * for mcbsp2 instances. - */ - if (omap_additional_add(mcbsp->dev)) - dev_warn(mcbsp->dev, - "Unable to create additional controls\n"); - + if (cpu_is_omap34xx()) if (mcbsp->id == 2 || mcbsp->id == 3) if (omap_st_add(mcbsp)) dev_warn(mcbsp->dev, "Unable to create sidetone controls\n"); - - } else { - mcbsp->max_tx_thres = -EINVAL; - mcbsp->max_rx_thres = -EINVAL; - } } static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) { - if (cpu_is_omap34xx()) { - omap_additional_remove(mcbsp->dev); - + if (cpu_is_omap34xx()) if (mcbsp->id == 2 || mcbsp->id == 3) omap_st_remove(mcbsp); - } } #else static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {} @@ -1311,11 +1276,38 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mcbsp); pm_runtime_enable(mcbsp->dev); + mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT; + if (mcbsp->pdata->buffer_size) { + /* + * Initially configure the maximum thresholds to a safe value. + * The McBSP FIFO usage with these values should not go under + * 16 locations. + * If the whole FIFO without safety buffer is used, than there + * is a possibility that the DMA will be not able to push the + * new data on time, causing channel shifts in runtime. + */ + mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10; + mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10; + + ret = sysfs_create_group(&mcbsp->dev->kobj, + &additional_attr_group); + if (ret) { + dev_err(mcbsp->dev, + "Unable to create additional controls\n"); + goto err_thres; + } + } else { + mcbsp->max_tx_thres = -EINVAL; + mcbsp->max_rx_thres = -EINVAL; + } + /* Initialize mcbsp properties for OMAP34XX if needed / applicable */ omap34xx_device_init(mcbsp); return 0; +err_thres: + clk_put(mcbsp->fclk); err_res: iounmap(mcbsp->io_base); err_ioremap: @@ -1335,6 +1327,10 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) mcbsp->pdata->ops->free) mcbsp->pdata->ops->free(mcbsp->id); + if (mcbsp->pdata->buffer_size) + sysfs_remove_group(&mcbsp->dev->kobj, + &additional_attr_group); + omap34xx_device_exit(mcbsp); clk_put(mcbsp->fclk); -- cgit v0.10.2 From ac6747ca0d2e01ed55281d1cc95b5dc646735a20 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:43 +0300 Subject: ARM: OMAP: mcbsp: Use per instance register cache size Rationale here is to remove one global variable and to make possible to have variable size McBSP register maps inside SoC. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 0fad63c..648344a 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -359,6 +359,7 @@ struct omap_mcbsp { u16 max_tx_thres; u16 max_rx_thres; void *reg_cache; + int reg_cache_size; }; /** @@ -370,7 +371,7 @@ struct omap_mcbsp_dev_attr { }; extern struct omap_mcbsp **mcbsp_ptr; -extern int omap_mcbsp_count, omap_mcbsp_cache_size; +extern int omap_mcbsp_count; #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) #define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 234ab16..3ad536e 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -31,7 +31,7 @@ #include "../mach-omap2/cm-regbits-34xx.h" struct omap_mcbsp **mcbsp_ptr; -int omap_mcbsp_count, omap_mcbsp_cache_size; +int omap_mcbsp_count; static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { @@ -678,7 +678,7 @@ int omap_mcbsp_request(unsigned int id) } mcbsp = id_to_mcbsp_ptr(id); - reg_cache = kzalloc(omap_mcbsp_cache_size, GFP_KERNEL); + reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL); if (!reg_cache) { return -ENOMEM; } @@ -1225,7 +1225,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) } } mcbsp->phys_base = res->start; - omap_mcbsp_cache_size = resource_size(res); + mcbsp->reg_cache_size = resource_size(res); mcbsp->io_base = ioremap(res->start, resource_size(res)); if (!mcbsp->io_base) { ret = -ENOMEM; -- cgit v0.10.2 From 1743d14fb6b428e52a9a0917d11d6eba9a110002 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:44 +0300 Subject: ARM: OMAP: mcbsp: Move sidetone clock management to mach-omap2/mcbsp.c Active sidetone requires that McBSP interface clock doesn't idle and there is no mechanism in hwmod to turn autoidling on/off in runtime. McBSP2 and 3 in OMAP34xx share their interface clock with McBSP sidetone module and that interface clock must be active when the sidetone is operating. Sidetone has its own autoidle bit which should keep the interface clock active but it is broken. Putting the McBSP core to no-idle mode when the sidetone is active is no good either since it results to higher power consumption when using the threshold based DMA transfers. For making the McBSP code more generic, move this sidetone clock management with fixme comments to mach-omap2/mcbsp.c and pass pointer to it via platform data. Signed-off-by: Jarkko Nikula Cc: Paul Wamsley Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index d6cce00..92bd5e2 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -27,6 +27,13 @@ #include "control.h" +/* + * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. + * Sidetone needs non-gated ICLK and sidetone autoidle is broken. + */ +#include "cm2xxx_3xxx.h" +#include "cm-regbits-34xx.h" + /* McBSP internal signal muxing functions */ void omap2_mcbsp1_mux_clkr_src(u8 mux) @@ -102,6 +109,24 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) } EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); +static int omap3_enable_st_clock(unsigned int id, bool enable) +{ + unsigned int w; + + /* + * Sidetone uses McBSP ICLK - which must not idle when sidetones + * are enabled or sidetones start sounding ugly. + */ + w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); + if (enable) + w &= ~(1 << (id - 2)); + else + w |= 1 << (id - 2); + omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE); + + return 0; +} + struct omap_device_pm_latency omap2_mcbsp_latency[] = { { .deactivate_func = omap_device_idle_hwmods, @@ -151,6 +176,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) if (oh->dev_attr) { oh_device[1] = omap_hwmod_lookup(( (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); + pdata->enable_st_clock = omap3_enable_st_clock; count++; } pdev = omap_device_build_ss(name, id, oh_device, count, pdata, diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 648344a..e451a6e 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -321,6 +321,7 @@ struct omap_mcbsp_platform_data { /* McBSP platform and instance specific features */ bool has_wakeup; /* Wakeup capability */ bool has_ccr; /* Transceiver has configuration control registers */ + int (*enable_st_clock)(unsigned int, bool); }; struct omap_mcbsp_st_data { diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 3ad536e..e96d747 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -26,10 +26,6 @@ #include #include -/* XXX These "sideways" includes are a sign that something is wrong */ -#include "../mach-omap2/cm2xxx_3xxx.h" -#include "../mach-omap2/cm-regbits-34xx.h" - struct omap_mcbsp **mcbsp_ptr; int omap_mcbsp_count; @@ -257,13 +253,8 @@ static void omap_st_on(struct omap_mcbsp *mcbsp) { unsigned int w; - /* - * Sidetone uses McBSP ICLK - which must not idle when sidetones - * are enabled or sidetones start sounding ugly. - */ - w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); - w &= ~(1 << (mcbsp->id - 2)); - omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE); + if (mcbsp->pdata->enable_st_clock) + mcbsp->pdata->enable_st_clock(mcbsp->id, 1); /* Enable McBSP Sidetone */ w = MCBSP_READ(mcbsp, SSELCR); @@ -284,9 +275,8 @@ static void omap_st_off(struct omap_mcbsp *mcbsp) w = MCBSP_READ(mcbsp, SSELCR); MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN)); - w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); - w |= 1 << (mcbsp->id - 2); - omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE); + if (mcbsp->pdata->enable_st_clock) + mcbsp->pdata->enable_st_clock(mcbsp->id, 0); } static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) -- cgit v0.10.2 From f821eece8b1bb10ad2d76c026e02257ce5c3c439 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:45 +0300 Subject: ARM: OMAP: mcbsp: Cleanup sidetone control initialization and make it generic Sidetone resource is already registered for a device so there is no need for cpu_is_omap34xx() and McBSP port number tests in the driver. We can cleanup and make the code generic by dropping remaining CONFIG_ARCH_OMAP3 conditional compilations and then using sidetone resource and st_data variable for runtime tests. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index e451a6e..9802055 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -353,9 +353,7 @@ struct omap_mcbsp { spinlock_t lock; struct omap_mcbsp_platform_data *pdata; struct clk *fclk; -#ifdef CONFIG_ARCH_OMAP3 struct omap_mcbsp_st_data *st_data; -#endif int dma_op_mode; u16 max_tx_thres; u16 max_rx_thres; @@ -402,21 +400,11 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux); int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); -#ifdef CONFIG_ARCH_OMAP3 /* Sidetone specific API */ int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain); int omap_st_enable(unsigned int id); int omap_st_disable(unsigned int id); int omap_st_is_enabled(unsigned int id); -#else -static inline int omap_st_set_chgain(unsigned int id, int channel, - s16 chgain) { return 0; } -static inline int omap_st_get_chgain(unsigned int id, int channel, - s16 *chgain) { return 0; } -static inline int omap_st_enable(unsigned int id) { return 0; } -static inline int omap_st_disable(unsigned int id) { return 0; } -static inline int omap_st_is_enabled(unsigned int id) { return 0; } -#endif #endif diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index e96d747..f92227f 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -55,7 +55,6 @@ static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache) } } -#ifdef CONFIG_ARCH_OMAP3 static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { __raw_writel(val, mcbsp->st_data->io_base_st + reg); @@ -65,7 +64,6 @@ static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg) { return __raw_readl(mcbsp->st_data->io_base_st + reg); } -#endif #define MCBSP_READ(mcbsp, reg) \ omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0) @@ -248,7 +246,6 @@ int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) } EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); -#ifdef CONFIG_ARCH_OMAP3 static void omap_st_on(struct omap_mcbsp *mcbsp) { unsigned int w; @@ -482,11 +479,6 @@ int omap_st_is_enabled(unsigned int id) } EXPORT_SYMBOL(omap_st_is_enabled); -#else -static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} -static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} -#endif - /* * omap_mcbsp_set_rx_threshold configures the transmit threshold in words. * The threshold parameter is 1 based, and it is converted (threshold - 1) @@ -802,7 +794,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) } mcbsp = id_to_mcbsp_ptr(id); - if (cpu_is_omap34xx()) + if (mcbsp->st_data) omap_st_start(mcbsp); /* Only enable SRG, if McBSP is master */ @@ -897,7 +889,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6)); } - if (cpu_is_omap34xx()) + if (mcbsp->st_data) omap_st_stop(mcbsp); } EXPORT_SYMBOL(omap_mcbsp_stop); @@ -1030,7 +1022,6 @@ static const struct attribute_group additional_attr_group = { .attrs = (struct attribute **)additional_attrs, }; -#ifdef CONFIG_ARCH_OMAP3 static ssize_t st_taps_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1098,10 +1089,9 @@ static const struct attribute_group sidetone_attr_group = { .attrs = (struct attribute **)sidetone_attrs, }; -static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) +static int __devinit omap_st_add(struct omap_mcbsp *mcbsp, + struct resource *res) { - struct platform_device *pdev; - struct resource *res; struct omap_mcbsp_st_data *st_data; int err; @@ -1111,9 +1101,6 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) goto err1; } - pdev = container_of(mcbsp->dev, struct platform_device, dev); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); st_data->io_base_st = ioremap(res->start, resource_size(res)); if (!st_data->io_base_st) { err = -ENOMEM; @@ -1140,32 +1127,10 @@ static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp) { struct omap_mcbsp_st_data *st_data = mcbsp->st_data; - if (st_data) { - sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); - iounmap(st_data->io_base_st); - kfree(st_data); - } -} - -static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) -{ - if (cpu_is_omap34xx()) - if (mcbsp->id == 2 || mcbsp->id == 3) - if (omap_st_add(mcbsp)) - dev_warn(mcbsp->dev, - "Unable to create sidetone controls\n"); -} - -static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) -{ - if (cpu_is_omap34xx()) - if (mcbsp->id == 2 || mcbsp->id == 3) - omap_st_remove(mcbsp); + sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group); + iounmap(st_data->io_base_st); + kfree(st_data); } -#else -static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {} -static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {} -#endif /* CONFIG_ARCH_OMAP3 */ /* * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. @@ -1291,11 +1256,22 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->max_rx_thres = -EINVAL; } - /* Initialize mcbsp properties for OMAP34XX if needed / applicable */ - omap34xx_device_init(mcbsp); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); + if (res) { + ret = omap_st_add(mcbsp, res); + if (ret) { + dev_err(mcbsp->dev, + "Unable to create sidetone controls\n"); + goto err_st; + } + } return 0; +err_st: + if (mcbsp->pdata->buffer_size) + sysfs_remove_group(&mcbsp->dev->kobj, + &additional_attr_group); err_thres: clk_put(mcbsp->fclk); err_res: @@ -1321,7 +1297,8 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) sysfs_remove_group(&mcbsp->dev->kobj, &additional_attr_group); - omap34xx_device_exit(mcbsp); + if (mcbsp->st_data) + omap_st_remove(mcbsp); clk_put(mcbsp->fclk); -- cgit v0.10.2 From 5167255cae4c10b1acb20fb41ab10e9d5de708c7 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:46 +0300 Subject: ARM: OMAP: mcbsp: Update mcbsp.h include dependencies hardware.h is not needed here and let the definition for struct clk to come via linux/clk.h. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 9802055..5d657d9 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -25,9 +25,7 @@ #define __ASM_ARCH_OMAP_MCBSP_H #include - -#include -#include +#include /* macro for building platform_device for McBSP ports */ #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ -- cgit v0.10.2 From 6e574123712b4fb89546b1304dd5438669057723 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:47 +0300 Subject: ARM: OMAP: mcbsp: Move address definitions to arch/arm/mach-omap1/mcbsp.c These address definitions are OMAP1 specific can be in single source file. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 36ab5d8..91f9abb 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -79,6 +79,17 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { .free = omap1_mcbsp_free, }; +#define OMAP7XX_MCBSP1_BASE 0xfffb1000 +#define OMAP7XX_MCBSP2_BASE 0xfffb1800 + +#define OMAP1510_MCBSP1_BASE 0xe1011800 +#define OMAP1510_MCBSP2_BASE 0xfffb1000 +#define OMAP1510_MCBSP3_BASE 0xe1017000 + +#define OMAP1610_MCBSP1_BASE 0xe1011800 +#define OMAP1610_MCBSP2_BASE 0xfffb1000 +#define OMAP1610_MCBSP3_BASE 0xe1017000 + #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) struct resource omap7xx_mcbsp_res[][6] = { { diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 5d657d9..af5824a 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -38,17 +38,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4 -#define OMAP7XX_MCBSP1_BASE 0xfffb1000 -#define OMAP7XX_MCBSP2_BASE 0xfffb1800 - -#define OMAP1510_MCBSP1_BASE 0xe1011800 -#define OMAP1510_MCBSP2_BASE 0xfffb1000 -#define OMAP1510_MCBSP3_BASE 0xe1017000 - -#define OMAP1610_MCBSP1_BASE 0xe1011800 -#define OMAP1610_MCBSP2_BASE 0xfffb1000 -#define OMAP1610_MCBSP3_BASE 0xe1017000 - /* McBSP register numbers. Register address offset = num * reg_step */ enum { /* Common registers */ -- cgit v0.10.2 From 09d28d2c19fe5c2d51b3133329584166dec89f86 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:48 +0300 Subject: ARM: OMAP: mcbsp: Start generalize omap2_mcbsp_set_clks_src This generalizes the omap2_mcbsp_set_clks_src implementation between generic McBSP and OMAP2 specific McBSP code. Currently this function is used to select either internal fclk or clks pin as a McBSP CLKS source on OMAP2+. Implement generalization by having an optional set_clk_src function pointer in platform data that is used to select parent for a given clock. Idea is to pass higher level source clock name (later coming from client driver) that platform specific code will map to platform specific clock name. API cleanup between McBSP and client code comes later. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 92bd5e2..3dd4c47 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -63,37 +63,30 @@ void omap2_mcbsp1_mux_fsr_src(u8 mux) EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); /* McBSP CLKS source switching function */ - -int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) +static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, + const char *src) { - struct omap_mcbsp *mcbsp; struct clk *fck_src; char *fck_src_name; int r; - if (!omap_mcbsp_check_valid_id(id)) { - pr_err("%s: Invalid id (%d)\n", __func__, id + 1); - return -EINVAL; - } - mcbsp = id_to_mcbsp_ptr(id); - - if (fck_src_id == MCBSP_CLKS_PAD_SRC) + if (!strcmp(src, "clks_ext")) fck_src_name = "pad_fck"; - else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) + else if (!strcmp(src, "clks_fclk")) fck_src_name = "prcm_fck"; else return -EINVAL; - fck_src = clk_get(mcbsp->dev, fck_src_name); + fck_src = clk_get(dev, fck_src_name); if (IS_ERR_OR_NULL(fck_src)) { pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks", fck_src_name); return -EINVAL; } - pm_runtime_put_sync(mcbsp->dev); + pm_runtime_put_sync(dev); - r = clk_set_parent(mcbsp->fclk, fck_src); + r = clk_set_parent(clk, fck_src); if (IS_ERR_VALUE(r)) { pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n", "clks", fck_src_name); @@ -101,13 +94,12 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; } - pm_runtime_get_sync(mcbsp->dev); + pm_runtime_get_sync(dev); clk_put(fck_src); return 0; } -EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); static int omap3_enable_st_clock(unsigned int id, bool enable) { @@ -188,6 +180,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) name, oh->name); return PTR_ERR(pdev); } + pdata->set_clk_src = omap2_mcbsp_set_clk_src; omap_mcbsp_count++; return 0; } diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index af5824a..c8ebfc9 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -296,7 +296,6 @@ typedef enum { struct omap_mcbsp_ops { void (*request)(unsigned int); void (*free)(unsigned int); - int (*set_clks_src)(u8, u8); }; struct omap_mcbsp_platform_data { @@ -309,6 +308,7 @@ struct omap_mcbsp_platform_data { bool has_wakeup; /* Wakeup capability */ bool has_ccr; /* Transceiver has configuration control registers */ int (*enable_st_clock)(unsigned int, bool); + int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src); }; struct omap_mcbsp_st_data { @@ -359,9 +359,6 @@ struct omap_mcbsp_dev_attr { extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count; -#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) -#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; - int omap_mcbsp_init(void); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index f92227f..38b67d9 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -29,6 +29,9 @@ struct omap_mcbsp **mcbsp_ptr; int omap_mcbsp_count; +#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; + static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val) { void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; @@ -894,18 +897,32 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) } EXPORT_SYMBOL(omap_mcbsp_stop); -/* - * The following functions are only required on an OMAP1-only build. - * mach-omap2/mcbsp.c contains the real functions - */ -#ifndef CONFIG_ARCH_OMAP2PLUS int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) { - WARN(1, "%s: should never be called on an OMAP1-only kernel\n", - __func__); - return -EINVAL; + struct omap_mcbsp *mcbsp; + const char *src; + + if (!omap_mcbsp_check_valid_id(id)) { + pr_err("%s: Invalid id (%d)\n", __func__, id + 1); + return -EINVAL; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (fck_src_id == MCBSP_CLKS_PAD_SRC) + src = "clks_ext"; + else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) + src = "clks_fclk"; + else + return -EINVAL; + + if (mcbsp->pdata->set_clk_src) + return mcbsp->pdata->set_clk_src(mcbsp->dev, mcbsp->fclk, src); + else + return -EINVAL; } +EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); +#ifndef CONFIG_ARCH_OMAP2PLUS void omap2_mcbsp1_mux_clkr_src(u8 mux) { WARN(1, "%s: should never be called on an OMAP1-only kernel\n", -- cgit v0.10.2 From 7bc0c4bac72375517d904e02c46da2a23e079e8b Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Sep 2011 10:45:49 +0300 Subject: ARM: OMAP: mcbsp: Start generalize signal muxing functions This generalizes the omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src implementation between generic McBSP and OMAP2 specific McBSP code. These functions are used to select source for CLKR and FSR signals on OMAP2+. Start generalizing the code by implementing an optional mux_signal function pointer in platform data that will implement the actual muxing and which is called now from omap2_mcbsp1_mux_clkr_src and omap2_mcbsp1_mux_fsr_src. These functions are to be removed later and cleanup the API so that mux_signal gets its arguments directly from client code. Signed-off-by: Jarkko Nikula Acked-by: Peter Ujfalusi Tested-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 3dd4c47..5063f25 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -34,33 +34,36 @@ #include "cm2xxx_3xxx.h" #include "cm-regbits-34xx.h" -/* McBSP internal signal muxing functions */ - -void omap2_mcbsp1_mux_clkr_src(u8 mux) +/* McBSP internal signal muxing function */ +static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal, + const char *src) { u32 v; v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - if (mux == CLKR_SRC_CLKR) - v &= ~OMAP2_MCBSP1_CLKR_MASK; - else if (mux == CLKR_SRC_CLKX) - v |= OMAP2_MCBSP1_CLKR_MASK; - omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); -} -EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); -void omap2_mcbsp1_mux_fsr_src(u8 mux) -{ - u32 v; + if (!strcmp(signal, "clkr")) { + if (!strcmp(src, "clkr")) + v &= ~OMAP2_MCBSP1_CLKR_MASK; + else if (!strcmp(src, "clkx")) + v |= OMAP2_MCBSP1_CLKR_MASK; + else + return -EINVAL; + } else if (!strcmp(signal, "fsr")) { + if (!strcmp(src, "fsr")) + v &= ~OMAP2_MCBSP1_FSR_MASK; + else if (!strcmp(src, "fsx")) + v |= OMAP2_MCBSP1_FSR_MASK; + else + return -EINVAL; + } else { + return -EINVAL; + } - v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - if (mux == FSR_SRC_FSR) - v &= ~OMAP2_MCBSP1_FSR_MASK; - else if (mux == FSR_SRC_FSX) - v |= OMAP2_MCBSP1_FSR_MASK; omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); + + return 0; } -EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); /* McBSP CLKS source switching function */ static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk, @@ -181,6 +184,8 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) return PTR_ERR(pdev); } pdata->set_clk_src = omap2_mcbsp_set_clk_src; + if (id == 1) + pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; omap_mcbsp_count++; return 0; } diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index c8ebfc9..8fa74e2 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -309,6 +309,7 @@ struct omap_mcbsp_platform_data { bool has_ccr; /* Transceiver has configuration control registers */ int (*enable_st_clock)(unsigned int, bool); int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src); + int (*mux_signal)(struct device *dev, const char *signal, const char *src); }; struct omap_mcbsp_st_data { diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 38b67d9..4b15cd7 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -922,21 +922,41 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) } EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); -#ifndef CONFIG_ARCH_OMAP2PLUS void omap2_mcbsp1_mux_clkr_src(u8 mux) { - WARN(1, "%s: should never be called on an OMAP1-only kernel\n", - __func__); - return; + struct omap_mcbsp *mcbsp; + const char *src; + + if (mux == CLKR_SRC_CLKR) + src = "clkr"; + else if (mux == CLKR_SRC_CLKX) + src = "clkx"; + else + return; + + mcbsp = id_to_mcbsp_ptr(0); + if (mcbsp->pdata->mux_signal) + mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src); } +EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); void omap2_mcbsp1_mux_fsr_src(u8 mux) { - WARN(1, "%s: should never be called on an OMAP1-only kernel\n", - __func__); - return; + struct omap_mcbsp *mcbsp; + const char *src; + + if (mux == FSR_SRC_FSR) + src = "fsr"; + else if (mux == FSR_SRC_FSX) + src = "fsx"; + else + return; + + mcbsp = id_to_mcbsp_ptr(0); + if (mcbsp->pdata->mux_signal) + mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); } -#endif +EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); #define max_thres(m) (mcbsp->pdata->buffer_size) #define valid_threshold(m, val) ((val) <= max_thres(m)) -- cgit v0.10.2 From 35549ec3c3e67188a8d3eac0167e950c46688c96 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 23 Sep 2011 22:23:09 +0200 Subject: ARM: OMAP2+: Add SoC specific map_io functions Add SoC specific map_io function to be used by the generic DT board file. This is an intermediate step before having some generic DT aware map_io function. Signed-off-by: Benoit Cousson Cc: Tony Lindgren Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 3f20cbb..de61f15 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -56,6 +56,12 @@ void __init omap2_set_globals_242x(void) { __omap2_set_globals(&omap242x_globals); } + +void __init omap242x_map_io(void) +{ + omap2_set_globals_242x(); + omap242x_map_common_io(); +} #endif #if defined(CONFIG_SOC_OMAP2430) @@ -74,6 +80,12 @@ void __init omap2_set_globals_243x(void) { __omap2_set_globals(&omap243x_globals); } + +void __init omap243x_map_io(void) +{ + omap2_set_globals_243x(); + omap243x_map_common_io(); +} #endif #if defined(CONFIG_ARCH_OMAP3) @@ -138,5 +150,11 @@ void __init omap2_set_globals_443x(void) omap2_set_globals_control(&omap4_globals); omap2_set_globals_prcm(&omap4_globals); } + +void __init omap4_map_io(void) +{ + omap2_set_globals_443x(); + omap44xx_map_common_io(); +} #endif diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 5cac97e..abda2c7 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -83,7 +83,11 @@ void omap2_set_globals_sdrc(struct omap_globals *); void omap2_set_globals_control(struct omap_globals *); void omap2_set_globals_prcm(struct omap_globals *); +void omap242x_map_io(void); +void omap243x_map_io(void); void omap3_map_io(void); +void omap4_map_io(void); + /** * omap_test_timeout - busy-loop, testing a condition -- cgit v0.10.2 From e990a4060fcb78a1576d36e7327db11c0d278a6b Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 26 Sep 2011 14:52:55 -0700 Subject: ARM: OMAP2+: Use SoC specifc map_io There's no longer any need for the board specific map_io. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 618216c..45dafe2 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -243,17 +243,11 @@ static void __init omap_2430sdp_init(void) "Secondary LCD backlight"); } -static void __init omap_2430sdp_map_io(void) -{ - omap2_set_globals_243x(); - omap243x_map_common_io(); -} - MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") /* Maintainer: Syed Khasim - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_2430sdp_map_io, + .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_irq = omap2_init_irq, .init_machine = omap_2430sdp_init, diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index ab19d30..44a3e2c 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -825,17 +825,11 @@ static void __init omap_4430sdp_init(void) omap_4430sdp_display_init(); } -static void __init omap_4430sdp_map_io(void) -{ - omap2_set_globals_443x(); - omap44xx_map_common_io(); -} - MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_4430sdp_map_io, + .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap_4430sdp_init, diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index cf546f8..8528436 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -337,17 +337,11 @@ static void __init omap_apollon_init(void) omap_sdrc_init(NULL, NULL); } -static void __init omap_apollon_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") /* Maintainer: Kyungmin Park */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_apollon_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = omap_apollon_init, diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 948fde0..fcc5107 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -369,17 +369,11 @@ static void __init omap_h4_init(void) h4_init_flash(); } -static void __init omap_h4_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - MACHINE_START(OMAP_H4, "OMAP2420 H4 board") /* Maintainer: Paul Mundt */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap_h4_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap_h4_init_irq, .init_machine = omap_h4_init, diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 77a4e19..d1f4a02 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -616,12 +616,6 @@ static struct i2c_board_info n810_i2c_board_info_2[] __initdata = { }, }; -static void __init n8x0_map_io(void) -{ - omap2_set_globals_242x(); - omap242x_map_common_io(); -} - #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { /* I2S codec port pins for McBSP block */ @@ -692,7 +686,7 @@ static void __init n8x0_init_machine(void) MACHINE_START(NOKIA_N800, "Nokia N800") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, @@ -702,7 +696,7 @@ MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, @@ -712,7 +706,7 @@ MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = n8x0_map_io, + .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = n8x0_init_machine, diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 1bce765..e269290 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -570,17 +570,11 @@ static void __init omap4_panda_init(void) omap4_panda_display_init(); } -static void __init omap4_panda_map_io(void) -{ - omap2_set_globals_443x(); - omap44xx_map_common_io(); -} - MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") /* Maintainer: David Anders - Texas Instruments Inc */ .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = omap4_panda_map_io, + .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, .init_machine = omap4_panda_init, diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index a3182e8..a98db61 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -143,16 +143,10 @@ static void __init rm680_init(void) rm680_peripherals_init(); } -static void __init rm680_map_io(void) -{ - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); -} - MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .boot_params = 0x80000100, .reserve = omap_reserve, - .map_io = rm680_map_io, + .map_io = omap3_map_io, .init_early = omap3630_init_early, .init_irq = omap3_init_irq, .init_machine = rm680_init, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 32a79e2..8677a06 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -139,12 +139,6 @@ static void __init rx51_init(void) platform_device_register(&leds_gpio); } -static void __init rx51_map_io(void) -{ - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); -} - static void __init rx51_reserve(void) { rx51_video_mem_init(); @@ -155,7 +149,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") /* Maintainer: Lauri Leukkunen */ .boot_params = 0x80000100, .reserve = rx51_reserve, - .map_io = rx51_map_io, + .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, .init_machine = rx51_init, -- cgit v0.10.2 From be73246058737beec52ae232bcab7776332a9e06 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 26 Sep 2011 15:25:22 -0700 Subject: ARM: OMAP2+: Remove custom init_irq for remaining boards With SoC specific timers, board specific init_irq is no longer needed. Earlier this was still needed to initialize the gptimer12 on Beagle based boards. Also convert board-h4.c to use omap2_init_irq accidentally did not get converted earlier. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 4b1f6c6..059b74d 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -397,11 +397,6 @@ static struct platform_device keys_gpio = { }, }; -static void __init devkit8000_init_irq(void) -{ - omap3_init_irq(); -} - #define OMAP_DM9000_BASE 0x2c000000 static struct resource omap_dm9000_resources[] = { @@ -665,7 +660,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap35xx_init_early, - .init_irq = devkit8000_init_irq, + .init_irq = omap3_init_irq, .init_machine = devkit8000_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index fcc5107..8486142 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -290,11 +290,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = { { OMAP_TAG_LCD, &h4_lcd_config }, }; -static void __init omap_h4_init_irq(void) -{ - omap2_init_irq(); -} - static struct at24_platform_data m24c01 = { .byte_len = SZ_1K / 8, .page_size = 16, @@ -375,7 +370,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .reserve = omap_reserve, .map_io = omap242x_map_io, .init_early = omap2420_init_early, - .init_irq = omap_h4_init_irq, + .init_irq = omap2_init_irq, .init_machine = omap_h4_init, .timer = &omap2_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index ce3234d..e085371 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -449,11 +449,6 @@ static void __init omap3_beagle_init_early(void) omap2_init_common_infrastructure(); } -static void __init omap3_beagle_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_beagle_devices[] __initdata = { &leds_gpio, &keys_gpio, @@ -561,7 +556,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3_beagle_init_early, - .init_irq = omap3_beagle_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_beagle_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 807c274..fa58a0f 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -428,11 +428,6 @@ static int __init omap3_stalker_i2c_init(void) static struct omap_board_config_kernel omap3_stalker_config[] __initdata = { }; -static void __init omap3_stalker_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_stalker_devices[] __initdata = { &keys_gpio, }; @@ -492,7 +487,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .boot_params = 0x80000100, .map_io = omap3_map_io, .init_early = omap35xx_init_early, - .init_irq = omap3_stalker_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_stalker_init, .timer = &omap3_secure_timer, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index f7f1809..05488fb 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -326,11 +326,6 @@ static struct omap_board_mux board_mux[] __initdata = { }; #endif -static void __init omap3_touchbook_init_irq(void) -{ - omap3_init_irq(); -} - static struct platform_device *omap3_touchbook_devices[] __initdata = { &omap3_touchbook_lcd_device, &leds_gpio, @@ -403,7 +398,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .reserve = omap_reserve, .map_io = omap3_map_io, .init_early = omap3430_init_early, - .init_irq = omap3_touchbook_init_irq, + .init_irq = omap3_init_irq, .init_machine = omap3_touchbook_init, .timer = &omap3_secure_timer, MACHINE_END -- cgit v0.10.2 From 3696d303d6a39f916f9ace37d79e3db7937c68a7 Mon Sep 17 00:00:00 2001 From: Bryan Buckley Date: Fri, 30 Sep 2011 11:05:55 -0700 Subject: ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1 Remove OMAP4_USBC1_ICUSB_PWRDNZ_MASK during enable/disable PWRDNZ mode for MMC1_PBIAS and associated extended-drain MMC1 I/O cell. This is in accordance with the control module programming guide. This fixes a bug where if trying to use gpio_98 or gpio_99 and MMC1 at the same time the GPIO signal will be affected by a changing SDMMC1_VDDS. Software must keep MMC1_PBIAS cell and MMC1_IO cell PWRDNZ signals low whenever SDMMC1_VDDS ramps up/down or changes for cell protection purposes. MMC1 is based on SDMMC1_VDDS whereas USBC1 is based on SIM_VDDS therefore they can operate independently. Signed-off-by: Bryan Buckley Acked-by: Kishore Kadiyala Tested-by: Balaji T K Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index a9b45c7..097a42d 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot, */ reg = omap4_ctrl_pad_readl(control_pbias_offset); reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } @@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, else reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK; reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | - OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); timeout = jiffies + msecs_to_jiffies(5); @@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot, if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) { pr_err("Pbias Voltage is not same as LDO\n"); /* Caution : On VMODE_ERROR Power Down MMC IO */ - reg &= ~(OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + reg &= ~(OMAP4_MMC1_PWRDNZ_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } } else { reg = omap4_ctrl_pad_readl(control_pbias_offset); reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | OMAP4_MMC1_PWRDNZ_MASK | - OMAP4_MMC1_PBIASLITE_VMODE_MASK | - OMAP4_USBC1_ICUSB_PWRDNZ_MASK); + OMAP4_MMC1_PBIASLITE_VMODE_MASK); omap4_ctrl_pad_writel(reg, control_pbias_offset); } } -- cgit v0.10.2 From bfd46a543f8f90bb197225900e355ce3c7daeb1f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 30 Sep 2011 11:05:55 -0700 Subject: ARM: OMAP: Fix i2c init for twl4030 Looks like 2600 kHz rate does not work reliably on 2430, so just use the 100 kHz rate. Otherwise the system often fails to boot properly with: omap_i2c omap_i2c.2: timeout waiting for bus ready omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages twl: clock init err [-110] omap_i2c omap_i2c.2: timeout waiting for bus ready twl: i2c_write failed to transfer all messages TWL4030 Unable to unlock IDCODE registers --110 Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 2028464..f79b7d2 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -193,7 +193,8 @@ static int __init omap2430_i2c_init(void) { omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, ARRAY_SIZE(sdp2430_i2c1_boardinfo)); - omap2_pmic_init("twl4030", &sdp2430_twldata); + omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ, + &sdp2430_twldata); return 0; } -- cgit v0.10.2 From b8e111a74d281b70e88bd67fec48cfda4f9bdce2 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Fri, 30 Sep 2011 11:05:55 -0700 Subject: ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_init Current code calls omap4430_phy_init() twice in usb_musb_init(). Calling omap4430_phy_init() once is enough. This patch removes the first omap4430_phy_init() call, which using an uninitialized pointer as parameter. This patch elimates below build warning: arch/arm/mach-omap2/usb-musb.c: In function 'usb_musb_init': arch/arm/mach-omap2/usb-musb.c:141: warning: 'dev' may be used uninitialized in this function Signed-off-by: Axel Lin Bjarne Steinsbo Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index a65145b..19e4dac 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -137,9 +137,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) musb_plat.mode = board_data->mode; musb_plat.extvbus = board_data->extvbus; - if (cpu_is_omap44xx()) - omap4430_phy_init(dev); - if (cpu_is_omap3517() || cpu_is_omap3505()) { oh_name = "am35x_otg_hs"; name = "musb-am35x"; -- cgit v0.10.2 From a368f7764491a0116baff9963d22247d4d8f6f51 Mon Sep 17 00:00:00 2001 From: Bjarne Steinsbo Date: Fri, 30 Sep 2011 11:05:56 -0700 Subject: ARM: OMAP4: Keyboard: Fix section mismatch in the board file `keypad_pads' is referred to by `keypad_data' which is not __initdata, so `keypad_pads' should not be __initdata either. Signed-off-by: Bjarne Steinsbo Reviewed-by: Felipe Balbi Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index c7cef44..9e423ac 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -129,7 +129,7 @@ static const int sdp4430_keymap[] = { KEY(7, 6, KEY_OK), KEY(7, 7, KEY_DOWN), }; -static struct omap_device_pad keypad_pads[] __initdata = { +static struct omap_device_pad keypad_pads[] = { { .name = "kpd_col1.kpd_col1", .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1, }, -- cgit v0.10.2 From 5c30cdfa41821dd89792600118cab5c02a5c322b Mon Sep 17 00:00:00 2001 From: Tapani Utriainen Date: Fri, 30 Sep 2011 11:05:56 -0700 Subject: ARM: OMAP: irq: loop counter fix in omap_init_irq() Fixes bug where variable i was redundantly used for counting two nested loops. Signed-off-by: Tapani Utriainen Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3a12f75..65f1be6 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -165,8 +165,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs) omap_irq_bank_init_one(bank); - for (i = 0, j = 0; i < bank->nr_irqs; i += 32, j += 0x20) - omap_alloc_gc(bank->base_reg + j, i, 32); + for (j = 0; j < bank->nr_irqs; j += 32) + omap_alloc_gc(bank->base_reg + j, j, 32); nr_of_irqs += bank->nr_irqs; nr_banks++; -- cgit v0.10.2 From 1f8a7d5207a2a343af7c3b18fcc65dc6aa1fb068 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 27 Jul 2011 15:02:32 -0500 Subject: ARM: OMAP: omap_device: Add omap_device_get_by_hwmod_name An API which translates a standard hwmod name to corresponding platform_device is useful for drivers when they need to look up the device associated with a hwmod name to map back into the device structure pointers. These ideally should be used by drivers in mach directory. Using a generic hwmod name like "gpu" instead of the actual device name which could change in the future, allows us to: a) Could in effect help replace apis such as omap2_get_mpuss_device, omap2_get_iva_device, omap2_get_l3_device, omap4_get_dsp_device, etc.. b) Scale to more devices rather than be restricted to named functions c) Simplify driver's platform_data from passing additional fields all doing the same thing with different function pointer names just for accessing a different device name. Signed-off-by: Nishanth Menon [b-cousson@ti.com: Adapt it to the new pdev pointer inside od, remove the unneeded helpers, and fold the next patch here] Signed-off-by: Benoit Cousson Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index d4d9b96..12c5b0c 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h @@ -101,6 +101,7 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, int pm_lats_cnt, int is_early_device); void __iomem *omap_device_get_rt_va(struct omap_device *od); +struct device *omap_device_get_by_hwmod_name(const char *oh_name); /* OMAP PM interface */ int omap_device_align_pm_lat(struct platform_device *pdev, diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 26aee5c..f832f92 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -844,6 +844,42 @@ void __iomem *omap_device_get_rt_va(struct omap_device *od) return omap_hwmod_get_mpu_rt_va(od->hwmods[0]); } +/** + * omap_device_get_by_hwmod_name() - convert a hwmod name to + * device pointer. + * @oh_name: name of the hwmod device + * + * Returns back a struct device * pointer associated with a hwmod + * device represented by a hwmod_name + */ +struct device *omap_device_get_by_hwmod_name(const char *oh_name) +{ + struct omap_hwmod *oh; + + if (!oh_name) { + WARN(1, "%s: no hwmod name!\n", __func__); + return ERR_PTR(-EINVAL); + } + + oh = omap_hwmod_lookup(oh_name); + if (IS_ERR_OR_NULL(oh)) { + WARN(1, "%s: no hwmod for %s\n", __func__, + oh_name); + return ERR_PTR(oh ? PTR_ERR(oh) : -ENODEV); + } + if (IS_ERR_OR_NULL(oh->od)) { + WARN(1, "%s: no omap_device for %s\n", __func__, + oh_name); + return ERR_PTR(oh->od ? PTR_ERR(oh->od) : -ENODEV); + } + + if (IS_ERR_OR_NULL(oh->od->pdev)) + return ERR_PTR(oh->od->pdev ? PTR_ERR(oh->od->pdev) : -ENODEV); + + return &oh->od->pdev->dev; +} +EXPORT_SYMBOL(omap_device_get_by_hwmod_name); + /* * Public functions intended for use in omap_device_pm_latency * .activate_func and .deactivate_func function pointers -- cgit v0.10.2 From b1621fc80123e4f113c3dc1bc6dbad53ebd0c888 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 14:01:23 +0200 Subject: ARM: OMAP3: beagle-board: Use the omap_hwmod_name_get_dev API Replace the multiple omap2_get_XXX_device APIs with the new omap_hwmod_name_get_dev that uses the hwmod name to get the proper device. Signed-off-by: Benoit Cousson Cc: Nishanth Menon Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index e085371..4a5d75f 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -486,8 +486,8 @@ static void __init beagle_opp_init(void) if (cpu_is_omap3630()) { struct device *mpu_dev, *iva_dev; - mpu_dev = omap2_get_mpuss_device(); - iva_dev = omap2_get_iva_device(); + mpu_dev = omap_device_get_by_hwmod_name("mpu"); + iva_dev = omap_device_get_by_hwmod_name("iva"); if (!mpu_dev || !iva_dev) { pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", -- cgit v0.10.2 From 0f7aa005c85917f114c376e937d88f5d941fb389 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 15:02:20 +0200 Subject: ARM: OMAP2+: pm: Use hwmod name instead of dev pointer Replace the struct device parameter of omap2_set_init_voltage by the hwmod name. It will avoid having to store explicitely the device pointer into a static variable. Moreover, it will be a little bit more scalable if we introduce new DVFS devices. Signed-off-by: Benoit Cousson Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 0844e2e..7c038ea 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -169,18 +169,26 @@ err: * in the opp entry */ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, - struct device *dev) + const char *oh_name) { struct voltagedomain *voltdm; struct clk *clk; struct opp *opp; unsigned long freq, bootup_volt; + struct device *dev; - if (!vdd_name || !clk_name || !dev) { + if (!vdd_name || !clk_name || !oh_name) { pr_err("%s: invalid parameters\n", __func__); goto exit; } + dev = omap_device_get_by_hwmod_name(oh_name); + if (IS_ERR(dev)) { + pr_err("%s: Unable to get dev pointer for hwmod %s\n", + __func__, oh_name); + goto exit; + } + voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { pr_err("%s: unable to get vdd pointer for vdd_%s\n", @@ -224,8 +232,8 @@ static void __init omap3_init_voltages(void) if (!cpu_is_omap34xx()) return; - omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); - omap2_set_init_voltage("core", "l3_ick", l3_dev); + omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu"); + omap2_set_init_voltage("core", "l3_ick", "l3_main"); } static void __init omap4_init_voltages(void) @@ -233,9 +241,9 @@ static void __init omap4_init_voltages(void) if (!cpu_is_omap44xx()) return; - omap2_set_init_voltage("mpu", "dpll_mpu_ck", mpu_dev); - omap2_set_init_voltage("core", "l3_div_ck", l3_dev); - omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", iva_dev); + omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu"); + omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1"); + omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); } static int __init omap2_common_pm_init(void) -- cgit v0.10.2 From 766e7afc38754e4bdcbf948fa523af8999a6296f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 15:03:59 +0200 Subject: ARM: OMAP2+: pm: Remove static devices variable for mpu, dsp, iva and l3 PM Since the device pointer is now retrieved using the hwmod name, remove the static variables used to store the device pointers for DSP, MPU, IVA and L3 devices for PM/DVFS usage. Signed-off-by: Benoit Cousson Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 7c038ea..9e78261 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -26,38 +26,7 @@ static struct omap_device_pm_latency *pm_lats; -static struct device *mpu_dev; -static struct device *iva_dev; -static struct device *l3_dev; -static struct device *dsp_dev; - -struct device *omap2_get_mpuss_device(void) -{ - WARN_ON_ONCE(!mpu_dev); - return mpu_dev; -} - -struct device *omap2_get_iva_device(void) -{ - WARN_ON_ONCE(!iva_dev); - return iva_dev; -} - -struct device *omap2_get_l3_device(void) -{ - WARN_ON_ONCE(!l3_dev); - return l3_dev; -} - -struct device *omap4_get_dsp_device(void) -{ - WARN_ON_ONCE(!dsp_dev); - return dsp_dev; -} -EXPORT_SYMBOL(omap4_get_dsp_device); - -/* static int _init_omap_device(struct omap_hwmod *oh, void *user) */ -static int _init_omap_device(char *name, struct device **new_dev) +static int _init_omap_device(char *name) { struct omap_hwmod *oh; struct platform_device *pdev; @@ -72,8 +41,6 @@ static int _init_omap_device(char *name, struct device **new_dev) __func__, name)) return -ENODEV; - *new_dev = &pdev->dev; - return 0; } @@ -82,16 +49,16 @@ static int _init_omap_device(char *name, struct device **new_dev) */ static void omap2_init_processor_devices(void) { - _init_omap_device("mpu", &mpu_dev); + _init_omap_device("mpu"); if (omap3_has_iva()) - _init_omap_device("iva", &iva_dev); + _init_omap_device("iva"); if (cpu_is_omap44xx()) { - _init_omap_device("l3_main_1", &l3_dev); - _init_omap_device("dsp", &dsp_dev); - _init_omap_device("iva", &iva_dev); + _init_omap_device("l3_main_1"); + _init_omap_device("dsp"); + _init_omap_device("iva"); } else { - _init_omap_device("l3_main", &l3_dev); + _init_omap_device("l3_main"); } } -- cgit v0.10.2 From b7b5bc91d422ff51ff84dfd5949e9d2f17a550c8 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 9 Aug 2011 16:54:19 +0200 Subject: ARM: OMAP: omap_device: Create a default omap_device_pm_latency Most devices are using the same default omap_device_pm_latency structure during device built. In order to avoid the duplication of the same structure everywhere, add a default structure that will be used if the device does not have an explicit one. Next patches will clean the duplicated structures. Signed-off-by: Benoit Cousson Cc: Paul Walmsley Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index f832f92..cd8d977 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -97,6 +97,14 @@ static int omap_device_register(struct platform_device *pdev); static int omap_early_device_register(struct platform_device *pdev); +static struct omap_device_pm_latency omap_default_latency[] = { + { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + } +}; + /* Private functions */ /** @@ -510,8 +518,17 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, if (ret) goto odbs_exit3; - od->pm_lats = pm_lats; + if (!pm_lats) { + pm_lats = omap_default_latency; + pm_lats_cnt = ARRAY_SIZE(omap_default_latency); + } + od->pm_lats_cnt = pm_lats_cnt; + od->pm_lats = kmemdup(pm_lats, + sizeof(struct omap_device_pm_latency) * pm_lats_cnt, + GFP_KERNEL); + if (!od->pm_lats) + goto odbs_exit3; for (i = 0; i < oh_cnt; i++) { hwmods[i]->od = od; -- cgit v0.10.2 From f718e2c034bf6ff872106344935006230764cb12 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Wed, 10 Aug 2011 15:30:09 +0200 Subject: ARM: OMAP2+: devices: Remove all omap_device_pm_latency structures Remove all these duplicated structures since a default one is now available. Signed-off-by: Benoit Cousson Signed-off-by: Kevin Hilman diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 10adf66..2d4a199 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -221,14 +221,6 @@ static inline void omap_init_camera(void) #endif } -struct omap_device_pm_latency omap_keyboard_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - int __init omap4_keyboard_init(struct omap4_keypad_platform_data *sdp4430_keypad_data, struct omap_board_data *bdata) { @@ -248,9 +240,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data keypad_data = sdp4430_keypad_data; pdev = omap_device_build(name, id, oh, keypad_data, - sizeof(struct omap4_keypad_platform_data), - omap_keyboard_latency, - ARRAY_SIZE(omap_keyboard_latency), 0); + sizeof(struct omap4_keypad_platform_data), NULL, 0, 0); if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", @@ -263,14 +253,6 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data } #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) -static struct omap_device_pm_latency mbox_latencies[] = { - [0] = { - .activate_func = omap_device_enable_hwmods, - .deactivate_func = omap_device_idle_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static inline void omap_init_mbox(void) { struct omap_hwmod *oh; @@ -282,8 +264,7 @@ static inline void omap_init_mbox(void) return; } - pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, - mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); + pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0); WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", __func__, PTR_ERR(pdev)); } @@ -334,14 +315,6 @@ static inline void omap_init_audio(void) {} #include -struct omap_device_pm_latency omap_mcspi_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) { struct platform_device *pdev; @@ -372,8 +345,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) spi_num++; pdev = omap_device_build(name, spi_num, oh, pdata, - sizeof(*pdata), omap_mcspi_latency, - ARRAY_SIZE(omap_mcspi_latency), 0); + sizeof(*pdata), NULL, 0, 0); WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", name, oh->name); kfree(pdata); @@ -698,14 +670,6 @@ static int __init omap2_init_devices(void) arch_initcall(omap2_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) -static struct omap_device_pm_latency omap_wdt_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int __init omap_init_wdt(void) { int id = -1; @@ -723,9 +687,7 @@ static int __init omap_init_wdt(void) return -EINVAL; } - pdev = omap_device_build(dev_name, id, oh, NULL, 0, - omap_wdt_latency, - ARRAY_SIZE(omap_wdt_latency), 0); + pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0); WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", dev_name, oh->name); return 0; diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 18693f6..8ad0a2f0 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -35,14 +35,6 @@ static struct platform_device omap_display_device = { }, }; -static struct omap_device_pm_latency omap_dss_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - struct omap_dss_hwmod_data { const char *oh_name; const char *dev_name; @@ -111,8 +103,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) pdev = omap_device_build(curr_dss_hwmod[i].dev_name, curr_dss_hwmod[i].id, oh, &pdata, sizeof(struct omap_display_platform_data), - omap_dss_latency, - ARRAY_SIZE(omap_dss_latency), 0); + NULL, 0, 0); if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n", curr_dss_hwmod[i].oh_name)) diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index ae8cb3f..a59a45a 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -87,14 +87,6 @@ static u16 reg_map[] = { [CCDN] = 0xd8, }; -static struct omap_device_pm_latency omap2_dma_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static void __iomem *dma_base; static inline void dma_write(u32 val, int reg, int lch) { @@ -258,8 +250,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) p->errata = configure_dma_errata(); - pdev = omap_device_build(name, 0, oh, p, sizeof(*p), - omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); + pdev = omap_device_build(name, 0, oh, p, sizeof(*p), NULL, 0, 0); kfree(p); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 652ccc5..8cbfbc2 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -24,14 +24,6 @@ #include #include -static struct omap_device_pm_latency omap_gpio_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) { struct platform_device *pdev; @@ -108,9 +100,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) } pdev = omap_device_build(name, id - 1, oh, pdata, - sizeof(*pdata), omap_gpio_latency, - ARRAY_SIZE(omap_gpio_latency), - false); + sizeof(*pdata), NULL, 0, false); kfree(pdata); if (IS_ERR(pdev)) { diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 2dc002a..7708584 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -409,31 +409,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, return 0; } -static struct omap_device_pm_latency omap_hsmmc_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, - /* - * XXX There should also be an entry here to power off/on the - * MMC regulators/PBIAS cells, etc. - */ -}; - #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) { struct omap_hwmod *oh; struct platform_device *pdev; - struct omap_device_pm_latency *ohl; char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; struct omap_mmc_platform_data *mmc_data; struct omap_mmc_dev_attr *mmc_dev_attr; char *name; int l; - int ohl_cnt = 0; mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); if (!mmc_data) { @@ -448,8 +434,6 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); name = "omap_hsmmc"; - ohl = omap_hsmmc_latency; - ohl_cnt = ARRAY_SIZE(omap_hsmmc_latency); l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, "mmc%d", ctrl_nr); @@ -468,7 +452,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) } pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, - sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); + sizeof(struct omap_mmc_platform_data), NULL, 0, false); if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); kfree(mmc_data->slots[0].name); diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 0b3ae9d..36e2109 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -23,14 +23,6 @@ #include #include -struct omap_device_pm_latency omap_spinlock_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - } -}; - int __init hwspinlocks_init(void) { int retval = 0; @@ -48,9 +40,7 @@ int __init hwspinlocks_init(void) if (oh == NULL) return -EINVAL; - pdev = omap_device_build(dev_name, 0, oh, NULL, 0, - omap_spinlock_latency, - ARRAY_SIZE(omap_spinlock_latency), false); + pdev = omap_device_build(dev_name, 0, oh, NULL, 0, NULL, 0, false); if (IS_ERR(pdev)) { pr_err("Can't build omap_device for %s:%s\n", dev_name, oh_name); diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 5063f25..292eee3 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -122,14 +122,6 @@ static int omap3_enable_st_clock(unsigned int id, bool enable) return 0; } -struct omap_device_pm_latency omap2_mcbsp_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) { int id, count = 1; @@ -175,8 +167,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) count++; } pdev = omap_device_build_ss(name, id, oh_device, count, pdata, - sizeof(*pdata), omap2_mcbsp_latency, - ARRAY_SIZE(omap2_mcbsp_latency), false); + sizeof(*pdata), NULL, 0, false); kfree(pdata); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 3d1c1d3..9992dbf 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -107,28 +107,6 @@ struct omap_uart_state { static LIST_HEAD(uart_list); static u8 num_uarts; -static int uart_idle_hwmod(struct omap_device *od) -{ - omap_hwmod_idle(od->hwmods[0]); - - return 0; -} - -static int uart_enable_hwmod(struct omap_device *od) -{ - omap_hwmod_enable(od->hwmods[0]); - - return 0; -} - -static struct omap_device_pm_latency omap_uart_latency[] = { - { - .deactivate_func = uart_idle_hwmod, - .activate_func = uart_enable_hwmod, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static inline unsigned int __serial_read_reg(struct uart_port *up, int offset) { @@ -800,8 +778,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) return; pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, - omap_uart_latency, - ARRAY_SIZE(omap_uart_latency), false); + NULL, 0, false); WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", name, oh->name); diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index eba9f9a..9f43fcc 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -31,14 +31,6 @@ static bool sr_enable_on_init; -static struct omap_device_pm_latency omap_sr_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST - }, -}; - /* Read EFUSE values from control registers for OMAP3430 */ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, struct omap_sr_data *sr_data) @@ -121,8 +113,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->enable_on_init = sr_enable_on_init; pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), - omap_sr_latency, - ARRAY_SIZE(omap_sr_latency), 0); + NULL, 0, 0); if (IS_ERR(pdev)) pr_warning("%s: Could not build omap_device for %s: %s.\n\n", __func__, name, oh->name); diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index d86af3c..47fb5d6 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -60,14 +60,6 @@ static struct musb_hdrc_platform_data musb_plat = { static u64 musb_dmamask = DMA_BIT_MASK(32); -static struct omap_device_pm_latency omap_musb_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static void usb_musb_mux_init(struct omap_musb_board_data *board_data) { switch (board_data->interface_type) { @@ -150,8 +142,7 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) return; pdev = omap_device_build(name, bus_id, oh, &musb_plat, - sizeof(musb_plat), omap_musb_latency, - ARRAY_SIZE(omap_musb_latency), false); + sizeof(musb_plat), NULL, 0, false); if (IS_ERR(pdev)) { pr_err("Could not build omap_device for %s %s\n", name, oh_name); diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 0c7caf2..c20beb8 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -123,14 +123,6 @@ static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t) omap_pm_set_max_mpu_wakeup_lat(dev, t); } -static struct omap_device_pm_latency omap_i2c_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static inline int omap2_i2c_add_bus(int bus_id) { int l; @@ -162,7 +154,7 @@ static inline int omap2_i2c_add_bus(int bus_id) pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(struct omap_i2c_bus_platform_data), - omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0); + NULL, 0, 0); WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); return PTR_ERR(pdev); -- cgit v0.10.2 From 4fcd15a032cec4b2684a32c86e895b50cdbee50c Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 27 Sep 2011 17:45:43 +0200 Subject: of: Add helpers to get one string in multiple strings property Add of_property_read_string_index and of_property_count_strings to retrieve one string inside a property that will contains severals strings. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Signed-off-by: Kevin Hilman diff --git a/drivers/of/base.c b/drivers/of/base.c index 3ff22e3..f7239b3 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -662,6 +662,90 @@ int of_property_read_string(struct device_node *np, const char *propname, EXPORT_SYMBOL_GPL(of_property_read_string); /** + * of_property_read_string_index - Find and read a string from a multiple + * strings property. + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * @index: index of the string in the list of strings + * @out_string: pointer to null terminated return string, modified only if + * return value is 0. + * + * Search for a property in a device tree node and retrieve a null + * terminated string value (pointer to data, not a copy) in the list of strings + * contained in that property. + * Returns 0 on success, -EINVAL if the property does not exist, -ENODATA if + * property does not have a value, and -EILSEQ if the string is not + * null-terminated within the length of the property data. + * + * The out_string pointer is modified only if a valid string can be decoded. + */ +int of_property_read_string_index(struct device_node *np, const char *propname, + int index, const char **output) +{ + struct property *prop = of_find_property(np, propname, NULL); + int i = 0; + size_t l = 0, total = 0; + const char *p; + + if (!prop) + return -EINVAL; + if (!prop->value) + return -ENODATA; + if (strnlen(prop->value, prop->length) >= prop->length) + return -EILSEQ; + + p = prop->value; + + for (i = 0; total < prop->length; total += l, p += l) { + l = strlen(p) + 1; + if ((*p != 0) && (i++ == index)) { + *output = p; + return 0; + } + } + return -ENODATA; +} +EXPORT_SYMBOL_GPL(of_property_read_string_index); + + +/** + * of_property_count_strings - Find and return the number of strings from a + * multiple strings property. + * @np: device node from which the property value is to be read. + * @propname: name of the property to be searched. + * + * Search for a property in a device tree node and retrieve the number of null + * terminated string contain in it. Returns the number of strings on + * success, -EINVAL if the property does not exist, -ENODATA if property + * does not have a value, and -EILSEQ if the string is not null-terminated + * within the length of the property data. + */ +int of_property_count_strings(struct device_node *np, const char *propname) +{ + struct property *prop = of_find_property(np, propname, NULL); + int i = 0; + size_t l = 0, total = 0; + const char *p; + + if (!prop) + return -EINVAL; + if (!prop->value) + return -ENODATA; + if (strnlen(prop->value, prop->length) >= prop->length) + return -EILSEQ; + + p = prop->value; + + for (i = 0; total < prop->length; total += l, p += l) { + l = strlen(p) + 1; + if (*p != 0) + i++; + } + return i; +} +EXPORT_SYMBOL_GPL(of_property_count_strings); + +/** * of_parse_phandle - Resolve a phandle property to a device_node pointer * @np: Pointer to device node holding phandle property * @phandle_name: Name of property holding a phandle value diff --git a/include/linux/of.h b/include/linux/of.h index 9180dc5..5dfe2d5 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -203,6 +203,11 @@ extern int of_property_read_u32_array(const struct device_node *np, extern int of_property_read_string(struct device_node *np, const char *propname, const char **out_string); +extern int of_property_read_string_index(struct device_node *np, + const char *propname, + int index, const char **output); +extern int of_property_count_strings(struct device_node *np, + const char *propname); extern int of_device_is_compatible(const struct device_node *device, const char *); extern int of_device_is_available(const struct device_node *device); @@ -256,6 +261,19 @@ static inline int of_property_read_string(struct device_node *np, return -ENOSYS; } +static inline int of_property_read_string_index(struct device_node *np, + const char *propname, int index, + const char **out_string) +{ + return -ENOSYS; +} + +static inline int of_property_count_strings(struct device_node *np, + const char *propname) +{ + return -ENOSYS; +} + static inline const void *of_get_property(const struct device_node *node, const char *name, int *lenp) -- cgit v0.10.2 From a4f6cdb0672fe9f171b1e8a0faa121b5d76e1c4a Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 9 Aug 2011 16:47:01 +0200 Subject: ARM: OMAP: omap_device: Add omap_device_[alloc|delete] for DT integration Split the omap_device_build_ss into two smaller functions that will allow to populate a platform_device already allocated by device-tree. The functionality of the omap_device_build_ss is still the same, but the omap_device_alloc will be usable with devices already built by device-tree. Signed-off-by: Benoit Cousson Signed-off-by: Kevin Hilman diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index cd8d977..6725c72 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -96,6 +96,11 @@ static int omap_device_register(struct platform_device *pdev); static int omap_early_device_register(struct platform_device *pdev); +static struct omap_device *omap_device_alloc(struct platform_device *pdev, + struct omap_hwmod **ohs, int oh_cnt, + struct omap_device_pm_latency *pm_lats, + int pm_lats_cnt); + static struct omap_device_pm_latency omap_default_latency[] = { { @@ -397,6 +402,110 @@ static int omap_device_fill_resources(struct omap_device *od, } /** + * omap_device_alloc - allocate an omap_device + * @pdev: platform_device that will be included in this omap_device + * @oh: ptr to the single omap_hwmod that backs this omap_device + * @pdata: platform_data ptr to associate with the platform_device + * @pdata_len: amount of memory pointed to by @pdata + * @pm_lats: pointer to a omap_device_pm_latency array for this device + * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats + * + * Convenience function for allocating an omap_device structure and filling + * hwmods, resources and pm_latency attributes. + * + * Returns an struct omap_device pointer or ERR_PTR() on error; + */ +static struct omap_device *omap_device_alloc(struct platform_device *pdev, + struct omap_hwmod **ohs, int oh_cnt, + struct omap_device_pm_latency *pm_lats, + int pm_lats_cnt) +{ + int ret = -ENOMEM; + struct omap_device *od; + struct resource *res = NULL; + int i, res_count; + struct omap_hwmod **hwmods; + + od = kzalloc(sizeof(struct omap_device), GFP_KERNEL); + if (!od) { + ret = -ENOMEM; + goto oda_exit1; + } + od->hwmods_cnt = oh_cnt; + + hwmods = kmemdup(ohs, sizeof(struct omap_hwmod *) * oh_cnt, GFP_KERNEL); + if (!hwmods) + goto oda_exit2; + + od->hwmods = hwmods; + od->pdev = pdev; + + /* + * HACK: Ideally the resources from DT should match, and hwmod + * should just add the missing ones. Since the name is not + * properly populated by DT, stick to hwmod resources only. + */ + if (pdev->num_resources && pdev->resource) + dev_warn(&pdev->dev, "%s(): resources already allocated %d\n", + __func__, pdev->num_resources); + + res_count = omap_device_count_resources(od); + if (res_count > 0) { + dev_dbg(&pdev->dev, "%s(): resources allocated from hwmod %d\n", + __func__, res_count); + res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL); + if (!res) + goto oda_exit3; + + omap_device_fill_resources(od, res); + + ret = platform_device_add_resources(pdev, res, res_count); + kfree(res); + + if (ret) + goto oda_exit3; + } + + if (!pm_lats) { + pm_lats = omap_default_latency; + pm_lats_cnt = ARRAY_SIZE(omap_default_latency); + } + + od->pm_lats_cnt = pm_lats_cnt; + od->pm_lats = kmemdup(pm_lats, + sizeof(struct omap_device_pm_latency) * pm_lats_cnt, + GFP_KERNEL); + if (!od->pm_lats) + goto oda_exit3; + + pdev->archdata.od = od; + + for (i = 0; i < oh_cnt; i++) { + hwmods[i]->od = od; + _add_hwmod_clocks_clkdev(od, hwmods[i]); + } + + return od; + +oda_exit3: + kfree(hwmods); +oda_exit2: + kfree(od); +oda_exit1: + dev_err(&pdev->dev, "omap_device: build failed (%d)\n", ret); + + return ERR_PTR(ret); +} + +static void omap_device_delete(struct omap_device *od) +{ + od->pdev->archdata.od = NULL; + kfree(od->pm_lats); + kfree(od->hwmods); + kfree(od); +} + +/** * omap_device_build - build and register an omap_device with one omap_hwmod * @pdev_name: name of the platform_device driver to use * @pdev_id: this platform_device's connection ID @@ -455,9 +564,6 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, int ret = -ENOMEM; struct platform_device *pdev; struct omap_device *od; - struct resource *res = NULL; - int i, res_count; - struct omap_hwmod **hwmods; if (!ohs || oh_cnt == 0 || !pdev_name) return ERR_PTR(-EINVAL); @@ -471,76 +577,31 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, goto odbs_exit; } - pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name, - oh_cnt); + /* Set the dev_name early to allow dev_xxx in omap_device_alloc */ + if (pdev->id != -1) + dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); + else + dev_set_name(&pdev->dev, "%s", pdev->name); - od = kzalloc(sizeof(struct omap_device), GFP_KERNEL); - if (!od) { - ret = -ENOMEM; + od = omap_device_alloc(pdev, ohs, oh_cnt, pm_lats, pm_lats_cnt); + if (!od) goto odbs_exit1; - } - od->hwmods_cnt = oh_cnt; - - hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt, - GFP_KERNEL); - if (!hwmods) - goto odbs_exit2; - - memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt); - od->hwmods = hwmods; - od->pdev = pdev; - - res_count = omap_device_count_resources(od); - if (res_count > 0) { - res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL); - if (!res) - goto odbs_exit3; - - omap_device_fill_resources(od, res); - - ret = platform_device_add_resources(pdev, res, res_count); - kfree(res); - - if (ret) - goto odbs_exit3; - } ret = platform_device_add_data(pdev, pdata, pdata_len); if (ret) - goto odbs_exit3; - - pdev->archdata.od = od; + goto odbs_exit2; if (is_early_device) ret = omap_early_device_register(pdev); else ret = omap_device_register(pdev); if (ret) - goto odbs_exit3; - - if (!pm_lats) { - pm_lats = omap_default_latency; - pm_lats_cnt = ARRAY_SIZE(omap_default_latency); - } - - od->pm_lats_cnt = pm_lats_cnt; - od->pm_lats = kmemdup(pm_lats, - sizeof(struct omap_device_pm_latency) * pm_lats_cnt, - GFP_KERNEL); - if (!od->pm_lats) - goto odbs_exit3; - - for (i = 0; i < oh_cnt; i++) { - hwmods[i]->od = od; - _add_hwmod_clocks_clkdev(od, hwmods[i]); - } + goto odbs_exit2; return pdev; -odbs_exit3: - kfree(hwmods); odbs_exit2: - kfree(od); + omap_device_delete(od); odbs_exit1: platform_device_put(pdev); odbs_exit: -- cgit v0.10.2 From dc2d07ebaea839a6e0fa47588c7984931f3c9c71 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Wed, 10 Aug 2011 13:32:08 +0200 Subject: ARM: OMAP: omap_device: Add a method to build an omap_device from a DT node Add a notifier called during device_add phase. If an of_node is present, retrieve the hwmod entry in order to populate properly the omap_device structure. For the moment the resource from the device-tree are overloaded. DT does not support named resource yet, and thus, most driver will not work without that information. Add a documentation to capture the specifics OMAP bindings needed for device-tree support. Signed-off-by: Benoit Cousson Cc: Grant Likely Signed-off-by: Kevin Hilman diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt new file mode 100644 index 0000000..dbdab40 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -0,0 +1,43 @@ +* Texas Instruments OMAP + +OMAP is currently using a static file per SoC family to describe the +IPs present in the SoC. +On top of that an omap_device is created to extend the platform_device +capabilities and to allow binding with one or several hwmods. +The hwmods will contain all the information to build the device: +adresse range, irq lines, dma lines, interconnect, PRCM register, +clock domain, input clocks. +For the moment just point to the existing hwmod, the next step will be +to move data from hwmod to device-tree representation. + + +Required properties: +- compatible: Every devices present in OMAP SoC should be in the + form: "ti,XXX" +- ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP + HW documentation, attached to a device. Must contain at least + one hwmod. + +Optional properties: +- ti,no_idle_on_suspend: When present, it prevents the PM to idle the module + during suspend. + + +Example: + +spinlock@1 { + compatible = "ti,omap4-spinlock"; + ti,hwmods = "spinlock"; +}; + + +Boards: + +- OMAP3 BeagleBoard : Low cost community board + compatible = "ti,omap3-beagle", "ti,omap3" + +- OMAP4 SDP : Software Developement Board + compatible = "ti,omap4-sdp", "ti,omap4430" + +- OMAP4 PandaBoard : Low cost community board + compatible = "ti,omap4-panda", "ti,omap4430" diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 6725c72..cd90bed 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c @@ -85,6 +85,8 @@ #include #include #include +#include +#include #include #include @@ -100,6 +102,7 @@ static struct omap_device *omap_device_alloc(struct platform_device *pdev, struct omap_hwmod **ohs, int oh_cnt, struct omap_device_pm_latency *pm_lats, int pm_lats_cnt); +static void omap_device_delete(struct omap_device *od); static struct omap_device_pm_latency omap_default_latency[] = { @@ -316,6 +319,96 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od, } +static struct dev_pm_domain omap_device_pm_domain; + +/** + * omap_device_build_from_dt - build an omap_device with multiple hwmods + * @pdev_name: name of the platform_device driver to use + * @pdev_id: this platform_device's connection ID + * @oh: ptr to the single omap_hwmod that backs this omap_device + * @pdata: platform_data ptr to associate with the platform_device + * @pdata_len: amount of memory pointed to by @pdata + * @pm_lats: pointer to a omap_device_pm_latency array for this device + * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats + * @is_early_device: should the device be registered as an early device or not + * + * Function for building an omap_device already registered from device-tree + * + * Returns 0 or PTR_ERR() on error. + */ +static int omap_device_build_from_dt(struct platform_device *pdev) +{ + struct omap_hwmod **hwmods; + struct omap_device *od; + struct omap_hwmod *oh; + struct device_node *node = pdev->dev.of_node; + const char *oh_name; + int oh_cnt, i, ret = 0; + + oh_cnt = of_property_count_strings(node, "ti,hwmods"); + if (!oh_cnt || IS_ERR_VALUE(oh_cnt)) { + dev_warn(&pdev->dev, "No 'hwmods' to build omap_device\n"); + return -ENODEV; + } + + hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt, GFP_KERNEL); + if (!hwmods) { + ret = -ENOMEM; + goto odbfd_exit; + } + + for (i = 0; i < oh_cnt; i++) { + of_property_read_string_index(node, "ti,hwmods", i, &oh_name); + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + dev_err(&pdev->dev, "Cannot lookup hwmod '%s'\n", + oh_name); + ret = -EINVAL; + goto odbfd_exit1; + } + hwmods[i] = oh; + } + + od = omap_device_alloc(pdev, hwmods, oh_cnt, NULL, 0); + if (!od) { + dev_err(&pdev->dev, "Cannot allocate omap_device for :%s\n", + oh_name); + ret = PTR_ERR(od); + goto odbfd_exit1; + } + + if (of_get_property(node, "ti,no_idle_on_suspend", NULL)) + omap_device_disable_idle_on_suspend(pdev); + + pdev->dev.pm_domain = &omap_device_pm_domain; + +odbfd_exit1: + kfree(hwmods); +odbfd_exit: + return ret; +} + +static int _omap_device_notifier_call(struct notifier_block *nb, + unsigned long event, void *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + + switch (event) { + case BUS_NOTIFY_ADD_DEVICE: + if (pdev->dev.of_node) + omap_device_build_from_dt(pdev); + break; + + case BUS_NOTIFY_DEL_DEVICE: + if (pdev->archdata.od) + omap_device_delete(pdev->archdata.od); + break; + } + + return NOTIFY_DONE; +} + + /* Public functions for use by core code */ /** @@ -499,6 +592,9 @@ oda_exit1: static void omap_device_delete(struct omap_device *od) { + if (!od) + return; + od->pdev->archdata.od = NULL; kfree(od->pm_lats); kfree(od->hwmods); @@ -1038,8 +1134,13 @@ struct device omap_device_parent = { .parent = &platform_bus, }; +static struct notifier_block platform_nb = { + .notifier_call = _omap_device_notifier_call, +}; + static int __init omap_device_init(void) { + bus_register_notifier(&platform_bus_type, &platform_nb); return device_register(&omap_device_parent); } core_initcall(omap_device_init); -- cgit v0.10.2 From d9fda07af7fbb989cf68ba7d2f370320f05664d8 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 9 Aug 2011 17:15:17 +0200 Subject: arm/dts: Add initial device tree support for OMAP4 SoC Add initial device-tree support for OMAP4 SoC. This is based on the original panda board patch done by Manju: http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393 Add the generic GIC interrupt-controller from ARM. Add an empty "soc" node to contain non memory mapped IPs (DSP, MPU, IPU...). Note: Since reg, irq and dma are provided by hwmod for the moment, these attributes will not be present at all in DTS to highlight the gap. They will be added as soon as dma bindings will be there and drivers will be adapted. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: G, Manjunath Kondaiah diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi new file mode 100644 index 0000000..d4131e3 --- /dev/null +++ b/arch/arm/boot/dts/omap4.dtsi @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Carveout for multimedia usecases + * It should be the last 48MB of the first 512MB memory part + * In theory, it should not even exist. That zone should be reserved + * dynamically during the .reserve callback. + */ +/memreserve/ 0x9d000000 0x03000000; + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,omap4430", "ti,omap4"; + interrupt-parent = <&gic>; + + aliases { + }; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + }; + + /* + * XXX: Use a flat representation of the OMAP4 interconnect. + * The real OMAP interconnect network is quite complex. + * + * MPU -+-- MPU_PRIVATE - GIC, L2 + * | + * +----------------+----------+ + * | | | + * + +- EMIF - DDR | + * | | | + * | + +--------+ + * | | | + * | +- L4_ABE - AESS, MCBSP, TIMERs... + * | | + * +- L3_MAIN --+- L4_CORE - IPs... + * | + * +- L4_PER - IPs... + * | + * +- L4_CFG -+- L4_WKUP - IPs... + * | | + * | +- IPs... + * +- IPU ----+ + * | | + * +- DSP ----+ + * | | + * +- DSS ----+ + * + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + }; +}; -- cgit v0.10.2 From 38eb2ae65859b8c1bbb0cd07a173ad19de39b746 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 15:57:51 +0200 Subject: arm/dts: Add support for OMAP4 PandaBoard Based on the original omap4-panda.dts file from Manju. http://www.spinics.net/lists/linux-omap/msg55836.html Add memory information and a default bootargs to allow a boot from RAMDISK. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: G, Manjunath Kondaiah diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts new file mode 100644 index 0000000..c702657 --- /dev/null +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap4.dtsi" + +/ { + model = "TI OMAP4 PandaBoard"; + compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4"; + + /* + * Since the initial device tree board file does not create any + * devices (MMC, network...), the only way to boot is to provide a + * ramdisk. + */ + chosen { + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1 GB */ + }; +}; -- cgit v0.10.2 From 492beedfd80e48be48211b5e7bce9b85fb141a81 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 15:59:52 +0200 Subject: arm/dts: Add support for OMAP4 SDP board Add the SDP/Blaze (Software Development Board) support with device tree. That file is based on the omap4-panda.dts. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: G, Manjunath Kondaiah diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts new file mode 100644 index 0000000..066e28c --- /dev/null +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap4.dtsi" + +/ { + model = "TI OMAP4 SDP board"; + compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4"; + + /* + * Since the initial device tree board file does not create any + * devices (MMC, network...), the only way to boot is to provide a + * ramdisk. + */ + chosen { + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1 GB */ + }; +}; -- cgit v0.10.2 From 189892f496cd01bf1af149bd6f7f380fcf67489d Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 21:02:01 +0530 Subject: arm/dts: Add initial device tree support for OMAP3 SoC Add initial OMAP3 soc file with empty ocp bus. Based on initial patch from Manju: http://www.spinics.net/lists/linux-omap/msg55830.html Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: G, Manjunath Kondaiah diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi new file mode 100644 index 0000000..d558785 --- /dev/null +++ b/arch/arm/boot/dts/omap3.dtsi @@ -0,0 +1,44 @@ +/* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,omap3430", "ti,omap3"; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + }; + + /* + * XXX: Use a flat representation of the OMAP3 interconnect. + * The real OMAP interconnect network is quite complex. + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main"; + + intc: interrupt-controller@1 { + compatible = "ti,omap3-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +}; -- cgit v0.10.2 From 295e98c60b8cee05e02f0a055dbc12a08b0378c1 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Thu, 14 Jul 2011 01:44:54 +0530 Subject: arm/dts: Add support for OMAP3 Beagle board Add OMAP3 beagleboard DTS file to use the omap3.dtsi SoC file. Add a default bootargs line to allow a boot from RAMDISK. Add memory node information. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: G, Manjunath Kondaiah diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts new file mode 100644 index 0000000..9486be6 --- /dev/null +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +/include/ "omap3.dtsi" + +/ { + model = "TI OMAP3 BeagleBoard"; + compatible = "ti,omap3-beagle", "ti,omap3"; + + /* + * Since the initial device tree board file does not create any + * devices (MMC, network...), the only way to boot is to provide a + * ramdisk. + */ + chosen { + bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; +}; -- cgit v0.10.2 From 8d61649ddf6707d89fc10028f9d1bd1a2ea37b4f Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 20 Sep 2011 21:24:47 +0200 Subject: ARM: OMAP2+: board-generic: Add DT support to generic board Re-cycle the original board-generic.c file to support Device Tree for every OMAP2+ variants. The current approach is an intermediate step before having only one machine descriptor that will use some generic DT aware functions. Signed-off-by: Benoit Cousson Cc: Tony Lindgren diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 57b66d5..e0a318d 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -106,9 +106,13 @@ comment "OMAP Board Type" depends on ARCH_OMAP2PLUS config MACH_OMAP_GENERIC - bool "Generic OMAP board" - depends on ARCH_OMAP2 + bool "Generic OMAP2+ board" + depends on ARCH_OMAP2PLUS + select USE_OF default y + help + Support for generic TI OMAP2+ boards using Flattened Device Tree. + More information at Documentation/devicetree config MACH_OMAP2_TUSB6010 bool diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 5223898f..62c6b2e 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -1,76 +1,117 @@ /* - * linux/arch/arm/mach-omap2/board-generic.c - * * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt * - * Modified from mach-omap/omap1/board-generic.c + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * - * Code for generic OMAP2 board. Should work on many OMAP2 systems where - * the bootloader passes the board-specific data to the kernel. - * Do not put any board specific code to this file; create a new machine - * type if you need custom low-level initializations. + * Modified from the original mach-omap/omap2/board-generic.c did by Paul + * to support the OMAP2+ device tree boards with an unique board file. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include -#include -#include +#include +#include +#include #include -#include #include -#include -#include -#include #include #include +#include + -static struct omap_board_config_kernel generic_config[] = { +static struct of_device_id omap_dt_match_table[] __initdata = { + { .compatible = "simple-bus", }, + { .compatible = "ti,omap-infra", }, + { } }; -static void __init omap_generic_init_early(void) -{ - omap2_init_common_infrastructure(); -} +static struct of_device_id intc_match[] __initdata = { + { .compatible = "ti,omap3-intc", }, + { .compatible = "arm,cortex-a9-gic", }, + { } +}; static void __init omap_generic_init(void) { + struct device_node *node = of_find_matching_node(NULL, intc_match); + if (node) + irq_domain_add_simple(node, 0); + omap_serial_init(); omap_sdrc_init(NULL, NULL); - omap_board_config = generic_config; - omap_board_config_size = ARRAY_SIZE(generic_config); -} -static void __init omap_generic_map_io(void) -{ - if (cpu_is_omap242x()) { - omap2_set_globals_242x(); - omap242x_map_common_io(); - } else if (cpu_is_omap243x()) { - omap2_set_globals_243x(); - omap243x_map_common_io(); - } else if (cpu_is_omap34xx()) { - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); - } else if (cpu_is_omap44xx()) { - omap2_set_globals_443x(); - omap44xx_map_common_io(); - } + of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); } -/* XXX This machine entry name should be updated */ -MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") - /* Maintainer: Paul Mundt */ - .boot_params = 0x80000100, +#if defined(CONFIG_SOC_OMAP2420) +static const char *omap242x_boards_compat[] __initdata = { + "ti,omap2420", + NULL, +}; + +DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") + .reserve = omap_reserve, + .map_io = omap242x_map_io, + .init_early = omap2420_init_early, + .init_irq = omap2_init_irq, + .init_machine = omap_generic_init, + .timer = &omap2_timer, + .dt_compat = omap242x_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_SOC_OMAP2430) +static const char *omap243x_boards_compat[] __initdata = { + "ti,omap2430", + NULL, +}; + +DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .reserve = omap_reserve, - .map_io = omap_generic_map_io, - .init_early = omap_generic_init_early, + .map_io = omap243x_map_io, + .init_early = omap2430_init_early, .init_irq = omap2_init_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, + .dt_compat = omap243x_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_ARCH_OMAP3) +static const char *omap3_boards_compat[] __initdata = { + "ti,omap3", + NULL, +}; + +DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") + .reserve = omap_reserve, + .map_io = omap3_map_io, + .init_early = omap3430_init_early, + .init_irq = omap3_init_irq, + .init_machine = omap_generic_init, + .timer = &omap3_timer, + .dt_compat = omap3_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_ARCH_OMAP4) +static const char *omap4_boards_compat[] __initdata = { + "ti,omap4", + NULL, +}; + +DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") + .reserve = omap_reserve, + .map_io = omap4_map_io, + .init_early = omap4430_init_early, + .init_irq = gic_init_irq, + .init_machine = omap_generic_init, + .timer = &omap4_timer, + .dt_compat = omap4_boards_compat, MACHINE_END +#endif -- cgit v0.10.2 From a7cbb9b15d55dff0488b1a6d93929c2386d8632b Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Thu, 22 Sep 2011 21:52:02 +0200 Subject: ARM: OMAP2+: board-generic: Add i2c static init Still needed to boot until the i2c & twl driver is adapted to device-tree. Otherwise the voltage control code will try to access the twl and crash. Signed-off-by: Benoit Cousson Cc: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 62c6b2e..d9ccb9d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -22,7 +23,31 @@ #include #include #include +#include "common-board-devices.h" +/* + * XXX: Still needed to boot until the i2c & twl driver is adapted to + * device-tree + */ +static struct twl4030_platform_data sdp4430_twldata = { + .irq_base = TWL6030_IRQ_BASE, + .irq_end = TWL6030_IRQ_END, +}; + +static void __init omap4_i2c_init(void) +{ + omap4_pmic_init("twl6030", &sdp4430_twldata); +} + +static struct twl4030_platform_data beagle_twldata = { + .irq_base = TWL4030_IRQ_BASE, + .irq_end = TWL4030_IRQ_END, +}; + +static void __init omap3_i2c_init(void) +{ + omap3_pmic_init("twl4030", &beagle_twldata); +} static struct of_device_id omap_dt_match_table[] __initdata = { { .compatible = "simple-bus", }, @@ -48,6 +73,18 @@ static void __init omap_generic_init(void) of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); } +static void __init omap4_init(void) +{ + omap4_i2c_init(); + omap_generic_init(); +} + +static void __init omap3_init(void) +{ + omap3_i2c_init(); + omap_generic_init(); +} + #if defined(CONFIG_SOC_OMAP2420) static const char *omap242x_boards_compat[] __initdata = { "ti,omap2420", @@ -93,7 +130,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .map_io = omap3_map_io, .init_early = omap3430_init_early, .init_irq = omap3_init_irq, - .init_machine = omap_generic_init, + .init_machine = omap3_init, .timer = &omap3_timer, .dt_compat = omap3_boards_compat, MACHINE_END @@ -110,7 +147,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .map_io = omap4_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, - .init_machine = omap_generic_init, + .init_machine = omap4_init, .timer = &omap4_timer, .dt_compat = omap4_boards_compat, MACHINE_END -- cgit v0.10.2 From d039c5b9fb2315ef942944439da6f0fbaf2f1941 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 12 Aug 2011 13:52:50 +0200 Subject: ARM: OMAP2+: l3-noc: Add support for device-tree Add device-tree support for the l3-noc driver. Use platform_driver_register to defer the probing at device init time. Add documentation for the l3-noc bindings. Signed-off-by: Benoit Cousson Cc: Tony Lindgren Cc: Santosh Shilimkar diff --git a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt new file mode 100644 index 0000000..6888a5e --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt @@ -0,0 +1,19 @@ +* TI - L3 Network On Chip (NoC) + +This version is an implementation of the generic NoC IP +provided by Arteris. + +Required properties: +- compatible : Should be "ti,omap3-l3-smx" for OMAP3 family + Should be "ti,omap4-l3-noc" for OMAP4 family +- ti,hwmods: "l3_main_1", ... One hwmod for each noc domain. + +Examples: + +ocp { + compatible = "ti,omap4-l3-noc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; +}; diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 07a3d3e..c8b1bef 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -127,7 +127,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) return IRQ_HANDLED; } -static int __init omap4_l3_probe(struct platform_device *pdev) +static int __devinit omap4_l3_probe(struct platform_device *pdev) { static struct omap4_l3 *l3; struct resource *res; @@ -218,7 +218,7 @@ err0: return ret; } -static int __exit omap4_l3_remove(struct platform_device *pdev) +static int __devexit omap4_l3_remove(struct platform_device *pdev) { struct omap4_l3 *l3 = platform_get_drvdata(pdev); @@ -232,16 +232,29 @@ static int __exit omap4_l3_remove(struct platform_device *pdev) return 0; } +#if defined(CONFIG_OF) +static const struct of_device_id l3_noc_match[] = { + {.compatible = "ti,omap4-l3-noc", }, + {}, +} +MODULE_DEVICE_TABLE(of, l3_noc_match); +#else +#define l3_noc_match NULL +#endif + static struct platform_driver omap4_l3_driver = { - .remove = __exit_p(omap4_l3_remove), - .driver = { - .name = "omap_l3_noc", + .probe = omap4_l3_probe, + .remove = __devexit_p(omap4_l3_remove), + .driver = { + .name = "omap_l3_noc", + .owner = THIS_MODULE, + .of_match_table = l3_noc_match, }, }; static int __init omap4_l3_init(void) { - return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe); + return platform_driver_register(&omap4_l3_driver); } postcore_initcall_sync(omap4_l3_init); -- cgit v0.10.2 From ad8dfac66fb1995014060302bda19a15bc62bd6d Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Fri, 12 Aug 2011 13:48:47 +0200 Subject: arm/dts: OMAP4: Add a main ocp entry bound to l3-noc driver Used the main OCP node to add bindings with the l3_noc driver. Remove l3_noc static device creation if DT is populated. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: Tony Lindgren Cc: Santosh Shilimkar diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index d4131e3..b85a39d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -63,10 +63,11 @@ * hierarchy. */ ocp { - compatible = "simple-bus"; + compatible = "ti,omap4-l3-noc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; gic: interrupt-controller@48241000 { compatible = "arm,cortex-a9-gic"; diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 2d4a199..0f8e0eb 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -77,6 +78,10 @@ static int __init omap4_l3_init(void) struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; + /* If dtb is there, the devices will be created dynamically */ + if (of_have_populated_dt()) + return -ENODEV; + /* * To avoid code running on other OMAPs in * multi-omap builds -- cgit v0.10.2 From 476b679a5d785d1244f6b43ad26877acf278cd18 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 11:49:08 +0200 Subject: arm/dts: OMAP3+: Add mpu, dsp and iva nodes Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson Acked-by: Grant Likely Cc: Kevin Hilman diff --git a/Documentation/devicetree/bindings/arm/omap/dsp.txt b/Documentation/devicetree/bindings/arm/omap/dsp.txt new file mode 100644 index 0000000..d3830a3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/dsp.txt @@ -0,0 +1,14 @@ +* TI - DSP (Digital Signal Processor) + +TI DSP included in OMAP SoC + +Required properties: +- compatible : Should be "ti,omap3-c64" for OMAP3 & 4 +- ti,hwmods: "dsp" + +Examples: + +dsp { + compatible = "ti,omap3-c64"; + ti,hwmods = "dsp"; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/iva.txt b/Documentation/devicetree/bindings/arm/omap/iva.txt new file mode 100644 index 0000000..6d62951 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/iva.txt @@ -0,0 +1,19 @@ +* TI - IVA (Imaging and Video Accelerator) subsystem + +The IVA contain various audio, video or imaging HW accelerator +depending of the version. + +Required properties: +- compatible : Should be: + - "ti,ivahd" for OMAP4 + - "ti,iva2.2" for OMAP3 + - "ti,iva2.1" for OMAP2430 + - "ti,iva1" for OMAP2420 +- ti,hwmods: "iva" + +Examples: + +iva { + compatible = "ti,ivahd", "ti,iva"; + ti,hwmods = "iva"; +}; diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt new file mode 100644 index 0000000..1a5a42c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt @@ -0,0 +1,27 @@ +* TI - MPU (Main Processor Unit) subsystem + +The MPU subsystem contain one or several ARM cores +depending of the version. +The MPU contain CPUs, GIC, L2 cache and a local PRCM. + +Required properties: +- compatible : Should be "ti,omap3-mpu" for OMAP3 + Should be "ti,omap4-mpu" for OMAP4 +- ti,hwmods: "mpu" + +Examples: + +- For an OMAP4 SMP system: + +mpu { + compatible = "ti,omap4-mpu"; + ti,hwmods = "mpu"; +}; + + +- For an OMAP3 monocore system: + +mpu { + compatible = "ti,omap3-mpu"; + ti,hwmods = "mpu"; +}; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index d558785..d202bb5 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -13,12 +13,31 @@ / { compatible = "ti,omap3430", "ti,omap3"; + cpus { + cpu@0 { + compatible = "arm,cortex-a8"; + }; + }; + /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap3-mpu"; + ti,hwmods = "mpu"; + }; + + iva { + compatible = "ti,iva2.2"; + ti,hwmods = "iva"; + + dsp { + compatible = "ti,omap3-c64"; + }; + }; }; /* diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index b85a39d..4c61c82 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -23,12 +23,35 @@ aliases { }; + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + cpu@1 { + compatible = "arm,cortex-a9"; + }; + }; + /* * The soc node represents the soc top level view. It is uses for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap4-mpu"; + ti,hwmods = "mpu"; + }; + + dsp { + compatible = "ti,omap3-c64"; + ti,hwmods = "dsp"; + }; + + iva { + compatible = "ti,ivahd"; + ti,hwmods = "iva"; + }; }; /* diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 9e78261..2ab7a9e 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -215,7 +215,8 @@ static void __init omap4_init_voltages(void) static int __init omap2_common_pm_init(void) { - omap2_init_processor_devices(); + if (!of_have_populated_dt()) + omap2_init_processor_devices(); omap_pm_if_init(); return 0; -- cgit v0.10.2 From 7b88e62f5d219a86d81bdf4388012c97dc42e8f8 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 5 Oct 2011 15:14:02 -0700 Subject: ARM: OMAP1: Use generic map_io, init_early and init_irq This allows removing omap hacks for map_io allowing generic map_io. Note that in the future we can't do cpu_is_omapxxxx detection until in init_early. This means that board-innovator.c now assumes 15xx only, and board-generic.c assumes 16xx only. This is best fixed later on by passing the SoC type from device tree. Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 312ea6b..4427737 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -135,12 +135,6 @@ void ams_delta_latch2_write(u16 mask, u16 value) *(volatile __u16 *) AMS_DELTA_LATCH2_VIRT = ams_delta_latch2_reg; } -static void __init ams_delta_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static struct map_desc ams_delta_io_desc[] __initdata = { /* AMS_DELTA_LATCH1 */ { @@ -379,17 +373,13 @@ static int __init ams_delta_modem_init(void) } arch_initcall(ams_delta_modem_init); -static void __init ams_delta_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") /* Maintainer: Jonathan McDowell */ .boot_params = 0x10000100, - .map_io = ams_delta_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = ams_delta_init_irq, + .init_irq = omap1_init_irq, .init_machine = ams_delta_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index a6b1bea..b09dfe6 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c @@ -297,6 +297,39 @@ static struct omap_board_config_kernel fsample_config[] __initdata = { static void __init omap_fsample_init(void) { + /* Early, board-dependent init */ + + /* + * Hold GSM Reset until needed + */ + omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); + + /* + * UARTs -> done automagically by 8250 driver + */ + + /* + * CSx timings, GPIO Mux ... setup + */ + + /* Flash: CS0 timings setup */ + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); + omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); + + /* + * Ethernet support through the debug board + * CS1 timings setup + */ + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); + omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); + + /* + * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, + * It is used as the Ethernet controller interrupt + */ + omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, + OMAP7XX_IO_CONF_9); + fsample_init_smc91x(); if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0) @@ -326,12 +359,6 @@ static void __init omap_fsample_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init omap_fsample_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc omap_fsample_io_desc[] __initdata = { { @@ -350,49 +377,18 @@ static struct map_desc omap_fsample_io_desc[] __initdata = { static void __init omap_fsample_map_io(void) { - omap1_map_common_io(); + omap15xx_map_io(); iotable_init(omap_fsample_io_desc, ARRAY_SIZE(omap_fsample_io_desc)); - - /* Early, board-dependent init */ - - /* - * Hold GSM Reset until needed - */ - omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); - - /* - * UARTs -> done automagically by 8250 driver - */ - - /* - * CSx timings, GPIO Mux ... setup - */ - - /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); - omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); - - /* - * Ethernet support through the debug board - * CS1 timings setup - */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); - omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); - - /* - * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, - * It is used as the Ethernet controller interrupt - */ - omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); } MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") /* Maintainer: Brian Swetland */ .boot_params = 0x10000100, .map_io = omap_fsample_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_fsample_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_fsample_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c index 04fc356..cc0cca7 100644 --- a/arch/arm/mach-omap1/board-generic.c +++ b/arch/arm/mach-omap1/board-generic.c @@ -28,12 +28,6 @@ #include #include -static void __init omap_generic_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - /* assume no Mini-AB port */ #ifdef CONFIG_ARCH_OMAP15XX @@ -87,17 +81,13 @@ static void __init omap_generic_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init omap_generic_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") /* Maintainer: Tony Lindgren */ .boot_params = 0x10000100, - .map_io = omap_generic_map_io, + .map_io = omap16xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_generic_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_generic_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index cb7fb1a..248a5b8 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -373,12 +373,6 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { }, }; -static void __init h2_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static struct omap_usb_config h2_usb_config __initdata = { /* usb1 has a Mini-AB port and external isp1301 transceiver */ .otg = 2, @@ -454,17 +448,13 @@ static void __init h2_init(void) h2_mmc_init(); } -static void __init h2_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_H2, "TI-H2") /* Maintainer: Imre Deak */ .boot_params = 0x10000100, - .map_io = h2_map_io, + .map_io = omap16xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = h2_init_irq, + .init_irq = omap1_init_irq, .init_machine = h2_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 31f3487..f28f05f 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c @@ -436,23 +436,13 @@ static void __init h3_init(void) h3_mmc_init(); } -static void __init h3_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - -static void __init h3_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") /* Maintainer: Texas Instruments, Inc. */ .boot_params = 0x10000100, - .map_io = h3_map_io, + .map_io = omap16xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = h3_init_irq, + .init_irq = omap1_init_irq, .init_machine = h3_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 36e06ea..67798df 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -500,7 +500,7 @@ static void __init htcherald_lcd_init(void) static void __init htcherald_map_io(void) { - omap1_map_common_io(); + omap7xx_map_io(); /* * The LCD panel must be disabled and DMA turned off here, as doing @@ -601,20 +601,14 @@ static void __init htcherald_init(void) #endif } -static void __init htcherald_init_irq(void) -{ - printk(KERN_INFO "htcherald_init_irq.\n"); - omap1_init_common_hw(); - omap1_init_irq(); -} - MACHINE_START(HERALD, "HTC Herald") /* Maintainer: Cory Maccarrone */ /* Maintainer: wing-linux.sourceforge.net */ .boot_params = 0x10000100, .map_io = htcherald_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = htcherald_init_irq, + .init_irq = omap1_init_irq, .init_machine = htcherald_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 0b1ba46..3e349d0 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -289,12 +289,6 @@ static void __init innovator_init_smc91x(void) } } -static void __init innovator_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - #ifdef CONFIG_ARCH_OMAP15XX static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ @@ -439,30 +433,32 @@ static void __init innovator_init(void) innovator_mmc_init(); } +/* + * REVISIT: Assume 15xx for now, we don't want to do revision check + * until later on. The right way to fix this is to set up a different + * machine_id for 16xx Innovator, or use device tree. + */ static void __init innovator_map_io(void) { - omap1_map_common_io(); + omap15xx_map_io(); -#ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap1510()) { - iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); - udelay(10); /* Delay needed for FPGA */ - - /* Dump the Innovator FPGA rev early - useful info for support. */ - printk("Innovator FPGA Rev %d.%d Board Rev %d\n", - fpga_read(OMAP1510_FPGA_REV_HIGH), - fpga_read(OMAP1510_FPGA_REV_LOW), - fpga_read(OMAP1510_FPGA_BOARD_REV)); - } -#endif + iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc)); + udelay(10); /* Delay needed for FPGA */ + + /* Dump the Innovator FPGA rev early - useful info for support. */ + pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n", + fpga_read(OMAP1510_FPGA_REV_HIGH), + fpga_read(OMAP1510_FPGA_REV_LOW), + fpga_read(OMAP1510_FPGA_BOARD_REV)); } MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") /* Maintainer: MontaVista Software, Inc. */ .boot_params = 0x10000100, .map_io = innovator_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = innovator_init_irq, + .init_irq = omap1_init_irq, .init_machine = innovator_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 5469ce2..9b348b6 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c @@ -39,21 +39,6 @@ #define ADS7846_PENDOWN_GPIO 15 -static void __init omap_nokia770_init_irq(void) -{ - /* On Nokia 770, the SleepX signal is masked with an - * MPUIO line by default. It has to be unmasked for it - * to become functional */ - - /* SleepX mask direction */ - omap_writew((omap_readw(0xfffb5008) & ~2), 0xfffb5008); - /* Unmask SleepX signal */ - omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); - - omap1_init_common_hw(); - omap1_init_irq(); -} - static const unsigned int nokia770_keymap[] = { KEY(1, 0, GROUP_0 | KEY_UP), KEY(2, 0, GROUP_1 | KEY_F5), @@ -246,6 +231,15 @@ static inline void nokia770_mmc_init(void) static void __init omap_nokia770_init(void) { + /* On Nokia 770, the SleepX signal is masked with an + * MPUIO line by default. It has to be unmasked for it + * to become functional */ + + /* SleepX mask direction */ + omap_writew((omap_readw(0xfffb5008) & ~2), 0xfffb5008); + /* Unmask SleepX signal */ + omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); + platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices)); spi_register_board_info(nokia770_spi_board_info, ARRAY_SIZE(nokia770_spi_board_info)); @@ -258,16 +252,12 @@ static void __init omap_nokia770_init(void) nokia770_mmc_init(); } -static void __init omap_nokia770_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(NOKIA770, "Nokia 770") .boot_params = 0x10000100, - .map_io = omap_nokia770_map_io, + .map_io = omap16xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_nokia770_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_nokia770_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index b08a213..562986e 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -279,12 +279,6 @@ static void __init osk_init_cf(void) irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } -static void __init osk_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static struct omap_usb_config osk_usb_config __initdata = { /* has usb host connector (A) ... for development it can also * be used, with a NONSTANDARD gender-bending cable/dongle, as @@ -576,17 +570,13 @@ static void __init osk_init(void) osk_mistral_init(); } -static void __init osk_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_OSK, "TI-OSK") /* Maintainer: Dirk Behme */ .boot_params = 0x10000100, - .map_io = osk_map_io, + .map_io = omap16xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = osk_init_irq, + .init_irq = omap1_init_irq, .init_machine = osk_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 459cb6b..fc9edd8 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c @@ -59,12 +59,6 @@ #define PALMTE_MMC2_GPIO OMAP_MPUIO(7) #define PALMTE_MMC3_GPIO OMAP_MPUIO(11) -static void __init omap_palmte_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static const unsigned int palmte_keymap[] = { KEY(0, 0, KEY_F1), /* Calendar */ KEY(1, 0, KEY_F2), /* Contacts */ @@ -269,16 +263,12 @@ static void __init omap_palmte_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init omap_palmte_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") .boot_params = 0x10000100, - .map_io = omap_palmte_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_palmte_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_palmte_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index b214f45..5ff3def 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c @@ -263,12 +263,6 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = { } }; -static void __init omap_palmtt_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static struct omap_usb_config palmtt_usb_config __initdata = { .register_dev = 1, .hmc_mode = 0, @@ -315,16 +309,12 @@ static void __init omap_palmtt_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init omap_palmtt_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") .boot_params = 0x10000100, - .map_io = omap_palmtt_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_palmtt_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_palmtt_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index 9b0ea48..8e08873 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -57,13 +57,6 @@ #define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3) #define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4) -static void __init -omap_palmz71_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - static const unsigned int palmz71_keymap[] = { KEY(0, 0, KEY_F1), KEY(1, 0, KEY_F2), @@ -334,17 +327,12 @@ omap_palmz71_init(void) palmz71_gpio_setup(0); } -static void __init -omap_palmz71_map_io(void) -{ - omap1_map_common_io(); -} - MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") .boot_params = 0x10000100, - .map_io = omap_palmz71_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_palmz71_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_palmz71_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index 67acd41..6ed649b 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c @@ -265,6 +265,39 @@ static void __init perseus2_init_smc91x(void) static void __init omap_perseus2_init(void) { + /* Early, board-dependent init */ + + /* + * Hold GSM Reset until needed + */ + omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); + + /* + * UARTs -> done automagically by 8250 driver + */ + + /* + * CSx timings, GPIO Mux ... setup + */ + + /* Flash: CS0 timings setup */ + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); + omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); + + /* + * Ethernet support through the debug board + * CS1 timings setup + */ + omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); + omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); + + /* + * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, + * It is used as the Ethernet controller interrupt + */ + omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, + OMAP7XX_IO_CONF_9); + perseus2_init_smc91x(); if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0) @@ -294,11 +327,6 @@ static void __init omap_perseus2_init(void) omap_register_i2c_bus(1, 100, NULL, 0); } -static void __init omap_perseus2_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} /* Only FPGA needs to be mapped here. All others are done with ioremap */ static struct map_desc omap_perseus2_io_desc[] __initdata = { { @@ -311,49 +339,18 @@ static struct map_desc omap_perseus2_io_desc[] __initdata = { static void __init omap_perseus2_map_io(void) { - omap1_map_common_io(); + omap7xx_map_io(); iotable_init(omap_perseus2_io_desc, ARRAY_SIZE(omap_perseus2_io_desc)); - - /* Early, board-dependent init */ - - /* - * Hold GSM Reset until needed - */ - omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL); - - /* - * UARTs -> done automagically by 8250 driver - */ - - /* - * CSx timings, GPIO Mux ... setup - */ - - /* Flash: CS0 timings setup */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0); - omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0); - - /* - * Ethernet support through the debug board - * CS1 timings setup - */ - omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1); - omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1); - - /* - * Configure MPU_EXT_NIRQ IO in IO_CONF9 register, - * It is used as the Ethernet controller interrupt - */ - omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9); } MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") /* Maintainer: Kevin Hilman */ .boot_params = 0x10000100, .map_io = omap_perseus2_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_perseus2_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_perseus2_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 9c3b7c5..23326e0 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c @@ -407,24 +407,13 @@ static void __init omap_sx1_init(void) gpio_direction_output(11, 0); /*A_SWITCH = 0 */ gpio_direction_output(15, 0); /*A_USB_ON = 0 */ } -/*----------------------------------------*/ -static void __init omap_sx1_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} -/*----------------------------------------*/ - -static void __init omap_sx1_map_io(void) -{ - omap1_map_common_io(); -} MACHINE_START(SX1, "OMAP310 based Siemens SX1") .boot_params = 0x10000100, - .map_io = omap_sx1_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = omap_sx1_init_irq, + .init_irq = omap1_init_irq, .init_machine = omap_sx1_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 036edc0e..1444ce8 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -159,17 +159,6 @@ static struct omap_usb_config voiceblue_usb_config __initdata = { static struct omap_board_config_kernel voiceblue_config[] = { }; -static void __init voiceblue_init_irq(void) -{ - omap1_init_common_hw(); - omap1_init_irq(); -} - -static void __init voiceblue_map_io(void) -{ - omap1_map_common_io(); -} - #define MACHINE_PANICED 1 #define MACHINE_REBOOTING 2 #define MACHINE_REBOOT 4 @@ -302,9 +291,10 @@ static void __init voiceblue_init(void) MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") /* Maintainer: Ladislav Michl */ .boot_params = 0x10000100, - .map_io = voiceblue_map_io, + .map_io = omap15xx_map_io, + .init_early = omap1_init_early, .reserve = omap_reserve, - .init_irq = voiceblue_init_irq, + .init_irq = omap1_init_irq, .init_machine = voiceblue_init, .timer = &omap1_timer, MACHINE_END diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 870886a..a16aab7 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -85,50 +85,44 @@ static struct map_desc omap16xx_io_desc[] __initdata = { #endif /* - * Maps common IO regions for omap1. This should only get called from - * board specific init. + * Maps common IO regions for omap1 */ -void __init omap1_map_common_io(void) +static void __init omap1_map_common_io(void) { iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); - - /* Normally devicemaps_init() would flush caches and tlb after - * mdesc->map_io(), but we must also do it here because of the CPU - * revision check below. - */ - local_flush_tlb_all(); - flush_cache_all(); - - /* We want to check CPU revision early for cpu_is_omapxxxx() macros. - * IO space mapping must be initialized before we can do that. - */ - omap_check_revision(); +} #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) - if (cpu_is_omap7xx()) { - iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); - } +void __init omap7xx_map_io(void) +{ + omap1_map_common_io(); + iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); +} #endif + #ifdef CONFIG_ARCH_OMAP15XX - if (cpu_is_omap15xx()) { - iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); - } -#endif -#if defined(CONFIG_ARCH_OMAP16XX) - if (cpu_is_omap16xx()) { - iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); - } +void __init omap15xx_map_io(void) +{ + omap1_map_common_io(); + iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); +} #endif - omap_sram_init(); +#if defined(CONFIG_ARCH_OMAP16XX) +void __init omap16xx_map_io(void) +{ + omap1_map_common_io(); + iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); } +#endif /* - * Common low-level hardware init for omap1. This should only get called from - * board specific init. + * Common low-level hardware init for omap1. */ -void __init omap1_init_common_hw(void) +void omap1_init_early(void) { + omap_check_revision(); + /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort * on a Posted Write in the TIPB Bridge". */ @@ -138,8 +132,8 @@ void __init omap1_init_common_hw(void) /* Must init clocks early to assure that timer interrupt works */ omap1_clk_init(); - omap1_mux_init(); + omap_sram_init(); } /* diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 6591875..c0c7850 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -256,8 +256,31 @@ extern void omap_writel(u32 v, u32 pa); struct omap_sdrc_params; -extern void omap1_map_common_io(void); -extern void omap1_init_common_hw(void); +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +void omap7xx_map_io(void); +#else +static inline void omap_map_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP15XX +void omap15xx_map_io(void); +#else +static inline void omap15xx_map_io(void) +{ +} +#endif + +#ifdef CONFIG_ARCH_OMAP16XX +void omap16xx_map_io(void); +#else +static inline void omap16xx_map_io(void) +{ +} +#endif + +void omap1_init_early(void); #ifdef CONFIG_SOC_OMAP2420 extern void omap242x_map_common_io(void); -- cgit v0.10.2 From 7b250aff1ce346b6c7bc0329a2350334d1c66525 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Oct 2011 18:26:28 -0700 Subject: ARM: OMAP: Avoid cpu_is_omapxxxx usage until map_io is done This way we don't need to initialize SoC detection early and can start using generic map_io. Reviewed-by: Santosh Shilimkar Tested-by: Santosh Shilimkar Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 4a5d75f..4c25742 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -444,11 +444,6 @@ static struct platform_device keys_gpio = { }, }; -static void __init omap3_beagle_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct platform_device *omap3_beagle_devices[] __initdata = { &leds_gpio, &keys_gpio, @@ -555,7 +550,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .boot_params = 0x80000100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap3_beagle_init_early, + .init_early = omap3_init_early, .init_irq = omap3_init_irq, .init_machine = omap3_beagle_init, .timer = &omap3_secure_timer, diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 15f91c4..e8123d0 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -248,9 +248,6 @@ static void __init _omap2_map_common_io(void) */ local_flush_tlb_all(); flush_cache_all(); - - omap2_check_revision(); - omap_sram_init(); } #ifdef CONFIG_SOC_OMAP2420 @@ -337,33 +334,15 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) /* See irq.c, omap4-common.c and entry-macro.S */ void __iomem *omap_irq_base; -void __init omap2_init_common_infrastructure(void) +static void __init omap_common_init_early(void) { - u8 postsetup_state; + omap2_check_revision(); + omap_sram_init(); +} - if (cpu_is_omap242x()) { - omap2xxx_voltagedomains_init(); - omap242x_powerdomains_init(); - omap242x_clockdomains_init(); - omap2420_hwmod_init(); - } else if (cpu_is_omap243x()) { - omap2xxx_voltagedomains_init(); - omap243x_powerdomains_init(); - omap243x_clockdomains_init(); - omap2430_hwmod_init(); - } else if (cpu_is_omap34xx()) { - omap3xxx_voltagedomains_init(); - omap3xxx_powerdomains_init(); - omap3xxx_clockdomains_init(); - omap3xxx_hwmod_init(); - } else if (cpu_is_omap44xx()) { - omap44xx_voltagedomains_init(); - omap44xx_powerdomains_init(); - omap44xx_clockdomains_init(); - omap44xx_hwmod_init(); - } else { - pr_err("Could not init hwmod data - unknown SoC\n"); - } +static void __init omap_hwmod_init_postsetup(void) +{ + u8 postsetup_state; /* Set the default postsetup state for all hwmods */ #ifdef CONFIG_PM_RUNTIME @@ -392,57 +371,79 @@ void __init omap2_init_common_infrastructure(void) &postsetup_state); omap_pm_if_early_init(); - - if (cpu_is_omap2420()) - omap2420_clk_init(); - else if (cpu_is_omap2430()) - omap2430_clk_init(); - else if (cpu_is_omap34xx()) - omap3xxx_clk_init(); - else if (cpu_is_omap44xx()) - omap4xxx_clk_init(); - else - pr_err("Could not init clock framework - unknown SoC\n"); } void __init omap2420_init_early(void) { - omap2_init_common_infrastructure(); + omap_common_init_early(); + omap2xxx_voltagedomains_init(); + omap242x_powerdomains_init(); + omap242x_clockdomains_init(); + omap2420_hwmod_init(); + omap_hwmod_init_postsetup(); + omap2420_clk_init(); } void __init omap2430_init_early(void) { - omap2_init_common_infrastructure(); + omap_common_init_early(); + omap2xxx_voltagedomains_init(); + omap243x_powerdomains_init(); + omap243x_clockdomains_init(); + omap2430_hwmod_init(); + omap_hwmod_init_postsetup(); + omap2430_clk_init(); +} + +/* + * Currently only board-omap3beagle.c should call this because of the + * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. + */ +void __init omap3_init_early(void) +{ + omap_common_init_early(); + omap3xxx_voltagedomains_init(); + omap3xxx_powerdomains_init(); + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap3xxx_clk_init(); } void __init omap3430_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init omap35xx_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init omap3630_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init am35xx_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init ti816x_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init omap4430_init_early(void) { - omap2_init_common_infrastructure(); + omap_common_init_early(); + omap44xx_voltagedomains_init(); + omap44xx_powerdomains_init(); + omap44xx_clockdomains_init(); + omap44xx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap4xxx_clk_init(); } void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index abda2c7..5eac355 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -50,6 +50,7 @@ void omap2430_init_early(void); void omap3430_init_early(void); void omap35xx_init_early(void); void omap3630_init_early(void); +void omap3_init_early(void); /* Do not use this one */ void am35xx_init_early(void); void ti816x_init_early(void); void omap4430_init_early(void); -- cgit v0.10.2 From fee926bb0d399b1eaaf38f9f694bbf2747c4b8a2 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Oct 2011 16:21:42 -0700 Subject: ARM: OMAP: Remove calls to SRAM allocations for framebuffer This assumes fixed mappings which will not work once we move to use ioremap_exec(). It seems that these are currently not in use, or in use for some out of tree corner cases. If SRAM support for framebuffer is wanted, it should be done with ioremap in the driver. Note that further removal of the code can now be done, but that can be done seprately by the driver maintainers. Acked-by: Tomi Valkeinen Signed-off-by: Tony Lindgren diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 363c91e..3c8aa44 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include @@ -29,10 +28,8 @@ #include #include #include -#include #include "sram.h" -#include "fb.h" /* XXX These "sideways" includes are a sign that something is wrong */ #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) @@ -112,8 +109,6 @@ static int is_sram_locked(void) */ static void __init omap_detect_sram(void) { - unsigned long reserved; - if (cpu_class_is_omap2()) { if (is_sram_locked()) { if (cpu_is_omap34xx()) { @@ -170,17 +165,6 @@ static void __init omap_detect_sram(void) omap_sram_size = 0x4000; } } - reserved = omapfb_reserve_sram(omap_sram_start, omap_sram_base, - omap_sram_size, - omap_sram_start + SRAM_BOOTLOADER_SZ, - omap_sram_size - SRAM_BOOTLOADER_SZ); - omap_sram_size -= reserved; - - reserved = omap_vram_reserve_sram(omap_sram_start, omap_sram_base, - omap_sram_size, - omap_sram_start + SRAM_BOOTLOADER_SZ, - omap_sram_size - SRAM_BOOTLOADER_SZ); - omap_sram_size -= reserved; omap_sram_ceil = omap_sram_base + omap_sram_size; } -- cgit v0.10.2 From a66cb3454f220f49f900646ebdc76cb943319eb7 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Oct 2011 13:52:57 -0700 Subject: ARM: OMAP: Map SRAM later on with ioremap_exec() This allows us to remove omap hacks for map_io. Acked-by: Nicolas Pitre Reviewed-by: Santosh Shilimkar Tested-by: Santosh Shilimkar Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 36f26c3..38e1142 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -291,6 +292,8 @@ static int __init omap1_init_devices(void) if (!cpu_class_is_omap1()) return -ENODEV; + omap_sram_init(); + /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index a16aab7..8140a4e 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -21,7 +21,6 @@ #include "clock.h" extern void omap_check_revision(void); -extern void omap_sram_init(void); /* * The machine specific code may provide the extra mapping besides the @@ -133,7 +132,6 @@ void omap1_init_early(void) */ omap1_clk_init(); omap1_mux_init(); - omap_sram_init(); } /* diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index e8123d0..b42bbb8 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -35,8 +35,8 @@ #include "clock2xxx.h" #include "clock3xxx.h" #include "clock44xx.h" -#include "io.h" +#include #include #include "voltage.h" #include "powerdomain.h" @@ -240,22 +240,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = { }; #endif -static void __init _omap2_map_common_io(void) -{ - /* Normally devicemaps_init() would flush caches and tlb after - * mdesc->map_io(), but we must also do it here because of the CPU - * revision check below. - */ - local_flush_tlb_all(); - flush_cache_all(); -} - #ifdef CONFIG_SOC_OMAP2420 void __init omap242x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); - _omap2_map_common_io(); } #endif @@ -264,7 +253,6 @@ void __init omap243x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); - _omap2_map_common_io(); } #endif @@ -272,7 +260,6 @@ void __init omap243x_map_common_io(void) void __init omap34xx_map_common_io(void) { iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); - _omap2_map_common_io(); } #endif @@ -280,7 +267,6 @@ void __init omap34xx_map_common_io(void) void __init omapti816x_map_common_io(void) { iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); - _omap2_map_common_io(); } #endif @@ -288,7 +274,6 @@ void __init omapti816x_map_common_io(void) void __init omap44xx_map_common_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); - _omap2_map_common_io(); } #endif @@ -337,7 +322,6 @@ void __iomem *omap_irq_base; static void __init omap_common_init_early(void) { omap2_check_revision(); - omap_sram_init(); } static void __init omap_hwmod_init_postsetup(void) @@ -449,11 +433,12 @@ void __init omap4430_init_early(void) void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { + omap_sram_init(); + if (cpu_is_omap24xx() || omap3_has_sdrc()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); } - } /* diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h index fd230c6..e69de29 100644 --- a/arch/arm/mach-omap2/io.h +++ b/arch/arm/mach-omap2/io.h @@ -1,7 +0,0 @@ - -#ifndef __MACH_OMAP2_IO_H__ -#define __MACH_OMAP2_IO_H__ - -extern int __init omap_sram_init(void); - -#endif /* __MACH_OMAP2_IO_H__ */ diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 5eac355..ed85720 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -55,6 +55,8 @@ void am35xx_init_early(void); void ti816x_init_early(void); void omap4430_init_early(void); +void omap_sram_init(void); + /* * IO bases for various OMAP processors * Except the tap base, rest all the io bases diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 3c8aa44..8b28664 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -38,16 +38,9 @@ #endif #define OMAP1_SRAM_PA 0x20000000 -#define OMAP1_SRAM_VA VMALLOC_END #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) -#define OMAP2_SRAM_VA 0xfe400000 -#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800) -#define OMAP3_SRAM_VA 0xfe400000 #define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) -#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) -#define OMAP4_SRAM_VA 0xfe400000 #define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) -#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000) #if defined(CONFIG_ARCH_OMAP2PLUS) #define SRAM_BOOTLOADER_SZ 0x00 @@ -70,9 +63,9 @@ #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) static unsigned long omap_sram_start; -static unsigned long omap_sram_base; +static void __iomem *omap_sram_base; static unsigned long omap_sram_size; -static unsigned long omap_sram_ceil; +static void __iomem *omap_sram_ceil; /* * Depending on the target RAMFS firewall setup, the public usable amount of @@ -112,7 +105,6 @@ static void __init omap_detect_sram(void) if (cpu_class_is_omap2()) { if (is_sram_locked()) { if (cpu_is_omap34xx()) { - omap_sram_base = OMAP3_SRAM_PUB_VA; omap_sram_start = OMAP3_SRAM_PUB_PA; if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { @@ -121,25 +113,20 @@ static void __init omap_detect_sram(void) omap_sram_size = 0x8000; /* 32K */ } } else if (cpu_is_omap44xx()) { - omap_sram_base = OMAP4_SRAM_PUB_VA; omap_sram_start = OMAP4_SRAM_PUB_PA; omap_sram_size = 0xa000; /* 40K */ } else { - omap_sram_base = OMAP2_SRAM_PUB_VA; omap_sram_start = OMAP2_SRAM_PUB_PA; omap_sram_size = 0x800; /* 2K */ } } else { if (cpu_is_omap34xx()) { - omap_sram_base = OMAP3_SRAM_VA; omap_sram_start = OMAP3_SRAM_PA; omap_sram_size = 0x10000; /* 64K */ } else if (cpu_is_omap44xx()) { - omap_sram_base = OMAP4_SRAM_VA; omap_sram_start = OMAP4_SRAM_PA; omap_sram_size = 0xe000; /* 56K */ } else { - omap_sram_base = OMAP2_SRAM_VA; omap_sram_start = OMAP2_SRAM_PA; if (cpu_is_omap242x()) omap_sram_size = 0xa0000; /* 640K */ @@ -148,7 +135,6 @@ static void __init omap_detect_sram(void) } } } else { - omap_sram_base = OMAP1_SRAM_VA; omap_sram_start = OMAP1_SRAM_PA; if (cpu_is_omap7xx()) @@ -165,24 +151,14 @@ static void __init omap_detect_sram(void) omap_sram_size = 0x4000; } } - - omap_sram_ceil = omap_sram_base + omap_sram_size; } -static struct map_desc omap_sram_io_desc[] __initdata = { - { /* .length gets filled in at runtime */ - .virtual = OMAP1_SRAM_VA, - .pfn = __phys_to_pfn(OMAP1_SRAM_PA), - .type = MT_MEMORY - } -}; - /* * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early. */ static void __init omap_map_sram(void) { - unsigned long base; + int cached = 1; if (omap_sram_size == 0) return; @@ -195,28 +171,18 @@ static void __init omap_map_sram(void) * the ARM may attempt to write cache lines back to SDRAM * which will cause the system to hang. */ - omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED; + cached = 0; } - omap_sram_io_desc[0].virtual = omap_sram_base; - base = omap_sram_start; - base = ROUND_DOWN(base, PAGE_SIZE); - omap_sram_io_desc[0].pfn = __phys_to_pfn(base); - omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size, PAGE_SIZE); - iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); - - pr_info("SRAM: Mapped pa 0x%08llx to va 0x%08lx size: 0x%lx\n", - (long long) __pfn_to_phys(omap_sram_io_desc[0].pfn), - omap_sram_io_desc[0].virtual, - omap_sram_io_desc[0].length); + omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); + omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size, + cached); + if (!omap_sram_base) { + pr_err("SRAM: Could not map\n"); + return; + } - /* - * Normally devicemaps_init() would flush caches and tlb after - * mdesc->map_io(), but since we're called from map_io(), we - * must do it here. - */ - local_flush_tlb_all(); - flush_cache_all(); + omap_sram_ceil = omap_sram_base + omap_sram_size; /* * Looks like we need to preserve some bootloader code at the @@ -235,13 +201,18 @@ static void __init omap_map_sram(void) */ void *omap_sram_push_address(unsigned long size) { - if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) { + unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; + + available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ); + + if (size > available) { pr_err("Not enough space in SRAM\n"); return NULL; } - omap_sram_ceil -= size; - omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, FNCPY_ALIGN); + new_ceil -= size; + new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN); + omap_sram_ceil = IOMEM(new_ceil); return (void *)omap_sram_ceil; } -- cgit v0.10.2 From 4c3cf90117f1f4906d5975aeccc5ffd414807fd2 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Oct 2011 18:17:41 -0700 Subject: ARM: OMAP: Move set_globals initialization to happen in init_early Otherwise we can't do generic map_io as we currently rely on static mappings that work only because of arch_ioremap. Acked-by: Nicolas Pitre Reviewed-by: Santosh Shilimkar Tested-by: Santosh Shilimkar Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 981ca00..b0a16d2 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -37,7 +37,6 @@ static void __init ti8168_evm_init(void) static void __init ti8168_evm_map_io(void) { - omap2_set_globals_ti816x(); omapti816x_map_common_io(); } diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index de61f15..110e5b9 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -45,11 +45,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals) static struct omap_globals omap242x_globals = { .class = OMAP242X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x48014000), - .sdrc = OMAP2420_SDRC_BASE, - .sms = OMAP2420_SMS_BASE, - .ctrl = OMAP242X_CTRL_BASE, - .prm = OMAP2420_PRM_BASE, - .cm = OMAP2420_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), }; void __init omap2_set_globals_242x(void) @@ -59,7 +59,6 @@ void __init omap2_set_globals_242x(void) void __init omap242x_map_io(void) { - omap2_set_globals_242x(); omap242x_map_common_io(); } #endif @@ -69,11 +68,11 @@ void __init omap242x_map_io(void) static struct omap_globals omap243x_globals = { .class = OMAP243X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), - .sdrc = OMAP243X_SDRC_BASE, - .sms = OMAP243X_SMS_BASE, - .ctrl = OMAP243X_CTRL_BASE, - .prm = OMAP2430_PRM_BASE, - .cm = OMAP2430_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), }; void __init omap2_set_globals_243x(void) @@ -83,7 +82,6 @@ void __init omap2_set_globals_243x(void) void __init omap243x_map_io(void) { - omap2_set_globals_243x(); omap243x_map_common_io(); } #endif @@ -93,11 +91,11 @@ void __init omap243x_map_io(void) static struct omap_globals omap3_globals = { .class = OMAP343X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), - .sdrc = OMAP343X_SDRC_BASE, - .sms = OMAP343X_SMS_BASE, - .ctrl = OMAP343X_CTRL_BASE, - .prm = OMAP3430_PRM_BASE, - .cm = OMAP3430_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), }; void __init omap2_set_globals_3xxx(void) @@ -107,7 +105,6 @@ void __init omap2_set_globals_3xxx(void) void __init omap3_map_io(void) { - omap2_set_globals_3xxx(); omap34xx_map_common_io(); } @@ -122,9 +119,9 @@ void __init omap3_map_io(void) static struct omap_globals ti816x_globals = { .class = OMAP343X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), - .ctrl = TI816X_CTRL_BASE, - .prm = TI816X_PRCM_BASE, - .cm = TI816X_PRCM_BASE, + .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), }; void __init omap2_set_globals_ti816x(void) @@ -137,11 +134,11 @@ void __init omap2_set_globals_ti816x(void) static struct omap_globals omap4_globals = { .class = OMAP443X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), - .ctrl = OMAP443X_SCM_BASE, - .ctrl_pad = OMAP443X_CTRL_BASE, - .prm = OMAP4430_PRM_BASE, - .cm = OMAP4430_CM_BASE, - .cm2 = OMAP4430_CM2_BASE, + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), + .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), + .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), }; void __init omap2_set_globals_443x(void) @@ -153,7 +150,6 @@ void __init omap2_set_globals_443x(void) void __init omap4_map_io(void) { - omap2_set_globals_443x(); omap44xx_map_common_io(); } #endif diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index aab884f..e34d27f 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -149,17 +149,11 @@ static struct omap3_control_regs control_context; void __init omap2_set_globals_control(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->ctrl) { - omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K); - WARN_ON(!omap2_ctrl_base); - } + if (omap2_globals->ctrl) + omap2_ctrl_base = omap2_globals->ctrl; - /* Static mapping, never released */ - if (omap2_globals->ctrl_pad) { - omap4_ctrl_pad_base = ioremap(omap2_globals->ctrl_pad, SZ_4K); - WARN_ON(!omap4_ctrl_pad_base); - } + if (omap2_globals->ctrl_pad) + omap4_ctrl_pad_base = omap2_globals->ctrl_pad; } void __iomem *omap_ctrl_base_get(void) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index b42bbb8..d5caac3 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -44,6 +44,7 @@ #include "clockdomain.h" #include #include +#include /* * The machine specific code may provide the extra mapping besides the @@ -359,6 +360,7 @@ static void __init omap_hwmod_init_postsetup(void) void __init omap2420_init_early(void) { + omap2_set_globals_242x(); omap_common_init_early(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); @@ -370,6 +372,7 @@ void __init omap2420_init_early(void) void __init omap2430_init_early(void) { + omap2_set_globals_243x(); omap_common_init_early(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); @@ -385,6 +388,7 @@ void __init omap2430_init_early(void) */ void __init omap3_init_early(void) { + omap2_set_globals_3xxx(); omap_common_init_early(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); @@ -416,11 +420,19 @@ void __init am35xx_init_early(void) void __init ti816x_init_early(void) { - omap3_init_early(); + omap2_set_globals_ti816x(); + omap_common_init_early(); + omap3xxx_voltagedomains_init(); + omap3xxx_powerdomains_init(); + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap3xxx_clk_init(); } void __init omap4430_init_early(void) { + omap2_set_globals_443x(); omap_common_init_early(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index ce65e93..11e25a4 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -102,8 +102,11 @@ void __init smp_init_cpus(void) { unsigned int i, ncores; - /* Never released */ - scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256); + /* + * Currently we can't call ioremap here because + * SoC detection won't work until after init_early. + */ + scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE); BUG_ON(!scu_base); ncores = scu_get_core_count(scu_base); diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 2e40a5c..8db5f03 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -151,17 +151,10 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->prm) { - prm_base = ioremap(omap2_globals->prm, SZ_8K); - WARN_ON(!prm_base); - } - if (omap2_globals->cm) { - cm_base = ioremap(omap2_globals->cm, SZ_8K); - WARN_ON(!cm_base); - } - if (omap2_globals->cm2) { - cm2_base = ioremap(omap2_globals->cm2, SZ_8K); - WARN_ON(!cm2_base); - } + if (omap2_globals->prm) + prm_base = omap2_globals->prm; + if (omap2_globals->cm) + cm_base = omap2_globals->cm; + if (omap2_globals->cm2) + cm2_base = omap2_globals->cm2; } diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index da6f3a6..8f27828 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -117,15 +117,10 @@ int omap2_sdrc_get_params(unsigned long r, void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->sdrc) { - omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K); - WARN_ON(!omap2_sdrc_base); - } - if (omap2_globals->sms) { - omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K); - WARN_ON(!omap2_sms_base); - } + if (omap2_globals->sdrc) + omap2_sdrc_base = omap2_globals->sdrc; + if (omap2_globals->sms) + omap2_sms_base = omap2_globals->sms; } /** diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index ed85720..c50df48 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -65,13 +65,13 @@ void omap_sram_init(void); struct omap_globals { u32 class; /* OMAP class to detect */ void __iomem *tap; /* Control module ID code */ - unsigned long sdrc; /* SDRAM Controller */ - unsigned long sms; /* SDRAM Memory Scheduler */ - unsigned long ctrl; /* System Control Module */ - unsigned long ctrl_pad; /* PAD Control Module */ - unsigned long prm; /* Power and Reset Management */ - unsigned long cm; /* Clock Management */ - unsigned long cm2; + void __iomem *sdrc; /* SDRAM Controller */ + void __iomem *sms; /* SDRAM Memory Scheduler */ + void __iomem *ctrl; /* System Control Module */ + void __iomem *ctrl_pad; /* PAD Control Module */ + void __iomem *prm; /* Power and Reset Management */ + void __iomem *cm; /* Clock Management */ + void __iomem *cm2; }; void omap2_set_globals_242x(void); -- cgit v0.10.2 From 8aca3ab5865f8cfbde841b6daf9442cc2279ced3 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 5 Oct 2011 17:22:39 -0700 Subject: ARM: OMAP: Warn if omap_ioremap is called before SoC detection We don't have cpu_is_omapxxxx SoC detection initialized until SoC detection is initialized from init_early. Note that with the common map_io we should no longer need cpu_is_omapxxxx for ioremap. Acked-by: Nicolas Pitre Signed-off-by: Tony Lindgren diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 8140a4e..fd9eb09 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -121,6 +121,7 @@ void __init omap16xx_map_io(void) void omap1_init_early(void) { omap_check_revision(); + omap_ioremap_init(); /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort * on a Posted Write in the TIPB Bridge". diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index d5caac3..aa96538 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -323,6 +323,7 @@ void __iomem *omap_irq_base; static void __init omap_common_init_early(void) { omap2_check_revision(); + omap_ioremap_init(); } static void __init omap_hwmod_init_postsetup(void) diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index c0c7850..5ffbea6 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h @@ -247,6 +247,8 @@ * NOTE: Please use ioremap + __raw_read/write where possible instead of these */ +void omap_ioremap_init(void); + extern u8 omap_readb(u32 pa); extern u16 omap_readw(u32 pa); extern u32 omap_readl(u32 pa); diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index f1ecfa9..1bbcbde 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c @@ -23,11 +23,16 @@ #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) +static int initialized; + /* * Intercept ioremap() requests for addresses in our fixed mapping regions. */ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) { + + WARN(!initialized, "Do not use ioremap before init_early\n"); + #ifdef CONFIG_ARCH_OMAP1 if (cpu_class_is_omap1()) { if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) @@ -139,3 +144,8 @@ void omap_iounmap(volatile void __iomem *addr) __iounmap(addr); } EXPORT_SYMBOL(omap_iounmap); + +void __init omap_ioremap_init(void) +{ + initialized++; +} -- cgit v0.10.2