From 641b4ef8f1fea88803cc1ff3f34d93ba6bcd8106 Mon Sep 17 00:00:00 2001 From: Joseph Lo Date: Mon, 8 Oct 2012 00:23:57 +0000 Subject: ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX" For the naming consistency under the mach-tegra, we re-name the file of "sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30). Signed-off-by: Joseph Lo Signed-off-by: Stephen Warren diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 6cc23cc..dcd4726 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -14,11 +14,10 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_clocks_data.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-t20.o +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks_data.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_speedo.o -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-t30.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_SMP) += reset.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/sleep-t20.S b/arch/arm/mach-tegra/sleep-t20.S deleted file mode 100644 index 72ce709..0000000 --- a/arch/arm/mach-tegra/sleep-t20.S +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. - * Copyright (c) 2011, Google, Inc. - * - * Author: Colin Cross - * Gary King - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include - -#include "sleep.h" -#include "flowctrl.h" - -#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP) -/* - * tegra20_hotplug_shutdown(void) - * - * puts the current cpu in reset - * should never return - */ -ENTRY(tegra20_hotplug_shutdown) - /* Turn off SMP coherency */ - exit_smp r4, r5 - - /* Put this CPU down */ - cpu_id r0 - bl tegra20_cpu_shutdown - mov pc, lr @ should never get here -ENDPROC(tegra20_hotplug_shutdown) - -/* - * tegra20_cpu_shutdown(int cpu) - * - * r0 is cpu to reset - * - * puts the specified CPU in wait-for-event mode on the flow controller - * and puts the CPU in reset - * can be called on the current cpu or another cpu - * if called on the current cpu, does not return - * MUST NOT BE CALLED FOR CPU 0. - * - * corrupts r0-r3, r12 - */ -ENTRY(tegra20_cpu_shutdown) - cmp r0, #0 - moveq pc, lr @ must not be called for CPU 0 - - cpu_to_halt_reg r1, r0 - ldr r3, =TEGRA_FLOW_CTRL_VIRT - mov r2, #FLOW_CTRL_WAITEVENT | FLOW_CTRL_JTAG_RESUME - str r2, [r3, r1] @ put flow controller in wait event mode - ldr r2, [r3, r1] - isb - dsb - movw r1, 0x1011 - mov r1, r1, lsl r0 - ldr r3, =TEGRA_CLK_RESET_VIRT - str r1, [r3, #0x340] @ put slave CPU in reset - isb - dsb - cpu_id r3 - cmp r3, r0 - beq . - mov pc, lr -ENDPROC(tegra20_cpu_shutdown) -#endif diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S deleted file mode 100644 index be7614b7..0000000 --- a/arch/arm/mach-tegra/sleep-t30.S +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include - -#include "sleep.h" -#include "flowctrl.h" - -#define TEGRA30_POWER_HOTPLUG_SHUTDOWN (1 << 27) /* Hotplug shutdown */ - -#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP) -/* - * tegra30_hotplug_shutdown(void) - * - * Powergates the current CPU. - * Should never return. - */ -ENTRY(tegra30_hotplug_shutdown) - /* Turn off SMP coherency */ - exit_smp r4, r5 - - /* Powergate this CPU */ - mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN - bl tegra30_cpu_shutdown - mov pc, lr @ should never get here -ENDPROC(tegra30_hotplug_shutdown) - -/* - * tegra30_cpu_shutdown(unsigned long flags) - * - * Puts the current CPU in wait-for-event mode on the flow controller - * and powergates it -- flags (in R0) indicate the request type. - * Must never be called for CPU 0. - * - * corrupts r0-r4, r12 - */ -ENTRY(tegra30_cpu_shutdown) - cpu_id r3 - cmp r3, #0 - moveq pc, lr @ Must never be called for CPU 0 - - ldr r12, =TEGRA_FLOW_CTRL_VIRT - cpu_to_csr_reg r1, r3 - add r1, r1, r12 @ virtual CSR address for this CPU - cpu_to_halt_reg r2, r3 - add r2, r2, r12 @ virtual HALT_EVENTS address for this CPU - - /* - * Clear this CPU's "event" and "interrupt" flags and power gate - * it when halting but not before it is in the "WFE" state. - */ - movw r12, \ - FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG | \ - FLOW_CTRL_CSR_ENABLE - mov r4, #(1 << 4) - orr r12, r12, r4, lsl r3 - str r12, [r1] - - /* Halt this CPU. */ - mov r3, #0x400 -delay_1: - subs r3, r3, #1 @ delay as a part of wfe war. - bge delay_1; - cpsid a @ disable imprecise aborts. - ldr r3, [r1] @ read CSR - str r3, [r1] @ clear CSR - tst r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN - movne r3, #FLOW_CTRL_WAITEVENT @ For hotplug - str r3, [r2] - ldr r0, [r2] - b wfe_war - -__cpu_reset_again: - dsb - .align 5 - wfe @ CPU should be power gated here -wfe_war: - b __cpu_reset_again - - /* - * 38 nop's, which fills reset of wfe cache line and - * 4 more cachelines with nop - */ - .rept 38 - nop - .endr - b . @ should never get here - -ENDPROC(tegra30_cpu_shutdown) -#endif diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S new file mode 100644 index 0000000..72ce709 --- /dev/null +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2011, Google, Inc. + * + * Author: Colin Cross + * Gary King + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include + +#include "sleep.h" +#include "flowctrl.h" + +#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP) +/* + * tegra20_hotplug_shutdown(void) + * + * puts the current cpu in reset + * should never return + */ +ENTRY(tegra20_hotplug_shutdown) + /* Turn off SMP coherency */ + exit_smp r4, r5 + + /* Put this CPU down */ + cpu_id r0 + bl tegra20_cpu_shutdown + mov pc, lr @ should never get here +ENDPROC(tegra20_hotplug_shutdown) + +/* + * tegra20_cpu_shutdown(int cpu) + * + * r0 is cpu to reset + * + * puts the specified CPU in wait-for-event mode on the flow controller + * and puts the CPU in reset + * can be called on the current cpu or another cpu + * if called on the current cpu, does not return + * MUST NOT BE CALLED FOR CPU 0. + * + * corrupts r0-r3, r12 + */ +ENTRY(tegra20_cpu_shutdown) + cmp r0, #0 + moveq pc, lr @ must not be called for CPU 0 + + cpu_to_halt_reg r1, r0 + ldr r3, =TEGRA_FLOW_CTRL_VIRT + mov r2, #FLOW_CTRL_WAITEVENT | FLOW_CTRL_JTAG_RESUME + str r2, [r3, r1] @ put flow controller in wait event mode + ldr r2, [r3, r1] + isb + dsb + movw r1, 0x1011 + mov r1, r1, lsl r0 + ldr r3, =TEGRA_CLK_RESET_VIRT + str r1, [r3, #0x340] @ put slave CPU in reset + isb + dsb + cpu_id r3 + cmp r3, r0 + beq . + mov pc, lr +ENDPROC(tegra20_cpu_shutdown) +#endif diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S new file mode 100644 index 0000000..be7614b7 --- /dev/null +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +#include + +#include "sleep.h" +#include "flowctrl.h" + +#define TEGRA30_POWER_HOTPLUG_SHUTDOWN (1 << 27) /* Hotplug shutdown */ + +#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP) +/* + * tegra30_hotplug_shutdown(void) + * + * Powergates the current CPU. + * Should never return. + */ +ENTRY(tegra30_hotplug_shutdown) + /* Turn off SMP coherency */ + exit_smp r4, r5 + + /* Powergate this CPU */ + mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN + bl tegra30_cpu_shutdown + mov pc, lr @ should never get here +ENDPROC(tegra30_hotplug_shutdown) + +/* + * tegra30_cpu_shutdown(unsigned long flags) + * + * Puts the current CPU in wait-for-event mode on the flow controller + * and powergates it -- flags (in R0) indicate the request type. + * Must never be called for CPU 0. + * + * corrupts r0-r4, r12 + */ +ENTRY(tegra30_cpu_shutdown) + cpu_id r3 + cmp r3, #0 + moveq pc, lr @ Must never be called for CPU 0 + + ldr r12, =TEGRA_FLOW_CTRL_VIRT + cpu_to_csr_reg r1, r3 + add r1, r1, r12 @ virtual CSR address for this CPU + cpu_to_halt_reg r2, r3 + add r2, r2, r12 @ virtual HALT_EVENTS address for this CPU + + /* + * Clear this CPU's "event" and "interrupt" flags and power gate + * it when halting but not before it is in the "WFE" state. + */ + movw r12, \ + FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG | \ + FLOW_CTRL_CSR_ENABLE + mov r4, #(1 << 4) + orr r12, r12, r4, lsl r3 + str r12, [r1] + + /* Halt this CPU. */ + mov r3, #0x400 +delay_1: + subs r3, r3, #1 @ delay as a part of wfe war. + bge delay_1; + cpsid a @ disable imprecise aborts. + ldr r3, [r1] @ read CSR + str r3, [r1] @ clear CSR + tst r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN + movne r3, #FLOW_CTRL_WAITEVENT @ For hotplug + str r3, [r2] + ldr r0, [r2] + b wfe_war + +__cpu_reset_again: + dsb + .align 5 + wfe @ CPU should be power gated here +wfe_war: + b __cpu_reset_again + + /* + * 38 nop's, which fills reset of wfe cache line and + * 4 more cachelines with nop + */ + .rept 38 + nop + .endr + b . @ should never get here + +ENDPROC(tegra30_cpu_shutdown) +#endif -- cgit v0.10.2