From 61ffca53ccabdb91a41574335792b7ab4de30b10 Mon Sep 17 00:00:00 2001 From: Marc Dietrich Date: Sat, 28 Jan 2012 20:03:04 +0100 Subject: ARM: tegra: paz00: fix wrong SD1 power gpio The power gpio for the external memory card was specified wrongly. Replace it with the correct value (tested with warmboot with fastboot). Signed-off-by: Marc Dietrich Signed-off-by: Olof Johansson diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index 1a1d702..a94e92c 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -60,7 +60,7 @@ sdhci@c8000000 { cd-gpios = <&gpio 173 0>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 169 0>; /* gpio PV1 */ }; sdhci@c8000200 { diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h index ffa83f5..3c9f8da 100644 --- a/arch/arm/mach-tegra/board-paz00.h +++ b/arch/arm/mach-tegra/board-paz00.h @@ -22,7 +22,7 @@ /* SDCARD */ #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 -#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 +#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PV1 /* ULPI */ #define TEGRA_ULPI_RST TEGRA_GPIO_PV0 -- cgit v0.10.2 From 55256f0e483f66b94cb5b358fc2a57bb75ae6f05 Mon Sep 17 00:00:00 2001 From: Marc Dietrich Date: Sat, 28 Jan 2012 20:03:05 +0100 Subject: ARM: tegra: paz00: fix wrong UART port on mini-pcie plug UARTC is connected to the mini-pcie port. Signed-off-by: Marc Dietrich Signed-off-by: Olof Johansson diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts index a94e92c..825d295 100644 --- a/arch/arm/boot/dts/tegra-paz00.dts +++ b/arch/arm/boot/dts/tegra-paz00.dts @@ -46,11 +46,11 @@ }; serial@70006200 { - status = "disable"; + clock-frequency = <216000000>; }; serial@70006300 { - clock-frequency = <216000000>; + status = "disable"; }; serial@70006400 { diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index fcf4f37..330afdf 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .uartclk = 216000000, }, { /* serial port on mini-pcie */ - .membase = IO_ADDRESS(TEGRA_UARTD_BASE), - .mapbase = TEGRA_UARTD_BASE, - .irq = INT_UARTD, + .membase = IO_ADDRESS(TEGRA_UARTC_BASE), + .mapbase = TEGRA_UARTC_BASE, + .irq = INT_UARTC, .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, .type = PORT_TEGRA, .iotype = UPIO_MEM, @@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 216000000, true }, - { "uartd", "pll_p", 216000000, true }, + { "uartc", "pll_p", 216000000, true }, { "pll_p_out4", "pll_p", 24000000, true }, { "usbd", "clk_m", 12000000, false }, -- cgit v0.10.2 From f35b431dde39fb40944d1024f08d88fbf04a3193 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 14 Feb 2012 13:39:39 -0700 Subject: ARM: tegra: select required CPU and L2 errata options The ARM IP revisions in Tegra are: Tegra20: CPU r1p1, PL310 r2p0 Tegra30: CPU A01=r2p7/>=A02=r2p9, NEON r2p3-50, PL310 r3p1-50 Based on work by Olof Johansson, although the actual list of errata is somewhat different here, since I added a bunch more and removed one PL310 erratum that doesn't seem applicable. Signed-off-by: Stephen Warren Cc: stable@vger.kernel.org Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d..46b6839 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -10,6 +10,13 @@ config ARCH_TEGRA_2x_SOC select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT + select ARM_ERRATA_720789 + select ARM_ERRATA_742230 + select ARM_ERRATA_751472 + select ARM_ERRATA_754327 + select ARM_ERRATA_764369 + select PL310_ERRATA_727915 if CACHE_L2X0 + select PL310_ERRATA_769419 if CACHE_L2X0 help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -23,6 +30,11 @@ config ARCH_TEGRA_3x_SOC select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT select USE_OF + select ARM_ERRATA_743622 + select ARM_ERRATA_751472 + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 + select PL310_ERRATA_769419 if CACHE_L2X0 help Support for NVIDIA Tegra T30 processor family, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller -- cgit v0.10.2 From 013df38857a6272c7e6bd99d3f298599a215e988 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Mar 2012 15:58:28 -0500 Subject: ARM: tegra: select CPU_FREQ_TABLE The tegra cpufreq implementation relies on the cpu_freq_table code, so make sure that this is always there when needed. Signed-off-by: Arnd Bergmann Signed-off-by: Alan Ott Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 46b6839..d2cb4b0 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -17,6 +17,7 @@ config ARCH_TEGRA_2x_SOC select ARM_ERRATA_764369 select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller @@ -35,6 +36,7 @@ config ARCH_TEGRA_3x_SOC select ARM_ERRATA_754322 select ARM_ERRATA_764369 select PL310_ERRATA_769419 if CACHE_L2X0 + select CPU_FREQ_TABLE if CPU_FREQ help Support for NVIDIA Tegra T30 processor family, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller -- cgit v0.10.2 From 249c5172e80acd211025da2e2cc1bd026b0ab8d4 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Mar 2012 15:58:32 -0500 Subject: ARM: tegra: build localtimer support only when needed It is possible to build a tegra kernel without localtimer support, so the tegra specific parts should only be built when that is indeed enabled. Signed-off-by: Arnd Bergmann Signed-off-by: Alan Ott Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index e120ff5..829066f 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o -obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o -- cgit v0.10.2 From 4265cbfd8dc1ae230d65f09cce9ce7f0c51a3c10 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Mar 2012 15:58:42 -0500 Subject: ARM: tegra: export usb phy symbols The ehci driver can be a module, so the functions provided by the tegra platform code used by ehci-tegra need to be exported. Signed-off-by: Arnd Bergmann Signed-off-by: Alan Ott Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 37576a7..6091cf3 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -730,6 +731,7 @@ err0: kfree(phy); return ERR_PTR(err); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_open); int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) { @@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) else return utmi_phy_power_on(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on); void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) { @@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) else utmi_phy_power_off(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off); void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_preresume(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume); void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_postresume(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume); void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, enum tegra_usb_phy_port_speed port_speed) @@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, if (!phy_is_ulpi(phy)) utmi_phy_restore_start(phy, port_speed); } +EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start); void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_restore_end(phy); } +EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end); void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_clk_disable(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable); void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) { if (!phy_is_ulpi(phy)) utmi_phy_clk_enable(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable); void tegra_usb_phy_close(struct tegra_usb_phy *phy) { @@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) clk_put(phy->pll_u); kfree(phy); } +EXPORT_SYMBOL_GPL(tegra_usb_phy_close); -- cgit v0.10.2 From f6a1ba67362fe78a1ec81c355ee638c70689b5d7 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Thu, 23 Feb 2012 18:20:56 +0200 Subject: ARM: tegra: Enable CPUIdle on Tegra20 As the LP3 code also works for Tegra20, we can enable cpuidle for Tegra20. Signed-off-by: Peter De Schrijver Acked-by: Stephen Warren Tested-by: Stephen Warren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 2db20da..fac449e 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -95,8 +95,6 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { - disable_hlt(); /* idle WFI usage needs to be confirmed */ - tegra_init_fuse(); tegra2_init_clocks(); tegra_clk_init_from_table(tegra20_clk_init_table); -- cgit v0.10.2 From 448b98047c61dd612fc3a41a2b9479da77ace27d Mon Sep 17 00:00:00 2001 From: Dmitry Artamonow Date: Tue, 6 Mar 2012 12:45:42 +0400 Subject: arm/tegra: fix harmony pinmux for PCIe Commit 6e96aca397 (arm/tegra: Harmony PCIe: Don't touch pinmux) removed runtime tri-state toggling for PCIe related pinmux groups, but it seems that the fact that all of them are tri-state by default has been overlooked. Change defaults for these groups to TEGRA_TRI_NORMAL. Signed-off-by: Dmitry Artamonow Acked-by: Stephen Warren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 465808c..1af85bccc 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c @@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, - {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, @@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, -- cgit v0.10.2 From 795d5fd4b8b06944976c95e8592e17e2d415aa81 Mon Sep 17 00:00:00 2001 From: Dmitry Artamonow Date: Tue, 6 Mar 2012 12:45:43 +0400 Subject: arm/tegra: add timeout to PCIe PLL lock detection loop Tegra PCIe driver waits for PLL to lock using busy loop. If PLL fails to lock for some reason, this leads to silent lockup while booting (as PCIe code is not modular). Fix by adding timeout, so if PLL doesn't lock in a couple of seconds, just PCIe driver fails and machine continues to boot. Signed-off-by: Dmitry Artamonow Acked-by: Stephen Warren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index af8b634..0a1dec6 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void) afi_writel(0, AFI_MSI_BAR_SZ); } -static void tegra_pcie_enable_controller(void) +static int tegra_pcie_enable_controller(void) { u32 val, reg; - int i; + int i, timeout; /* Enable slot clock and pulse the reset signals */ for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { @@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void) pads_writel(0xfa5cfa5c, 0xc8); /* Wait for the PLL to lock */ + timeout = 2000; do { val = pads_readl(PADS_PLL_CTL); + mdelay(1); + if (--timeout == 0) { + pr_err("Tegra PCIe error: timeout waiting for PLL\n"); + return -EBUSY; + } } while (!(val & PADS_PLL_CTL_LOCKDET)); /* turn off IDDQ override */ @@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1) if (err) return err; - tegra_pcie_enable_controller(); + err = tegra_pcie_enable_controller(); + if (err) + return err; /* setup the AFI address translations */ tegra_pcie_setup_translations(); -- cgit v0.10.2 From 2f926eecdfb6138fef91683667fc915af5071fff Mon Sep 17 00:00:00 2001 From: Dmitry Artamonow Date: Tue, 13 Mar 2012 09:46:27 +0400 Subject: arm/tegra: pcie: fix return value of function In previous patch (arm/tegra: add timeout to PCIe PLL lock detection loop) tegra_pcie_enable_controller() function type has been changed from void to int, but the last return statement wasn't converted, so function returns undefined value. Fix it. Also while at it, address couple of minor concerns raised by reviewers: use usleep_range for delay, and lower the value of timeout to 300ms to be consistent with Nvidia Vibrante kernel. Signed-off-by: Dmitry Artamonow Acked-by: Stephen Warren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 0a1dec6..9153699 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -639,10 +639,10 @@ static int tegra_pcie_enable_controller(void) pads_writel(0xfa5cfa5c, 0xc8); /* Wait for the PLL to lock */ - timeout = 2000; + timeout = 300; do { val = pads_readl(PADS_PLL_CTL); - mdelay(1); + usleep_range(1000, 1000); if (--timeout == 0) { pr_err("Tegra PCIe error: timeout waiting for PLL\n"); return -EBUSY; @@ -677,7 +677,7 @@ static int tegra_pcie_enable_controller(void) /* Disable all execptions */ afi_writel(0, AFI_FPCI_ERROR_MASKS); - return; + return 0; } static void tegra_pcie_xclk_clamp(bool clamp) -- cgit v0.10.2 From 279b658525abd06645938fb607860de42c4cf31e Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Mar 2012 17:26:00 -0500 Subject: ARM: tegra: select USB_ULPI if USB is selected Automatically select USB_ULPI if USB is enabled on Tegra. Signed-off-by: Arnd Bergmann Signed-off-by: Alan Ott Acked-by: Stephen Warren Signed-off-by: Olof Johansson diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index d2cb4b0..6ae7882 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -8,7 +8,7 @@ config ARCH_TEGRA_2x_SOC select ARM_GIC select ARCH_REQUIRE_GPIOLIB select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB_SUPPORT + select USB_ULPI if USB select USB_ULPI_VIEWPORT if USB_SUPPORT select ARM_ERRATA_720789 select ARM_ERRATA_742230 @@ -28,7 +28,7 @@ config ARCH_TEGRA_3x_SOC select ARM_GIC select ARCH_REQUIRE_GPIOLIB select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB_SUPPORT + select USB_ULPI if USB select USB_ULPI_VIEWPORT if USB_SUPPORT select USE_OF select ARM_ERRATA_743622 -- cgit v0.10.2