From 11e3bd09231bbc0188e0b7a2f3da3920fc74af83 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Tue, 25 Nov 2008 17:05:22 +0900 Subject: [ARM] S3C64XX: Mask the pll values correctly Correct the PLL field masks to ensure the PLL functions return the right value. Signed-off-by: Kyungmin Park [ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h index 1a85764..90bbd72 100644 --- a/arch/arm/plat-s3c64xx/include/plat/pll.h +++ b/arch/arm/plat-s3c64xx/include/plat/pll.h @@ -12,9 +12,9 @@ * published by the Free Software Foundation. */ -#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1) -#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1) -#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1) +#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) +#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) +#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) #define S3C6400_PLL_MDIV_SHIFT (16) #define S3C6400_PLL_PDIV_SHIFT (8) #define S3C6400_PLL_SDIV_SHIFT (0) -- cgit v0.10.2