From 247055aa21ffef1c49dd64710d5e94c2aee19b58 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 13 Sep 2010 16:03:21 +0100 Subject: ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUs This patch removes the domain switching functionality via the set_fs and __switch_to functions on cores that have a TLS register. Currently, the ioremap and vmalloc areas share the same level 1 page tables and therefore have the same domain (DOMAIN_KERNEL). When the kernel domain is modified from Client to Manager (via the __set_fs or in the __switch_to function), the XN (eXecute Never) bit is overridden and newer CPUs can speculatively prefetch the ioremap'ed memory. Linux performs the kernel domain switching to allow user-specific functions (copy_to/from_user, get/put_user etc.) to access kernel memory. In order for these functions to work with the kernel domain set to Client, the patch modifies the LDRT/STRT and related instructions to the LDR/STR ones. The user pages access rights are also modified for kernel read-only access rather than read/write so that the copy-on-write mechanism still works. CPU_USE_DOMAINS gets disabled only if the hardware has a TLS register (CPU_32v6K is defined) since writing the TLS value to the high vectors page isn't possible. The user addresses passed to the kernel are checked by the access_ok() function so that they do not point to the kernel space. Tested-by: Anton Vorontsov Cc: Tony Lindgren Signed-off-by: Catalin Marinas Signed-off-by: Russell King diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 062b58c..4e84d09 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -18,6 +18,7 @@ #endif #include +#include /* * Endian independent macros for shifting bytes within registers. @@ -206,12 +207,12 @@ */ #ifdef CONFIG_THUMB2_KERNEL - .macro usraccoff, instr, reg, ptr, inc, off, cond, abort + .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=T() 9999: .if \inc == 1 - \instr\cond\()bt \reg, [\ptr, #\off] + \instr\cond\()b\()\t\().w \reg, [\ptr, #\off] .elseif \inc == 4 - \instr\cond\()t \reg, [\ptr, #\off] + \instr\cond\()\t\().w \reg, [\ptr, #\off] .else .error "Unsupported inc macro argument" .endif @@ -246,13 +247,13 @@ #else /* !CONFIG_THUMB2_KERNEL */ - .macro usracc, instr, reg, ptr, inc, cond, rept, abort + .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=T() .rept \rept 9999: .if \inc == 1 - \instr\cond\()bt \reg, [\ptr], #\inc + \instr\cond\()b\()\t \reg, [\ptr], #\inc .elseif \inc == 4 - \instr\cond\()t \reg, [\ptr], #\inc + \instr\cond\()\t \reg, [\ptr], #\inc .else .error "Unsupported inc macro argument" .endif diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h index cc7ef40..af18cea 100644 --- a/arch/arm/include/asm/domain.h +++ b/arch/arm/include/asm/domain.h @@ -45,13 +45,17 @@ */ #define DOMAIN_NOACCESS 0 #define DOMAIN_CLIENT 1 +#ifdef CONFIG_CPU_USE_DOMAINS #define DOMAIN_MANAGER 3 +#else +#define DOMAIN_MANAGER 1 +#endif #define domain_val(dom,type) ((type) << (2*(dom))) #ifndef __ASSEMBLY__ -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_USE_DOMAINS #define set_domain(x) \ do { \ __asm__ __volatile__( \ @@ -74,5 +78,28 @@ #define modify_domain(dom,type) do { } while (0) #endif +/* + * Generate the T (user) versions of the LDR/STR and related + * instructions (inline assembly) + */ +#ifdef CONFIG_CPU_USE_DOMAINS +#define T(instr) #instr "t" +#else +#define T(instr) #instr #endif -#endif /* !__ASSEMBLY__ */ + +#else /* __ASSEMBLY__ */ + +/* + * Generate the T (user) versions of the LDR/STR and related + * instructions + */ +#ifdef CONFIG_CPU_USE_DOMAINS +#define T(instr) instr ## t +#else +#define T(instr) instr +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* !__ASM_PROC_DOMAIN_H */ diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h index 540a044..b33fe70 100644 --- a/arch/arm/include/asm/futex.h +++ b/arch/arm/include/asm/futex.h @@ -13,12 +13,13 @@ #include #include #include +#include #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ __asm__ __volatile__( \ - "1: ldrt %1, [%2]\n" \ + "1: " T(ldr) " %1, [%2]\n" \ " " insn "\n" \ - "2: strt %0, [%2]\n" \ + "2: " T(str) " %0, [%2]\n" \ " mov %0, #0\n" \ "3:\n" \ " .pushsection __ex_table,\"a\"\n" \ @@ -97,10 +98,10 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) pagefault_disable(); /* implies preempt_disable() */ __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" - "1: ldrt %0, [%3]\n" + "1: " T(ldr) " %0, [%3]\n" " teq %0, %1\n" " it eq @ explicit IT needed for the 2b label\n" - "2: streqt %2, [%3]\n" + "2: " T(streq) " %2, [%3]\n" "3:\n" " .pushsection __ex_table,\"a\"\n" " .align 3\n" diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h index 491960b..af5d5d1 100644 --- a/arch/arm/include/asm/traps.h +++ b/arch/arm/include/asm/traps.h @@ -27,4 +27,6 @@ static inline int in_exception_text(unsigned long ptr) extern void __init early_trap_init(void); extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame); +extern void *vectors_page; + #endif diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 33e4a48..b293616 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -227,7 +227,7 @@ do { \ #define __get_user_asm_byte(x,addr,err) \ __asm__ __volatile__( \ - "1: ldrbt %1,[%2]\n" \ + "1: " T(ldrb) " %1,[%2],#0\n" \ "2:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -263,7 +263,7 @@ do { \ #define __get_user_asm_word(x,addr,err) \ __asm__ __volatile__( \ - "1: ldrt %1,[%2]\n" \ + "1: " T(ldr) " %1,[%2],#0\n" \ "2:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -308,7 +308,7 @@ do { \ #define __put_user_asm_byte(x,__pu_addr,err) \ __asm__ __volatile__( \ - "1: strbt %1,[%2]\n" \ + "1: " T(strb) " %1,[%2],#0\n" \ "2:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -341,7 +341,7 @@ do { \ #define __put_user_asm_word(x,__pu_addr,err) \ __asm__ __volatile__( \ - "1: strt %1,[%2]\n" \ + "1: " T(str) " %1,[%2],#0\n" \ "2:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ @@ -366,10 +366,10 @@ do { \ #define __put_user_asm_dword(x,__pu_addr,err) \ __asm__ __volatile__( \ - ARM( "1: strt " __reg_oper1 ", [%1], #4\n" ) \ - ARM( "2: strt " __reg_oper0 ", [%1]\n" ) \ - THUMB( "1: strt " __reg_oper1 ", [%1]\n" ) \ - THUMB( "2: strt " __reg_oper0 ", [%1, #4]\n" ) \ + ARM( "1: " T(str) " " __reg_oper1 ", [%1], #4\n" ) \ + ARM( "2: " T(str) " " __reg_oper0 ", [%1]\n" ) \ + THUMB( "1: " T(str) " " __reg_oper1 ", [%1]\n" ) \ + THUMB( "2: " T(str) " " __reg_oper0 ", [%1, #4]\n" ) \ "3:\n" \ " .pushsection .fixup,\"ax\"\n" \ " .align 2\n" \ diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index c09e357..35f3f20 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -735,7 +735,7 @@ ENTRY(__switch_to) THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack THUMB( str sp, [ip], #4 ) THUMB( str lr, [ip], #4 ) -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_USE_DOMAINS ldr r6, [r2, #TI_CPU_DOMAIN] #endif set_tls r3, r4, r5 @@ -744,7 +744,7 @@ ENTRY(__switch_to) ldr r8, =__stack_chk_guard ldr r7, [r7, #TSK_STACK_CANARY] #endif -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_USE_DOMAINS mcr p15, 0, r6, c3, c0, 0 @ Set domain register #endif mov r5, r0 diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index 6ff7919..d601ef2 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -45,6 +45,7 @@ #include #include #include +#include static unsigned long no_fiq_insn; @@ -77,7 +78,11 @@ int show_fiq_list(struct seq_file *p, void *v) void set_fiq_handler(void *start, unsigned int length) { +#if defined(CONFIG_CPU_USE_DOMAINS) memcpy((void *)0xffff001c, start, length); +#else + memcpy(vectors_page + 0x1c, start, length); +#endif flush_icache_range(0xffff001c, 0xffff001c + length); if (!vectors_high()) flush_icache_range(0x1c, 0x1c + length); diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index cda78d5..87abca0 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -37,6 +37,8 @@ static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" }; +void *vectors_page; + #ifdef CONFIG_DEBUG_USER unsigned int user_debug; @@ -759,7 +761,11 @@ static void __init kuser_get_tls_init(unsigned long vectors) void __init early_trap_init(void) { +#if defined(CONFIG_CPU_USE_DOMAINS) unsigned long vectors = CONFIG_VECTORS_BASE; +#else + unsigned long vectors = (unsigned long)vectors_page; +#endif extern char __stubs_start[], __stubs_end[]; extern char __vectors_start[], __vectors_end[]; extern char __kuser_helper_start[], __kuser_helper_end[]; @@ -783,10 +789,10 @@ void __init early_trap_init(void) * Copy signal return handlers into the vector page, and * set sigreturn to be a pointer to these. */ - memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, - sizeof(sigreturn_codes)); - memcpy((void *)KERN_RESTART_CODE, syscall_restart_code, - sizeof(syscall_restart_code)); + memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), + sigreturn_codes, sizeof(sigreturn_codes)); + memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE), + syscall_restart_code, sizeof(syscall_restart_code)); flush_icache_range(vectors, vectors + PAGE_SIZE); modify_domain(DOMAIN_USER, DOMAIN_CLIENT); diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S index b1631a7..1b049cd 100644 --- a/arch/arm/lib/getuser.S +++ b/arch/arm/lib/getuser.S @@ -28,20 +28,21 @@ */ #include #include +#include ENTRY(__get_user_1) -1: ldrbt r2, [r0] +1: T(ldrb) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__get_user_1) ENTRY(__get_user_2) #ifdef CONFIG_THUMB2_KERNEL -2: ldrbt r2, [r0] -3: ldrbt r3, [r0, #1] +2: T(ldrb) r2, [r0] +3: T(ldrb) r3, [r0, #1] #else -2: ldrbt r2, [r0], #1 -3: ldrbt r3, [r0] +2: T(ldrb) r2, [r0], #1 +3: T(ldrb) r3, [r0] #endif #ifndef __ARMEB__ orr r2, r2, r3, lsl #8 @@ -53,7 +54,7 @@ ENTRY(__get_user_2) ENDPROC(__get_user_2) ENTRY(__get_user_4) -4: ldrt r2, [r0] +4: T(ldr) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__get_user_4) diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S index 5a01a23..c023fc1 100644 --- a/arch/arm/lib/putuser.S +++ b/arch/arm/lib/putuser.S @@ -28,9 +28,10 @@ */ #include #include +#include ENTRY(__put_user_1) -1: strbt r2, [r0] +1: T(strb) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__put_user_1) @@ -39,19 +40,19 @@ ENTRY(__put_user_2) mov ip, r2, lsr #8 #ifdef CONFIG_THUMB2_KERNEL #ifndef __ARMEB__ -2: strbt r2, [r0] -3: strbt ip, [r0, #1] +2: T(strb) r2, [r0] +3: T(strb) ip, [r0, #1] #else -2: strbt ip, [r0] -3: strbt r2, [r0, #1] +2: T(strb) ip, [r0] +3: T(strb) r2, [r0, #1] #endif #else /* !CONFIG_THUMB2_KERNEL */ #ifndef __ARMEB__ -2: strbt r2, [r0], #1 -3: strbt ip, [r0] +2: T(strb) r2, [r0], #1 +3: T(strb) ip, [r0] #else -2: strbt ip, [r0], #1 -3: strbt r2, [r0] +2: T(strb) ip, [r0], #1 +3: T(strb) r2, [r0] #endif #endif /* CONFIG_THUMB2_KERNEL */ mov r0, #0 @@ -59,18 +60,18 @@ ENTRY(__put_user_2) ENDPROC(__put_user_2) ENTRY(__put_user_4) -4: strt r2, [r0] +4: T(str) r2, [r0] mov r0, #0 mov pc, lr ENDPROC(__put_user_4) ENTRY(__put_user_8) #ifdef CONFIG_THUMB2_KERNEL -5: strt r2, [r0] -6: strt r3, [r0, #4] +5: T(str) r2, [r0] +6: T(str) r3, [r0, #4] #else -5: strt r2, [r0], #4 -6: strt r3, [r0] +5: T(str) r2, [r0], #4 +6: T(str) r3, [r0] #endif mov r0, #0 mov pc, lr diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index fee9f6f..d0ece2a 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -14,6 +14,7 @@ #include #include #include +#include .text @@ -31,11 +32,11 @@ rsb ip, ip, #4 cmp ip, #2 ldrb r3, [r1], #1 -USER( strbt r3, [r0], #1) @ May fault +USER( T(strb) r3, [r0], #1) @ May fault ldrgeb r3, [r1], #1 -USER( strgebt r3, [r0], #1) @ May fault +USER( T(strgeb) r3, [r0], #1) @ May fault ldrgtb r3, [r1], #1 -USER( strgtbt r3, [r0], #1) @ May fault +USER( T(strgtb) r3, [r0], #1) @ May fault sub r2, r2, ip b .Lc2u_dest_aligned @@ -58,7 +59,7 @@ ENTRY(__copy_to_user) addmi ip, r2, #4 bmi .Lc2u_0nowords ldr r3, [r1], #4 -USER( strt r3, [r0], #4) @ May fault +USER( T(str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction rsb ip, ip, #0 movs ip, ip, lsr #32 - PAGE_SHIFT @@ -87,18 +88,18 @@ USER( strt r3, [r0], #4) @ May fault stmneia r0!, {r3 - r4} @ Shouldnt fault tst ip, #4 ldrne r3, [r1], #4 - strnet r3, [r0], #4 @ Shouldnt fault + T(strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_0fupi .Lc2u_0nowords: teq ip, #0 beq .Lc2u_finished .Lc2u_nowords: cmp ip, #2 ldrb r3, [r1], #1 -USER( strbt r3, [r0], #1) @ May fault +USER( T(strb) r3, [r0], #1) @ May fault ldrgeb r3, [r1], #1 -USER( strgebt r3, [r0], #1) @ May fault +USER( T(strgeb) r3, [r0], #1) @ May fault ldrgtb r3, [r1], #1 -USER( strgtbt r3, [r0], #1) @ May fault +USER( T(strgtb) r3, [r0], #1) @ May fault b .Lc2u_finished .Lc2u_not_enough: @@ -119,7 +120,7 @@ USER( strgtbt r3, [r0], #1) @ May fault mov r3, r7, pull #8 ldr r7, [r1], #4 orr r3, r3, r7, push #24 -USER( strt r3, [r0], #4) @ May fault +USER( T(str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 movs ip, ip, lsr #32 - PAGE_SHIFT @@ -154,18 +155,18 @@ USER( strt r3, [r0], #4) @ May fault movne r3, r7, pull #8 ldrne r7, [r1], #4 orrne r3, r3, r7, push #24 - strnet r3, [r0], #4 @ Shouldnt fault + T(strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_1fupi .Lc2u_1nowords: mov r3, r7, get_byte_1 teq ip, #0 beq .Lc2u_finished cmp ip, #2 -USER( strbt r3, [r0], #1) @ May fault +USER( T(strb) r3, [r0], #1) @ May fault movge r3, r7, get_byte_2 -USER( strgebt r3, [r0], #1) @ May fault +USER( T(strgeb) r3, [r0], #1) @ May fault movgt r3, r7, get_byte_3 -USER( strgtbt r3, [r0], #1) @ May fault +USER( T(strgtb) r3, [r0], #1) @ May fault b .Lc2u_finished .Lc2u_2fupi: subs r2, r2, #4 @@ -174,7 +175,7 @@ USER( strgtbt r3, [r0], #1) @ May fault mov r3, r7, pull #16 ldr r7, [r1], #4 orr r3, r3, r7, push #16 -USER( strt r3, [r0], #4) @ May fault +USER( T(str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 movs ip, ip, lsr #32 - PAGE_SHIFT @@ -209,18 +210,18 @@ USER( strt r3, [r0], #4) @ May fault movne r3, r7, pull #16 ldrne r7, [r1], #4 orrne r3, r3, r7, push #16 - strnet r3, [r0], #4 @ Shouldnt fault + T(strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_2fupi .Lc2u_2nowords: mov r3, r7, get_byte_2 teq ip, #0 beq .Lc2u_finished cmp ip, #2 -USER( strbt r3, [r0], #1) @ May fault +USER( T(strb) r3, [r0], #1) @ May fault movge r3, r7, get_byte_3 -USER( strgebt r3, [r0], #1) @ May fault +USER( T(strgeb) r3, [r0], #1) @ May fault ldrgtb r3, [r1], #0 -USER( strgtbt r3, [r0], #1) @ May fault +USER( T(strgtb) r3, [r0], #1) @ May fault b .Lc2u_finished .Lc2u_3fupi: subs r2, r2, #4 @@ -229,7 +230,7 @@ USER( strgtbt r3, [r0], #1) @ May fault mov r3, r7, pull #24 ldr r7, [r1], #4 orr r3, r3, r7, push #8 -USER( strt r3, [r0], #4) @ May fault +USER( T(str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 movs ip, ip, lsr #32 - PAGE_SHIFT @@ -264,18 +265,18 @@ USER( strt r3, [r0], #4) @ May fault movne r3, r7, pull #24 ldrne r7, [r1], #4 orrne r3, r3, r7, push #8 - strnet r3, [r0], #4 @ Shouldnt fault + T(strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_3fupi .Lc2u_3nowords: mov r3, r7, get_byte_3 teq ip, #0 beq .Lc2u_finished cmp ip, #2 -USER( strbt r3, [r0], #1) @ May fault +USER( T(strb) r3, [r0], #1) @ May fault ldrgeb r3, [r1], #1 -USER( strgebt r3, [r0], #1) @ May fault +USER( T(strgeb) r3, [r0], #1) @ May fault ldrgtb r3, [r1], #0 -USER( strgtbt r3, [r0], #1) @ May fault +USER( T(strgtb) r3, [r0], #1) @ May fault b .Lc2u_finished ENDPROC(__copy_to_user) @@ -294,11 +295,11 @@ ENDPROC(__copy_to_user) .Lcfu_dest_not_aligned: rsb ip, ip, #4 cmp ip, #2 -USER( ldrbt r3, [r1], #1) @ May fault +USER( T(ldrb) r3, [r1], #1) @ May fault strb r3, [r0], #1 -USER( ldrgebt r3, [r1], #1) @ May fault +USER( T(ldrgeb) r3, [r1], #1) @ May fault strgeb r3, [r0], #1 -USER( ldrgtbt r3, [r1], #1) @ May fault +USER( T(ldrgtb) r3, [r1], #1) @ May fault strgtb r3, [r0], #1 sub r2, r2, ip b .Lcfu_dest_aligned @@ -321,7 +322,7 @@ ENTRY(__copy_from_user) .Lcfu_0fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lcfu_0nowords -USER( ldrt r3, [r1], #4) +USER( T(ldr) r3, [r1], #4) str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction rsb ip, ip, #0 @@ -350,18 +351,18 @@ USER( ldrt r3, [r1], #4) ldmneia r1!, {r3 - r4} @ Shouldnt fault stmneia r0!, {r3 - r4} tst ip, #4 - ldrnet r3, [r1], #4 @ Shouldnt fault + T(ldrne) r3, [r1], #4 @ Shouldnt fault strne r3, [r0], #4 ands ip, ip, #3 beq .Lcfu_0fupi .Lcfu_0nowords: teq ip, #0 beq .Lcfu_finished .Lcfu_nowords: cmp ip, #2 -USER( ldrbt r3, [r1], #1) @ May fault +USER( T(ldrb) r3, [r1], #1) @ May fault strb r3, [r0], #1 -USER( ldrgebt r3, [r1], #1) @ May fault +USER( T(ldrgeb) r3, [r1], #1) @ May fault strgeb r3, [r0], #1 -USER( ldrgtbt r3, [r1], #1) @ May fault +USER( T(ldrgtb) r3, [r1], #1) @ May fault strgtb r3, [r0], #1 b .Lcfu_finished @@ -374,7 +375,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault .Lcfu_src_not_aligned: bic r1, r1, #3 -USER( ldrt r7, [r1], #4) @ May fault +USER( T(ldr) r7, [r1], #4) @ May fault cmp ip, #2 bgt .Lcfu_3fupi beq .Lcfu_2fupi @@ -382,7 +383,7 @@ USER( ldrt r7, [r1], #4) @ May fault addmi ip, r2, #4 bmi .Lcfu_1nowords mov r3, r7, pull #8 -USER( ldrt r7, [r1], #4) @ May fault +USER( T(ldr) r7, [r1], #4) @ May fault orr r3, r3, r7, push #24 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT @@ -417,7 +418,7 @@ USER( ldrt r7, [r1], #4) @ May fault stmneia r0!, {r3 - r4} tst ip, #4 movne r3, r7, pull #8 -USER( ldrnet r7, [r1], #4) @ May fault +USER( T(ldrne) r7, [r1], #4) @ May fault orrne r3, r3, r7, push #24 strne r3, [r0], #4 ands ip, ip, #3 @@ -437,7 +438,7 @@ USER( ldrnet r7, [r1], #4) @ May fault addmi ip, r2, #4 bmi .Lcfu_2nowords mov r3, r7, pull #16 -USER( ldrt r7, [r1], #4) @ May fault +USER( T(ldr) r7, [r1], #4) @ May fault orr r3, r3, r7, push #16 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT @@ -473,7 +474,7 @@ USER( ldrt r7, [r1], #4) @ May fault stmneia r0!, {r3 - r4} tst ip, #4 movne r3, r7, pull #16 -USER( ldrnet r7, [r1], #4) @ May fault +USER( T(ldrne) r7, [r1], #4) @ May fault orrne r3, r3, r7, push #16 strne r3, [r0], #4 ands ip, ip, #3 @@ -485,7 +486,7 @@ USER( ldrnet r7, [r1], #4) @ May fault strb r3, [r0], #1 movge r3, r7, get_byte_3 strgeb r3, [r0], #1 -USER( ldrgtbt r3, [r1], #0) @ May fault +USER( T(ldrgtb) r3, [r1], #0) @ May fault strgtb r3, [r0], #1 b .Lcfu_finished @@ -493,7 +494,7 @@ USER( ldrgtbt r3, [r1], #0) @ May fault addmi ip, r2, #4 bmi .Lcfu_3nowords mov r3, r7, pull #24 -USER( ldrt r7, [r1], #4) @ May fault +USER( T(ldr) r7, [r1], #4) @ May fault orr r3, r3, r7, push #8 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT @@ -528,7 +529,7 @@ USER( ldrt r7, [r1], #4) @ May fault stmneia r0!, {r3 - r4} tst ip, #4 movne r3, r7, pull #24 -USER( ldrnet r7, [r1], #4) @ May fault +USER( T(ldrne) r7, [r1], #4) @ May fault orrne r3, r3, r7, push #8 strne r3, [r0], #4 ands ip, ip, #3 @@ -538,9 +539,9 @@ USER( ldrnet r7, [r1], #4) @ May fault beq .Lcfu_finished cmp ip, #2 strb r3, [r0], #1 -USER( ldrgebt r3, [r1], #1) @ May fault +USER( T(ldrgeb) r3, [r1], #1) @ May fault strgeb r3, [r0], #1 -USER( ldrgtbt r3, [r1], #1) @ May fault +USER( T(ldrgtb) r3, [r1], #1) @ May fault strgtb r3, [r0], #1 b .Lcfu_finished ENDPROC(__copy_from_user) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 4414a01..6d05f79 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -599,6 +599,14 @@ config CPU_CP15_MPU help Processor has the CP15 register, which has MPU related registers. +config CPU_USE_DOMAINS + bool + depends on MMU + default y if !CPU_32v6K + help + This option enables or disables the use of domain switching + via the set_fs() function. + # # CPU supports 36-bit I/O # diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 72ad3e1..79c01f5 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -914,12 +915,11 @@ static void __init devicemaps_init(struct machine_desc *mdesc) { struct map_desc map; unsigned long addr; - void *vectors; /* * Allocate the vector page early. */ - vectors = early_alloc(PAGE_SIZE); + vectors_page = early_alloc(PAGE_SIZE); for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) pmd_clear(pmd_off_k(addr)); @@ -959,7 +959,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) * location (0xffff0000). If we aren't using high-vectors, also * create a mapping at the low-vectors virtual address. */ - map.pfn = __phys_to_pfn(virt_to_phys(vectors)); + map.pfn = __phys_to_pfn(virt_to_phys(vectors_page)); map.virtual = 0xffff0000; map.length = PAGE_SIZE; map.type = MT_HIGH_VECTORS; diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 7d63bea..337f102 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -99,6 +99,10 @@ * 110x 0 1 0 r/w r/o * 11x0 0 1 0 r/w r/o * 1111 0 1 1 r/w r/w + * + * If !CONFIG_CPU_USE_DOMAINS, the following permissions are changed: + * 110x 1 1 1 r/o r/o + * 11x0 1 1 1 r/o r/o */ .macro armv6_mt_table pfx \pfx\()_mt_table: @@ -138,8 +142,11 @@ tst r1, #L_PTE_USER orrne r3, r3, #PTE_EXT_AP1 +#ifdef CONFIG_CPU_USE_DOMAINS + @ allow kernel read/write access to read-only user pages tstne r3, #PTE_EXT_APX bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 +#endif tst r1, #L_PTE_EXEC orreq r3, r3, #PTE_EXT_XN diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 53cbe22..cfc11af 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -148,8 +148,11 @@ ENTRY(cpu_v7_set_pte_ext) tst r1, #L_PTE_USER orrne r3, r3, #PTE_EXT_AP1 +#ifdef CONFIG_CPU_USE_DOMAINS + @ allow kernel read/write access to read-only user pages tstne r3, #PTE_EXT_APX bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 +#endif tst r1, #L_PTE_EXEC orreq r3, r3, #PTE_EXT_XN @@ -273,8 +276,6 @@ __v7_setup: ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) ALT_UP(orr r4, r4, #TTB_FLAGS_UP) mcr p15, 0, r4, c2, c0, 1 @ load TTB1 - mov r10, #0x1f @ domains 0, 1 = manager - mcr p15, 0, r10, c3, c0, 0 @ load domain access register /* * Memory region attributes with SCTLR.TRE=1 * -- cgit v0.10.2 From 64d2dc384e41e2b7acead6804593ddaaf8aad8e1 Mon Sep 17 00:00:00 2001 From: Leif Lindholm Date: Thu, 16 Sep 2010 18:00:47 +0100 Subject: ARM: 6396/1: Add SWP/SWPB emulation for ARMv7 processors The SWP instruction was deprecated in the ARMv6 architecture, superseded by the LDREX/STREX family of instructions for load-linked/store-conditional operations. The ARMv7 multiprocessing extensions mandate that SWP/SWPB instructions are treated as undefined from reset, with the ability to enable them through the System Control Register SW bit. This patch adds the alternative solution to emulate the SWP and SWPB instructions using LDREX/STREX sequences, and log statistics to /proc/cpu/swp_emulation. To correctly deal with copy-on-write, it also modifies cpu_v7_set_pte_ext to change the mappings to priviliged RO when user RO. Signed-off-by: Leif Lindholm Acked-by: Catalin Marinas Acked-by: Kirill A. Shutemov Signed-off-by: Russell King diff --git a/Documentation/arm/00-INDEX b/Documentation/arm/00-INDEX index ecf7d04..91c24a1 100644 --- a/Documentation/arm/00-INDEX +++ b/Documentation/arm/00-INDEX @@ -34,3 +34,5 @@ memory.txt - description of the virtual memory layout nwfpe/ - NWFPE floating point emulator documentation +swp_emulation + - SWP/SWPB emulation handler/logging description diff --git a/Documentation/arm/swp_emulation b/Documentation/arm/swp_emulation new file mode 100644 index 0000000..af903d2 --- /dev/null +++ b/Documentation/arm/swp_emulation @@ -0,0 +1,27 @@ +Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE) +--------------------------------------------------------------------- + +ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds +moving to the load-locked/store-conditional instructions LDREX and STREX. + +ARMv7 multiprocessing extensions introduce the ability to disable these +instructions, triggering an undefined instruction exception when executed. +Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB +sequence. If a memory access fault (an abort) occurs, a segmentation fault is +signalled to the triggering process. + +/proc/cpu/swp_emulation holds some statistics/information, including the PID of +the last process to trigger the emulation to be invocated. For example: +--- +Emulated SWP: 12 +Emulated SWPB: 0 +Aborted SWP{B}: 1 +Last process: 314 +--- + +NOTE: when accessing uncached shared regions, LDREX/STREX rely on an external +transaction monitoring block called a global monitor to maintain update +atomicity. If your system does not implement a global monitor, this option can +cause programs that perform SWP operations to uncached memory to deadlock, as +the STREX operation will always fail. + diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 5b9b268..119a6bb 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_ARM_UNWIND) += unwind.o obj-$(CONFIG_HAVE_TCM) += tcm.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o +obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c new file mode 100644 index 0000000..7a576092 --- /dev/null +++ b/arch/arm/kernel/swp_emulate.c @@ -0,0 +1,267 @@ +/* + * linux/arch/arm/kernel/swp_emulate.c + * + * Copyright (C) 2009 ARM Limited + * __user_* functions adapted from include/asm/uaccess.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Implements emulation of the SWP/SWPB instructions using load-exclusive and + * store-exclusive for processors that have them disabled (or future ones that + * might not implement them). + * + * Syntax of SWP{B} instruction: SWP{B} , , [] + * Where: Rt = destination + * Rt2 = source + * Rn = address + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +/* + * Error-checking SWP macros implemented using ldrex{b}/strex{b} + */ +#define __user_swpX_asm(data, addr, res, temp, B) \ + __asm__ __volatile__( \ + " mov %2, %1\n" \ + "0: ldrex"B" %1, [%3]\n" \ + "1: strex"B" %0, %2, [%3]\n" \ + " cmp %0, #0\n" \ + " movne %0, %4\n" \ + "2:\n" \ + " .section .fixup,\"ax\"\n" \ + " .align 2\n" \ + "3: mov %0, %5\n" \ + " b 2b\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + " .align 3\n" \ + " .long 0b, 3b\n" \ + " .long 1b, 3b\n" \ + " .previous" \ + : "=&r" (res), "+r" (data), "=&r" (temp) \ + : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ + : "cc", "memory") + +#define __user_swp_asm(data, addr, res, temp) \ + __user_swpX_asm(data, addr, res, temp, "") +#define __user_swpb_asm(data, addr, res, temp) \ + __user_swpX_asm(data, addr, res, temp, "b") + +/* + * Macros/defines for extracting register numbers from instruction. + */ +#define EXTRACT_REG_NUM(instruction, offset) \ + (((instruction) & (0xf << (offset))) >> (offset)) +#define RN_OFFSET 16 +#define RT_OFFSET 12 +#define RT2_OFFSET 0 +/* + * Bit 22 of the instruction encoding distinguishes between + * the SWP and SWPB variants (bit set means SWPB). + */ +#define TYPE_SWPB (1 << 22) + +static unsigned long swpcounter; +static unsigned long swpbcounter; +static unsigned long abtcounter; +static pid_t previous_pid; + +#ifdef CONFIG_PROC_FS +static int proc_read_status(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + char *p = page; + int len; + + p += sprintf(p, "Emulated SWP:\t\t%lu\n", swpcounter); + p += sprintf(p, "Emulated SWPB:\t\t%lu\n", swpbcounter); + p += sprintf(p, "Aborted SWP{B}:\t\t%lu\n", abtcounter); + if (previous_pid != 0) + p += sprintf(p, "Last process:\t\t%d\n", previous_pid); + + len = (p - page) - off; + if (len < 0) + len = 0; + + *eof = (len <= count) ? 1 : 0; + *start = page + off; + + return len; +} +#endif + +/* + * Set up process info to signal segmentation fault - called on access error. + */ +static void set_segfault(struct pt_regs *regs, unsigned long addr) +{ + siginfo_t info; + + if (find_vma(current->mm, addr) == NULL) + info.si_code = SEGV_MAPERR; + else + info.si_code = SEGV_ACCERR; + + info.si_signo = SIGSEGV; + info.si_errno = 0; + info.si_addr = (void *) instruction_pointer(regs); + + pr_debug("SWP{B} emulation: access caused memory abort!\n"); + arm_notify_die("Illegal memory access", regs, &info, 0, 0); + + abtcounter++; +} + +static int emulate_swpX(unsigned int address, unsigned int *data, + unsigned int type) +{ + unsigned int res = 0; + + if ((type != TYPE_SWPB) && (address & 0x3)) { + /* SWP to unaligned address not permitted */ + pr_debug("SWP instruction on unaligned pointer!\n"); + return -EFAULT; + } + + while (1) { + unsigned long temp; + + /* + * Barrier required between accessing protected resource and + * releasing a lock for it. Legacy code might not have done + * this, and we cannot determine that this is not the case + * being emulated, so insert always. + */ + smp_mb(); + + if (type == TYPE_SWPB) + __user_swpb_asm(*data, address, res, temp); + else + __user_swp_asm(*data, address, res, temp); + + if (likely(res != -EAGAIN) || signal_pending(current)) + break; + + cond_resched(); + } + + if (res == 0) { + /* + * Barrier also required between aquiring a lock for a + * protected resource and accessing the resource. Inserted for + * same reason as above. + */ + smp_mb(); + + if (type == TYPE_SWPB) + swpbcounter++; + else + swpcounter++; + } + + return res; +} + +/* + * swp_handler logs the id of calling process, dissects the instruction, sanity + * checks the memory location, calls emulate_swpX for the actual operation and + * deals with fixup/error handling before returning + */ +static int swp_handler(struct pt_regs *regs, unsigned int instr) +{ + unsigned int address, destreg, data, type; + unsigned int res = 0; + + perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs, regs->ARM_pc); + + if (current->pid != previous_pid) { + pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", + current->comm, (unsigned long)current->pid); + previous_pid = current->pid; + } + + address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)]; + data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)]; + destreg = EXTRACT_REG_NUM(instr, RT_OFFSET); + + type = instr & TYPE_SWPB; + + pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n", + EXTRACT_REG_NUM(instr, RN_OFFSET), address, + destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data); + + /* Check access in reasonable access range for both SWP and SWPB */ + if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) { + pr_debug("SWP{B} emulation: access to %p not allowed!\n", + (void *)address); + res = -EFAULT; + } else { + res = emulate_swpX(address, &data, type); + } + + if (res == 0) { + /* + * On successful emulation, revert the adjustment to the PC + * made in kernel/traps.c in order to resume execution at the + * instruction following the SWP{B}. + */ + regs->ARM_pc += 4; + regs->uregs[destreg] = data; + } else if (res == -EFAULT) { + /* + * Memory errors do not mean emulation failed. + * Set up signal info to return SEGV, then return OK + */ + set_segfault(regs, address); + } + + return 0; +} + +/* + * Only emulate SWP/SWPB executed in ARM state/User mode. + * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE. + */ +static struct undef_hook swp_hook = { + .instr_mask = 0x0fb00ff0, + .instr_val = 0x01000090, + .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT, + .cpsr_val = USR_MODE, + .fn = swp_handler +}; + +/* + * Register handler and create status file in /proc/cpu + * Invoked as late_initcall, since not needed before init spawned. + */ +static int __init swp_emulation_init(void) +{ +#ifdef CONFIG_PROC_FS + struct proc_dir_entry *res; + + res = create_proc_entry("cpu/swp_emulation", S_IRUGO, NULL); + + if (!res) + return -ENOMEM; + + res->read_proc = proc_read_status; +#endif /* CONFIG_PROC_FS */ + + printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n"); + register_undef_hook(&swp_hook); + + return 0; +} + +late_initcall(swp_emulation_init); diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 6d05f79..8493ed0 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -636,6 +636,33 @@ config ARM_THUMBEE Say Y here if you have a CPU with the ThumbEE extension and code to make use of it. Say N for code that can run on CPUs without ThumbEE. +config SWP_EMULATE + bool "Emulate SWP/SWPB instructions" + depends on CPU_V7 + select HAVE_PROC_CPU if PROC_FS + default y if SMP + help + ARMv6 architecture deprecates use of the SWP/SWPB instructions. + ARMv7 multiprocessing extensions introduce the ability to disable + these instructions, triggering an undefined instruction exception + when executed. Say Y here to enable software emulation of these + instructions for userspace (not kernel) using LDREX/STREX. + Also creates /proc/cpu/swp_emulation for statistics. + + In some older versions of glibc [<=2.8] SWP is used during futex + trylock() operations with the assumption that the code will not + be preempted. This invalid assumption may be more likely to fail + with SWP emulation enabled, leading to deadlock of the user + application. + + NOTE: when accessing uncached shared regions, LDREX/STREX rely + on an external transaction monitoring block called a global + monitor to maintain update atomicity. If your system does not + implement a global monitor, this option can cause programs that + perform SWP operations to uncached memory to deadlock. + + If unsure, say Y. + config CPU_BIG_ENDIAN bool "Build big-endian kernel" depends on ARCH_SUPPORTS_BIG_ENDIAN diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index cfc11af..2b5b20b 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -314,6 +314,10 @@ __v7_setup: #ifdef CONFIG_CPU_ENDIAN_BE8 orr r6, r6, #1 << 25 @ big-endian page tables #endif +#ifdef CONFIG_SWP_EMULATE + orr r5, r5, #(1 << 10) @ set SW bit in "clear" + bic r6, r6, #(1 << 10) @ clear it in "mmuset" +#endif mrc p15, 0, r0, c1, c0, 0 @ read control register bic r0, r0, r5 @ clear bits them orr r0, r0, r6 @ set them -- cgit v0.10.2 From 8a9618f5dfca35edb0d7ab6374ff586e2e9e989b Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 6 Oct 2010 16:18:08 +0100 Subject: ARM: 6432/1: move timer-sp.c from versatile to common From: Rob Herring The timer-sp h/w used on versatile platforms can also be used for other platforms, so move it to a common location. Signed-off-by: Rob Herring Signed-off-by: Russell King diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index e6e8664..e7521bca 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -17,3 +17,4 @@ obj-$(CONFIG_ARCH_IXP2000) += uengine.o obj-$(CONFIG_ARCH_IXP23XX) += uengine.o obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o +obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c new file mode 100644 index 0000000..4740313 --- /dev/null +++ b/arch/arm/common/timer-sp.c @@ -0,0 +1,154 @@ +/* + * linux/arch/arm/common/timer-sp.c + * + * Copyright (C) 1999 - 2003 ARM Limited + * Copyright (C) 2000 Deep Blue Solutions Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include + +#include + +/* + * These timers are currently always setup to be clocked at 1MHz. + */ +#define TIMER_FREQ_KHZ (1000) +#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) + +static void __iomem *clksrc_base; + +static cycle_t sp804_read(struct clocksource *cs) +{ + return ~readl(clksrc_base + TIMER_VALUE); +} + +static struct clocksource clocksource_sp804 = { + .name = "timer3", + .rating = 200, + .read = sp804_read, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +void __init sp804_clocksource_init(void __iomem *base) +{ + struct clocksource *cs = &clocksource_sp804; + + clksrc_base = base; + + /* setup timer 0 as free-running clocksource */ + writel(0, clksrc_base + TIMER_CTRL); + writel(0xffffffff, clksrc_base + TIMER_LOAD); + writel(0xffffffff, clksrc_base + TIMER_VALUE); + writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, + clksrc_base + TIMER_CTRL); + + cs->mult = clocksource_khz2mult(TIMER_FREQ_KHZ, cs->shift); + clocksource_register(cs); +} + + +static void __iomem *clkevt_base; + +/* + * IRQ handler for the timer + */ +static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = dev_id; + + /* clear the interrupt */ + writel(1, clkevt_base + TIMER_INTCLR); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static void sp804_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE; + + writel(ctrl, clkevt_base + TIMER_CTRL); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD); + ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; + break; + + case CLOCK_EVT_MODE_ONESHOT: + /* period set, and timer enabled in 'next_event' hook */ + ctrl |= TIMER_CTRL_ONESHOT; + break; + + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + default: + break; + } + + writel(ctrl, clkevt_base + TIMER_CTRL); +} + +static int sp804_set_next_event(unsigned long next, + struct clock_event_device *evt) +{ + unsigned long ctrl = readl(clkevt_base + TIMER_CTRL); + + writel(next, clkevt_base + TIMER_LOAD); + writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL); + + return 0; +} + +static struct clock_event_device sp804_clockevent = { + .name = "timer0", + .shift = 32, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .set_mode = sp804_set_mode, + .set_next_event = sp804_set_next_event, + .rating = 300, + .cpumask = cpu_all_mask, +}; + +static struct irqaction sp804_timer_irq = { + .name = "timer", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = sp804_timer_interrupt, + .dev_id = &sp804_clockevent, +}; + +void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq) +{ + struct clock_event_device *evt = &sp804_clockevent; + + clkevt_base = base; + + evt->irq = timer_irq; + evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift); + evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); + evt->min_delta_ns = clockevent_delta2ns(0xf, evt); + + setup_irq(timer_irq, &sp804_timer_irq); + clockevents_register_device(evt); +} diff --git a/arch/arm/include/asm/hardware/timer-sp.h b/arch/arm/include/asm/hardware/timer-sp.h new file mode 100644 index 0000000..21e75e3 --- /dev/null +++ b/arch/arm/include/asm/hardware/timer-sp.h @@ -0,0 +1,2 @@ +void sp804_clocksource_init(void __iomem *); +void sp804_clockevents_init(void __iomem *, unsigned int); diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 6258c90..1713ecf 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include "common.h" diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 07c0815..aa54b57 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -50,7 +50,7 @@ #include #include #include -#include +#include #include "core.h" diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index e38acb0..6b93bd6 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -49,7 +49,7 @@ #include #include #include -#include +#include #include "core.h" diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index c2e405a..101e79f 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 7eaa232..91ff2e0 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -22,7 +22,7 @@ #include #include -#include +#include #include "core.h" diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile index 5cf88e8..aaa571d 100644 --- a/arch/arm/plat-versatile/Makefile +++ b/arch/arm/plat-versatile/Makefile @@ -1,5 +1,4 @@ obj-y := clock.o -obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o obj-$(CONFIG_ARCH_REALVIEW) += sched-clock.o obj-$(CONFIG_ARCH_VERSATILE) += sched-clock.o ifeq ($(CONFIG_LEDS_CLASS),y) diff --git a/arch/arm/plat-versatile/include/plat/timer-sp.h b/arch/arm/plat-versatile/include/plat/timer-sp.h deleted file mode 100644 index 21e75e3..0000000 --- a/arch/arm/plat-versatile/include/plat/timer-sp.h +++ /dev/null @@ -1,2 +0,0 @@ -void sp804_clocksource_init(void __iomem *); -void sp804_clockevents_init(void __iomem *, unsigned int); diff --git a/arch/arm/plat-versatile/timer-sp.c b/arch/arm/plat-versatile/timer-sp.c deleted file mode 100644 index fb0d1c2..0000000 --- a/arch/arm/plat-versatile/timer-sp.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * linux/arch/arm/plat-versatile/timer-sp.c - * - * Copyright (C) 1999 - 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include - -#include - -#include - -/* - * These timers are currently always setup to be clocked at 1MHz. - */ -#define TIMER_FREQ_KHZ (1000) -#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) - -static void __iomem *clksrc_base; - -static cycle_t sp804_read(struct clocksource *cs) -{ - return ~readl(clksrc_base + TIMER_VALUE); -} - -static struct clocksource clocksource_sp804 = { - .name = "timer3", - .rating = 200, - .read = sp804_read, - .mask = CLOCKSOURCE_MASK(32), - .shift = 20, - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -void __init sp804_clocksource_init(void __iomem *base) -{ - struct clocksource *cs = &clocksource_sp804; - - clksrc_base = base; - - /* setup timer 0 as free-running clocksource */ - writel(0, clksrc_base + TIMER_CTRL); - writel(0xffffffff, clksrc_base + TIMER_LOAD); - writel(0xffffffff, clksrc_base + TIMER_VALUE); - writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, - clksrc_base + TIMER_CTRL); - - cs->mult = clocksource_khz2mult(TIMER_FREQ_KHZ, cs->shift); - clocksource_register(cs); -} - - -static void __iomem *clkevt_base; - -/* - * IRQ handler for the timer - */ -static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = dev_id; - - /* clear the interrupt */ - writel(1, clkevt_base + TIMER_INTCLR); - - evt->event_handler(evt); - - return IRQ_HANDLED; -} - -static void sp804_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE; - - writel(ctrl, clkevt_base + TIMER_CTRL); - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - writel(TIMER_RELOAD, clkevt_base + TIMER_LOAD); - ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; - break; - - case CLOCK_EVT_MODE_ONESHOT: - /* period set, and timer enabled in 'next_event' hook */ - ctrl |= TIMER_CTRL_ONESHOT; - break; - - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - default: - break; - } - - writel(ctrl, clkevt_base + TIMER_CTRL); -} - -static int sp804_set_next_event(unsigned long next, - struct clock_event_device *evt) -{ - unsigned long ctrl = readl(clkevt_base + TIMER_CTRL); - - writel(next, clkevt_base + TIMER_LOAD); - writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL); - - return 0; -} - -static struct clock_event_device sp804_clockevent = { - .name = "timer0", - .shift = 32, - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_mode = sp804_set_mode, - .set_next_event = sp804_set_next_event, - .rating = 300, - .cpumask = cpu_all_mask, -}; - -static struct irqaction sp804_timer_irq = { - .name = "timer", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = sp804_timer_interrupt, - .dev_id = &sp804_clockevent, -}; - -void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq) -{ - struct clock_event_device *evt = &sp804_clockevent; - - clkevt_base = base; - - evt->irq = timer_irq; - evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift); - evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); - evt->min_delta_ns = clockevent_delta2ns(0xf, evt); - - setup_irq(timer_irq, &sp804_timer_irq); - clockevents_register_device(evt); -} -- cgit v0.10.2 From 2686b4b408c25349aee7b35558722d5730d67224 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 19 Oct 2010 12:39:48 +0100 Subject: ARM: 6311/2: mmci: work with only one irq The DBx500 variants have only one IRQ line hooked up. Allow these (and any other implementations which choose to use only one irq) to work by directing the PIO interrupts also to the first IRQ line. Signed-off-by: Rabin Vincent Signed-off-by: Linus Walleij Signed-off-by: Russell King diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 87b4fc6..ed700a5 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -129,10 +129,26 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) spin_lock(&host->lock); } +static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) +{ + void __iomem *base = host->base; + + if (host->singleirq) { + unsigned int mask0 = readl(base + MMCIMASK0); + + mask0 &= ~MCI_IRQ1MASK; + mask0 |= mask; + + writel(mask0, base + MMCIMASK0); + } + + writel(mask, base + MMCIMASK1); +} + static void mmci_stop_data(struct mmci_host *host) { writel(0, host->base + MMCIDATACTRL); - writel(0, host->base + MMCIMASK1); + mmci_set_mask1(host, 0); host->data = NULL; } @@ -198,7 +214,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) writel(datactrl, base + MMCIDATACTRL); writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0); - writel(irqmask, base + MMCIMASK1); + mmci_set_mask1(host, irqmask); } static void @@ -437,7 +453,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) * "any data available" mode. */ if (status & MCI_RXACTIVE && host->size < variant->fifosize) - writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1); + mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); /* * If we run out of data, disable the data IRQs; this @@ -446,7 +462,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) * stops us racing with our data end IRQ. */ if (host->size == 0) { - writel(0, base + MMCIMASK1); + mmci_set_mask1(host, 0); writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0); } @@ -469,6 +485,14 @@ static irqreturn_t mmci_irq(int irq, void *dev_id) struct mmc_data *data; status = readl(host->base + MMCISTATUS); + + if (host->singleirq) { + if (status & readl(host->base + MMCIMASK1)) + mmci_pio_irq(irq, dev_id); + + status &= ~MCI_IRQ1MASK; + } + status &= readl(host->base + MMCIMASK0); writel(status, host->base + MMCICLEAR); @@ -635,6 +659,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) struct variant_data *variant = id->data; struct mmci_host *host; struct mmc_host *mmc; + unsigned int mask; int ret; /* must have platform data */ @@ -806,11 +831,17 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) if (ret) goto unmap; - ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host); - if (ret) - goto irq0_free; + if (dev->irq[1] == NO_IRQ) + host->singleirq = true; + else { + ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, + DRIVER_NAME " (pio)", host); + if (ret) + goto irq0_free; + } - writel(MCI_IRQENABLE, host->base + MMCIMASK0); + mask = MCI_IRQENABLE; + writel(mask, host->base + MMCIMASK0); amba_set_drvdata(dev, mmc); @@ -864,7 +895,8 @@ static int __devexit mmci_remove(struct amba_device *dev) writel(0, host->base + MMCIDATACTRL); free_irq(dev->irq[0], host); - free_irq(dev->irq[1], host); + if (!host->singleirq) + free_irq(dev->irq[1], host); if (host->gpio_wp != -ENOSYS) gpio_free(host->gpio_wp); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 4ae887f..b4e48bd 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -139,6 +139,11 @@ MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK) +/* These interrupts are directed to IRQ1 when two IRQ lines are available */ +#define MCI_IRQ1MASK \ + (MCI_RXFIFOHALFFULLMASK | MCI_RXDATAAVLBLMASK | \ + MCI_TXFIFOHALFEMPTYMASK) + #define NR_SG 16 struct clk; @@ -154,6 +159,7 @@ struct mmci_host { int gpio_cd; int gpio_wp; int gpio_cd_irq; + bool singleirq; unsigned int data_xfered; -- cgit v0.10.2 From f20f8f21e0402c785c342547f7e49eafc42cfb52 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 19 Oct 2010 13:41:24 +0100 Subject: ARM: 6399/3: mmci: handle broken MCI_DATABLOCKEND hardware On the U300 the MCI_DATAEND and MCI_DATABLOCKEND IRQs can arrive out-of-order. Replace an ugly #ifdef hack with a proper runtime solution which models what is really happening. In the U300 DMA mode and on all Ux500 models, the MCI_DATABLOCKEND flag isn't properly cleared in hardware following and ACK leading to all kind of weird behaviour when the flag is still up in subsequent interrupts, so we add two flags indicating the error and handle this runtime. Cc: Rabin Vincent Signed-off-by: Linus Walleij Signed-off-by: Russell King diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index ed700a5..976c9d0 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -45,6 +45,10 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY * is asserted (likewise for RX) + * @broken_blockend: the MCI_DATABLOCKEND is broken on the hardware + * and will not work at all. + * @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when + * using DMA. */ struct variant_data { unsigned int clkreg; @@ -52,6 +56,8 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + bool broken_blockend; + bool broken_blockend_dma; }; static struct variant_data variant_arm = { @@ -65,6 +71,7 @@ static struct variant_data variant_u300 = { .fifohalfsize = 8 * 4, .clkreg_enable = 1 << 13, /* HWFCEN */ .datalength_bits = 16, + .broken_blockend_dma = true, }; static struct variant_data variant_ux500 = { @@ -73,6 +80,7 @@ static struct variant_data variant_ux500 = { .clkreg = MCI_CLK_ENABLE, .clkreg_enable = 1 << 14, /* HWFCEN */ .datalength_bits = 24, + .broken_blockend = true, }; /* * This must be called with host->lock held @@ -178,6 +186,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) host->data = data; host->size = data->blksz * data->blocks; host->data_xfered = 0; + host->blockend = false; + host->dataend = false; mmci_init_sg(host, data); @@ -249,20 +259,9 @@ static void mmci_data_irq(struct mmci_host *host, struct mmc_data *data, unsigned int status) { - if (status & MCI_DATABLOCKEND) { - host->data_xfered += data->blksz; -#ifdef CONFIG_ARCH_U300 - /* - * On the U300 some signal or other is - * badly routed so that a data write does - * not properly terminate with a MCI_DATAEND - * status flag. This quirk will make writes - * work again. - */ - if (data->flags & MMC_DATA_WRITE) - status |= MCI_DATAEND; -#endif - } + struct variant_data *variant = host->variant; + + /* First check for errors */ if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status); if (status & MCI_DATACRCFAIL) @@ -271,7 +270,10 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, data->error = -ETIMEDOUT; else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) data->error = -EIO; - status |= MCI_DATAEND; + + /* Force-complete the transaction */ + host->blockend = true; + host->dataend = true; /* * We hit an error condition. Ensure that any data @@ -289,9 +291,64 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, local_irq_restore(flags); } } - if (status & MCI_DATAEND) { + + /* + * On ARM variants in PIO mode, MCI_DATABLOCKEND + * is always sent first, and we increase the + * transfered number of bytes for that IRQ. Then + * MCI_DATAEND follows and we conclude the transaction. + * + * On the Ux500 single-IRQ variant MCI_DATABLOCKEND + * doesn't seem to immediately clear from the status, + * so we can't use it keep count when only one irq is + * used because the irq will hit for other reasons, and + * then the flag is still up. So we use the MCI_DATAEND + * IRQ at the end of the entire transfer because + * MCI_DATABLOCKEND is broken. + * + * In the U300, the IRQs can arrive out-of-order, + * e.g. MCI_DATABLOCKEND sometimes arrives after MCI_DATAEND, + * so for this case we use the flags "blockend" and + * "dataend" to make sure both IRQs have arrived before + * concluding the transaction. (This does not apply + * to the Ux500 which doesn't fire MCI_DATABLOCKEND + * at all.) In DMA mode it suffers from the same problem + * as the Ux500. + */ + if (status & MCI_DATABLOCKEND) { + /* + * Just being a little over-cautious, we do not + * use this progressive update if the hardware blockend + * flag is unreliable: since it can stay high between + * IRQs it will corrupt the transfer counter. + */ + if (!variant->broken_blockend) + host->data_xfered += data->blksz; + host->blockend = true; + } + + if (status & MCI_DATAEND) + host->dataend = true; + + /* + * On variants with broken blockend we shall only wait for dataend, + * on others we must sync with the blockend signal since they can + * appear out-of-order. + */ + if (host->dataend && (host->blockend || variant->broken_blockend)) { mmci_stop_data(host); + /* Reset these flags */ + host->blockend = false; + host->dataend = false; + + /* + * Variants with broken blockend flags need to handle the + * end of the entire transfer here. + */ + if (variant->broken_blockend && !data->error) + host->data_xfered += data->blksz * data->blocks; + if (!data->stop) { mmci_request_end(host, data->mrq); } else { @@ -841,6 +898,10 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) } mask = MCI_IRQENABLE; + /* Don't use the datablockend flag if it's broken */ + if (variant->broken_blockend) + mask &= ~MCI_DATABLOCKEND; + writel(mask, host->base + MMCIMASK0); amba_set_drvdata(dev, mmc); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index b4e48bd..df06f01 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -177,6 +177,9 @@ struct mmci_host { struct timer_list timer; unsigned int oldstat; + bool blockend; + bool dataend; + /* pio stuff */ struct sg_mapping_iter sg_miter; unsigned int size; -- cgit v0.10.2 From 34177802001894e064c857cac2759f68119550cd Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 19 Oct 2010 12:43:58 +0100 Subject: ARM: 6438/2: mmci: add SDIO support for ST Variants This adds some minor variant data and trickery to enable SDIO on the ST Micro variants of MMCI/PL180. Signed-off-by: Marcin Mielczarczyk Signed-off-by: Linus Walleij Signed-off-by: Russell King diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 976c9d0..0814b88 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -49,6 +50,7 @@ static unsigned int fmax = 515633; * and will not work at all. * @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when * using DMA. + * @sdio: variant supports SDIO */ struct variant_data { unsigned int clkreg; @@ -58,6 +60,7 @@ struct variant_data { unsigned int fifohalfsize; bool broken_blockend; bool broken_blockend_dma; + bool sdio; }; static struct variant_data variant_arm = { @@ -72,6 +75,7 @@ static struct variant_data variant_u300 = { .clkreg_enable = 1 << 13, /* HWFCEN */ .datalength_bits = 16, .broken_blockend_dma = true, + .sdio = true, }; static struct variant_data variant_ux500 = { @@ -81,6 +85,7 @@ static struct variant_data variant_ux500 = { .clkreg_enable = 1 << 14, /* HWFCEN */ .datalength_bits = 24, .broken_blockend = true, + .sdio = true, }; /* * This must be called with host->lock held @@ -222,6 +227,11 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) irqmask = MCI_TXFIFOHALFEMPTYMASK; } + /* The ST Micro variants has a special bit to enable SDIO */ + if (variant->sdio && host->mmc->card) + if (mmc_card_sdio(host->mmc->card)) + datactrl |= MCI_ST_DPSM_SDIOEN; + writel(datactrl, base + MMCIDATACTRL); writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0); mmci_set_mask1(host, irqmask); @@ -429,7 +439,32 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem variant->fifosize : variant->fifohalfsize; count = min(remain, maxcnt); - writesl(base + MMCIFIFO, ptr, count >> 2); + /* + * The ST Micro variant for SDIO transfer sizes + * less then 8 bytes should have clock H/W flow + * control disabled. + */ + if (variant->sdio && + mmc_card_sdio(host->mmc->card)) { + if (count < 8) + writel(readl(host->base + MMCICLOCK) & + ~variant->clkreg_enable, + host->base + MMCICLOCK); + else + writel(readl(host->base + MMCICLOCK) | + variant->clkreg_enable, + host->base + MMCICLOCK); + } + + /* + * SDIO especially may want to send something that is + * not divisible by 4 (as opposed to card sectors + * etc), and the FIFO only accept full 32-bit writes. + * So compensate by adding +3 on the count, a single + * byte become a 32bit write, 7 bytes will be two + * 32bit writes etc. + */ + writesl(base + MMCIFIFO, ptr, (count + 3) >> 2); ptr += count; remain -= count; -- cgit v0.10.2 From d03f322c41890a86bf64d00314f0ec72738a7f21 Mon Sep 17 00:00:00 2001 From: Marcelo Roberto Jimenez Date: Mon, 18 Oct 2010 22:31:26 +0100 Subject: ARM: 6450/1: Fix checkpatch.pl issues in arch/arm/mach-sa1100/cpu-sa1100.c. This patch fixes checkpatch.pl issues in arch/arm/mach-sa1100/cpu-sa1100.c. Signed-off-by: Marcelo Roberto Jimenez Signed-off-by: Russell King diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index 96f7dc1..07d4e8b 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c @@ -94,48 +94,47 @@ #include "generic.h" -typedef struct { +struct sa1100_dram_regs { int speed; u32 mdcnfg; u32 mdcas0; u32 mdcas1; u32 mdcas2; -} sa1100_dram_regs_t; +}; static struct cpufreq_driver sa1100_driver; -static sa1100_dram_regs_t sa1100_dram_settings[] = -{ - /* speed, mdcnfg, mdcas0, mdcas1, mdcas2 clock frequency */ - { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 59.0 MHz */ - { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 73.7 MHz */ - { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 88.5 MHz */ - { 103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff }, /* 103.2 MHz */ - { 118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff }, /* 118.0 MHz */ - { 132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff }, /* 132.7 MHz */ - { 147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff }, /* 147.5 MHz */ - { 162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff }, /* 162.2 MHz */ - { 176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff }, /* 176.9 MHz */ - { 191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff }, /* 191.7 MHz */ - { 206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff }, /* 206.4 MHz */ - { 221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff }, /* 221.2 MHz */ - { 235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1 }, /* 235.9 MHz */ - { 250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3 }, /* 250.7 MHz */ - { 265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3 }, /* 265.4 MHz */ - { 280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87 }, /* 280.2 MHz */ +static struct sa1100_dram_regs sa1100_dram_settings[] = { + /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */ + { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */ + { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */ + { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */ + {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */ + {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */ + {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */ + {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */ + {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */ + {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */ + {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */ + {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */ + {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */ + {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */ + {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */ + {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */ + {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */ { 0, 0, 0, 0, 0 } /* last entry */ }; static void sa1100_update_dram_timings(int current_speed, int new_speed) { - sa1100_dram_regs_t *settings = sa1100_dram_settings; + struct sa1100_dram_regs *settings = sa1100_dram_settings; /* find speed */ while (settings->speed != 0) { - if(new_speed == settings->speed) + if (new_speed == settings->speed) break; - + settings++; } @@ -149,7 +148,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed) /* We're going FASTER, so first relax the memory * timings before changing the core frequency */ - + /* Half the memory access clock */ MDCNFG |= MDCNFG_CDB2; @@ -187,7 +186,7 @@ static int sa1100_target(struct cpufreq_policy *policy, struct cpufreq_freqs freqs; new_ppcr = sa11x0_freq_to_ppcr(target_freq); - switch(relation){ + switch (relation) { case CPUFREQ_RELATION_L: if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max) new_ppcr--; -- cgit v0.10.2 From a404ad1ff593589bdd34c48ebecddada9edbfaf3 Mon Sep 17 00:00:00 2001 From: Marcelo Roberto Jimenez Date: Mon, 18 Oct 2010 22:33:53 +0100 Subject: ARM: 6452/1: Fix checkpatch.pl issues in drivers/rtc/rtc-sa1100.c. This patch fixes checkpatch.pl issues in drivers/rtc/rtc-sa1100.c, which I will later modify. Signed-off-by: Marcelo Roberto Jimenez Signed-off-by: Russell King diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index e4a44b6..e19ed0f 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -39,7 +39,7 @@ #include #endif -#define RTC_DEF_DIVIDER 32768 - 1 +#define RTC_DEF_DIVIDER (32768 - 1) #define RTC_DEF_TRIM 0 static unsigned long rtc_freq = 1024; @@ -61,7 +61,8 @@ static inline int rtc_periodic_alarm(struct rtc_time *tm) * Calculate the next alarm time given the requested alarm time mask * and the current time. */ -static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) +static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, + struct rtc_time *alrm) { unsigned long next_time; unsigned long now_time; @@ -178,7 +179,7 @@ static int sa1100_rtc_read_callback(struct device *dev, int data) * Here we compare (match - OSCR) 8 instead of 0 -- * see comment in pxa_timer_interrupt() for explanation. */ - while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) { + while ((signed long)((osmr1 = OSMR1) - OSCR) <= 8) { data += 0x100; OSSR = OSSR_M1; /* clear match on timer 1 */ OSMR1 = osmr1 + period; @@ -192,19 +193,19 @@ static int sa1100_rtc_open(struct device *dev) int ret; ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED, - "rtc 1Hz", dev); + "rtc 1Hz", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz); goto fail_ui; } ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED, - "rtc Alrm", dev); + "rtc Alrm", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm); goto fail_ai; } ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED, - "rtc timer", dev); + "rtc timer", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1); goto fail_pi; @@ -236,7 +237,7 @@ static void sa1100_rtc_release(struct device *dev) static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { - switch(cmd) { + switch (cmd) { case RTC_AIE_OFF: spin_lock_irq(&sa1100_rtc_lock); RTSR &= ~RTSR_ALE; @@ -364,7 +365,8 @@ static int sa1100_rtc_probe(struct platform_device *pdev) */ if (RTTR == 0) { RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); - dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n"); + dev_warn(&pdev->dev, "warning: " + "initializing default clock divider/trim value\n"); /* The current RTC value probably doesn't make sense either */ RCNR = 0; } @@ -386,7 +388,7 @@ static int sa1100_rtc_remove(struct platform_device *pdev) { struct rtc_device *rtc = platform_get_drvdata(pdev); - if (rtc) + if (rtc) rtc_device_unregister(rtc); return 0; -- cgit v0.10.2 From fd3ee6d3421bc05ce42ee7f48071aee72051af28 Mon Sep 17 00:00:00 2001 From: Marcelo Roberto Jimenez Date: Mon, 18 Oct 2010 22:34:47 +0100 Subject: ARM: 6453/1: sa1100: Print the value of RTSR on /proc/drivers/rtc. This patch adds a line to the output of /proc/drivers/rtc to show the value of the RTSR register. It will be used to demonstrate a nasty initialization bug that will be fixed in the sequence. Signed-off-by: Marcelo Roberto Jimenez Signed-off-by: Russell King diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index e19ed0f..b04c837 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -334,6 +334,7 @@ static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) seq_printf(seq, "periodic_IRQ\t: %s\n", (OIER & OIER_E1) ? "yes" : "no"); seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq); + seq_printf(seq, "RTSR\t\t: 0x%08x\n", (u32)RTSR); return 0; } -- cgit v0.10.2 From 7decaa557a20f48aabef35f817ec16ef563567b0 Mon Sep 17 00:00:00 2001 From: Marcelo Roberto Jimenez Date: Mon, 18 Oct 2010 22:35:54 +0100 Subject: ARM: 6454/1: sa1100: Fix for a nasty initialization bug in the RTSR. This patch fixes a nasty initialization condition on the RTSR register. Sometimes, bit 1 will wake up set, sometimes not. This can be seen by checking the value of the RTSR by typing '$ cat /proc/driver/rtc', which has been provided by the previous patch. If this bit is set, the command '$ cat /dev/rtc0' will lock the system in an endless interrupt routine calling loop. This patch fixes the issue both at sa1100_rtc_probe(), where it avoids a spurious interrupt from happening, and at sa1100_rtc_interrupt(), which is the robust solution, though it does not avoid the first spurious interrupt. Signed-off-by: Marcelo Roberto Jimenez Signed-off-by: Russell King diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index b04c837..b0985f7 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -117,7 +117,23 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) rtsr = RTSR; /* clear interrupt sources */ RTSR = 0; - RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); + /* Fix for a nasty initialization problem the in SA11xx RTSR register. + * See also the comments in sa1100_rtc_probe(). */ + if (rtsr & (RTSR_ALE | RTSR_HZE)) { + /* This is the original code, before there was the if test + * above. This code does not clear interrupts that were not + * enabled. */ + RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); + } else { + /* For some reason, it is possible to enter this routine + * without interruptions enabled, it has been tested with + * several units (Bug in SA11xx chip?). + * + * This situation leads to an infinite "loop" of interrupt + * routine calling and as a result the processor seems to + * lock on its first call to open(). */ + RTSR = RTSR_AL | RTSR_HZ; + } /* clear alarm interrupt if it has occurred */ if (rtsr & RTSR_AL) @@ -382,6 +398,30 @@ static int sa1100_rtc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, rtc); + /* Fix for a nasty initialization problem the in SA11xx RTSR register. + * See also the comments in sa1100_rtc_interrupt(). + * + * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an + * interrupt pending, even though interrupts were never enabled. + * In this case, this bit it must be reset before enabling + * interruptions to avoid a nonexistent interrupt to occur. + * + * In principle, the same problem would apply to bit 0, although it has + * never been observed to happen. + * + * This issue is addressed both here and in sa1100_rtc_interrupt(). + * If the issue is not addressed here, in the times when the processor + * wakes up with the bit set there will be one spurious interrupt. + * + * The issue is also dealt with in sa1100_rtc_interrupt() to be on the + * safe side, once the condition that lead to this strange + * initialization is unknown and could in principle happen during + * normal processing. + * + * Notice that clearing bit 1 and 0 is accomplished by writting ONES to + * the corresponding bits in RTSR. */ + RTSR = RTSR_AL | RTSR_HZ; + return 0; } -- cgit v0.10.2 From 9651b7db59893e796dfdd170485543b9863be9d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 22 Oct 2010 14:49:45 +0200 Subject: ARM: mx3: fix the last users of IMX_NEEDS_DEPRECATED_SYMBOLS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 8a182d0a..7feb6c4 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile @@ -5,8 +5,6 @@ # Object file lists. obj-y := mm.o devices.o cpu.o -CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS -CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o obj-$(CONFIG_ARCH_MX35) += clock-imx35.o obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o @@ -15,7 +13,6 @@ obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o -CFLAGS_mach-mx31_3ds.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \ mx31moboard-marxbot.o mx31moboard-smartbot.o obj-$(CONFIG_MACH_QONG) += mach-qong.o diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index d4da949..74f74f4 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -33,18 +33,18 @@ static struct mxc_gpio_port imx_gpio_ports[] = { { .chip.label = "gpio-0", - .base = IO_ADDRESS(GPIO1_BASE_ADDR), - .irq = MXC_INT_GPIO1, + .base = MX31_IO_ADDRESS(MX31_GPIO1_BASE_ADDR), + .irq = MX3x_INT_GPIO1, .virtual_irq_start = MXC_GPIO_IRQ_START, }, { .chip.label = "gpio-1", - .base = IO_ADDRESS(GPIO2_BASE_ADDR), - .irq = MXC_INT_GPIO2, + .base = MX31_IO_ADDRESS(MX31_GPIO2_BASE_ADDR), + .irq = MX3x_INT_GPIO2, .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, { .chip.label = "gpio-2", - .base = IO_ADDRESS(GPIO3_BASE_ADDR), - .irq = MXC_INT_GPIO3, + .base = MX31_IO_ADDRESS(MX31_GPIO3_BASE_ADDR), + .irq = MX3x_INT_GPIO3, .virtual_irq_start = MXC_GPIO_IRQ_START + 64, } }; @@ -56,8 +56,8 @@ int __init imx3x_register_gpios(void) static struct resource mxc_w1_master_resources[] = { { - .start = OWIRE_BASE_ADDR, - .end = OWIRE_BASE_ADDR + SZ_4K - 1, + .start = MX3x_OWIRE_BASE_ADDR, + .end = MX3x_OWIRE_BASE_ADDR + SZ_4K - 1, .flags = IORESOURCE_MEM, }, }; @@ -110,8 +110,8 @@ struct platform_device mxcsdhc_device1 = { static struct resource rnga_resources[] = { { - .start = RNGA_BASE_ADDR, - .end = RNGA_BASE_ADDR + 0x28, + .start = MX3x_RNGA_BASE_ADDR, + .end = MX3x_RNGA_BASE_ADDR + 0x28, .flags = IORESOURCE_MEM, }, }; @@ -129,20 +129,20 @@ struct platform_device mxc_rnga_device = { /* The resource order is important! */ static struct resource mx3_ipu_rsrc[] = { { - .start = IPU_CTRL_BASE_ADDR, - .end = IPU_CTRL_BASE_ADDR + 0x5F, + .start = MX3x_IPU_CTRL_BASE_ADDR, + .end = MX3x_IPU_CTRL_BASE_ADDR + 0x5F, .flags = IORESOURCE_MEM, }, { - .start = IPU_CTRL_BASE_ADDR + 0x88, - .end = IPU_CTRL_BASE_ADDR + 0xB3, + .start = MX3x_IPU_CTRL_BASE_ADDR + 0x88, + .end = MX3x_IPU_CTRL_BASE_ADDR + 0xB3, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_IPU_SYN, - .end = MXC_INT_IPU_SYN, + .start = MX3x_INT_IPU_SYN, + .end = MX3x_INT_IPU_SYN, .flags = IORESOURCE_IRQ, }, { - .start = MXC_INT_IPU_ERR, - .end = MXC_INT_IPU_ERR, + .start = MX3x_INT_IPU_ERR, + .end = MX3x_INT_IPU_ERR, .flags = IORESOURCE_IRQ, }, }; @@ -156,8 +156,8 @@ struct platform_device mx3_ipu = { static struct resource fb_resources[] = { { - .start = IPU_CTRL_BASE_ADDR + 0xB4, - .end = IPU_CTRL_BASE_ADDR + 0x1BF, + .start = MX3x_IPU_CTRL_BASE_ADDR + 0xB4, + .end = MX3x_IPU_CTRL_BASE_ADDR + 0x1BF, .flags = IORESOURCE_MEM, }, }; @@ -174,8 +174,8 @@ struct platform_device mx3_fb = { static struct resource camera_resources[] = { { - .start = IPU_CTRL_BASE_ADDR + 0x60, - .end = IPU_CTRL_BASE_ADDR + 0x87, + .start = MX3x_IPU_CTRL_BASE_ADDR + 0x60, + .end = MX3x_IPU_CTRL_BASE_ADDR + 0x87, .flags = IORESOURCE_MEM, }, }; @@ -196,8 +196,8 @@ static struct resource otg_resources[] = { .end = MX31_OTG_BASE_ADDR + 0x1ff, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_USB3, - .end = MXC_INT_USB3, + .start = MX31_INT_USB3, + .end = MX31_INT_USB3, .flags = IORESOURCE_IRQ, }, }; @@ -238,8 +238,8 @@ static struct resource mxc_usbh1_resources[] = { .end = MX31_OTG_BASE_ADDR + 0x3ff, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_USB1, - .end = MXC_INT_USB1, + .start = MX31_INT_USB1, + .end = MX31_INT_USB1, .flags = IORESOURCE_IRQ, }, }; @@ -255,6 +255,7 @@ struct platform_device mxc_usbh1 = { .num_resources = ARRAY_SIZE(mxc_usbh1_resources), }; +#ifdef CONFIG_ARCH_MX31 /* USB host 2 */ static u64 usbh2_dmamask = ~(u32)0; @@ -264,8 +265,8 @@ static struct resource mxc_usbh2_resources[] = { .end = MX31_OTG_BASE_ADDR + 0x5ff, .flags = IORESOURCE_MEM, }, { - .start = MXC_INT_USB2, - .end = MXC_INT_USB2, + .start = MX31_INT_USB2, + .end = MX31_INT_USB2, .flags = IORESOURCE_IRQ, }, }; @@ -280,6 +281,7 @@ struct platform_device mxc_usbh2 = { .resource = mxc_usbh2_resources, .num_resources = ARRAY_SIZE(mxc_usbh2_resources), }; +#endif static struct resource imx_wdt_resources[] = { { @@ -343,14 +345,17 @@ static int __init mx3_devices_init(void) #endif #if defined(CONFIG_ARCH_MX35) if (cpu_is_mx35()) { + imx_gpio_ports[0].base = MX35_IO_ADDRESS(MX35_GPIO1_BASE_ADDR), + imx_gpio_ports[1].base = MX35_IO_ADDRESS(MX35_GPIO2_BASE_ADDR), + imx_gpio_ports[2].base = MX35_IO_ADDRESS(MX35_GPIO3_BASE_ADDR), otg_resources[0].start = MX35_OTG_BASE_ADDR; otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; - otg_resources[1].start = MXC_INT_USBOTG; - otg_resources[1].end = MXC_INT_USBOTG; + otg_resources[1].start = MX35_INT_USBOTG; + otg_resources[1].end = MX35_INT_USBOTG; mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400; mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; - mxc_usbh1_resources[1].start = MXC_INT_USBHS; - mxc_usbh1_resources[1].end = MXC_INT_USBHS; + mxc_usbh1_resources[1].start = MX35_INT_USBHS; + mxc_usbh1_resources[1].end = MX35_INT_USBHS; imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR; imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff; } diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index b4ffc53..809ee40 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c @@ -42,29 +42,29 @@ */ static struct map_desc mxc_io_desc[] __initdata = { { - .virtual = X_MEMC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR), - .length = X_MEMC_SIZE, - .type = MT_DEVICE + .virtual = MX3x_X_MEMC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR), + .length = MX3x_X_MEMC_SIZE, + .type = MT_DEVICE }, { - .virtual = AVIC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AVIC_BASE_ADDR), - .length = AVIC_SIZE, - .type = MT_DEVICE_NONSHARED + .virtual = MX3x_AVIC_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR), + .length = MX3x_AVIC_SIZE, + .type = MT_DEVICE_NONSHARED }, { - .virtual = AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), - .length = AIPS1_SIZE, - .type = MT_DEVICE_NONSHARED + .virtual = MX3x_AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR), + .length = MX3x_AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED }, { - .virtual = AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), - .length = AIPS2_SIZE, - .type = MT_DEVICE_NONSHARED + .virtual = MX3x_AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR), + .length = MX3x_AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED }, { - .virtual = SPBA0_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), - .length = SPBA0_SIZE, + .virtual = MX3x_SPBA0_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR), + .length = MX3x_SPBA0_SIZE, .type = MT_DEVICE_NONSHARED }, }; @@ -77,7 +77,7 @@ static struct map_desc mxc_io_desc[] __initdata = { void __init mx31_map_io(void) { mxc_set_cpu_type(MXC_CPU_MX31); - mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); + mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); } @@ -86,8 +86,8 @@ void __init mx31_map_io(void) void __init mx35_map_io(void) { mxc_set_cpu_type(MXC_CPU_MX35); - mxc_iomux_v3_init(IO_ADDRESS(IOMUXC_BASE_ADDR)); - mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR)); + mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); + mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR)); iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); } @@ -97,7 +97,7 @@ int imx3x_register_gpios(void); void __init mx31_init_irq(void) { - mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR)); + mxc_init_irq(MX31_IO_ADDRESS(MX3x_AVIC_BASE_ADDR)); imx3x_register_gpios(); } @@ -129,7 +129,7 @@ static int mxc_init_l2x0(void) pr_err("L2 cache: Cannot fix timing. Trying to continue without\n"); } - l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); + l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096); if (IS_ERR(l2x0_base)) { printk(KERN_ERR "remapping L2 cache area failed with %ld\n", PTR_ERR(l2x0_base)); -- cgit v0.10.2 From f5d7a13b18706c3328c6aac3bf782a13cabf255a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 25 Oct 2010 11:40:30 +0200 Subject: ARM: imx: refactor the io mapping macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes it more assembler friendly and allows it to be used in situation that need an unsigned long and not a pointer. Also the naming is clearer. IOMEM is introduced without IMX_ prefix as it is used this way in more than one ARM subarch and it might become globally available soon. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-mx3/mach-kzm_arm11_01.c b/arch/arm/mach-mx3/mach-kzm_arm11_01.c index 042cd56..a5f3eb2 100644 --- a/arch/arm/mach-mx3/mach-kzm_arm11_01.c +++ b/arch/arm/mach-mx3/mach-kzm_arm11_01.c @@ -41,9 +41,9 @@ #include "devices-imx31.h" #include "devices.h" -#define KZM_ARM11_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX31_CS4) ?: \ - IMX_IO_ADDRESS(x, MX31_CS5) ?: \ +#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \ + IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \ + IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \ MX31_IO_ADDRESS(x)) /* diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index ebadf4a..4bbe506 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -22,10 +22,15 @@ #include -#define IMX_IO_ADDRESS(addr, module) \ - ((void __force __iomem *) \ - (((unsigned long)((addr) - (module ## _BASE_ADDR)) < module ## _SIZE) ?\ - (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)) +#ifdef __ASSEMBLER__ +#define IOMEM(addr) (addr) +#else +#define IOMEM(addr) ((void __force __iomem *)(addr)) +#endif + +#define IMX_IO_P2V_MODULE(addr, module) \ + (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \ + (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0) #ifdef CONFIG_ARCH_MX5 #include diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index 641b246..b41c288 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -73,8 +73,9 @@ #define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR) /* macro to get at IO space when running virtually */ -#define MX1_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX1_IO)) +#define MX1_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX1_IO)) +#define MX1_IO_ADDRESS(x) IOMEM(MX1_IO_P2V(x)) /* fixed interrput numbers */ #define MX1_INT_SOFTINT 0 diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index 8bc5972..aed0277 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -92,10 +92,11 @@ #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ -#define MX21_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX21_AIPI) ?: \ - IMX_IO_ADDRESS(x, MX21_SAHB1) ?: \ - IMX_IO_ADDRESS(x, MX21_X_MEMC)) +#define MX21_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX21_AIPI) ?: \ + IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?: \ + IMX_IO_P2V_MODULE(x, MX21_X_MEMC)) +#define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x)) /* fixed interrupt numbers */ #define MX21_INT_CSPI3 6 diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index cf46a45..6f9e1d4 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -28,10 +28,11 @@ #define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000) #define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) -#define MX25_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX25_AIPS1) ?: \ - IMX_IO_ADDRESS(x, MX25_AIPS2) ?: \ - IMX_IO_ADDRESS(x, MX25_AVIC)) +#define MX25_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?: \ + IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?: \ + IMX_IO_P2V_MODULE(x, MX25_AVIC)) +#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x)) #define MX25_AIPS1_IO_ADDRESS(x) \ (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 2237ba2..c769cc8 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -123,10 +123,11 @@ /* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */ -#define MX27_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX27_AIPI) ?: \ - IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ - IMX_IO_ADDRESS(x, MX27_X_MEMC)) +#define MX27_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX27_AIPI) ?: \ + IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?: \ + IMX_IO_P2V_MODULE(x, MX27_X_MEMC)) +#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) #ifndef __ASSEMBLER__ static inline void mx27_setup_weimcs(size_t cs, diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 61cfe82..eb4a28d 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -121,12 +121,13 @@ #define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 -#define MX31_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX31_AIPS1) ?: \ - IMX_IO_ADDRESS(x, MX31_AIPS2) ?: \ - IMX_IO_ADDRESS(x, MX31_AVIC) ?: \ - IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ - IMX_IO_ADDRESS(x, MX31_SPBA0)) +#define MX31_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX31_AIPS1) ?: \ + IMX_IO_P2V_MODULE(x, MX31_AIPS2) ?: \ + IMX_IO_P2V_MODULE(x, MX31_AVIC) ?: \ + IMX_IO_P2V_MODULE(x, MX31_X_MEMC) ?: \ + IMX_IO_P2V_MODULE(x, MX31_SPBA0)) +#define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) #ifndef __ASSEMBLER__ static inline void mx31_setup_weimcs(size_t cs, diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 6267cff..ce1a24b 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -114,12 +114,13 @@ #define MX35_NFC_BASE_ADDR 0xbb000000 #define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 -#define MX35_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX35_AIPS1) ?: \ - IMX_IO_ADDRESS(x, MX35_AIPS2) ?: \ - IMX_IO_ADDRESS(x, MX35_AVIC) ?: \ - IMX_IO_ADDRESS(x, MX35_X_MEMC) ?: \ - IMX_IO_ADDRESS(x, MX35_SPBA0)) +#define MX35_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX35_AIPS1) ?: \ + IMX_IO_P2V_MODULE(x, MX35_AIPS2) ?: \ + IMX_IO_P2V_MODULE(x, MX35_AVIC) ?: \ + IMX_IO_P2V_MODULE(x, MX35_X_MEMC) ?: \ + IMX_IO_P2V_MODULE(x, MX35_SPBA0)) +#define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x)) /* * Interrupt numbers diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 2af7a10..e93cf5b 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -163,12 +163,13 @@ #define MX51_GPU2D_BASE_ADDR 0xd0000000 #define MX51_TZIC_BASE_ADDR 0xe0000000 -#define MX51_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MX51_IRAM) ?: \ - IMX_IO_ADDRESS(x, MX51_DEBUG) ?: \ - IMX_IO_ADDRESS(x, MX51_SPBA0) ?: \ - IMX_IO_ADDRESS(x, MX51_AIPS1) ?: \ - IMX_IO_ADDRESS(x, MX51_AIPS2)) +#define MX51_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MX51_IRAM) ?: \ + IMX_IO_P2V_MODULE(x, MX51_DEBUG) ?: \ + IMX_IO_P2V_MODULE(x, MX51_SPBA0) ?: \ + IMX_IO_P2V_MODULE(x, MX51_AIPS1) ?: \ + IMX_IO_P2V_MODULE(x, MX51_AIPS2)) +#define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) /* This is currently used in , but should go away */ #define MX51_AIPS1_IO_ADDRESS(x) \ diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h index 0ca3101..49e5e25 100644 --- a/arch/arm/plat-mxc/include/mach/mxc91231.h +++ b/arch/arm/plat-mxc/include/mach/mxc91231.h @@ -187,15 +187,16 @@ * it returns 0. */ -#define MXC91231_IO_ADDRESS(x) ( \ - IMX_IO_ADDRESS(x, MXC91231_L2CC) ?: \ - IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?: \ - IMX_IO_ADDRESS(x, MXC91231_ROMP) ?: \ - IMX_IO_ADDRESS(x, MXC91231_AVIC) ?: \ - IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?: \ - IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?: \ - IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?: \ - IMX_IO_ADDRESS(x, MXC91231_AIPS2)) +#define MXC91231_IO_P2V(x) ( \ + IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?: \ + IMX_IO_P2V_MODULE(x, MXC91231_AIPS2)) +#define MXC91231_IO_ADDRESS(x) IOMEM(MXC91231_IO_P2V(x)) /* * Interrupt numbers -- cgit v0.10.2 From 08ff97b5214143c3bd47add6ec49097cb848120a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 25 Oct 2010 15:38:09 +0200 Subject: ARM: imx: use MXxy_IO_P2V macros to setup static mappings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This makes less code rely on the virtual constants. To further simplify code and reduce the needed boilerplate when defining the static mappings a new helper macro is defined in mach/hardware.h. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 9be92b9..729ae09 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -25,12 +25,7 @@ #include static struct map_desc imx_io_desc[] __initdata = { - { - .virtual = MX1_IO_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX1_IO_BASE_ADDR), - .length = MX1_IO_SIZE, - .type = MT_DEVICE - } + imx_map_entry(MX1, IO, MT_DEVICE), }; void __init mx1_map_io(void) diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 12faeeaa..e728af8 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -35,33 +35,18 @@ static struct map_desc imx21_io_desc[] __initdata = { * - ROM Patch * - and some reserved space */ - { - .virtual = MX21_AIPI_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX21_AIPI_BASE_ADDR), - .length = MX21_AIPI_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX21, AIPI, MT_DEVICE), /* * this fixed mapping covers: * - CSI * - ATA */ - { - .virtual = MX21_SAHB1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX21_SAHB1_BASE_ADDR), - .length = MX21_SAHB1_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX21, SAHB1, MT_DEVICE), /* * this fixed mapping covers: * - EMI */ - { - .virtual = MX21_X_MEMC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX21_X_MEMC_BASE_ADDR), - .length = MX21_X_MEMC_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX21, X_MEMC, MT_DEVICE), }; /* diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index a246229..374e48b 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -35,33 +35,18 @@ static struct map_desc imx27_io_desc[] __initdata = { * - ROM Patch * - and some reserved space */ - { - .virtual = MX27_AIPI_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX27_AIPI_BASE_ADDR), - .length = MX27_AIPI_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX27, AIPI, MT_DEVICE), /* * this fixed mapping covers: * - CSI * - ATA */ - { - .virtual = MX27_SAHB1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX27_SAHB1_BASE_ADDR), - .length = MX27_SAHB1_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX27, SAHB1, MT_DEVICE), /* * this fixed mapping covers: * - EMI */ - { - .virtual = MX27_X_MEMC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX27_X_MEMC_BASE_ADDR), - .length = MX27_X_MEMC_SIZE, - .type = MT_DEVICE - }, + imx_map_entry(MX27, X_MEMC, MT_DEVICE), }; /* diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c index bb67711..11cd335 100644 --- a/arch/arm/mach-mx25/mm.c +++ b/arch/arm/mach-mx25/mm.c @@ -30,25 +30,12 @@ /* * This table defines static virtual address mappings for I/O regions. - * These are the mappings common across all MX3 boards. + * These are the mappings common across all MX25 boards. */ -static struct map_desc mxc_io_desc[] __initdata = { - { - .virtual = MX25_AVIC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX25_AVIC_BASE_ADDR), - .length = MX25_AVIC_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = MX25_AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX25_AIPS1_BASE_ADDR), - .length = MX25_AIPS1_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = MX25_AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX25_AIPS2_BASE_ADDR), - .length = MX25_AIPS2_SIZE, - .type = MT_DEVICE_NONSHARED - }, +static struct map_desc mx25_io_desc[] __initdata = { + imx_map_entry(MX25, AVIC, MT_DEVICE_NONSHARED), + imx_map_entry(MX25, AIPS1, MT_DEVICE_NONSHARED), + imx_map_entry(MX25, AIPS2, MT_DEVICE_NONSHARED), }; /* @@ -62,7 +49,7 @@ void __init mx25_map_io(void) mxc_iomux_v3_init(MX25_IO_ADDRESS(MX25_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mx25_io_desc, ARRAY_SIZE(mx25_io_desc)); } int imx25_register_gpios(void); diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 809ee40..193c18c 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c @@ -36,40 +36,16 @@ * @ingroup Memory */ -/*! - * This table defines static virtual address mappings for I/O regions. - * These are the mappings common across all MX3 boards. - */ -static struct map_desc mxc_io_desc[] __initdata = { - { - .virtual = MX3x_X_MEMC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX3x_X_MEMC_BASE_ADDR), - .length = MX3x_X_MEMC_SIZE, - .type = MT_DEVICE - }, { - .virtual = MX3x_AVIC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX3x_AVIC_BASE_ADDR), - .length = MX3x_AVIC_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = MX3x_AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX3x_AIPS1_BASE_ADDR), - .length = MX3x_AIPS1_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = MX3x_AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX3x_AIPS2_BASE_ADDR), - .length = MX3x_AIPS2_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = MX3x_SPBA0_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX3x_SPBA0_BASE_ADDR), - .length = MX3x_SPBA0_SIZE, - .type = MT_DEVICE_NONSHARED - }, +#ifdef CONFIG_ARCH_MX31 +static struct map_desc mx31_io_desc[] __initdata = { + imx_map_entry(MX31, X_MEMC, MT_DEVICE), + imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), + imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED), + imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED), + imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED), }; -/*! +/* * This function initializes the memory map. It is called during the * system startup to create static physical to virtual memory mappings * for the IO modules. @@ -79,17 +55,26 @@ void __init mx31_map_io(void) mxc_set_cpu_type(MXC_CPU_MX31); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); } +#endif #ifdef CONFIG_ARCH_MX35 +static struct map_desc mx35_io_desc[] __initdata = { + imx_map_entry(MX35, X_MEMC, MT_DEVICE), + imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), +}; + void __init mx35_map_io(void) { mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX3x_WDOG_BASE_ADDR)); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); } #endif diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index bc3f30d..01dff26 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c @@ -23,33 +23,12 @@ /* * Define the MX51 memory map. */ -static struct map_desc mxc_io_desc[] __initdata = { - { - .virtual = MX51_IRAM_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX51_IRAM_BASE_ADDR), - .length = MX51_IRAM_SIZE, - .type = MT_DEVICE - }, { - .virtual = MX51_DEBUG_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR), - .length = MX51_DEBUG_SIZE, - .type = MT_DEVICE - }, { - .virtual = MX51_AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR), - .length = MX51_AIPS1_SIZE, - .type = MT_DEVICE - }, { - .virtual = MX51_SPBA0_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX51_SPBA0_BASE_ADDR), - .length = MX51_SPBA0_SIZE, - .type = MT_DEVICE - }, { - .virtual = MX51_AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR), - .length = MX51_AIPS2_SIZE, - .type = MT_DEVICE - }, +static struct map_desc mx51_io_desc[] __initdata = { + imx_map_entry(MX51, IRAM, MT_DEVICE), + imx_map_entry(MX51, DEBUG, MT_DEVICE), + imx_map_entry(MX51, AIPS1, MT_DEVICE), + imx_map_entry(MX51, SPBA0, MT_DEVICE), + imx_map_entry(MX51, AIPS2, MT_DEVICE), }; /* @@ -62,7 +41,7 @@ void __init mx51_map_io(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR)); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc)); } int imx51_register_gpios(void); diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c index aeccfd75..7652c30 100644 --- a/arch/arm/mach-mxc91231/mm.c +++ b/arch/arm/mach-mxc91231/mm.c @@ -27,48 +27,15 @@ /* * This structure defines the MXC memory map. */ -static struct map_desc mxc_io_desc[] __initdata = { - { - .virtual = MXC91231_L2CC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_L2CC_BASE_ADDR), - .length = MXC91231_L2CC_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_X_MEMC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR), - .length = MXC91231_X_MEMC_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_ROMP_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_ROMP_BASE_ADDR), - .length = MXC91231_ROMP_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_AVIC_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_AVIC_BASE_ADDR), - .length = MXC91231_AVIC_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR), - .length = MXC91231_AIPS1_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_SPBA0_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR), - .length = MXC91231_SPBA0_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_SPBA1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR), - .length = MXC91231_SPBA1_SIZE, - .type = MT_DEVICE, - }, { - .virtual = MXC91231_AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR), - .length = MXC91231_AIPS2_SIZE, - .type = MT_DEVICE, - }, +static struct map_desc mxc91231_io_desc[] __initdata = { + imx_map_entry(MXC91231, L2CC, MT_DEVICE), + imx_map_entry(MXC91231, X_MEMC, MT_DEVICE), + imx_map_entry(MXC91231, ROMP, MT_DEVICE), + imx_map_entry(MXC91231, AVIC, MT_DEVICE), + imx_map_entry(MXC91231, AIPS1, MT_DEVICE), + imx_map_entry(MXC91231, SPBA0, MT_DEVICE), + imx_map_entry(MXC91231, SPBA1, MT_DEVICE), + imx_map_entry(MXC91231, AIPS2, MT_DEVICE), }; /* @@ -80,7 +47,7 @@ void __init mxc91231_map_io(void) { mxc_set_cpu_type(MXC_CPU_MXC91231); - iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); + iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc)); } int mxc91231_register_gpios(void); diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 4bbe506..409cec6 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -66,4 +66,11 @@ #include +#define imx_map_entry(soc, name, _type) { \ + .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ + .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ + .length = soc ## _ ## name ## _SIZE, \ + .type = _type, \ +} + #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ -- cgit v0.10.2 From cf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 25 Oct 2010 15:54:58 +0200 Subject: ARM: imx: remove last explicit users of virtual base address defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This allows changing the mapping without the need to adapt all users. While at it remove some unneeded casts to void __iomem *, this is already taken care for in the IO_ADDRESS macros Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index fba5047..e69e46e 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -159,22 +159,22 @@ struct platform_device imx_usb_device = { static struct mxc_gpio_port imx_gpio_ports[] = { { .chip.label = "gpio-0", - .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR), + .base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR), .irq = MX1_GPIO_INT_PORTA, .virtual_irq_start = MXC_GPIO_IRQ_START, }, { .chip.label = "gpio-1", - .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100), + .base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100), .irq = MX1_GPIO_INT_PORTB, .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, { .chip.label = "gpio-2", - .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200), + .base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200), .irq = MX1_GPIO_INT_PORTC, .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, { .chip.label = "gpio-3", - .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300), + .base = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300), .irq = MX1_GPIO_INT_PORTD, .virtual_irq_start = MXC_GPIO_IRQ_START + 96, } diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 1d0eb3e..92eb1a9 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c @@ -182,22 +182,22 @@ struct platform_device mxc_pwm_device3 = { static struct mxc_gpio_port imx_gpio_ports[] = { { .chip.label = "gpio-0", - .base = (void __iomem *)MX25_GPIO1_BASE_ADDR_VIRT, + .base = MX25_IO_ADDRESS(MX25_GPIO1_BASE_ADDR), .irq = 52, .virtual_irq_start = MXC_GPIO_IRQ_START, }, { .chip.label = "gpio-1", - .base = (void __iomem *)MX25_GPIO2_BASE_ADDR_VIRT, + .base = MX25_IO_ADDRESS(MX25_GPIO2_BASE_ADDR), .irq = 51, .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, { .chip.label = "gpio-2", - .base = (void __iomem *)MX25_GPIO3_BASE_ADDR_VIRT, + .base = MX25_IO_ADDRESS(MX25_GPIO3_BASE_ADDR), .irq = 16, .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, { .chip.label = "gpio-3", - .base = (void __iomem *)MX25_GPIO4_BASE_ADDR_VIRT, + .base = MX25_IO_ADDRESS(MX25_GPIO4_BASE_ADDR), .irq = 23, .virtual_irq_start = MXC_GPIO_IRQ_START + 96, } diff --git a/arch/arm/mach-mx25/mm.c b/arch/arm/mach-mx25/mm.c index 11cd335..2edec6c 100644 --- a/arch/arm/mach-mx25/mm.c +++ b/arch/arm/mach-mx25/mm.c @@ -56,7 +56,7 @@ int imx25_register_gpios(void); void __init mx25_init_irq(void) { - mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT); + mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); imx25_register_gpios(); } diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 6f9e1d4..08b5a3a 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -21,13 +21,12 @@ #define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) #define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000) +#define MX25_GPIO4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x9c000) +#define MX25_GPIO3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa4000) +#define MX25_GPIO1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xcc000) +#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000) #define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) -#define MX25_GPIO1_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000) -#define MX25_GPIO2_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000) -#define MX25_GPIO3_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000) -#define MX25_GPIO4_BASE_ADDR_VIRT (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000) - #define MX25_IO_P2V(x) ( \ IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?: \ IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?: \ -- cgit v0.10.2 From a99631489bbd1b4647b82d0822b6a3942e2dd731 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Mon, 25 Oct 2010 15:44:25 +0200 Subject: ARM: imx: change static io mapping to use a function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 409cec6..dde777c 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -32,6 +32,73 @@ (((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \ (addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0) +/* + * This is rather complicated for humans and ugly to verify, but for a machine + * it's OK. Still more as it is usually only applied to constants. The upsides + * on using this approach are: + * + * - same mapping on all i.MX machines + * - works for assembler, too + * - no need to nurture #defines for virtual addresses + * + * The downside it, it's hard to verify (but I have a script for that). + * + * Obviously this needs to be injective for each SoC. In general it maps the + * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff] + * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there). + * + * It applies the following mappings for the different SoCs: + * + * mx1: + * IO 0x00200000+0x100000 -> 0xf4000000+0x100000 + * mx21: + * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 + * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 + * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000 + * mx25: + * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 + * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 + * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 + * mx27: + * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000 + * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000 + * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000 + * mx31: + * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 + * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 + * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 + * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 + * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 + * mx35: + * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 + * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 + * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000 + * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 + * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 + * mx51: + * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000 + * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000 + * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000 + * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000 + * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000 + * mxc91231: + * L2CC 0x30000000+0x010000 -> 0xf4400000+0x010000 + * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000 + * ROMP 0x60000000+0x010000 -> 0xf5000000+0x010000 + * AVIC 0x68000000+0x010000 -> 0xf5800000+0x010000 + * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000 + * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000 + * SPBA1 0x52000000+0x100000 -> 0xf5600000+0x100000 + * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000 + */ +#define IMX_IO_P2V(x) ( \ + 0xf4000000 + \ + (((x) & 0x50000000) >> 6) + \ + (((x) & 0x0b000000) >> 4) + \ + (((x) & 0x000fffff))) + +#define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) + #ifdef CONFIG_ARCH_MX5 #include #endif diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index b41c288..b786ae7 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -19,7 +19,6 @@ */ #define MX1_IO_BASE_ADDR 0x00200000 #define MX1_IO_SIZE SZ_1M -#define MX1_IO_BASE_ADDR_VIRT VMALLOC_END #define MX1_CS0_PHYS 0x10000000 #define MX1_CS0_SIZE 0x02000000 @@ -73,8 +72,7 @@ #define MX1_CSI_BASE_ADDR (0x24000 + MX1_IO_BASE_ADDR) /* macro to get at IO space when running virtually */ -#define MX1_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX1_IO)) +#define MX1_IO_P2V(x) IMX_IO_P2V(x) #define MX1_IO_ADDRESS(x) IOMEM(MX1_IO_P2V(x)) /* fixed interrput numbers */ @@ -171,7 +169,6 @@ /* these should go away */ #define IMX_IO_PHYS MX1_IO_BASE_ADDR #define IMX_IO_SIZE MX1_IO_SIZE -#define IMX_IO_BASE MX1_IO_BASE_ADDR_VIRT #define IMX_CS0_PHYS MX1_CS0_PHYS #define IMX_CS0_SIZE MX1_CS0_SIZE #define IMX_CS1_PHYS MX1_CS1_PHYS diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index aed0277..b417e32 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -26,7 +26,6 @@ #define __MACH_MX21_H__ #define MX21_AIPI_BASE_ADDR 0x10000000 -#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000 #define MX21_AIPI_SIZE SZ_1M #define MX21_DMA_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x01000) #define MX21_WDOG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x02000) @@ -64,7 +63,6 @@ #define MX21_AVIC_BASE_ADDR 0x10040000 #define MX21_SAHB1_BASE_ADDR 0x80000000 -#define MX21_SAHB1_BASE_ADDR_VIRT 0xf4100000 #define MX21_SAHB1_SIZE SZ_1M #define MX21_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) @@ -82,7 +80,6 @@ /* NAND, SDRAM, WEIM etc controllers */ #define MX21_X_MEMC_BASE_ADDR 0xdf000000 -#define MX21_X_MEMC_BASE_ADDR_VIRT 0xf4200000 #define MX21_X_MEMC_SIZE SZ_256K #define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000) @@ -92,10 +89,7 @@ #define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */ -#define MX21_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX21_AIPI) ?: \ - IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?: \ - IMX_IO_P2V_MODULE(x, MX21_X_MEMC)) +#define MX21_IO_P2V(x) IMX_IO_P2V(x) #define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x)) /* fixed interrupt numbers */ @@ -197,7 +191,6 @@ #define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR #define CS5_BASE_ADDR MX21_CS5_BASE_ADDR #define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR -#define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT #define X_MEMC_SIZE MX21_X_MEMC_SIZE #define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR #define EIM_BASE_ADDR MX21_EIM_BASE_ADDR diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 08b5a3a..aac6a9c 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -2,13 +2,11 @@ #define __MACH_MX25_H__ #define MX25_AIPS1_BASE_ADDR 0x43f00000 -#define MX25_AIPS1_BASE_ADDR_VIRT 0xfc000000 +#define MX25_AIPS1_BASE_ADDR_VIRT 0xf5300000 #define MX25_AIPS1_SIZE SZ_1M #define MX25_AIPS2_BASE_ADDR 0x53f00000 -#define MX25_AIPS2_BASE_ADDR_VIRT 0xfc200000 #define MX25_AIPS2_SIZE SZ_1M #define MX25_AVIC_BASE_ADDR 0x68000000 -#define MX25_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX25_AVIC_SIZE SZ_1M #define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000) @@ -27,12 +25,6 @@ #define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000) #define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) -#define MX25_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX25_AIPS1) ?: \ - IMX_IO_P2V_MODULE(x, MX25_AIPS2) ?: \ - IMX_IO_P2V_MODULE(x, MX25_AVIC)) -#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x)) - #define MX25_AIPS1_IO_ADDRESS(x) \ (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) @@ -58,6 +50,9 @@ #define MX25_OTG_BASE_ADDR 0x53ff4000 #define MX25_CSI_BASE_ADDR 0x53ff8000 +#define MX25_IO_P2V(x) IMX_IO_P2V(x) +#define MX25_IO_ADDRESS(x) IOMEM(MX25_IO_P2V(x)) + #define MX25_INT_CSPI3 0 #define MX25_INT_I2C1 3 #define MX25_INT_I2C2 4 diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index c769cc8..e817289 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -29,7 +29,6 @@ #endif #define MX27_AIPI_BASE_ADDR 0x10000000 -#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000 #define MX27_AIPI_SIZE SZ_1M #define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000) #define MX27_WDOG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x02000) @@ -87,7 +86,6 @@ #define MX27_ROMP_BASE_ADDR 0x10041000 #define MX27_SAHB1_BASE_ADDR 0x80000000 -#define MX27_SAHB1_BASE_ADDR_VIRT 0xf4100000 #define MX27_SAHB1_SIZE SZ_1M #define MX27_CSI_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x0000) #define MX27_ATA_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x1000) @@ -105,7 +103,6 @@ /* NAND, SDRAM, WEIM, M3IF, EMI controllers */ #define MX27_X_MEMC_BASE_ADDR 0xd8000000 -#define MX27_X_MEMC_BASE_ADDR_VIRT 0xf4200000 #define MX27_X_MEMC_SIZE SZ_1M #define MX27_NFC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR) #define MX27_SDRAMC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x1000) @@ -123,10 +120,7 @@ /* IRAM */ #define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */ -#define MX27_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX27_AIPI) ?: \ - IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?: \ - IMX_IO_P2V_MODULE(x, MX27_X_MEMC)) +#define MX27_IO_P2V(x) IMX_IO_P2V(x) #define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x)) #ifndef __ASSEMBLER__ @@ -280,7 +274,6 @@ extern int mx27_revision(void); #define CS4_BASE_ADDR MX27_CS4_BASE_ADDR #define CS5_BASE_ADDR MX27_CS5_BASE_ADDR #define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR -#define X_MEMC_BASE_ADDR_VIRT MX27_X_MEMC_BASE_ADDR_VIRT #define X_MEMC_SIZE MX27_X_MEMC_SIZE #define NFC_BASE_ADDR MX27_NFC_BASE_ADDR #define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h index afb895a..46eeeb2 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/plat-mxc/include/mach/mx2x.h @@ -27,7 +27,7 @@ /* Register offsets */ #define MX2x_AIPI_BASE_ADDR 0x10000000 -#define MX2x_AIPI_BASE_ADDR_VIRT 0xf4000000 +#define MX2x_AIPI_BASE_ADDR_VIRT 0xf4400000 #define MX2x_AIPI_SIZE SZ_1M #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) @@ -65,43 +65,12 @@ #define MX2x_AVIC_BASE_ADDR 0x10040000 #define MX2x_SAHB1_BASE_ADDR 0x80000000 -#define MX2x_SAHB1_BASE_ADDR_VIRT 0xf4100000 #define MX2x_SAHB1_SIZE SZ_1M #define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) -/* - * This macro defines the physical to virtual address mapping for all the - * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0xDEADBEEF - */ -#define IO_ADDRESS(x) \ - (void __force __iomem *) \ - (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ - AIPI_IO_ADDRESS(x) : \ - ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ - SAHB1_IO_ADDRESS(x) : \ - ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \ - X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF) - -/* define the address mapping macros: in physical address order */ -#define AIPI_IO_ADDRESS(x) \ +#define AIPI_IO_ADDRESS(x) \ (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT) -#define AVIC_IO_ADDRESS(x) AIPI_IO_ADDRESS(x) - -#define SAHB1_IO_ADDRESS(x) \ - (((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT) - -#define CS4_IO_ADDRESS(x) \ - (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) - -#define X_MEMC_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -#define PCMCIA_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - /* fixed interrupt numbers */ #define MX2x_INT_CSPI3 6 #define MX2x_INT_GPIO 8 @@ -215,7 +184,6 @@ #define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR #define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR #define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR -#define SAHB1_BASE_ADDR_VIRT MX2x_SAHB1_BASE_ADDR_VIRT #define SAHB1_SIZE MX2x_SAHB1_SIZE #define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR #define MXC_INT_CSPI3 MX2x_INT_CSPI3 diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index eb4a28d..9ed9975 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -15,7 +15,6 @@ #define MX31_L2CC_SIZE SZ_1M #define MX31_AIPS1_BASE_ADDR 0x43f00000 -#define MX31_AIPS1_BASE_ADDR_VIRT 0xfc000000 #define MX31_AIPS1_SIZE SZ_1M #define MX31_MAX_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x04000) #define MX31_EVTMON_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0x08000) @@ -41,7 +40,6 @@ #define MX31_ECT_IP2_BASE_ADDR (MX31_AIPS1_BASE_ADDR + 0xbc000) #define MX31_SPBA0_BASE_ADDR 0x50000000 -#define MX31_SPBA0_BASE_ADDR_VIRT 0xfc100000 #define MX31_SPBA0_SIZE SZ_1M #define MX31_MMC_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000) #define MX31_MMC_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000) @@ -55,7 +53,6 @@ #define MX31_SPBA_CTRL_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x3c000) #define MX31_AIPS2_BASE_ADDR 0x53f00000 -#define MX31_AIPS2_BASE_ADDR_VIRT 0xfc200000 #define MX31_AIPS2_SIZE SZ_1M #define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000) #define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000) @@ -84,7 +81,6 @@ #define MX31_ROMP_SIZE SZ_1M #define MX31_AVIC_BASE_ADDR 0x68000000 -#define MX31_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX31_AVIC_SIZE SZ_1M #define MX31_IPU_MEM_BASE_ADDR 0x70000000 @@ -97,15 +93,14 @@ #define MX31_CS3_BASE_ADDR 0xb2000000 #define MX31_CS4_BASE_ADDR 0xb4000000 -#define MX31_CS4_BASE_ADDR_VIRT 0xf4000000 +#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000 #define MX31_CS4_SIZE SZ_32M #define MX31_CS5_BASE_ADDR 0xb6000000 -#define MX31_CS5_BASE_ADDR_VIRT 0xf6000000 +#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000 #define MX31_CS5_SIZE SZ_32M #define MX31_X_MEMC_BASE_ADDR 0xb8000000 -#define MX31_X_MEMC_BASE_ADDR_VIRT 0xfc320000 #define MX31_X_MEMC_SIZE SZ_64K #define MX31_NFC_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x0000) #define MX31_ESDCTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x1000) @@ -121,12 +116,7 @@ #define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 -#define MX31_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX31_AIPS1) ?: \ - IMX_IO_P2V_MODULE(x, MX31_AIPS2) ?: \ - IMX_IO_P2V_MODULE(x, MX31_AVIC) ?: \ - IMX_IO_P2V_MODULE(x, MX31_X_MEMC) ?: \ - IMX_IO_P2V_MODULE(x, MX31_SPBA0)) +#define MX31_IO_P2V(x) IMX_IO_P2V(x) #define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) #ifndef __ASSEMBLER__ diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index ce1a24b..3678ca3 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -11,7 +11,6 @@ #define MX35_L2CC_SIZE SZ_1M #define MX35_AIPS1_BASE_ADDR 0x43f00000 -#define MX35_AIPS1_BASE_ADDR_VIRT 0xfc000000 #define MX35_AIPS1_SIZE SZ_1M #define MX35_MAX_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x04000) #define MX35_EVTMON_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x08000) @@ -33,7 +32,6 @@ #define MX35_ECT_IP2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0xbc000) #define MX35_SPBA0_BASE_ADDR 0x50000000 -#define MX35_SPBA0_BASE_ADDR_VIRT 0xfc100000 #define MX35_SPBA0_SIZE SZ_1M #define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000) #define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000) @@ -44,7 +42,6 @@ #define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000) #define MX35_AIPS2_BASE_ADDR 0x53f00000 -#define MX35_AIPS2_BASE_ADDR_VIRT 0xfc200000 #define MX35_AIPS2_SIZE SZ_1M #define MX35_CCM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x80000) #define MX35_GPT1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0x90000) @@ -72,11 +69,9 @@ #define MX35_OTG_BASE_ADDR 0x53ff4000 #define MX35_ROMP_BASE_ADDR 0x60000000 -#define MX35_ROMP_BASE_ADDR_VIRT 0xfc500000 #define MX35_ROMP_SIZE SZ_1M #define MX35_AVIC_BASE_ADDR 0x68000000 -#define MX35_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX35_AVIC_SIZE SZ_1M /* @@ -92,18 +87,17 @@ #define MX35_CS3_BASE_ADDR 0xb2000000 #define MX35_CS4_BASE_ADDR 0xb4000000 -#define MX35_CS4_BASE_ADDR_VIRT 0xf4000000 +#define MX35_CS4_BASE_ADDR_VIRT 0xf6000000 #define MX35_CS4_SIZE SZ_32M #define MX35_CS5_BASE_ADDR 0xb6000000 -#define MX35_CS5_BASE_ADDR_VIRT 0xf6000000 +#define MX35_CS5_BASE_ADDR_VIRT 0xf8000000 #define MX35_CS5_SIZE SZ_32M /* * NAND, SDRAM, WEIM, M3IF, EMI controllers */ #define MX35_X_MEMC_BASE_ADDR 0xb8000000 -#define MX35_X_MEMC_BASE_ADDR_VIRT 0xfc320000 #define MX35_X_MEMC_SIZE SZ_64K #define MX35_ESDCTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x1000) #define MX35_WEIM_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x2000) @@ -114,12 +108,7 @@ #define MX35_NFC_BASE_ADDR 0xbb000000 #define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 -#define MX35_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX35_AIPS1) ?: \ - IMX_IO_P2V_MODULE(x, MX35_AIPS2) ?: \ - IMX_IO_P2V_MODULE(x, MX35_AVIC) ?: \ - IMX_IO_P2V_MODULE(x, MX35_X_MEMC) ?: \ - IMX_IO_P2V_MODULE(x, MX35_SPBA0)) +#define MX35_IO_P2V(x) IMX_IO_P2V(x) #define MX35_IO_ADDRESS(x) IOMEM(MX35_IO_P2V(x)) /* diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index d1bd26d..da22cd4 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -44,7 +44,7 @@ * AIPS 1 */ #define MX3x_AIPS1_BASE_ADDR 0x43f00000 -#define MX3x_AIPS1_BASE_ADDR_VIRT 0xfc000000 +#define MX3x_AIPS1_BASE_ADDR_VIRT 0xf5300000 #define MX3x_AIPS1_SIZE SZ_1M #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) @@ -69,7 +69,6 @@ * SPBA global module enabled #0 */ #define MX3x_SPBA0_BASE_ADDR 0x50000000 -#define MX3x_SPBA0_BASE_ADDR_VIRT 0xfc100000 #define MX3x_SPBA0_SIZE SZ_1M #define MX3x_UART3_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x0c000) #define MX3x_CSPI2_BASE_ADDR (MX3x_SPBA0_BASE_ADDR + 0x10000) @@ -82,7 +81,6 @@ * AIPS 2 */ #define MX3x_AIPS2_BASE_ADDR 0x53f00000 -#define MX3x_AIPS2_BASE_ADDR_VIRT 0xfc200000 #define MX3x_AIPS2_SIZE SZ_1M #define MX3x_CCM_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x80000) #define MX3x_GPT1_BASE_ADDR (MX3x_AIPS2_BASE_ADDR + 0x90000) @@ -105,11 +103,9 @@ * ROMP and AVIC */ #define MX3x_ROMP_BASE_ADDR 0x60000000 -#define MX3x_ROMP_BASE_ADDR_VIRT 0xfc500000 #define MX3x_ROMP_SIZE SZ_1M #define MX3x_AVIC_BASE_ADDR 0x68000000 -#define MX3x_AVIC_BASE_ADDR_VIRT 0xfc400000 #define MX3x_AVIC_SIZE SZ_1M /* @@ -125,18 +121,17 @@ #define MX3x_CS3_BASE_ADDR 0xb2000000 #define MX3x_CS4_BASE_ADDR 0xb4000000 -#define MX3x_CS4_BASE_ADDR_VIRT 0xf4000000 +#define MX3x_CS4_BASE_ADDR_VIRT 0xf6000000 #define MX3x_CS4_SIZE SZ_32M #define MX3x_CS5_BASE_ADDR 0xb6000000 -#define MX3x_CS5_BASE_ADDR_VIRT 0xf6000000 +#define MX3x_CS5_BASE_ADDR_VIRT 0xf8000000 #define MX3x_CS5_SIZE SZ_32M /* * NAND, SDRAM, WEIM, M3IF, EMI controllers */ #define MX3x_X_MEMC_BASE_ADDR 0xb8000000 -#define MX3x_X_MEMC_BASE_ADDR_VIRT 0xfc320000 #define MX3x_X_MEMC_SIZE SZ_64K #define MX3x_ESDCTL_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x1000) #define MX3x_WEIM_BASE_ADDR (MX3x_X_MEMC_BASE_ADDR + 0x2000) @@ -146,56 +141,9 @@ #define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000 -/*! - * This macro defines the physical to virtual address mapping for all the - * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0xDEADBEEF - */ -#define IO_ADDRESS(x) \ - (void __force __iomem *) \ - (((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ - ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\ - ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\ - ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\ - ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\ - ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\ - ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ - 0xDEADBEEF) - -/* - * define the address mapping macros: in physical address order - */ -#define L2CC_IO_ADDRESS(x) \ - (((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT) - #define AIPS1_IO_ADDRESS(x) \ (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) -#define SPBA0_IO_ADDRESS(x) \ - (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) - -#define AIPS2_IO_ADDRESS(x) \ - (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) - -#define ROMP_IO_ADDRESS(x) \ - (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT) - -#define AVIC_IO_ADDRESS(x) \ - (((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT) - -#define CS4_IO_ADDRESS(x) \ - (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) - -#define CS5_IO_ADDRESS(x) \ - (((x) - CS5_BASE_ADDR) + CS5_BASE_ADDR_VIRT) - -#define X_MEMC_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -#define PCMCIA_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - /* * Interrupt numbers */ @@ -303,7 +251,6 @@ static inline int mx35_revision(void) #define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR #define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR #define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR -#define SPBA0_BASE_ADDR_VIRT MX3x_SPBA0_BASE_ADDR_VIRT #define SPBA0_SIZE MX3x_SPBA0_SIZE #define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR #define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR @@ -312,7 +259,6 @@ static inline int mx35_revision(void) #define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR #define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR #define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR -#define AIPS2_BASE_ADDR_VIRT MX3x_AIPS2_BASE_ADDR_VIRT #define AIPS2_SIZE MX3x_AIPS2_SIZE #define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR #define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR @@ -331,10 +277,8 @@ static inline int mx35_revision(void) #define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR #define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR #define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR -#define ROMP_BASE_ADDR_VIRT MX3x_ROMP_BASE_ADDR_VIRT #define ROMP_SIZE MX3x_ROMP_SIZE #define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR -#define AVIC_BASE_ADDR_VIRT MX3x_AVIC_BASE_ADDR_VIRT #define AVIC_SIZE MX3x_AVIC_SIZE #define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR #define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR @@ -344,13 +288,10 @@ static inline int mx35_revision(void) #define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR #define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR #define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR -#define CS4_BASE_ADDR_VIRT MX3x_CS4_BASE_ADDR_VIRT #define CS4_SIZE MX3x_CS4_SIZE #define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR -#define CS5_BASE_ADDR_VIRT MX3x_CS5_BASE_ADDR_VIRT #define CS5_SIZE MX3x_CS5_SIZE #define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR -#define X_MEMC_BASE_ADDR_VIRT MX3x_X_MEMC_BASE_ADDR_VIRT #define X_MEMC_SIZE MX3x_X_MEMC_SIZE #define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR #define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index e93cf5b..1b8715f 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -2,31 +2,6 @@ #define __MACH_MX51_H__ /* - * MX51 memory map: - * - * - * Virt Phys Size What - * --------------------------------------------------------------------------- - * fa3e0000 1ffe0000 128K IRAM (SCCv2 RAM) - * 30000000 256M GPU - * 40000000 512M IPU - * fa200000 60000000 1M DEBUG - * fb100000 70000000 1M SPBA 0 - * fb000000 73f00000 1M AIPS 1 - * fb200000 83f00000 1M AIPS 2 - * 8fffc000 16K TZIC (interrupt controller) - * 90000000 256M CSD0 SDRAM/DDR - * a0000000 256M CSD1 SDRAM/DDR - * b0000000 128M CS0 Flash - * b8000000 128M CS1 Flash - * c0000000 128M CS2 Flash - * c8000000 64M CS3 Flash - * cc000000 32M CS4 SRAM - * ce000000 32M CS5 SRAM - * cfff0000 64K NFC (NAND Flash AXI) - */ - -/* * IROM */ #define MX51_IROM_BASE_ADDR 0x0 @@ -36,7 +11,6 @@ * IRAM */ #define MX51_IRAM_BASE_ADDR 0x1ffe0000 /* internal ram */ -#define MX51_IRAM_BASE_ADDR_VIRT 0xfa3e0000 #define MX51_IRAM_PARTITIONS 16 #define MX51_IRAM_SIZE (MX51_IRAM_PARTITIONS * SZ_8K) /* 128KB */ @@ -45,7 +19,6 @@ #define MX51_IPU_CTRL_BASE_ADDR 0x40000000 #define MX51_DEBUG_BASE_ADDR 0x60000000 -#define MX51_DEBUG_BASE_ADDR_VIRT 0xfa200000 #define MX51_DEBUG_SIZE SZ_1M #define MX51_ETB_BASE_ADDR (MX51_DEBUG_BASE_ADDR + 0x01000) @@ -61,7 +34,6 @@ * SPBA global module enabled #0 */ #define MX51_SPBA0_BASE_ADDR 0x70000000 -#define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000 #define MX51_SPBA0_SIZE SZ_1M #define MX51_ESDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) @@ -81,7 +53,7 @@ * AIPS 1 */ #define MX51_AIPS1_BASE_ADDR 0x73f00000 -#define MX51_AIPS1_BASE_ADDR_VIRT 0xfb000000 +#define MX51_AIPS1_BASE_ADDR_VIRT 0xf5700000 #define MX51_AIPS1_SIZE SZ_1M #define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000) @@ -109,7 +81,6 @@ * AIPS 2 */ #define MX51_AIPS2_BASE_ADDR 0x83f00000 -#define MX51_AIPS2_BASE_ADDR_VIRT 0xfb200000 #define MX51_AIPS2_SIZE SZ_1M #define MX51_PLL1_BASE_ADDR (MX51_AIPS2_BASE_ADDR + 0x80000) @@ -163,12 +134,7 @@ #define MX51_GPU2D_BASE_ADDR 0xd0000000 #define MX51_TZIC_BASE_ADDR 0xe0000000 -#define MX51_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MX51_IRAM) ?: \ - IMX_IO_P2V_MODULE(x, MX51_DEBUG) ?: \ - IMX_IO_P2V_MODULE(x, MX51_SPBA0) ?: \ - IMX_IO_P2V_MODULE(x, MX51_AIPS1) ?: \ - IMX_IO_P2V_MODULE(x, MX51_AIPS2)) +#define MX51_IO_P2V(x) IMX_IO_P2V(x) #define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) /* This is currently used in , but should go away */ diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h index 49e5e25..765190f 100644 --- a/arch/arm/plat-mxc/include/mach/mxc91231.h +++ b/arch/arm/plat-mxc/include/mach/mxc91231.h @@ -21,14 +21,12 @@ * L2CC */ #define MXC91231_L2CC_BASE_ADDR 0x30000000 -#define MXC91231_L2CC_BASE_ADDR_VIRT 0xF9000000 #define MXC91231_L2CC_SIZE SZ_64K /* * AIPS 1 */ #define MXC91231_AIPS1_BASE_ADDR 0x43F00000 -#define MXC91231_AIPS1_BASE_ADDR_VIRT 0xFC000000 #define MXC91231_AIPS1_SIZE SZ_1M #define MXC91231_AIPS1_CTRL_BASE_ADDR MXC91231_AIPS1_BASE_ADDR @@ -53,7 +51,6 @@ * AIPS 2 */ #define MXC91231_AIPS2_BASE_ADDR 0x53F00000 -#define MXC91231_AIPS2_BASE_ADDR_VIRT 0xFC100000 #define MXC91231_AIPS2_SIZE SZ_1M #define MXC91231_GEMK_BASE_ADDR (MXC91231_AIPS2_BASE_ADDR + 0x8C000) @@ -79,7 +76,6 @@ * SPBA global module 0 */ #define MXC91231_SPBA0_BASE_ADDR 0x50000000 -#define MXC91231_SPBA0_BASE_ADDR_VIRT 0xFC200000 #define MXC91231_SPBA0_SIZE SZ_1M #define MXC91231_MMC_SDHC1_BASE_ADDR (MXC91231_SPBA0_BASE_ADDR + 0x04000) @@ -109,7 +105,6 @@ * SPBA global module 1 */ #define MXC91231_SPBA1_BASE_ADDR 0x52000000 -#define MXC91231_SPBA1_BASE_ADDR_VIRT 0xFC300000 #define MXC91231_SPBA1_SIZE SZ_1M #define MXC91231_MQSPI_BASE_ADDR (MXC91231_SPBA1_BASE_ADDR + 0x34000) @@ -144,18 +139,15 @@ * ROMP and AVIC */ #define MXC91231_ROMP_BASE_ADDR 0x60000000 -#define MXC91231_ROMP_BASE_ADDR_VIRT 0xFC400000 #define MXC91231_ROMP_SIZE SZ_64K #define MXC91231_AVIC_BASE_ADDR 0x68000000 -#define MXC91231_AVIC_BASE_ADDR_VIRT 0xFC410000 #define MXC91231_AVIC_SIZE SZ_64K /* * NAND, SDRAM, WEIM, M3IF, EMI controllers */ #define MXC91231_X_MEMC_BASE_ADDR 0xB8000000 -#define MXC91231_X_MEMC_BASE_ADDR_VIRT 0xFC420000 #define MXC91231_X_MEMC_SIZE SZ_64K #define MXC91231_NFC_BASE_ADDR (MXC91231_X_MEMC_BASE_ADDR + 0x0000) @@ -183,19 +175,9 @@ /* * This macro defines the physical to virtual address mapping for all the * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0. + * and returning the virtual address. */ - -#define MXC91231_IO_P2V(x) ( \ - IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?: \ - IMX_IO_P2V_MODULE(x, MXC91231_AIPS2)) +#define MXC91231_IO_P2V(x) IMX_IO_P2V(x) #define MXC91231_IO_ADDRESS(x) IOMEM(MXC91231_IO_P2V(x)) /* -- cgit v0.10.2 From ac401427c05a6a371950a1cdfaec75f72bffb9b5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 26 Oct 2010 09:42:54 +0200 Subject: ARM: imx/debug-macro: rework using the new io mapping macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This gets rid of the last user of IMX_NEEDS_DEPRECATED_SYMBOLS. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index d56213f..3b3a37c 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -10,58 +10,49 @@ * published by the Free Software Foundation. * */ -#define IMX_NEEDS_DEPRECATED_SYMBOLS +#include #ifdef CONFIG_ARCH_MX1 -#include -#define UART_PADDR UART1_BASE_ADDR -#define UART_VADDR IO_ADDRESS(UART1_BASE_ADDR) +#define UART_PADDR MX1_UART1_BASE_ADDR #endif #ifdef CONFIG_ARCH_MX25 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -#include #define UART_PADDR MX25_UART1_BASE_ADDR -#define UART_VADDR MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR) #endif #ifdef CONFIG_ARCH_MX2 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -#include -#define UART_PADDR UART1_BASE_ADDR -#define UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR) +#define UART_PADDR MX2x_UART1_BASE_ADDR #endif #ifdef CONFIG_ARCH_MX3 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -#include -#define UART_PADDR UART1_BASE_ADDR -#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) +#define UART_PADDR MX3x_UART1_BASE_ADDR #endif #ifdef CONFIG_ARCH_MX5 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -#include #define UART_PADDR MX51_UART1_BASE_ADDR -#define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR) #endif #ifdef CONFIG_ARCH_MXC91231 #ifdef UART_PADDR #error "CONFIG_DEBUG_LL is incompatible with multiple archs" #endif -#include #define UART_PADDR MXC91231_UART2_BASE_ADDR -#define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) #endif + +#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) + .macro addruart, rp, rv ldr \rp, =UART_PADDR @ physical ldr \rv, =UART_VADDR @ virtual diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index aac6a9c..a2404b0 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -2,7 +2,6 @@ #define __MACH_MX25_H__ #define MX25_AIPS1_BASE_ADDR 0x43f00000 -#define MX25_AIPS1_BASE_ADDR_VIRT 0xf5300000 #define MX25_AIPS1_SIZE SZ_1M #define MX25_AIPS2_BASE_ADDR 0x53f00000 #define MX25_AIPS2_SIZE SZ_1M @@ -25,9 +24,6 @@ #define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000) #define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) -#define MX25_AIPS1_IO_ADDRESS(x) \ - (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT) - #define MX25_UART1_BASE_ADDR 0x43f90000 #define MX25_UART2_BASE_ADDR 0x43f94000 #define MX25_AUDMUX_BASE_ADDR 0x43fb0000 diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h index 46eeeb2..a056948 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/plat-mxc/include/mach/mx2x.h @@ -27,7 +27,6 @@ /* Register offsets */ #define MX2x_AIPI_BASE_ADDR 0x10000000 -#define MX2x_AIPI_BASE_ADDR_VIRT 0xf4400000 #define MX2x_AIPI_SIZE SZ_1M #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000) #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000) @@ -68,9 +67,6 @@ #define MX2x_SAHB1_SIZE SZ_1M #define MX2x_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000) -#define AIPI_IO_ADDRESS(x) \ - (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT) - /* fixed interrupt numbers */ #define MX2x_INT_CSPI3 6 #define MX2x_INT_GPIO 8 @@ -148,7 +144,6 @@ #ifdef IMX_NEEDS_DEPRECATED_SYMBOLS /* these should go away */ #define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR -#define AIPI_BASE_ADDR_VIRT MX2x_AIPI_BASE_ADDR_VIRT #define AIPI_SIZE MX2x_AIPI_SIZE #define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR #define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index da22cd4..3d6cc45 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -44,7 +44,6 @@ * AIPS 1 */ #define MX3x_AIPS1_BASE_ADDR 0x43f00000 -#define MX3x_AIPS1_BASE_ADDR_VIRT 0xf5300000 #define MX3x_AIPS1_SIZE SZ_1M #define MX3x_MAX_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x04000) #define MX3x_EVTMON_BASE_ADDR (MX3x_AIPS1_BASE_ADDR + 0x08000) @@ -141,9 +140,6 @@ #define MX3x_PCMCIA_MEM_BASE_ADDR 0xbc000000 -#define AIPS1_IO_ADDRESS(x) \ - (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) - /* * Interrupt numbers */ @@ -230,7 +226,6 @@ static inline int mx35_revision(void) #define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR #define L2CC_SIZE MX3x_L2CC_SIZE #define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR -#define AIPS1_BASE_ADDR_VIRT MX3x_AIPS1_BASE_ADDR_VIRT #define AIPS1_SIZE MX3x_AIPS1_SIZE #define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR #define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 1b8715f..636347c 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -53,7 +53,6 @@ * AIPS 1 */ #define MX51_AIPS1_BASE_ADDR 0x73f00000 -#define MX51_AIPS1_BASE_ADDR_VIRT 0xf5700000 #define MX51_AIPS1_SIZE SZ_1M #define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000) @@ -137,10 +136,6 @@ #define MX51_IO_P2V(x) IMX_IO_P2V(x) #define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) -/* This is currently used in , but should go away */ -#define MX51_AIPS1_IO_ADDRESS(x) \ - (((x) - MX51_AIPS1_BASE_ADDR) + MX51_AIPS1_BASE_ADDR_VIRT) - /* * defines for SPBA modules */ -- cgit v0.10.2 From d96801b2ca47cfeddadede7a1998e1fe0eab095c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 22 Oct 2010 09:20:52 +0200 Subject: ARM: imx: remove deprecated symbols as all users are gone now MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index b786ae7..b6771f4 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -165,131 +165,4 @@ */ #define USBD_INT0 MX1_USBD_INT0 -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define IMX_IO_PHYS MX1_IO_BASE_ADDR -#define IMX_IO_SIZE MX1_IO_SIZE -#define IMX_CS0_PHYS MX1_CS0_PHYS -#define IMX_CS0_SIZE MX1_CS0_SIZE -#define IMX_CS1_PHYS MX1_CS1_PHYS -#define IMX_CS1_SIZE MX1_CS1_SIZE -#define IMX_CS2_PHYS MX1_CS2_PHYS -#define IMX_CS2_SIZE MX1_CS2_SIZE -#define IMX_CS3_PHYS MX1_CS3_PHYS -#define IMX_CS3_SIZE MX1_CS3_SIZE -#define IMX_CS4_PHYS MX1_CS4_PHYS -#define IMX_CS4_SIZE MX1_CS4_SIZE -#define IMX_CS5_PHYS MX1_CS5_PHYS -#define IMX_CS5_SIZE MX1_CS5_SIZE -#define AIPI1_BASE_ADDR MX1_AIPI1_BASE_ADDR -#define WDT_BASE_ADDR MX1_WDT_BASE_ADDR -#define TIM1_BASE_ADDR MX1_TIM1_BASE_ADDR -#define TIM2_BASE_ADDR MX1_TIM2_BASE_ADDR -#define RTC_BASE_ADDR MX1_RTC_BASE_ADDR -#define LCDC_BASE_ADDR MX1_LCDC_BASE_ADDR -#define UART1_BASE_ADDR MX1_UART1_BASE_ADDR -#define UART2_BASE_ADDR MX1_UART2_BASE_ADDR -#define PWM_BASE_ADDR MX1_PWM_BASE_ADDR -#define DMA_BASE_ADDR MX1_DMA_BASE_ADDR -#define AIPI2_BASE_ADDR MX1_AIPI2_BASE_ADDR -#define SIM_BASE_ADDR MX1_SIM_BASE_ADDR -#define USBD_BASE_ADDR MX1_USBD_BASE_ADDR -#define SPI1_BASE_ADDR MX1_SPI1_BASE_ADDR -#define MMC_BASE_ADDR MX1_MMC_BASE_ADDR -#define ASP_BASE_ADDR MX1_ASP_BASE_ADDR -#define BTA_BASE_ADDR MX1_BTA_BASE_ADDR -#define I2C_BASE_ADDR MX1_I2C_BASE_ADDR -#define SSI_BASE_ADDR MX1_SSI_BASE_ADDR -#define SPI2_BASE_ADDR MX1_SPI2_BASE_ADDR -#define MSHC_BASE_ADDR MX1_MSHC_BASE_ADDR -#define CCM_BASE_ADDR MX1_CCM_BASE_ADDR -#define SCM_BASE_ADDR MX1_SCM_BASE_ADDR -#define GPIO_BASE_ADDR MX1_GPIO_BASE_ADDR -#define EIM_BASE_ADDR MX1_EIM_BASE_ADDR -#define SDRAMC_BASE_ADDR MX1_SDRAMC_BASE_ADDR -#define MMA_BASE_ADDR MX1_MMA_BASE_ADDR -#define AVIC_BASE_ADDR MX1_AVIC_BASE_ADDR -#define CSI_BASE_ADDR MX1_CSI_BASE_ADDR -#define IO_ADDRESS(x) MX1_IO_ADDRESS(x) -#define AVIC_IO_ADDRESS(x) IO_ADDRESS(x) -#define INT_SOFTINT MX1_INT_SOFTINT -#define CSI_INT MX1_CSI_INT -#define DSPA_MAC_INT MX1_DSPA_MAC_INT -#define DSPA_INT MX1_DSPA_INT -#define COMP_INT MX1_COMP_INT -#define MSHC_XINT MX1_MSHC_XINT -#define GPIO_INT_PORTA MX1_GPIO_INT_PORTA -#define GPIO_INT_PORTB MX1_GPIO_INT_PORTB -#define GPIO_INT_PORTC MX1_GPIO_INT_PORTC -#define LCDC_INT MX1_LCDC_INT -#define SIM_INT MX1_SIM_INT -#define SIM_DATA_INT MX1_SIM_DATA_INT -#define RTC_INT MX1_RTC_INT -#define RTC_SAMINT MX1_RTC_SAMINT -#define UART2_MINT_PFERR MX1_UART2_MINT_PFERR -#define UART2_MINT_RTS MX1_UART2_MINT_RTS -#define UART2_MINT_DTR MX1_UART2_MINT_DTR -#define UART2_MINT_UARTC MX1_UART2_MINT_UARTC -#define UART2_MINT_TX MX1_UART2_MINT_TX -#define UART2_MINT_RX MX1_UART2_MINT_RX -#define UART1_MINT_PFERR MX1_UART1_MINT_PFERR -#define UART1_MINT_RTS MX1_UART1_MINT_RTS -#define UART1_MINT_DTR MX1_UART1_MINT_DTR -#define UART1_MINT_UARTC MX1_UART1_MINT_UARTC -#define UART1_MINT_TX MX1_UART1_MINT_TX -#define UART1_MINT_RX MX1_UART1_MINT_RX -#define VOICE_DAC_INT MX1_VOICE_DAC_INT -#define VOICE_ADC_INT MX1_VOICE_ADC_INT -#define PEN_DATA_INT MX1_PEN_DATA_INT -#define PWM_INT MX1_PWM_INT -#define SDHC_INT MX1_SDHC_INT -#define I2C_INT MX1_INT_I2C -#define CSPI_INT MX1_CSPI_INT -#define SSI_TX_INT MX1_SSI_TX_INT -#define SSI_TX_ERR_INT MX1_SSI_TX_ERR_INT -#define SSI_RX_INT MX1_SSI_RX_INT -#define SSI_RX_ERR_INT MX1_SSI_RX_ERR_INT -#define TOUCH_INT MX1_TOUCH_INT -#define USBD_INT1 MX1_USBD_INT1 -#define USBD_INT2 MX1_USBD_INT2 -#define USBD_INT3 MX1_USBD_INT3 -#define USBD_INT4 MX1_USBD_INT4 -#define USBD_INT5 MX1_USBD_INT5 -#define USBD_INT6 MX1_USBD_INT6 -#define BTSYS_INT MX1_BTSYS_INT -#define BTTIM_INT MX1_BTTIM_INT -#define BTWUI_INT MX1_BTWUI_INT -#define TIM2_INT MX1_TIM2_INT -#define TIM1_INT MX1_TIM1_INT -#define DMA_ERR MX1_DMA_ERR -#define DMA_INT MX1_DMA_INT -#define GPIO_INT_PORTD MX1_GPIO_INT_PORTD -#define WDT_INT MX1_WDT_INT -#define DMA_REQ_UART3_T MX1_DMA_REQ_UART3_T -#define DMA_REQ_UART3_R MX1_DMA_REQ_UART3_R -#define DMA_REQ_SSI2_T MX1_DMA_REQ_SSI2_T -#define DMA_REQ_SSI2_R MX1_DMA_REQ_SSI2_R -#define DMA_REQ_CSI_STAT MX1_DMA_REQ_CSI_STAT -#define DMA_REQ_CSI_R MX1_DMA_REQ_CSI_R -#define DMA_REQ_MSHC MX1_DMA_REQ_MSHC -#define DMA_REQ_DSPA_DCT_DOUT MX1_DMA_REQ_DSPA_DCT_DOUT -#define DMA_REQ_DSPA_DCT_DIN MX1_DMA_REQ_DSPA_DCT_DIN -#define DMA_REQ_DSPA_MAC MX1_DMA_REQ_DSPA_MAC -#define DMA_REQ_EXT MX1_DMA_REQ_EXT -#define DMA_REQ_SDHC MX1_DMA_REQ_SDHC -#define DMA_REQ_SPI1_R MX1_DMA_REQ_SPI1_R -#define DMA_REQ_SPI1_T MX1_DMA_REQ_SPI1_T -#define DMA_REQ_SSI_T MX1_DMA_REQ_SSI_T -#define DMA_REQ_SSI_R MX1_DMA_REQ_SSI_R -#define DMA_REQ_ASP_DAC MX1_DMA_REQ_ASP_DAC -#define DMA_REQ_ASP_ADC MX1_DMA_REQ_ASP_ADC -#define DMA_REQ_USP_EP(x) MX1_DMA_REQ_USP_EP(x) -#define DMA_REQ_SPI2_R MX1_DMA_REQ_SPI2_R -#define DMA_REQ_SPI2_T MX1_DMA_REQ_SPI2_T -#define DMA_REQ_UART2_T MX1_DMA_REQ_UART2_T -#define DMA_REQ_UART2_R MX1_DMA_REQ_UART2_R -#define DMA_REQ_UART1_T MX1_DMA_REQ_UART1_T -#define DMA_REQ_UART1_R MX1_DMA_REQ_UART1_R -#endif /* ifdef IMX_NEEDS_DEPRECATED_SYMBOLS */ - #endif /* ifndef __MACH_MX1_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h index b417e32..a82f590 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/plat-mxc/include/mach/mx21.h @@ -179,38 +179,4 @@ #define MX21_DMA_REQ_CSI_STAT 30 #define MX21_DMA_REQ_CSI_RX 31 -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR -#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR -#define CS0_BASE_ADDR MX21_CS0_BASE_ADDR -#define CS1_BASE_ADDR MX21_CS1_BASE_ADDR -#define CS2_BASE_ADDR MX21_CS2_BASE_ADDR -#define CS3_BASE_ADDR MX21_CS3_BASE_ADDR -#define CS4_BASE_ADDR MX21_CS4_BASE_ADDR -#define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR -#define CS5_BASE_ADDR MX21_CS5_BASE_ADDR -#define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR -#define X_MEMC_SIZE MX21_X_MEMC_SIZE -#define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR -#define EIM_BASE_ADDR MX21_EIM_BASE_ADDR -#define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR -#define NFC_BASE_ADDR MX21_NFC_BASE_ADDR -#define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR -#define MXC_INT_FIRI MX21_INT_FIRI -#define MXC_INT_BMI MX21_INT_BMI -#define MXC_INT_EMMAENC MX21_INT_EMMAENC -#define MXC_INT_EMMADEC MX21_INT_EMMADEC -#define MXC_INT_USBWKUP MX21_INT_USBWKUP -#define MXC_INT_USBDMA MX21_INT_USBDMA -#define MXC_INT_USBHOST MX21_INT_USBHOST -#define MXC_INT_USBFUNC MX21_INT_USBFUNC -#define MXC_INT_USBMNP MX21_INT_USBMNP -#define MXC_INT_USBCTRL MX21_INT_USBCTRL -#define MXC_INT_USBCTRL MX21_INT_USBCTRL -#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX -#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX -#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX -#endif - #endif /* ifndef __MACH_MX21_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index e817289..3116b3b 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -244,73 +244,4 @@ static inline void mx27_setup_weimcs(size_t cs, extern int mx27_revision(void); #endif -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define MSHC_BASE_ADDR MX27_MSHC_BASE_ADDR -#define GPT5_BASE_ADDR MX27_GPT5_BASE_ADDR -#define GPT4_BASE_ADDR MX27_GPT4_BASE_ADDR -#define UART5_BASE_ADDR MX27_UART5_BASE_ADDR -#define UART6_BASE_ADDR MX27_UART6_BASE_ADDR -#define I2C2_BASE_ADDR MX27_I2C2_BASE_ADDR -#define SDHC3_BASE_ADDR MX27_SDHC3_BASE_ADDR -#define GPT6_BASE_ADDR MX27_GPT6_BASE_ADDR -#define VPU_BASE_ADDR MX27_VPU_BASE_ADDR -#define OTG_BASE_ADDR MX27_OTG_BASE_ADDR -#define SAHARA_BASE_ADDR MX27_SAHARA_BASE_ADDR -#define IIM_BASE_ADDR MX27_IIM_BASE_ADDR -#define RTIC_BASE_ADDR MX27_RTIC_BASE_ADDR -#define FEC_BASE_ADDR MX27_FEC_BASE_ADDR -#define SCC_BASE_ADDR MX27_SCC_BASE_ADDR -#define ETB_BASE_ADDR MX27_ETB_BASE_ADDR -#define ETB_RAM_BASE_ADDR MX27_ETB_RAM_BASE_ADDR -#define ROMP_BASE_ADDR MX27_ROMP_BASE_ADDR -#define ATA_BASE_ADDR MX27_ATA_BASE_ADDR -#define SDRAM_BASE_ADDR MX27_SDRAM_BASE_ADDR -#define CSD1_BASE_ADDR MX27_CSD1_BASE_ADDR -#define CS0_BASE_ADDR MX27_CS0_BASE_ADDR -#define CS1_BASE_ADDR MX27_CS1_BASE_ADDR -#define CS2_BASE_ADDR MX27_CS2_BASE_ADDR -#define CS3_BASE_ADDR MX27_CS3_BASE_ADDR -#define CS4_BASE_ADDR MX27_CS4_BASE_ADDR -#define CS5_BASE_ADDR MX27_CS5_BASE_ADDR -#define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR -#define X_MEMC_SIZE MX27_X_MEMC_SIZE -#define NFC_BASE_ADDR MX27_NFC_BASE_ADDR -#define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR -#define WEIM_BASE_ADDR MX27_WEIM_BASE_ADDR -#define M3IF_BASE_ADDR MX27_M3IF_BASE_ADDR -#define PCMCIA_CTL_BASE_ADDR MX27_PCMCIA_CTL_BASE_ADDR -#define PCMCIA_MEM_BASE_ADDR MX27_PCMCIA_MEM_BASE_ADDR -#define IRAM_BASE_ADDR MX27_IRAM_BASE_ADDR -#define MXC_INT_I2C2 MX27_INT_I2C2 -#define MXC_INT_GPT6 MX27_INT_GPT6 -#define MXC_INT_GPT5 MX27_INT_GPT5 -#define MXC_INT_GPT4 MX27_INT_GPT4 -#define MXC_INT_RTIC MX27_INT_RTIC -#define MXC_INT_SDHC MX27_INT_SDHC -#define MXC_INT_SDHC3 MX27_INT_SDHC3 -#define MXC_INT_ATA MX27_INT_ATA -#define MXC_INT_UART6 MX27_INT_UART6 -#define MXC_INT_UART5 MX27_INT_UART5 -#define MXC_INT_FEC MX27_INT_FEC -#define MXC_INT_VPU MX27_INT_VPU -#define MXC_INT_USB1 MX27_INT_USB1 -#define MXC_INT_USB2 MX27_INT_USB2 -#define MXC_INT_USB3 MX27_INT_USB3 -#define MXC_INT_SCC_SMN MX27_INT_SCC_SMN -#define MXC_INT_SCC_SCM MX27_INT_SCC_SCM -#define MXC_INT_SAHARA MX27_INT_SAHARA -#define MXC_INT_IIM MX27_INT_IIM -#define MXC_INT_CCM MX27_INT_CCM -#define DMA_REQ_MSHC MX27_DMA_REQ_MSHC -#define DMA_REQ_ATA_TX MX27_DMA_REQ_ATA_TX -#define DMA_REQ_ATA_RCV MX27_DMA_REQ_ATA_RCV -#define DMA_REQ_UART5_TX MX27_DMA_REQ_UART5_TX -#define DMA_REQ_UART5_RX MX27_DMA_REQ_UART5_RX -#define DMA_REQ_UART6_TX MX27_DMA_REQ_UART6_TX -#define DMA_REQ_UART6_RX MX27_DMA_REQ_UART6_RX -#define DMA_REQ_SDHC3 MX27_DMA_REQ_SDHC3 -#define DMA_REQ_NFC MX27_DMA_REQ_NFC -#endif - #endif /* ifndef __MACH_MX27_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/plat-mxc/include/mach/mx2x.h index a056948..6d07839 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/plat-mxc/include/mach/mx2x.h @@ -141,116 +141,4 @@ #define MX2x_DMA_REQ_CSI_STAT 30 #define MX2x_DMA_REQ_CSI_RX 31 -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define AIPI_BASE_ADDR MX2x_AIPI_BASE_ADDR -#define AIPI_SIZE MX2x_AIPI_SIZE -#define DMA_BASE_ADDR MX2x_DMA_BASE_ADDR -#define WDOG_BASE_ADDR MX2x_WDOG_BASE_ADDR -#define GPT1_BASE_ADDR MX2x_GPT1_BASE_ADDR -#define GPT2_BASE_ADDR MX2x_GPT2_BASE_ADDR -#define GPT3_BASE_ADDR MX2x_GPT3_BASE_ADDR -#define PWM_BASE_ADDR MX2x_PWM_BASE_ADDR -#define RTC_BASE_ADDR MX2x_RTC_BASE_ADDR -#define KPP_BASE_ADDR MX2x_KPP_BASE_ADDR -#define OWIRE_BASE_ADDR MX2x_OWIRE_BASE_ADDR -#define UART1_BASE_ADDR MX2x_UART1_BASE_ADDR -#define UART2_BASE_ADDR MX2x_UART2_BASE_ADDR -#define UART3_BASE_ADDR MX2x_UART3_BASE_ADDR -#define UART4_BASE_ADDR MX2x_UART4_BASE_ADDR -#define CSPI1_BASE_ADDR MX2x_CSPI1_BASE_ADDR -#define CSPI2_BASE_ADDR MX2x_CSPI2_BASE_ADDR -#define SSI1_BASE_ADDR MX2x_SSI1_BASE_ADDR -#define SSI2_BASE_ADDR MX2x_SSI2_BASE_ADDR -#define I2C_BASE_ADDR MX2x_I2C_BASE_ADDR -#define SDHC1_BASE_ADDR MX2x_SDHC1_BASE_ADDR -#define SDHC2_BASE_ADDR MX2x_SDHC2_BASE_ADDR -#define GPIO_BASE_ADDR MX2x_GPIO_BASE_ADDR -#define AUDMUX_BASE_ADDR MX2x_AUDMUX_BASE_ADDR -#define CSPI3_BASE_ADDR MX2x_CSPI3_BASE_ADDR -#define LCDC_BASE_ADDR MX2x_LCDC_BASE_ADDR -#define SLCDC_BASE_ADDR MX2x_SLCDC_BASE_ADDR -#define USBOTG_BASE_ADDR MX2x_USBOTG_BASE_ADDR -#define EMMA_PP_BASE_ADDR MX2x_EMMA_PP_BASE_ADDR -#define EMMA_PRP_BASE_ADDR MX2x_EMMA_PRP_BASE_ADDR -#define CCM_BASE_ADDR MX2x_CCM_BASE_ADDR -#define SYSCTRL_BASE_ADDR MX2x_SYSCTRL_BASE_ADDR -#define JAM_BASE_ADDR MX2x_JAM_BASE_ADDR -#define MAX_BASE_ADDR MX2x_MAX_BASE_ADDR -#define AVIC_BASE_ADDR MX2x_AVIC_BASE_ADDR -#define SAHB1_BASE_ADDR MX2x_SAHB1_BASE_ADDR -#define SAHB1_SIZE MX2x_SAHB1_SIZE -#define CSI_BASE_ADDR MX2x_CSI_BASE_ADDR -#define MXC_INT_CSPI3 MX2x_INT_CSPI3 -#define MXC_INT_GPIO MX2x_INT_GPIO -#define MXC_INT_SDHC2 MX2x_INT_SDHC2 -#define MXC_INT_SDHC1 MX2x_INT_SDHC1 -#define MXC_INT_I2C MX2x_INT_I2C -#define MXC_INT_SSI2 MX2x_INT_SSI2 -#define MXC_INT_SSI1 MX2x_INT_SSI1 -#define MXC_INT_CSPI2 MX2x_INT_CSPI2 -#define MXC_INT_CSPI1 MX2x_INT_CSPI1 -#define MXC_INT_UART4 MX2x_INT_UART4 -#define MXC_INT_UART3 MX2x_INT_UART3 -#define MXC_INT_UART2 MX2x_INT_UART2 -#define MXC_INT_UART1 MX2x_INT_UART1 -#define MXC_INT_KPP MX2x_INT_KPP -#define MXC_INT_RTC MX2x_INT_RTC -#define MXC_INT_PWM MX2x_INT_PWM -#define MXC_INT_GPT3 MX2x_INT_GPT3 -#define MXC_INT_GPT2 MX2x_INT_GPT2 -#define MXC_INT_GPT1 MX2x_INT_GPT1 -#define MXC_INT_WDOG MX2x_INT_WDOG -#define MXC_INT_PCMCIA MX2x_INT_PCMCIA -#define MXC_INT_NANDFC MX2x_INT_NANDFC -#define MXC_INT_CSI MX2x_INT_CSI -#define MXC_INT_DMACH0 MX2x_INT_DMACH0 -#define MXC_INT_DMACH1 MX2x_INT_DMACH1 -#define MXC_INT_DMACH2 MX2x_INT_DMACH2 -#define MXC_INT_DMACH3 MX2x_INT_DMACH3 -#define MXC_INT_DMACH4 MX2x_INT_DMACH4 -#define MXC_INT_DMACH5 MX2x_INT_DMACH5 -#define MXC_INT_DMACH6 MX2x_INT_DMACH6 -#define MXC_INT_DMACH7 MX2x_INT_DMACH7 -#define MXC_INT_DMACH8 MX2x_INT_DMACH8 -#define MXC_INT_DMACH9 MX2x_INT_DMACH9 -#define MXC_INT_DMACH10 MX2x_INT_DMACH10 -#define MXC_INT_DMACH11 MX2x_INT_DMACH11 -#define MXC_INT_DMACH12 MX2x_INT_DMACH12 -#define MXC_INT_DMACH13 MX2x_INT_DMACH13 -#define MXC_INT_DMACH14 MX2x_INT_DMACH14 -#define MXC_INT_DMACH15 MX2x_INT_DMACH15 -#define MXC_INT_EMMAPRP MX2x_INT_EMMAPRP -#define MXC_INT_EMMAPP MX2x_INT_EMMAPP -#define MXC_INT_SLCDC MX2x_INT_SLCDC -#define MXC_INT_LCDC MX2x_INT_LCDC -#define DMA_REQ_CSPI3_RX MX2x_DMA_REQ_CSPI3_RX -#define DMA_REQ_CSPI3_TX MX2x_DMA_REQ_CSPI3_TX -#define DMA_REQ_EXT MX2x_DMA_REQ_EXT -#define DMA_REQ_SDHC2 MX2x_DMA_REQ_SDHC2 -#define DMA_REQ_SDHC1 MX2x_DMA_REQ_SDHC1 -#define DMA_REQ_SSI2_RX0 MX2x_DMA_REQ_SSI2_RX0 -#define DMA_REQ_SSI2_TX0 MX2x_DMA_REQ_SSI2_TX0 -#define DMA_REQ_SSI2_RX1 MX2x_DMA_REQ_SSI2_RX1 -#define DMA_REQ_SSI2_TX1 MX2x_DMA_REQ_SSI2_TX1 -#define DMA_REQ_SSI1_RX0 MX2x_DMA_REQ_SSI1_RX0 -#define DMA_REQ_SSI1_TX0 MX2x_DMA_REQ_SSI1_TX0 -#define DMA_REQ_SSI1_RX1 MX2x_DMA_REQ_SSI1_RX1 -#define DMA_REQ_SSI1_TX1 MX2x_DMA_REQ_SSI1_TX1 -#define DMA_REQ_CSPI2_RX MX2x_DMA_REQ_CSPI2_RX -#define DMA_REQ_CSPI2_TX MX2x_DMA_REQ_CSPI2_TX -#define DMA_REQ_CSPI1_RX MX2x_DMA_REQ_CSPI1_RX -#define DMA_REQ_CSPI1_TX MX2x_DMA_REQ_CSPI1_TX -#define DMA_REQ_UART4_RX MX2x_DMA_REQ_UART4_RX -#define DMA_REQ_UART4_TX MX2x_DMA_REQ_UART4_TX -#define DMA_REQ_UART3_RX MX2x_DMA_REQ_UART3_RX -#define DMA_REQ_UART3_TX MX2x_DMA_REQ_UART3_TX -#define DMA_REQ_UART2_RX MX2x_DMA_REQ_UART2_RX -#define DMA_REQ_UART2_TX MX2x_DMA_REQ_UART2_TX -#define DMA_REQ_UART1_RX MX2x_DMA_REQ_UART1_RX -#define DMA_REQ_UART1_TX MX2x_DMA_REQ_UART1_TX -#define DMA_REQ_CSI_STAT MX2x_DMA_REQ_CSI_STAT -#define DMA_REQ_CSI_RX MX2x_DMA_REQ_CSI_RX -#endif - #endif /* ifndef __MACH_MX2x_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 9ed9975..6d4b98f 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -215,36 +215,4 @@ static inline void mx31_setup_weimcs(size_t cs, #define MX31_SYSTEM_REV_MIN MX31_CHIP_REV_1_0 #define MX31_SYSTEM_REV_NUM 3 -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define ATA_BASE_ADDR MX31_ATA_BASE_ADDR -#define UART4_BASE_ADDR MX31_UART4_BASE_ADDR -#define UART5_BASE_ADDR MX31_UART5_BASE_ADDR -#define MMC_SDHC1_BASE_ADDR MX31_MMC_SDHC1_BASE_ADDR -#define MMC_SDHC2_BASE_ADDR MX31_MMC_SDHC2_BASE_ADDR -#define SIM1_BASE_ADDR MX31_SIM1_BASE_ADDR -#define IIM_BASE_ADDR MX31_IIM_BASE_ADDR -#define CSPI3_BASE_ADDR MX31_CSPI3_BASE_ADDR -#define FIRI_BASE_ADDR MX31_FIRI_BASE_ADDR -#define SCM_BASE_ADDR MX31_SCM_BASE_ADDR -#define SMN_BASE_ADDR MX31_SMN_BASE_ADDR -#define MPEG4_ENC_BASE_ADDR MX31_MPEG4_ENC_BASE_ADDR -#define MXC_INT_MPEG4_ENCODER MX31_INT_MPEG4_ENCODER -#define MXC_INT_FIRI MX31_INT_FIRI -#define MXC_INT_MBX MX31_INT_MBX -#define MXC_INT_CSPI3 MX31_INT_CSPI3 -#define MXC_INT_SIM2 MX31_INT_SIM2 -#define MXC_INT_SIM1 MX31_INT_SIM1 -#define MXC_INT_CCM_DVFS MX31_INT_CCM_DVFS -#define MXC_INT_USB1 MX31_INT_USB1 -#define MXC_INT_USB2 MX31_INT_USB2 -#define MXC_INT_USB3 MX31_INT_USB3 -#define MXC_INT_USB4 MX31_INT_USB4 -#define MXC_INT_MSHC2 MX31_INT_MSHC2 -#define MXC_INT_UART4 MX31_INT_UART4 -#define MXC_INT_UART5 MX31_INT_UART5 -#define MXC_INT_CCM MX31_INT_CCM -#define MXC_INT_PCMCIA MX31_INT_PCMCIA -#endif - #endif /* ifndef __MACH_MX31_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 3678ca3..9067225 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -183,20 +183,4 @@ #define MX35_SYSTEM_REV_MIN MX3x_CHIP_REV_1_0 #define MX35_SYSTEM_REV_NUM 3 -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define MXC_FEC_BASE_ADDR MX35_FEC_BASE_ADDR -#define MXC_INT_OWIRE MX35_INT_OWIRE -#define MXC_INT_GPU2D MX35_INT_GPU2D -#define MXC_INT_ASRC MX35_INT_ASRC -#define MXC_INT_USBHS MX35_INT_USBHS -#define MXC_INT_USBOTG MX35_INT_USBOTG -#define MXC_INT_ESAI MX35_INT_ESAI -#define MXC_INT_CAN1 MX35_INT_CAN1 -#define MXC_INT_CAN2 MX35_INT_CAN2 -#define MXC_INT_MLB MX35_INT_MLB -#define MXC_INT_SPDIF MX35_INT_SPDIF -#define MXC_INT_FEC MX35_INT_FEC -#endif - #endif /* ifndef __MACH_MX35_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 3d6cc45..8c7f34e 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h @@ -221,118 +221,4 @@ static inline int mx35_revision(void) } #endif -#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS -/* these should go away */ -#define L2CC_BASE_ADDR MX3x_L2CC_BASE_ADDR -#define L2CC_SIZE MX3x_L2CC_SIZE -#define AIPS1_BASE_ADDR MX3x_AIPS1_BASE_ADDR -#define AIPS1_SIZE MX3x_AIPS1_SIZE -#define MAX_BASE_ADDR MX3x_MAX_BASE_ADDR -#define EVTMON_BASE_ADDR MX3x_EVTMON_BASE_ADDR -#define CLKCTL_BASE_ADDR MX3x_CLKCTL_BASE_ADDR -#define ETB_SLOT4_BASE_ADDR MX3x_ETB_SLOT4_BASE_ADDR -#define ETB_SLOT5_BASE_ADDR MX3x_ETB_SLOT5_BASE_ADDR -#define ECT_CTIO_BASE_ADDR MX3x_ECT_CTIO_BASE_ADDR -#define I2C_BASE_ADDR MX3x_I2C_BASE_ADDR -#define I2C3_BASE_ADDR MX3x_I2C3_BASE_ADDR -#define UART1_BASE_ADDR MX3x_UART1_BASE_ADDR -#define UART2_BASE_ADDR MX3x_UART2_BASE_ADDR -#define I2C2_BASE_ADDR MX3x_I2C2_BASE_ADDR -#define OWIRE_BASE_ADDR MX3x_OWIRE_BASE_ADDR -#define SSI1_BASE_ADDR MX3x_SSI1_BASE_ADDR -#define CSPI1_BASE_ADDR MX3x_CSPI1_BASE_ADDR -#define KPP_BASE_ADDR MX3x_KPP_BASE_ADDR -#define IOMUXC_BASE_ADDR MX3x_IOMUXC_BASE_ADDR -#define ECT_IP1_BASE_ADDR MX3x_ECT_IP1_BASE_ADDR -#define ECT_IP2_BASE_ADDR MX3x_ECT_IP2_BASE_ADDR -#define SPBA0_BASE_ADDR MX3x_SPBA0_BASE_ADDR -#define SPBA0_SIZE MX3x_SPBA0_SIZE -#define UART3_BASE_ADDR MX3x_UART3_BASE_ADDR -#define CSPI2_BASE_ADDR MX3x_CSPI2_BASE_ADDR -#define SSI2_BASE_ADDR MX3x_SSI2_BASE_ADDR -#define ATA_DMA_BASE_ADDR MX3x_ATA_DMA_BASE_ADDR -#define MSHC1_BASE_ADDR MX3x_MSHC1_BASE_ADDR -#define SPBA_CTRL_BASE_ADDR MX3x_SPBA_CTRL_BASE_ADDR -#define AIPS2_BASE_ADDR MX3x_AIPS2_BASE_ADDR -#define AIPS2_SIZE MX3x_AIPS2_SIZE -#define CCM_BASE_ADDR MX3x_CCM_BASE_ADDR -#define GPT1_BASE_ADDR MX3x_GPT1_BASE_ADDR -#define EPIT1_BASE_ADDR MX3x_EPIT1_BASE_ADDR -#define EPIT2_BASE_ADDR MX3x_EPIT2_BASE_ADDR -#define GPIO3_BASE_ADDR MX3x_GPIO3_BASE_ADDR -#define SCC_BASE_ADDR MX3x_SCC_BASE_ADDR -#define RNGA_BASE_ADDR MX3x_RNGA_BASE_ADDR -#define IPU_CTRL_BASE_ADDR MX3x_IPU_CTRL_BASE_ADDR -#define AUDMUX_BASE_ADDR MX3x_AUDMUX_BASE_ADDR -#define GPIO1_BASE_ADDR MX3x_GPIO1_BASE_ADDR -#define GPIO2_BASE_ADDR MX3x_GPIO2_BASE_ADDR -#define SDMA_BASE_ADDR MX3x_SDMA_BASE_ADDR -#define RTC_BASE_ADDR MX3x_RTC_BASE_ADDR -#define WDOG_BASE_ADDR MX3x_WDOG_BASE_ADDR -#define PWM_BASE_ADDR MX3x_PWM_BASE_ADDR -#define RTIC_BASE_ADDR MX3x_RTIC_BASE_ADDR -#define ROMP_BASE_ADDR MX3x_ROMP_BASE_ADDR -#define ROMP_SIZE MX3x_ROMP_SIZE -#define AVIC_BASE_ADDR MX3x_AVIC_BASE_ADDR -#define AVIC_SIZE MX3x_AVIC_SIZE -#define IPU_MEM_BASE_ADDR MX3x_IPU_MEM_BASE_ADDR -#define CSD0_BASE_ADDR MX3x_CSD0_BASE_ADDR -#define CSD1_BASE_ADDR MX3x_CSD1_BASE_ADDR -#define CS0_BASE_ADDR MX3x_CS0_BASE_ADDR -#define CS1_BASE_ADDR MX3x_CS1_BASE_ADDR -#define CS2_BASE_ADDR MX3x_CS2_BASE_ADDR -#define CS3_BASE_ADDR MX3x_CS3_BASE_ADDR -#define CS4_BASE_ADDR MX3x_CS4_BASE_ADDR -#define CS4_SIZE MX3x_CS4_SIZE -#define CS5_BASE_ADDR MX3x_CS5_BASE_ADDR -#define CS5_SIZE MX3x_CS5_SIZE -#define X_MEMC_BASE_ADDR MX3x_X_MEMC_BASE_ADDR -#define X_MEMC_SIZE MX3x_X_MEMC_SIZE -#define ESDCTL_BASE_ADDR MX3x_ESDCTL_BASE_ADDR -#define WEIM_BASE_ADDR MX3x_WEIM_BASE_ADDR -#define M3IF_BASE_ADDR MX3x_M3IF_BASE_ADDR -#define EMI_CTL_BASE_ADDR MX3x_EMI_CTL_BASE_ADDR -#define PCMCIA_CTL_BASE_ADDR MX3x_PCMCIA_CTL_BASE_ADDR -#define PCMCIA_MEM_BASE_ADDR MX3x_PCMCIA_MEM_BASE_ADDR -#define MXC_INT_I2C3 MX3x_INT_I2C3 -#define MXC_INT_I2C2 MX3x_INT_I2C2 -#define MXC_INT_RTIC MX3x_INT_RTIC -#define MXC_INT_I2C MX3x_INT_I2C -#define MXC_INT_CSPI2 MX3x_INT_CSPI2 -#define MXC_INT_CSPI1 MX3x_INT_CSPI1 -#define MXC_INT_ATA MX3x_INT_ATA -#define MXC_INT_UART3 MX3x_INT_UART3 -#define MXC_INT_IIM MX3x_INT_IIM -#define MXC_INT_RNGA MX3x_INT_RNGA -#define MXC_INT_EVTMON MX3x_INT_EVTMON -#define MXC_INT_KPP MX3x_INT_KPP -#define MXC_INT_RTC MX3x_INT_RTC -#define MXC_INT_PWM MX3x_INT_PWM -#define MXC_INT_EPIT2 MX3x_INT_EPIT2 -#define MXC_INT_EPIT1 MX3x_INT_EPIT1 -#define MXC_INT_GPT MX3x_INT_GPT -#define MXC_INT_POWER_FAIL MX3x_INT_POWER_FAIL -#define MXC_INT_UART2 MX3x_INT_UART2 -#define MXC_INT_NANDFC MX3x_INT_NANDFC -#define MXC_INT_SDMA MX3x_INT_SDMA -#define MXC_INT_MSHC1 MX3x_INT_MSHC1 -#define MXC_INT_IPU_ERR MX3x_INT_IPU_ERR -#define MXC_INT_IPU_SYN MX3x_INT_IPU_SYN -#define MXC_INT_UART1 MX3x_INT_UART1 -#define MXC_INT_ECT MX3x_INT_ECT -#define MXC_INT_SCC_SCM MX3x_INT_SCC_SCM -#define MXC_INT_SCC_SMN MX3x_INT_SCC_SMN -#define MXC_INT_GPIO2 MX3x_INT_GPIO2 -#define MXC_INT_GPIO1 MX3x_INT_GPIO1 -#define MXC_INT_WDOG MX3x_INT_WDOG -#define MXC_INT_GPIO3 MX3x_INT_GPIO3 -#define MXC_INT_EXT_POWER MX3x_INT_EXT_POWER -#define MXC_INT_EXT_TEMPER MX3x_INT_EXT_TEMPER -#define MXC_INT_EXT_SENSOR60 MX3x_INT_EXT_SENSOR60 -#define MXC_INT_EXT_SENSOR61 MX3x_INT_EXT_SENSOR61 -#define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG -#define MXC_INT_EXT_TV MX3x_INT_EXT_TV -#define PROD_SIGNATURE MX3x_PROD_SIGNATURE -#endif - #endif /* ifndef __MACH_MX3x_H__ */ -- cgit v0.10.2 From ae71a5622253708aa08df231e6415fe7a1e96b10 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 29 Oct 2010 10:56:07 +0200 Subject: ARM: imx: dynamically allocate mxc_w1 devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently there is no platform data used in the driver. In case this changes NULL is passed unused to the soc specific functions. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 197f9e2..edf0182 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -88,6 +88,7 @@ config MACH_MX27ADS select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_MXC_W1 help Include support for MX27ADS platform. This includes specific configurations for the board and its peripherals. @@ -97,6 +98,7 @@ config MACH_PCM038 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI help @@ -122,6 +124,7 @@ config MACH_CPUIMX27 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_MXC_W1 select MXC_ULPI if USB_ULPI help Include support for Eukrea CPUIMX27 platform. This includes @@ -186,6 +189,7 @@ config MACH_PCA100 select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI help diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index d189039..61b0aa7 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -29,6 +29,10 @@ extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst; #define imx21_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) +extern const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst; +#define imx21_add_mxc_w1(pdata) \ + imx_add_mxc_w1(&imx21_mxc_w1_data) + extern const struct imx_spi_imx_data imx21_cspi_data[] __initconst; #define imx21_add_cspi(id, pdata) \ imx_add_spi_imx(&imx21_cspi_data[id], pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 7011690..b957e78 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -35,6 +35,10 @@ extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; #define imx27_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) +extern const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst; +#define imx27_add_mxc_w1(pdata) \ + imx_add_mxc_w1(&imx27_mxc_w1_data) + extern const struct imx_spi_imx_data imx27_cspi_data[] __initconst; #define imx27_add_cspi(id, pdata) \ imx_add_spi_imx(&imx27_cspi_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index e69e46e..6fbd624 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -270,21 +270,6 @@ struct platform_device mxc_wdt = { .resource = mxc_wdt_resources, }; -static struct resource mxc_w1_master_resources[] = { - { - .start = MX2x_OWIRE_BASE_ADDR, - .end = MX2x_OWIRE_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device mxc_w1_master_device = { - .name = "mxc_w1", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_w1_master_resources), - .resource = mxc_w1_master_resources, -}; - /* * lcdc: * - i.MX1: the basic controller diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 807f02a..48d2c5b 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -14,7 +14,6 @@ extern struct platform_device mxc_gpt4; extern struct platform_device mxc_gpt5; #endif extern struct platform_device mxc_wdt; -extern struct platform_device mxc_w1_master_device; extern struct platform_device mxc_fb_device; extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 745ee60..9baaf3d 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -158,7 +158,6 @@ cpuimx27_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &eukrea_cpuimx27_nor_mtd_device, &mxc_wdt, - &mxc_w1_master_device, }; static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = { @@ -262,6 +261,7 @@ static void __init eukrea_cpuimx27_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_mxc_w1(NULL); #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) /* SDHC2 can be used for Wifi */ diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index a1e4bc5..219899a 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -284,7 +284,6 @@ static struct imxmmc_platform_data sdhc2_pdata = { static struct platform_device *platform_devices[] __initdata = { &mx27ads_nor_mtd_device, - &mxc_w1_master_device, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -314,6 +313,7 @@ static void __init mx27ads_board_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_mxc_w1(NULL); } static void __init mx27ads_timer_init(void) diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 8c720d4..39c580b 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -172,7 +172,6 @@ pca100_nand_board_info __initconst = { }; static struct platform_device *platform_devices[] __initdata = { - &mxc_w1_master_device, &mxc_wdt, }; @@ -434,6 +433,7 @@ static void __init pca100_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_mxc_w1(NULL); } static void __init pca100_timer_init(void) diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 49a97ce..2cfc4b9 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -172,7 +172,6 @@ pcm038_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &pcm038_nor_mtd_device, - &mxc_w1_master_device, &pcm038_sram_mtd_device, &mxc_wdt, }; @@ -326,6 +325,7 @@ static void __init pcm038_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_mxc_w1(NULL); #ifdef CONFIG_MACH_PCM970_BASEBOARD pcm970_baseboard_init(); diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 5000ac1..3f83fd5 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig @@ -41,6 +41,7 @@ config MACH_PCM037 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND + select IMX_HAVE_PLATFORM_MXC_W1 select MXC_ULPI if USB_ULPI help Include support for Phytec pcm037 platform. This includes diff --git a/arch/arm/mach-mx3/devices-imx31.h b/arch/arm/mach-mx3/devices-imx31.h index de95985..a88f243 100644 --- a/arch/arm/mach-mx3/devices-imx31.h +++ b/arch/arm/mach-mx3/devices-imx31.h @@ -33,6 +33,10 @@ extern const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst; #define imx31_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) +extern const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst; +#define imx31_add_mxc_w1(pdata) \ + imx_add_mxc_w1(&imx31_mxc_w1_data) + extern const struct imx_spi_imx_data imx31_cspi_data[] __initconst; #define imx31_add_cspi(id, pdata) \ imx_add_spi_imx(&imx31_cspi_data[id], pdata) diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 5eb917b..7602cb4 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -40,6 +40,10 @@ extern const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst; #define imx35_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) +extern const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst; +#define imx35_add_mxc_w1(pdata) \ + imx_add_mxc_w1(&imx35_mxc_w1_data) + extern const struct imx_spi_imx_data imx35_cspi_data[] __initconst; #define imx35_add_cspi(id, pdata) \ imx_add_spi_imx(&imx35_cspi_data[id], pdata) diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 74f74f4..5808ce1 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -54,21 +54,6 @@ int __init imx3x_register_gpios(void) return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); } -static struct resource mxc_w1_master_resources[] = { - { - .start = MX3x_OWIRE_BASE_ADDR, - .end = MX3x_OWIRE_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device mxc_w1_master_device = { - .name = "mxc_w1", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_w1_master_resources), - .resource = mxc_w1_master_resources, -}; - #ifdef CONFIG_ARCH_MX31 static struct resource mxcsdhc0_resources[] = { { diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 585f814..a649772 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h @@ -1,4 +1,3 @@ -extern struct platform_device mxc_w1_master_device; extern struct platform_device mx3_ipu; extern struct platform_device mx3_fb; extern struct platform_device mx3_camera; diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index 86e86c1..bc5d3a1 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c @@ -614,7 +614,7 @@ static void __init mxc_board_init(void) imx31_add_imx_uart1(&uart_pdata); imx31_add_imx_uart2(&uart_pdata); - mxc_register_device(&mxc_w1_master_device, NULL); + imx31_add_mxc_w1(NULL); /* LAN9217 IRQ pin */ ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 9aa6f3e..fb66467 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -25,5 +25,8 @@ config IMX_HAVE_PLATFORM_IMX_UART config IMX_HAVE_PLATFORM_MXC_NAND bool +config IMX_HAVE_PLATFORM_MXC_W1 + bool + config IMX_HAVE_PLATFORM_SPI_IMX bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 45aefeb..1d7d392 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -7,4 +7,5 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/plat-mxc/devices/platform-mxc_w1.c new file mode 100644 index 0000000..1355237 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_w1.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mxc_w1_data_entry_single(soc) \ + { \ + .iobase = soc ## _OWIRE_BASE_ADDR, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_ARCH_MX31 +const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX31); +#endif /* ifdef CONFIG_ARCH_MX31 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst = + imx_mxc_w1_data_entry_single(MX35); +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_mxc_w1( + const struct imx_mxc_w1_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + }; + + return imx_add_platform_device("mxc_w1", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 8c6896f..431e0ef 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -99,6 +99,12 @@ struct platform_device *__init imx_add_mxc_nand( const struct imx_mxc_nand_data *data, const struct mxc_nand_platform_data *pdata); +struct imx_mxc_w1_data { + resource_size_t iobase; +}; +struct platform_device *__init imx_add_mxc_w1( + const struct imx_mxc_w1_data *data); + #include struct imx_spi_imx_data { const char *devid; -- cgit v0.10.2 From 300f86da1787c680598ea441aaa602a1664fba86 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 29 Oct 2010 11:50:36 +0200 Subject: ARM: imx: remove unused devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit all these don't have a driver and are not added in any machine file. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 6fbd624..cdc6f32 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -70,48 +70,6 @@ struct platform_device imx1_camera_device = { .num_resources = ARRAY_SIZE(imx1_camera_resources), }; -static struct resource imx_rtc_resources[] = { - { - .start = 0x00204000, - .end = 0x00204024, - .flags = IORESOURCE_MEM, - }, { - .start = MX1_RTC_INT, - .end = MX1_RTC_INT, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_RTC_SAMINT, - .end = MX1_RTC_SAMINT, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_rtc_device = { - .name = "rtc-imx", - .id = 0, - .resource = imx_rtc_resources, - .num_resources = ARRAY_SIZE(imx_rtc_resources), -}; - -static struct resource imx_wdt_resources[] = { - { - .start = 0x00201000, - .end = 0x00201008, - .flags = IORESOURCE_MEM, - }, { - .start = MX1_WDT_INT, - .end = MX1_WDT_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_wdt_device = { - .name = "imx-wdt", - .id = 0, - .resource = imx_wdt_resources, - .num_resources = ARRAY_SIZE(imx_wdt_resources), -}; - static struct resource imx_usb_resources[] = { { .start = 0x00212000, @@ -219,41 +177,6 @@ struct platform_device mx27_camera_device = { }; #endif -/* - * General Purpose Timer - * - i.MX21: 3 timers - * - i.MX27: 6 timers - */ -#define DEFINE_IMX_GPT_DEVICE(n, baseaddr, irq) \ - static struct resource timer ## n ##_resources[] = { \ - { \ - .start = baseaddr, \ - .end = baseaddr + SZ_4K - 1, \ - .flags = IORESOURCE_MEM, \ - }, { \ - .start = irq, \ - .end = irq, \ - .flags = IORESOURCE_IRQ, \ - } \ - }; \ - \ - struct platform_device mxc_gpt ## n = { \ - .name = "imx_gpt", \ - .id = n, \ - .num_resources = ARRAY_SIZE(timer ## n ## _resources), \ - .resource = timer ## n ## _resources, \ - } - -/* We use gpt1 as system timer, so do not add a device for this one */ -DEFINE_IMX_GPT_DEVICE(1, MX2x_GPT2_BASE_ADDR, MX2x_INT_GPT2); -DEFINE_IMX_GPT_DEVICE(2, MX2x_GPT3_BASE_ADDR, MX2x_INT_GPT3); - -#ifdef CONFIG_MACH_MX27 -DEFINE_IMX_GPT_DEVICE(3, MX27_GPT4_BASE_ADDR, MX27_INT_GPT4); -DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5); -DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6); -#endif - /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */ static struct resource mxc_wdt_resources[] = { { diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 48d2c5b..a7e47f4 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,18 +1,9 @@ #ifdef CONFIG_ARCH_MX1 extern struct platform_device imx1_camera_device; -extern struct platform_device imx_rtc_device; -extern struct platform_device imx_wdt_device; extern struct platform_device imx_usb_device; #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_gpt1; -extern struct platform_device mxc_gpt2; -#ifdef CONFIG_MACH_MX27 -extern struct platform_device mxc_gpt3; -extern struct platform_device mxc_gpt4; -extern struct platform_device mxc_gpt5; -#endif extern struct platform_device mxc_wdt; extern struct platform_device mxc_fb_device; extern struct platform_device mxc_pwm_device; -- cgit v0.10.2 From e08300043ee4e2df10be551b76e126d6c02f26cc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 2 Nov 2010 10:03:51 +0100 Subject: ARM: imx: dynamically allocate imx_udc device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is only available for mx1 machines with no in-tree user. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index cdc6f32..fba6285 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -70,49 +70,6 @@ struct platform_device imx1_camera_device = { .num_resources = ARRAY_SIZE(imx1_camera_resources), }; -static struct resource imx_usb_resources[] = { - { - .start = 0x00212000, - .end = 0x00212148, - .flags = IORESOURCE_MEM, - }, { - .start = MX1_USBD_INT0, - .end = MX1_USBD_INT0, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT1, - .end = MX1_USBD_INT1, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT2, - .end = MX1_USBD_INT2, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT3, - .end = MX1_USBD_INT3, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT4, - .end = MX1_USBD_INT4, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT5, - .end = MX1_USBD_INT5, - .flags = IORESOURCE_IRQ, - }, { - .start = MX1_USBD_INT6, - .end = MX1_USBD_INT6, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_usb_device = { - .name = "imx_udc", - .id = 0, - .num_resources = ARRAY_SIZE(imx_usb_resources), - .resource = imx_usb_resources, -}; - /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { { diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index a7e47f4..91906ce 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,6 +1,5 @@ #ifdef CONFIG_ARCH_MX1 extern struct platform_device imx1_camera_device; -extern struct platform_device imx_usb_device; #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index fb66467..2703f5a 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -22,6 +22,9 @@ config IMX_HAVE_PLATFORM_IMX_SSI config IMX_HAVE_PLATFORM_IMX_UART bool +config IMX_HAVE_PLATFORM_IMX_UDC + bool + config IMX_HAVE_PLATFORM_MXC_NAND bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 1d7d392..7c3eaf1 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -6,6 +6,7 @@ obj-y += platform-imx-dma.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/plat-mxc/devices/platform-imx_udc.c new file mode 100644 index 0000000..6fd675d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx_udc.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_imx_udc_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _USBD_BASE_ADDR, \ + .iosize = _size, \ + .irq0 = soc ## _INT_USBD0, \ + .irq1 = soc ## _INT_USBD1, \ + .irq2 = soc ## _INT_USBD2, \ + .irq3 = soc ## _INT_USBD3, \ + .irq4 = soc ## _INT_USBD4, \ + .irq5 = soc ## _INT_USBD5, \ + .irq6 = soc ## _INT_USBD6, \ + } + +#define imx_imx_udc_data_entry(soc, _size) \ + [_id] = imx_imx_udc_data_entry_single(soc, _size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_udc_data imx1_imx_udc_data __initconst = + imx_imx_udc_data_entry_single(MX1, SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +struct platform_device *__init imx_add_imx_udc( + const struct imx_imx_udc_data *data, + const struct imxusb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq0, + .end = data->irq0, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq1, + .end = data->irq1, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq2, + .end = data->irq2, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq3, + .end = data->irq3, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq4, + .end = data->irq4, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq5, + .end = data->irq5, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irq6, + .end = data->irq6, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("imx_udc", 0, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 431e0ef..4eb45fa 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -82,6 +82,22 @@ struct platform_device *__init imx_add_imx_uart_1irq( const struct imx_imx_uart_1irq_data *data, const struct imxuart_platform_data *pdata); +#include +struct imx_imx_udc_data { + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq0; + resource_size_t irq1; + resource_size_t irq2; + resource_size_t irq3; + resource_size_t irq4; + resource_size_t irq5; + resource_size_t irq6; +}; +struct platform_device *__init imx_add_imx_udc( + const struct imx_imx_udc_data *data, + const struct imxusb_platform_data *pdata); + #include struct imx_mxc_nand_data { /* diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index b6771f4..2cd3fcd 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -114,13 +114,13 @@ #define MX1_SSI_RX_INT 44 #define MX1_SSI_RX_ERR_INT 45 #define MX1_TOUCH_INT 46 -#define MX1_USBD_INT0 47 -#define MX1_USBD_INT1 48 -#define MX1_USBD_INT2 49 -#define MX1_USBD_INT3 50 -#define MX1_USBD_INT4 51 -#define MX1_USBD_INT5 52 -#define MX1_USBD_INT6 53 +#define MX1_INT_USBD0 47 +#define MX1_INT_USBD1 48 +#define MX1_INT_USBD2 49 +#define MX1_INT_USBD3 50 +#define MX1_INT_USBD4 51 +#define MX1_INT_USBD5 52 +#define MX1_INT_USBD6 53 #define MX1_BTSYS_INT 55 #define MX1_BTTIM_INT 56 #define MX1_BTWUI_INT 57 @@ -163,6 +163,6 @@ * to not break drivers/usb/gadget/imx_udc. Should go * away after this driver uses the new name. */ -#define USBD_INT0 MX1_USBD_INT0 +#define USBD_INT0 MX1_INT_USBD0 #endif /* ifndef __MACH_MX1_H__ */ -- cgit v0.10.2 From 6332c1071811a1d588cfc93330d87a57a7460a1b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 2 Nov 2010 11:56:54 +0100 Subject: ARM: imx: allow specifying a dma mask when creating a platform device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index 735776d..e9bcefe 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c @@ -17,6 +17,7 @@ */ #include +#include #include #include #include @@ -36,9 +37,10 @@ int __init mxc_register_device(struct platform_device *pdev, void *data) return ret; } -struct platform_device *__init imx_add_platform_device(const char *name, int id, +struct platform_device *__init imx_add_platform_device_dmamask( + const char *name, int id, const struct resource *res, unsigned int num_resources, - const void *data, size_t size_data) + const void *data, size_t size_data, u64 dmamask) { int ret = -ENOMEM; struct platform_device *pdev; @@ -47,6 +49,23 @@ struct platform_device *__init imx_add_platform_device(const char *name, int id, if (!pdev) goto err; + if (dmamask) { + /* + * This memory isn't freed when the device is put, + * I don't have a nice idea for that though. Conceptually + * dma_mask in struct device should not be a pointer. + * See http://thread.gmane.org/gmane.linux.kernel.pci/9081 + */ + pdev->dev.dma_mask = + kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); + if (!pdev->dev.dma_mask) + /* ret is still -ENOMEM; */ + goto err; + + *pdev->dev.dma_mask = dmamask; + pdev->dev.coherent_dma_mask = dmamask; + } + if (res) { ret = platform_device_add_resources(pdev, res, num_resources); if (ret) diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 4eb45fa..a5e97b8 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -10,9 +10,19 @@ #include #include -struct platform_device *imx_add_platform_device(const char *name, int id, +struct platform_device *imx_add_platform_device_dmamask( + const char *name, int id, const struct resource *res, unsigned int num_resources, - const void *data, size_t size_data); + const void *data, size_t size_data, u64 dmamask); + +static inline struct platform_device *imx_add_platform_device( + const char *name, int id, + const struct resource *res, unsigned int num_resources, + const void *data, size_t size_data) +{ + return imx_add_platform_device_dmamask( + name, id, res, num_resources, data, size_data, 0); +} #include struct imx_fec_data { -- cgit v0.10.2 From 9bb39b3f600101b09cbb35e0a0deb9d56c4fe67f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 2 Nov 2010 11:59:08 +0100 Subject: ARM: imx: dynamically allocate mx1-camera device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index fba6285..31c9d6c 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -45,31 +45,6 @@ #include "devices.h" #if defined(CONFIG_ARCH_MX1) -static struct resource imx1_camera_resources[] = { - { - .start = 0x00224000, - .end = 0x00224010, - .flags = IORESOURCE_MEM, - }, { - .start = MX1_CSI_INT, - .end = MX1_CSI_INT, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 imx1_camera_dmamask = DMA_BIT_MASK(32); - -struct platform_device imx1_camera_device = { - .name = "mx1-camera", - .id = 0, /* This is used to put cameras on this interface */ - .dev = { - .dma_mask = &imx1_camera_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = imx1_camera_resources, - .num_resources = ARRAY_SIZE(imx1_camera_resources), -}; - /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { { diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 91906ce..8f14452 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,7 +1,3 @@ -#ifdef CONFIG_ARCH_MX1 -extern struct platform_device imx1_camera_device; -#endif - #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) extern struct platform_device mxc_wdt; extern struct platform_device mxc_fb_device; diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 2703f5a..61a3e25 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -25,6 +25,9 @@ config IMX_HAVE_PLATFORM_IMX_UART config IMX_HAVE_PLATFORM_IMX_UDC bool +config IMX_HAVE_PLATFORM_MX1_CAMERA + bool + config IMX_HAVE_PLATFORM_MXC_NAND bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 7c3eaf1..86b47f2 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/plat-mxc/devices/platform-mx1-camera.c new file mode 100644 index 0000000..edcc581 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mx1-camera.c @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mx1_camera_data_entry_single(soc, _size) \ + { \ + .iobase = soc ## _CSI ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_CSI, \ + } + +#ifdef CONFIG_SOC_IMX1 +const struct imx_mx1_camera_data imx1_mx1_camera_data __initconst = + imx_mx1_camera_data_entry_single(MX1, 10); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +struct platform_device *__init imx_add_mx1_camera( + const struct imx_mx1_camera_data *data, + const struct mx1_camera_pdata *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mx1-camera", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index a5e97b8..ab0500a 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -108,6 +108,16 @@ struct platform_device *__init imx_add_imx_udc( const struct imx_imx_udc_data *data, const struct imxusb_platform_data *pdata); +#include +struct imx_mx1_camera_data { + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_mx1_camera( + const struct imx_mx1_camera_data *data, + const struct mx1_camera_pdata *pdata); + #include struct imx_mxc_nand_data { /* diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index 2cd3fcd..f1e336e 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -77,7 +77,7 @@ /* fixed interrput numbers */ #define MX1_INT_SOFTINT 0 -#define MX1_CSI_INT 6 +#define MX1_INT_CSI 6 #define MX1_DSPA_MAC_INT 7 #define MX1_DSPA_INT 8 #define MX1_COMP_INT 9 -- cgit v0.10.2 From 3bde75b5370bd69fd7f07a8e254bef05b1b5b219 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 2 Nov 2010 16:42:27 +0100 Subject: ARM: imx/gpio: remove some useless casts MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 9c3e362..a43d9cc 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -175,7 +175,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; - struct mxc_gpio_port *port = (struct mxc_gpio_port *)get_irq_data(irq); + struct mxc_gpio_port *port = get_irq_data(irq); irq_stat = __raw_readl(port->base + GPIO_ISR) & __raw_readl(port->base + GPIO_IMR); @@ -188,7 +188,7 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) { int i; u32 irq_msk, irq_stat; - struct mxc_gpio_port *port = (struct mxc_gpio_port *)get_irq_data(irq); + struct mxc_gpio_port *port = get_irq_data(irq); /* walk through all interrupt status registers */ for (i = 0; i < gpio_table_size; i++) { -- cgit v0.10.2 From b2997cb12b302ee6d233808e32214d00afdcf128 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 2 Nov 2010 17:50:55 +0100 Subject: ARM: imx: dynamically allocate mx2-camera device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index b957e78..84b3405 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -31,6 +31,10 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst; #define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata) #define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata) +extern const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst; +#define imx27_add_mx2_camera(pdata) \ + imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) + extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; #define imx27_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 31c9d6c..0c5ade4 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -77,38 +77,6 @@ int __init imx1_register_gpios(void) #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) - -#ifdef CONFIG_MACH_MX27 -static struct resource mx27_camera_resources[] = { - { - .start = MX27_CSI_BASE_ADDR, - .end = MX27_CSI_BASE_ADDR + 0x1f, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_EMMA_PRP_BASE_ADDR, - .end = MX27_EMMA_PRP_BASE_ADDR + 0x1f, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_INT_CSI, - .end = MX27_INT_CSI, - .flags = IORESOURCE_IRQ, - },{ - .start = MX27_INT_EMMAPRP, - .end = MX27_INT_EMMAPRP, - .flags = IORESOURCE_IRQ, - }, -}; -struct platform_device mx27_camera_device = { - .name = "mx2-camera", - .id = 0, - .num_resources = ARRAY_SIZE(mx27_camera_resources), - .resource = mx27_camera_resources, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; -#endif - /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */ static struct resource mxc_wdt_resources[] = { { diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 8f14452..3d020b9 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -5,7 +5,6 @@ extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; extern struct platform_device mxc_sdhc_device1; extern struct platform_device mxc_otg_udc_device; -extern struct platform_device mx27_camera_device; extern struct platform_device mxc_otg_host; extern struct platform_device mxc_usbh1; extern struct platform_device mxc_usbh2; diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 61a3e25..37d7e00 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -28,6 +28,9 @@ config IMX_HAVE_PLATFORM_IMX_UDC config IMX_HAVE_PLATFORM_MX1_CAMERA bool +config IMX_HAVE_PLATFORM_MX2_CAMERA + bool + config IMX_HAVE_PLATFORM_MXC_NAND bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 86b47f2..88392fc 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/plat-mxc/devices/platform-mx2-camera.c new file mode 100644 index 0000000..a18c803 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mx2-camera.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mx2_camera_data_entry_single(soc) \ + { \ + .iobasecsi = soc ## _CSI_BASE_ADDR, \ + .iosizecsi = SZ_32, \ + .irqcsi = soc ## _INT_CSI, \ + .iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \ + .iosizeemmaprp = SZ_32, \ + .irqemmaprp = soc ## _INT_EMMAPRP, \ + } + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = + imx_mx2_camera_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_mx2_camera( + const struct imx_mx2_camera_data *data, + const struct mx2_camera_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobasecsi, + .end = data->iobasecsi + data->iosizecsi - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->iobaseemmaprp, + .end = data->iobaseemmaprp + data->iosizeemmaprp - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irqcsi, + .end = data->irqcsi, + .flags = IORESOURCE_IRQ, + }, { + .start = data->irqemmaprp, + .end = data->irqemmaprp, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mx2-camera", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index ab0500a..e31fc50 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -118,6 +118,19 @@ struct platform_device *__init imx_add_mx1_camera( const struct imx_mx1_camera_data *data, const struct mx1_camera_pdata *pdata); +#include +struct imx_mx2_camera_data { + resource_size_t iobasecsi; + resource_size_t iosizecsi; + resource_size_t irqcsi; + resource_size_t iobaseemmaprp; + resource_size_t iosizeemmaprp; + resource_size_t irqemmaprp; +}; +struct platform_device *__init imx_add_mx2_camera( + const struct imx_mx2_camera_data *data, + const struct mx2_camera_platform_data *pdata); + #include struct imx_mxc_nand_data { /* diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 3116b3b..2734d24 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -67,8 +67,8 @@ #define MX27_USBOTG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000) #define MX27_OTG_BASE_ADDR MX27_USBOTG_BASE_ADDR #define MX27_SAHARA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x25000) -#define MX27_EMMA_PP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000) -#define MX27_EMMA_PRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400) +#define MX27_EMMAPP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000) +#define MX27_EMMAPRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400) #define MX27_CCM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27000) #define MX27_SYSCTRL_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x27800) #define MX27_IIM_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x28000) -- cgit v0.10.2 From e0a1961df8ad898b661cf0adcf3519254f135a44 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 4 Nov 2010 10:09:10 +0100 Subject: ARM: imx: dynamically allocate imx2-wdt devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently there is no platform data used in the driver. In case this changes and for consistency NULL is passed unused to the soc specific functions. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index edf0182..6b1662c 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -95,6 +95,7 @@ config MACH_MX27ADS config MACH_PCM038 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND @@ -121,6 +122,7 @@ endchoice config MACH_CPUIMX27 bool "Eukrea CPUIMX27 module" + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND @@ -185,6 +187,7 @@ config MACH_IMX27LITE config MACH_PCA100 bool "Phytec phyCARD-s (pca100)" + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 61b0aa7..738dbba 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -9,6 +9,10 @@ #include #include +extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst; +#define imx21_add_imx2_wdt(pdata) \ + imx_add_imx2_wdt(&imx21_imx2_wdt_data) + extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; #define imx21_add_imx_i2c(pdata) \ imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 84b3405..b2d4c51 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -13,6 +13,10 @@ extern const struct imx_fec_data imx27_fec_data __initconst; #define imx27_add_fec(pdata) \ imx_add_fec(&imx27_fec_data, pdata) +extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst; +#define imx27_add_imx2_wdt(pdata) \ + imx_add_imx2_wdt(&imx27_imx2_wdt_data) + extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; #define imx27_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 0c5ade4..20655fb 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -77,22 +77,6 @@ int __init imx1_register_gpios(void) #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -/* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */ -static struct resource mxc_wdt_resources[] = { - { - .start = MX2x_WDOG_BASE_ADDR, - .end = MX2x_WDOG_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device mxc_wdt = { - .name = "imx2-wdt", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_wdt_resources), - .resource = mxc_wdt_resources, -}; - /* * lcdc: * - i.MX1: the basic controller diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 3d020b9..f441b02 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,5 +1,4 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_wdt; extern struct platform_device mxc_fb_device; extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 9baaf3d..5771d4e 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -157,7 +157,6 @@ cpuimx27_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &eukrea_cpuimx27_nor_mtd_device, - &mxc_wdt, }; static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = { @@ -261,6 +260,7 @@ static void __init eukrea_cpuimx27_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_imx2_wdt(NULL); imx27_add_mxc_w1(NULL); #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 39c580b..11da9c2 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -171,10 +171,6 @@ pca100_nand_board_info __initconst = { .hw_ecc = 1, }; -static struct platform_device *platform_devices[] __initdata = { - &mxc_wdt, -}; - static const struct imxi2c_platform_data pca100_i2c1_data __initconst = { .bitrate = 100000, }; @@ -432,7 +428,7 @@ static void __init pca100_init(void) mxc_register_device(&mxc_fb_device, &pca100_fb_data); imx27_add_fec(NULL); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_imx2_wdt(NULL); imx27_add_mxc_w1(NULL); } diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 2cfc4b9..3c9f2df 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -173,7 +173,6 @@ pcm038_nand_board_info __initconst = { static struct platform_device *platform_devices[] __initdata = { &pcm038_nor_mtd_device, &pcm038_sram_mtd_device, - &mxc_wdt, }; /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and @@ -325,6 +324,7 @@ static void __init pcm038_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); + imx27_add_imx2_wdt(NULL); imx27_add_mxc_w1(NULL); #ifdef CONFIG_MACH_PCM970_BASEBOARD diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 37d7e00..01b0d0c 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -13,6 +13,9 @@ config IMX_HAVE_PLATFORM_GPIO_KEYS bool default y if ARCH_MX51 +config IMX_HAVE_PLATFORM_IMX2_WDT + bool + config IMX_HAVE_PLATFORM_IMX_I2C bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 88392fc..224f665 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-y += platform-imx-dma.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c new file mode 100644 index 0000000..86eb7f1 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx2-wdt.c @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include +#include + +#define imx_imx2_wdt_data_entry_single(soc) \ + { \ + .iobase = soc ## _WDOG_BASE_ADDR, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst = + imx_imx2_wdt_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_imx2_wdt( + const struct imx_imx2_wdt_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + }; + return imx_add_platform_device("imx2-wdt", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index e31fc50..a0ac8454 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -43,6 +43,12 @@ struct platform_device *__init imx_add_flexcan(int id, struct platform_device *__init imx_add_gpio_keys( const struct gpio_keys_platform_data *pdata); +struct imx_imx2_wdt_data { + resource_size_t iobase; +}; +struct platform_device *__init imx_add_imx2_wdt( + const struct imx_imx2_wdt_data *data); + #include struct imx_imx_i2c_data { int id; -- cgit v0.10.2 From fc40d0191943fa995f5359b5c23aa7c3dea69d7b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 4 Nov 2010 12:02:35 +0100 Subject: ARM: imx: change the way flexcan devices are registered MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Group soc specific data in a global struct instead of repeating it for each call to imxXX_add_flexcanX. The structs holding the actual data are placed in .init.constdata and so don't do much harm. Compared to the previous approach this reduces code size to call imx_add_flexcan. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-mx25/devices-imx25.h b/arch/arm/mach-mx25/devices-imx25.h index 93afa10..f62ce93 100644 --- a/arch/arm/mach-mx25/devices-imx25.h +++ b/arch/arm/mach-mx25/devices-imx25.h @@ -13,10 +13,11 @@ extern const struct imx_fec_data imx25_fec_data __initconst; #define imx25_add_fec(pdata) \ imx_add_fec(&imx25_fec_data, pdata) -#define imx25_add_flexcan0(pdata) \ - imx_add_flexcan(0, MX25_CAN1_BASE_ADDR, SZ_16K, MX25_INT_CAN1, pdata) -#define imx25_add_flexcan1(pdata) \ - imx_add_flexcan(1, MX25_CAN2_BASE_ADDR, SZ_16K, MX25_INT_CAN2, pdata) +extern const struct imx_flexcan_data imx25_flexcan_data[] __initconst; +#define imx25_add_flexcan(id, pdata) \ + imx_add_flexcan(&imx25_flexcan_data[id], pdata) +#define imx25_add_flexcan0(pdata) imx25_add_flexcan(0, pdata) +#define imx25_add_flexcan1(pdata) imx25_add_flexcan(1, pdata) extern const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst; #define imx25_add_imx_i2c(id, pdata) \ diff --git a/arch/arm/mach-mx3/devices-imx35.h b/arch/arm/mach-mx3/devices-imx35.h index 7602cb4..a71ce68 100644 --- a/arch/arm/mach-mx3/devices-imx35.h +++ b/arch/arm/mach-mx3/devices-imx35.h @@ -13,10 +13,11 @@ extern const struct imx_fec_data imx35_fec_data __initconst; #define imx35_add_fec(pdata) \ imx_add_fec(&imx35_fec_data, pdata) -#define imx35_add_flexcan0(pdata) \ - imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata) -#define imx35_add_flexcan1(pdata) \ - imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata) +extern const struct imx_flexcan_data imx35_flexcan_data[] __initconst; +#define imx35_add_flexcan(id, pdata) \ + imx_add_flexcan(&imx35_flexcan_data[id], pdata) +#define imx35_add_flexcan0(pdata) imx35_add_flexcan(0, pdata) +#define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata) extern const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst; #define imx35_add_imx_i2c(id, pdata) \ diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/plat-mxc/devices/platform-flexcan.c index 5e97a01..5189017 100644 --- a/arch/arm/plat-mxc/devices/platform-flexcan.c +++ b/arch/arm/plat-mxc/devices/platform-flexcan.c @@ -5,26 +5,54 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ - +#include #include -struct platform_device *__init imx_add_flexcan(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irq, +#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ + { \ + .id = _id, \ + .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_CAN ## _hwid, \ + } + +#define imx_flexcan_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size) + +#ifdef CONFIG_ARCH_MX25 +const struct imx_flexcan_data imx25_flexcan_data[] __initconst = { +#define imx25_flexcan_data_entry(_id, _hwid) \ + imx_flexcan_data_entry(MX25, _id, _hwid, SZ_16K) + imx25_flexcan_data_entry(0, 1), + imx25_flexcan_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX25 */ + +#ifdef CONFIG_ARCH_MX35 +const struct imx_flexcan_data imx35_flexcan_data[] __initconst = { +#define imx35_flexcan_data_entry(_id, _hwid) \ + imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K) + imx35_flexcan_data_entry(0, 1), + imx35_flexcan_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_ARCH_MX35 */ + +struct platform_device *__init imx_add_flexcan( + const struct imx_flexcan_data *data, const struct flexcan_platform_data *pdata) { struct resource res[] = { { - .start = iobase, - .end = iobase + iosize - 1, + .start = data->iobase, + .end = data->iobase + data->iosize - 1, .flags = IORESOURCE_MEM, }, { - .start = irq, - .end = irq, + .start = data->irq, + .end = data->irq, .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device("flexcan", id, res, ARRAY_SIZE(res), - pdata, sizeof(*pdata)); + return imx_add_platform_device("flexcan", data->id, + res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index a0ac8454..830369e 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -34,9 +34,14 @@ struct platform_device *__init imx_add_fec( const struct fec_platform_data *pdata); #include -struct platform_device *__init imx_add_flexcan(int id, - resource_size_t iobase, resource_size_t iosize, - resource_size_t irq, +struct imx_flexcan_data { + int id; + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_flexcan( + const struct imx_flexcan_data *data, const struct flexcan_platform_data *pdata); #include -- cgit v0.10.2 From ad851bffba6afd6468f96a6180cc4a14e9ebee38 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Thu, 4 Nov 2010 17:07:48 +0100 Subject: ARM: imx: dynamically register imx-fb devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 6b1662c..d3e983e 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -71,6 +71,7 @@ comment "MX21 platforms:" config MACH_MX21ADS bool "MX21ADS platform" + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND help @@ -85,6 +86,7 @@ comment "MX27 platforms:" config MACH_MX27ADS bool "MX27ADS platform" + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND @@ -112,8 +114,8 @@ choice default MACH_PCM970_BASEBOARD config MACH_PCM970_BASEBOARD - prompt "PHYTEC PCM970 development board" - bool + bool "PHYTEC PCM970 development board" + select IMX_HAVE_PLATFORM_IMX_FB help This adds board specific devices that can be found on Phytec's PCM970 evaluation board. @@ -153,6 +155,7 @@ choice config MACH_EUKREA_MBIMX27_BASEBOARD bool "Eukrea MBIMX27 development board" + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SPI_IMX @@ -188,6 +191,7 @@ config MACH_IMX27LITE config MACH_PCA100 bool "Phytec phyCARD-s (pca100)" select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART @@ -201,6 +205,7 @@ config MACH_PCA100 config MACH_MXT_TD60 bool "Maxtrack i-MXT TD60" + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_NAND diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 738dbba..0f782b6 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -13,6 +13,10 @@ extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst; #define imx21_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx21_imx2_wdt_data) +extern const struct imx_imx_fb_data imx21_imx_fb_data __initconst; +#define imx21_add_imx_fb(pdata) \ + imx_add_imx_fb(&imx21_imx_fb_data, pdata) + extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; #define imx21_add_imx_i2c(pdata) \ imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index b2d4c51..6e11bef 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -17,6 +17,10 @@ extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst; #define imx27_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx27_imx2_wdt_data) +extern const struct imx_imx_fb_data imx27_imx_fb_data __initconst; +#define imx27_add_imx_fb(pdata) \ + imx_add_imx_fb(&imx27_imx_fb_data, pdata) + extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; #define imx27_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 20655fb..d784564 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -77,35 +77,6 @@ int __init imx1_register_gpios(void) #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -/* - * lcdc: - * - i.MX1: the basic controller - * - i.MX21: to be checked - * - i.MX27: like i.MX1, with slightly variations - */ -static struct resource mxc_fb[] = { - { - .start = MX2x_LCDC_BASE_ADDR, - .end = MX2x_LCDC_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MX2x_INT_LCDC, - .end = MX2x_INT_LCDC, - .flags = IORESOURCE_IRQ, - } -}; - -/* mxc lcd driver */ -struct platform_device mxc_fb_device = { - .name = "imx-fb", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fb), - .resource = mxc_fb, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - static struct resource mxc_pwm_resources[] = { { .start = MX2x_PWM_BASE_ADDR, diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index f441b02..407e90a 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,5 +1,4 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_fb_device; extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; extern struct platform_device mxc_sdhc_device1; diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 026263c..a226e25 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -32,7 +32,6 @@ #include #include -#include #include #include #include @@ -196,7 +195,7 @@ static struct imx_fb_videomode eukrea_mbimx27_modes[] = { }, }; -static struct imx_fb_platform_data eukrea_mbimx27_fb_data = { +static const struct imx_fb_platform_data eukrea_mbimx27_fb_data __initconst = { .mode = eukrea_mbimx27_modes, .num_modes = ARRAY_SIZE(eukrea_mbimx27_modes), @@ -351,7 +350,7 @@ void __init eukrea_mbimx27_baseboard_init(void) imx27_add_imx_uart3(&uart_pdata); #endif - mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data); + imx27_add_imx_fb(&eukrea_mbimx27_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc_pdata); i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index e1282e9..4820a67 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include @@ -213,7 +212,7 @@ static struct imx_fb_videomode mx21ads_modes[] = { }, }; -static struct imx_fb_platform_data mx21ads_fb_data = { +static const struct imx_fb_platform_data mx21ads_fb_data __initconst = { .mode = mx21ads_modes, .num_modes = ARRAY_SIZE(mx21ads_modes), @@ -296,7 +295,7 @@ static void __init mx21ads_board_init(void) imx21_add_imx_uart0(&uart_pdata_rts); imx21_add_imx_uart2(&uart_pdata_norts); imx21_add_imx_uart3(&uart_pdata_rts); - mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); + imx21_add_imx_fb(&mx21ads_fb_data); mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); imx21_add_mxc_nand(&mx21ads_nand_board_info); diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 219899a..d97b25b 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -228,7 +227,7 @@ static struct imx_fb_videomode mx27ads_modes[] = { }, }; -static struct imx_fb_platform_data mx27ads_fb_data = { +static const struct imx_fb_platform_data mx27ads_fb_data __initconst = { .mode = mx27ads_modes, .num_modes = ARRAY_SIZE(mx27ads_modes), @@ -307,7 +306,7 @@ static void __init mx27ads_board_init(void) i2c_register_board_info(1, mx27ads_i2c_devices, ARRAY_SIZE(mx27ads_i2c_devices)); imx27_add_imx_i2c(1, &mx27ads_i2c1_data); - mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); + imx27_add_imx_fb(&mx27ads_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 38d3a4a..0c94485 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -196,7 +195,7 @@ static struct imx_fb_videomode mxt_td60_modes[] = { }, }; -static struct imx_fb_platform_data mxt_td60_fb_data = { +static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = { .mode = mxt_td60_modes, .num_modes = ARRAY_SIZE(mxt_td60_modes), @@ -253,7 +252,7 @@ static void __init mxt_td60_board_init(void) imx27_add_imx_i2c(0, &mxt_td60_i2c0_data); imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); - mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data); + imx27_add_imx_fb(&mxt_td60_fb_data); mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); imx27_add_fec(NULL); } diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 11da9c2..30490c3 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -43,7 +43,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -350,7 +349,7 @@ static struct imx_fb_videomode pca100_fb_modes[] = { }, }; -static struct imx_fb_platform_data pca100_fb_data = { +static const struct imx_fb_platform_data pca100_fb_data __initconst = { .mode = pca100_fb_modes, .num_modes = ARRAY_SIZE(pca100_fb_modes), @@ -425,7 +424,7 @@ static void __init pca100_init(void) mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); } - mxc_register_device(&mxc_fb_device, &pca100_fb_data); + imx27_add_imx_fb(&pca100_fb_data); imx27_add_fec(NULL); imx27_add_imx2_wdt(NULL); diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index 9110d9c..9cf9460 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c @@ -25,10 +25,10 @@ #include #include -#include #include #include +#include "devices-imx27.h" #include "devices.h" static const int pcm970_pins[] __initconst = { @@ -179,7 +179,7 @@ static struct imx_fb_videomode pcm970_modes[] = { }, }; -static struct imx_fb_platform_data pcm038_fb_data = { +static const struct imx_fb_platform_data pcm038_fb_data __initconst = { .mode = pcm970_modes, .num_modes = ARRAY_SIZE(pcm970_modes), @@ -226,7 +226,7 @@ void __init pcm970_baseboard_init(void) mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins), "PCM970"); - mxc_register_device(&mxc_fb_device, &pcm038_fb_data); + imx27_add_imx_fb(&pcm038_fb_data); mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN); mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); platform_device_register(&pcm970_sja1000); diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 01b0d0c..2542371 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -16,6 +16,9 @@ config IMX_HAVE_PLATFORM_GPIO_KEYS config IMX_HAVE_PLATFORM_IMX2_WDT bool +config IMX_HAVE_PLATFORM_IMX_FB + bool + config IMX_HAVE_PLATFORM_IMX_I2C bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 224f665..d3f845e 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-y += platform-imx-dma.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/plat-mxc/devices/platform-imx-fb.c new file mode 100644 index 0000000..42ed3be --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx-fb.c @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_imx_fb_data_entry_single(soc) \ + { \ + .iobase = soc ## _LCDC_BASE_ADDR, \ + .irq = soc ## _INT_LCDC, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_fb_data imx21_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_fb_data imx27_imx_fb_data __initconst = + imx_imx_fb_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_imx_fb( + const struct imx_imx_fb_data *data, + const struct imx_fb_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("imx-fb", 0, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 830369e..b1d7656 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -54,6 +54,15 @@ struct imx_imx2_wdt_data { struct platform_device *__init imx_add_imx2_wdt( const struct imx_imx2_wdt_data *data); +#include +struct imx_imx_fb_data { + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_imx_fb( + const struct imx_imx_fb_data *data, + const struct imx_fb_platform_data *pdata); + #include struct imx_imx_i2c_data { int id; diff --git a/arch/arm/plat-mxc/include/mach/imxfb.h b/arch/arm/plat-mxc/include/mach/imxfb.h index 5263506..9de8f06 100644 --- a/arch/arm/plat-mxc/include/mach/imxfb.h +++ b/arch/arm/plat-mxc/include/mach/imxfb.h @@ -1,6 +1,8 @@ /* * This structure describes the machine which we are running on. */ +#ifndef __MACH_IMXFB_H__ +#define __MACH_IMXFB_H__ #include @@ -79,3 +81,4 @@ struct imx_fb_platform_data { }; void set_imx_fb_info(struct imx_fb_platform_data *); +#endif /* ifndef __MACH_IMXFB_H__ */ -- cgit v0.10.2 From c06246576a6e71b72ecc6b4b39a5c8eaf45dc2ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 5 Nov 2010 11:22:37 +0100 Subject: ARM: mx3: enable SPI_IMX for better compile coverage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SPI_IMX defaults to m for i.MX machines. So enabling SPI is enough. Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig index f0c339f..e648ea3 100644 --- a/arch/arm/configs/mx3_defconfig +++ b/arch/arm/configs/mx3_defconfig @@ -84,6 +84,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_IMX=y +CONFIG_SPI=y CONFIG_W1=y CONFIG_W1_MASTER_MXC=y CONFIG_W1_SLAVE_THERM=y -- cgit v0.10.2 From bf182bcc6e726cce2f02b699bd0fba787734554f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 5 Nov 2010 15:01:16 +0100 Subject: ARM: imx: dynamically allocate mxc_pwm devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index d784564..9ee0e09 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -77,25 +77,6 @@ int __init imx1_register_gpios(void) #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -static struct resource mxc_pwm_resources[] = { - { - .start = MX2x_PWM_BASE_ADDR, - .end = MX2x_PWM_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MX2x_INT_PWM, - .end = MX2x_INT_PWM, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device mxc_pwm_device = { - .name = "mxc_pwm", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_pwm_resources), - .resource = mxc_pwm_resources, -}; - #define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \ static struct resource mxc_sdhc_resources ## n[] = { \ { \ diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 407e90a..1ba5042 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,5 +1,4 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_pwm_device; extern struct platform_device mxc_sdhc_device0; extern struct platform_device mxc_sdhc_device1; extern struct platform_device mxc_otg_udc_device; diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 2542371..2ded17b 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -40,6 +40,9 @@ config IMX_HAVE_PLATFORM_MX2_CAMERA config IMX_HAVE_PLATFORM_MXC_NAND bool +config IMX_HAVE_PLATFORM_MXC_PWM + bool + config IMX_HAVE_PLATFORM_MXC_W1 bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index d3f845e..8ecd974 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -12,5 +12,6 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_PWM) += platform-mxc_pwm.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c new file mode 100644 index 0000000..3ebbc67 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mxc_pwm_data_entry_single(soc) \ + { \ + .iobase = soc ## _PWM_BASE_ADDR, \ + .irq = soc ## _INT_PWM, \ + } + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_pwm_data imx21_mxc_pwm_data __initconst = + imx_mxc_pwm_data_entry_single(MX21); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst = + imx_mxc_pwm_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_mxc_pwm( + const struct imx_mxc_pwm_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device("mxc_pwm", 0, + res, ARRAY_SIZE(res), NULL, 0); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index b1d7656..e241e41 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -168,6 +168,13 @@ struct platform_device *__init imx_add_mxc_nand( const struct imx_mxc_nand_data *data, const struct mxc_nand_platform_data *pdata); +struct imx_mxc_pwm_data { + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_mxc_pwm( + const struct imx_mxc_pwm_data *data); + struct imx_mxc_w1_data { resource_size_t iobase; }; -- cgit v0.10.2 From c194daad0e0de94ed5e03aa723eb56b4a3ae9738 Mon Sep 17 00:00:00 2001 From: Alberto Panizzo Date: Mon, 1 Nov 2010 18:00:03 +0100 Subject: ARM: mx3/mach-pcm037_eet: Fix section mismatch for eet_init_devices() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function should be marked as __init because it is used only in the init phase. This fix the compiler warning: LD arch/arm/mach-mx3/built-in.o WARNING: arch/arm/mach-mx3/built-in.o(.text+0x1328): Section mismatch in reference from the function eet_init_devices() to the (unknown reference) .init.rodata:(unknown) The function eet_init_devices() references the (unknown reference) __initconst (unknown). This is often because eet_init_devices lacks a __initconst annotation or the annotation of (unknown) is wrong. Signed-off-by: Alberto Panizzo Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-mx3/mach-pcm037_eet.c b/arch/arm/mach-mx3/mach-pcm037_eet.c index 99e0894..3392812 100644 --- a/arch/arm/mach-mx3/mach-pcm037_eet.c +++ b/arch/arm/mach-mx3/mach-pcm037_eet.c @@ -171,7 +171,7 @@ static struct platform_device pcm037_gpio_keys_device = { }, }; -static int eet_init_devices(void) +static int __init eet_init_devices(void) { if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET) return 0; -- cgit v0.10.2 From 9d3d945a8d5be2c915f646e8dff8422486a77030 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 5 Nov 2010 17:26:09 +0100 Subject: ARM: imx: dynamically register mxc-mmc devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ... plus a trivial simplification of mx21ads_sdhc_init() Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index d3e983e..8e9297b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -73,6 +73,7 @@ config MACH_MX21ADS bool "MX21ADS platform" select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND help Include support for MX21ADS platform. This includes specific @@ -89,6 +90,7 @@ config MACH_MX27ADS select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 help @@ -116,6 +118,7 @@ choice config MACH_PCM970_BASEBOARD bool "PHYTEC PCM970 development board" select IMX_HAVE_PLATFORM_IMX_FB + select IMX_HAVE_PLATFORM_MXC_MMC help This adds board specific devices that can be found on Phytec's PCM970 evaluation board. @@ -137,6 +140,7 @@ config MACH_CPUIMX27 config MACH_EUKREA_CPUIMX27_USESDHC2 bool "CPUIMX27 integrates SDHC2 module" depends on MACH_CPUIMX27 + select IMX_HAVE_PLATFORM_MXC_MMC help This adds support for the internal SDHC2 used on CPUIMX27 for wifi or eMMC. @@ -158,6 +162,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX help This adds board specific devices that can be found on Eukrea's @@ -168,6 +173,7 @@ endchoice config MACH_MX27_3DS bool "MX27PDK platform" select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC help Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. @@ -176,6 +182,7 @@ config MACH_IMX27_VISSTRIM_M10 bool "Vista Silicon i.MX27 Visstrim_m10" select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC help Include support for Visstrim_m10 platform and its different variants. This includes specific configurations for the board and its @@ -195,6 +202,7 @@ config MACH_PCA100 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX @@ -208,6 +216,7 @@ config MACH_MXT_TD60 select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND help Include support for i-MXT (aka td60) platform. This diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 0f782b6..a97e921 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -33,6 +33,10 @@ extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst; #define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata) #define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata) +extern const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst; +#define imx21_add_mxc_mmc(id, pdata) \ + imx_add_mxc_mmc(&imx21_mxc_mmc_data[id], pdata) + extern const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst; #define imx21_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 6e11bef..6466744 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -43,6 +43,10 @@ extern const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst; #define imx27_add_mx2_camera(pdata) \ imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) +extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst; +#define imx27_add_mxc_mmc(id, pdata) \ + imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata) + extern const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst; #define imx27_add_mxc_nand(pdata) \ imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 9ee0e09..7609e8a 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -76,40 +76,6 @@ int __init imx1_register_gpios(void) } #endif -#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -#define DEFINE_MXC_MMC_DEVICE(n, baseaddr, irq, dmareq) \ - static struct resource mxc_sdhc_resources ## n[] = { \ - { \ - .start = baseaddr, \ - .end = baseaddr + SZ_4K - 1, \ - .flags = IORESOURCE_MEM, \ - }, { \ - .start = irq, \ - .end = irq, \ - .flags = IORESOURCE_IRQ, \ - }, { \ - .start = dmareq, \ - .end = dmareq, \ - .flags = IORESOURCE_DMA, \ - }, \ - }; \ - \ - static u64 mxc_sdhc ## n ## _dmamask = DMA_BIT_MASK(32); \ - \ - struct platform_device mxc_sdhc_device ## n = { \ - .name = "mxc-mmc", \ - .id = n, \ - .dev = { \ - .dma_mask = &mxc_sdhc ## n ## _dmamask, \ - .coherent_dma_mask = DMA_BIT_MASK(32), \ - }, \ - .num_resources = ARRAY_SIZE(mxc_sdhc_resources ## n), \ - .resource = mxc_sdhc_resources ## n, \ - } - -DEFINE_MXC_MMC_DEVICE(0, MX2x_SDHC1_BASE_ADDR, MX2x_INT_SDHC1, MX2x_DMA_REQ_SDHC1); -DEFINE_MXC_MMC_DEVICE(1, MX2x_SDHC2_BASE_ADDR, MX2x_INT_SDHC2, MX2x_DMA_REQ_SDHC2); - #ifdef CONFIG_MACH_MX27 static struct resource otg_resources[] = { { @@ -203,6 +169,7 @@ struct platform_device mxc_usbh2 = { }; #endif +#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) /* GPIO port description */ #define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \ { \ diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 1ba5042..a45d760 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,6 +1,4 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_sdhc_device0; -extern struct platform_device mxc_sdhc_device1; extern struct platform_device mxc_otg_udc_device; extern struct platform_device mxc_otg_host; extern struct platform_device mxc_usbh1; diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index a226e25..fa5aade 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include @@ -305,7 +304,7 @@ static struct platform_device *platform_devices[] __initdata = { &leds_gpio, }; -static struct imxmmc_platform_data sdhc_pdata = { +static const struct imxmmc_platform_data sdhc_pdata __initconst = { .dat3_card_detect = 1, }; @@ -351,7 +350,7 @@ void __init eukrea_mbimx27_baseboard_init(void) #endif imx27_add_imx_fb(&eukrea_mbimx27_fb_data); - mxc_register_device(&mxc_sdhc_device0, &sdhc_pdata); + imx27_add_mxc_mmc(0, &sdhc_pdata); i2c_register_board_info(0, eukrea_mbimx27_i2c_devices, ARRAY_SIZE(eukrea_mbimx27_i2c_devices)); diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 5771d4e..06ff79a 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -265,7 +265,7 @@ static void __init eukrea_cpuimx27_init(void) #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) /* SDHC2 can be used for Wifi */ - mxc_register_device(&mxc_sdhc_device1, NULL); + imx27_add_mxc_mmc(1, NULL); #endif #if defined(MACH_EUKREA_CPUIMX27_USEUART4) /* in which case UART4 is also used for Bluetooth */ diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 59716fa..deef1fa 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include @@ -156,7 +155,7 @@ static void visstrim_m10_sdhc1_exit(struct device *dev, void *data) free_irq(SDHC1_IRQ, data); } -static struct imxmmc_platform_data visstrim_m10_sdhc_pdata = { +static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = { .init = visstrim_m10_sdhc1_init, .exit = visstrim_m10_sdhc1_exit, }; @@ -237,7 +236,7 @@ static void __init visstrim_m10_board_init(void) ARRAY_SIZE(visstrim_m10_i2c_devices)); imx27_add_imx_i2c(0, &visstrim_m10_i2c_data); imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); - mxc_register_device(&mxc_sdhc_device0, &visstrim_m10_sdhc_pdata); + imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata); mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 4820a67..83c064a 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -26,7 +26,6 @@ #include #include #include -#include #include "devices-imx21.h" #include "devices.h" @@ -232,15 +231,8 @@ static int mx21ads_sdhc_get_ro(struct device *dev) static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq, void *data) { - int ret; - - ret = request_irq(IRQ_GPIOD(25), detect_irq, + return request_irq(IRQ_GPIOD(25), detect_irq, IRQF_TRIGGER_FALLING, "mmc-detect", data); - if (ret) - goto out; - return 0; -out: - return ret; } static void mx21ads_sdhc_exit(struct device *dev, void *data) @@ -248,7 +240,7 @@ static void mx21ads_sdhc_exit(struct device *dev, void *data) free_irq(IRQ_GPIOD(25), data); } -static struct imxmmc_platform_data mx21ads_sdhc_pdata = { +static const struct imxmmc_platform_data mx21ads_sdhc_pdata __initconst = { .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */ .get_ro = mx21ads_sdhc_get_ro, .init = mx21ads_sdhc_init, @@ -296,7 +288,7 @@ static void __init mx21ads_board_init(void) imx21_add_imx_uart2(&uart_pdata_norts); imx21_add_imx_uart3(&uart_pdata_rts); imx21_add_imx_fb(&mx21ads_fb_data); - mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); + imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata); imx21_add_mxc_nand(&mx21ads_nand_board_info); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 84a5ba0..e6212c3 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -30,7 +30,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -109,7 +108,7 @@ static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) free_irq(IRQ_GPIOB(26), data); } -static struct imxmmc_platform_data sdhc1_pdata = { +static const struct imxmmc_platform_data sdhc1_pdata __initconst = { .init = mx27_3ds_sdhc1_init, .exit = mx27_3ds_sdhc1_exit, }; @@ -129,7 +128,7 @@ static void __init mx27pdk_init(void) imx27_add_imx_uart0(&uart_pdata); imx27_add_fec(NULL); mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data); - mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); + imx27_add_mxc_mmc(0, &sdhc1_pdata); } static void __init mx27pdk_timer_init(void) diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index d97b25b..370481b 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -30,7 +30,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -271,12 +270,12 @@ static void mx27ads_sdhc2_exit(struct device *dev, void *data) free_irq(IRQ_GPIOB(7), data); } -static struct imxmmc_platform_data sdhc1_pdata = { +static const struct imxmmc_platform_data sdhc1_pdata __initconst = { .init = mx27ads_sdhc1_init, .exit = mx27ads_sdhc1_exit, }; -static struct imxmmc_platform_data sdhc2_pdata = { +static const struct imxmmc_platform_data sdhc2_pdata __initconst = { .init = mx27ads_sdhc2_init, .exit = mx27ads_sdhc2_exit, }; @@ -307,8 +306,8 @@ static void __init mx27ads_board_init(void) ARRAY_SIZE(mx27ads_i2c_devices)); imx27_add_imx_i2c(1, &mx27ads_i2c1_data); imx27_add_imx_fb(&mx27ads_fb_data); - mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); - mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); + imx27_add_mxc_mmc(0, &sdhc1_pdata); + imx27_add_mxc_mmc(1, &sdhc2_pdata); imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 0c94485..d1a3158 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -31,7 +31,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -225,7 +224,7 @@ static void mxt_td60_sdhc1_exit(struct device *dev, void *data) free_irq(IRQ_GPIOF(8), data); } -static struct imxmmc_platform_data sdhc1_pdata = { +static const struct imxmmc_platform_data sdhc1_pdata __initconst = { .init = mxt_td60_sdhc1_init, .exit = mxt_td60_sdhc1_exit, }; @@ -253,7 +252,7 @@ static void __init mxt_td60_board_init(void) imx27_add_imx_i2c(0, &mxt_td60_i2c0_data); imx27_add_imx_i2c(1, &mxt_td60_i2c1_data); imx27_add_imx_fb(&mxt_td60_fb_data); - mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); + imx27_add_mxc_mmc(0, &sdhc1_pdata); imx27_add_fec(NULL); } diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 30490c3..b05f528 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -40,7 +40,6 @@ #include #include #include -#include #include #include @@ -268,7 +267,7 @@ static void pca100_sdhc2_exit(struct device *dev, void *data) free_irq(IRQ_GPIOC(29), data); } -static struct imxmmc_platform_data sdhc_pdata = { +static const struct imxmmc_platform_data sdhc_pdata __initconst = { .init = pca100_sdhc2_init, .exit = pca100_sdhc2_exit, }; @@ -383,7 +382,7 @@ static void __init pca100_init(void) imx27_add_imx_uart0(&uart_pdata); - mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); + imx27_add_mxc_mmc(1, &sdhc_pdata); imx27_add_mxc_nand(&pca100_nand_board_info); diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 3c9f2df..b3340cd 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -212,7 +212,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = { static struct regulator_consumer_supply sdhc1_consumers[] = { { - .dev = &mxc_sdhc_device1.dev, + .dev_name = "mxc-mmc.1", .supply = "sdhc_vcc", }, }; diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index 9cf9460..1297f1b 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c @@ -26,7 +26,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -119,7 +118,7 @@ static void pcm970_sdhc2_exit(struct device *dev, void *data) gpio_free(GPIO_PORTC + 28); } -static struct imxmmc_platform_data sdhc_pdata = { +static const struct imxmmc_platform_data sdhc_pdata __initconst = { .get_ro = pcm970_sdhc2_get_ro, .init = pcm970_sdhc2_init, .exit = pcm970_sdhc2_exit, @@ -228,6 +227,6 @@ void __init pcm970_baseboard_init(void) imx27_add_imx_fb(&pcm038_fb_data); mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN); - mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); + imx27_add_mxc_mmc(1, &sdhc_pdata); platform_device_register(&pcm970_sja1000); } diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 2ded17b..6560cf5 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -37,6 +37,9 @@ config IMX_HAVE_PLATFORM_MX1_CAMERA config IMX_HAVE_PLATFORM_MX2_CAMERA bool +config IMX_HAVE_PLATFORM_MXC_MMC + bool + config IMX_HAVE_PLATFORM_MXC_NAND bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index 8ecd974..d2b7a91 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_PWM) += platform-mxc_pwm.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c new file mode 100644 index 0000000..953319e --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid) \ + { \ + .id = _id, \ + .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ + .irq = soc ## _INT_SDHC ## _hwid, \ + .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ + } +#define imx_mxc_mmc_data_entry(soc, _id, _hwid) \ + [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid) + +#ifdef CONFIG_SOC_IMX21 +const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { +#define imx21_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX21, _id, _hwid) + imx21_mxc_mmc_data_entry(0, 1), + imx21_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { +#define imx27_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX27, _id, _hwid) + imx27_mxc_mmc_data_entry(0, 1), + imx27_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_mxc_mmc( + const struct imx_mxc_mmc_data *data, + const struct imxmmc_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, { + .start = data->dmareq, + .end = data->dmareq, + .flags = IORESOURCE_DMA, + }, + }; + return imx_add_platform_device_dmamask("mxc-mmc", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index e241e41..bb3b29c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -151,6 +151,17 @@ struct platform_device *__init imx_add_mx2_camera( const struct imx_mx2_camera_data *data, const struct mx2_camera_platform_data *pdata); +#include +struct imx_mxc_mmc_data { + int id; + resource_size_t iobase; + resource_size_t irq; + resource_size_t dmareq; +}; +struct platform_device *__init imx_add_mxc_mmc( + const struct imx_mxc_mmc_data *data, + const struct imxmmc_platform_data *pdata); + #include struct imx_mxc_nand_data { /* -- cgit v0.10.2 From 2eb42d5c287f5e883a4b3ebe668ba880caa351e5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 5 Nov 2010 18:52:09 +0100 Subject: ARM: imx: dynamically allocate mxc-ehci devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8e9297b..025e969 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -102,6 +102,7 @@ config MACH_PCM038 select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX @@ -130,6 +131,7 @@ config MACH_CPUIMX27 select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 select MXC_ULPI if USB_ULPI @@ -183,6 +185,7 @@ config MACH_IMX27_VISSTRIM_M10 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC + select IMX_HAVE_PLATFORM_MXC_EHCI help Include support for Visstrim_m10 platform and its different variants. This includes specific configurations for the board and its @@ -202,6 +205,7 @@ config MACH_PCA100 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 6466744..51b9155 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -43,6 +43,13 @@ extern const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst; #define imx27_add_mx2_camera(pdata) \ imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) +extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst; +#define imx27_add_mxc_ehci_otg(pdata) \ + imx_add_mxc_ehci(&imx27_mxc_ehci_otg_data, pdata) +extern const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst; +#define imx27_add_mxc_ehci_hs(id, pdata) \ + imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata) + extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst; #define imx27_add_mxc_mmc(id, pdata) \ imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 7609e8a..2a6d707 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -79,12 +79,12 @@ int __init imx1_register_gpios(void) #ifdef CONFIG_MACH_MX27 static struct resource otg_resources[] = { { - .start = MX27_USBOTG_BASE_ADDR, - .end = MX27_USBOTG_BASE_ADDR + 0x1ff, + .start = MX27_USB_OTG_BASE_ADDR, + .end = MX27_USB_OTG_BASE_ADDR + 0x1ff, .flags = IORESOURCE_MEM, }, { - .start = MX27_INT_USB3, - .end = MX27_INT_USB3, + .start = MX27_INT_USB_OTG, + .end = MX27_INT_USB_OTG, .flags = IORESOURCE_IRQ, }, }; @@ -102,71 +102,6 @@ struct platform_device mxc_otg_udc_device = { .resource = otg_resources, .num_resources = ARRAY_SIZE(otg_resources), }; - -/* OTG host */ -struct platform_device mxc_otg_host = { - .name = "mxc-ehci", - .id = 0, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .dma_mask = &otg_dmamask, - }, - .resource = otg_resources, - .num_resources = ARRAY_SIZE(otg_resources), -}; - -/* USB host 1 */ - -static u64 usbh1_dmamask = DMA_BIT_MASK(32); - -static struct resource mxc_usbh1_resources[] = { - { - .start = MX27_USBOTG_BASE_ADDR + 0x200, - .end = MX27_USBOTG_BASE_ADDR + 0x3ff, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_INT_USB1, - .end = MX27_INT_USB1, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_usbh1 = { - .name = "mxc-ehci", - .id = 1, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .dma_mask = &usbh1_dmamask, - }, - .resource = mxc_usbh1_resources, - .num_resources = ARRAY_SIZE(mxc_usbh1_resources), -}; - -/* USB host 2 */ -static u64 usbh2_dmamask = DMA_BIT_MASK(32); - -static struct resource mxc_usbh2_resources[] = { - { - .start = MX27_USBOTG_BASE_ADDR + 0x400, - .end = MX27_USBOTG_BASE_ADDR + 0x5ff, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_INT_USB2, - .end = MX27_INT_USB2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_usbh2 = { - .name = "mxc-ehci", - .id = 2, - .dev = { - .coherent_dma_mask = DMA_BIT_MASK(32), - .dma_mask = &usbh2_dmamask, - }, - .resource = mxc_usbh2_resources, - .num_resources = ARRAY_SIZE(mxc_usbh2_resources), -}; #endif #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index a45d760..7a00bba 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,8 +1,5 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) extern struct platform_device mxc_otg_udc_device; -extern struct platform_device mxc_otg_host; -extern struct platform_device mxc_usbh1; -extern struct platform_device mxc_usbh2; extern struct platform_device mx21_usbhc_device; extern struct platform_device imx_kpp_device; #endif diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 06ff79a..c70b038 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -40,7 +40,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -213,12 +212,12 @@ static struct platform_device serial_device = { #endif #if defined(CONFIG_USB_ULPI) -static struct mxc_usbh_platform_data otg_pdata = { +static struct mxc_usbh_platform_data otg_pdata __initdata = { .portsc = MXC_EHCI_MODE_ULPI, .flags = MXC_EHCI_INTERFACE_DIFF_UNI, }; -static struct mxc_usbh_platform_data usbh2_pdata = { +static struct mxc_usbh_platform_data usbh2_pdata __initdata = { .portsc = MXC_EHCI_MODE_ULPI, .flags = MXC_EHCI_INTERFACE_DIFF_UNI, }; @@ -281,13 +280,13 @@ static void __init eukrea_cpuimx27_init(void) otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); - mxc_register_device(&mxc_otg_host, &otg_pdata); + imx27_add_mxc_ehci_otg(&otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); - mxc_register_device(&mxc_usbh2, &usbh2_pdata); + imx27_add_mxc_ehci_hs(2, &usbh2_pdata); #endif if (!otg_mode_host) mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index deef1fa..c9f12e4 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -35,7 +35,6 @@ #include #include #include -#include #include "devices-imx27.h" #include "devices.h" @@ -215,7 +214,8 @@ static int otg_phy_init(struct platform_device *pdev) return 0; } -static struct mxc_usbh_platform_data visstrim_m10_usbotg_pdata = { +static const struct mxc_usbh_platform_data +visstrim_m10_usbotg_pdata __initconst = { .init = otg_phy_init, .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, .flags = MXC_EHCI_POWER_PINS_ENABLED, @@ -237,7 +237,7 @@ static void __init visstrim_m10_board_init(void) imx27_add_imx_i2c(0, &visstrim_m10_i2c_data); imx27_add_imx_i2c(1, &visstrim_m10_i2c_data); imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata); - mxc_register_device(&mxc_otg_host, &visstrim_m10_usbotg_pdata); + imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata); imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); } diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index b05f528..683374d 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -40,7 +40,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -279,7 +278,7 @@ static int otg_phy_init(struct platform_device *pdev) return 0; } -static struct mxc_usbh_platform_data otg_pdata = { +static struct mxc_usbh_platform_data otg_pdata __initdata = { .init = otg_phy_init, .portsc = MXC_EHCI_MODE_ULPI, .flags = MXC_EHCI_INTERFACE_DIFF_UNI, @@ -291,7 +290,7 @@ static int usbh2_phy_init(struct platform_device *pdev) return 0; } -static struct mxc_usbh_platform_data usbh2_pdata = { +static struct mxc_usbh_platform_data usbh2_pdata __initdata = { .init = usbh2_phy_init, .portsc = MXC_EHCI_MODE_ULPI, .flags = MXC_EHCI_INTERFACE_DIFF_UNI, @@ -410,13 +409,13 @@ static void __init pca100_init(void) otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); - mxc_register_device(&mxc_otg_host, &otg_pdata); + imx27_add_mxc_ehci_otg(&otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); - mxc_register_device(&mxc_usbh2, &usbh2_pdata); + imx27_add_mxc_ehci_hs(2, &usbh2_pdata); #endif if (!otg_mode_host) { gpio_set_value(OTG_PHY_CS_GPIO, 0); diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index b3340cd..e209b28 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -37,7 +37,6 @@ #include #include #include -#include #include #include "devices-imx27.h" @@ -283,7 +282,7 @@ static struct spi_board_info pcm038_spi_board_info[] __initdata = { } }; -static struct mxc_usbh_platform_data usbh2_pdata = { +static const struct mxc_usbh_platform_data usbh2_pdata __initconst = { .portsc = MXC_EHCI_MODE_ULPI, .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, }; @@ -320,7 +319,7 @@ static void __init pcm038_init(void) spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info)); - mxc_register_device(&mxc_usbh2, &usbh2_pdata); + imx27_add_mxc_ehci_hs(2, &usbh2_pdata); imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 6560cf5..d2d096c 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -37,6 +37,9 @@ config IMX_HAVE_PLATFORM_MX1_CAMERA config IMX_HAVE_PLATFORM_MX2_CAMERA bool +config IMX_HAVE_PLATFORM_MXC_EHCI + bool + config IMX_HAVE_PLATFORM_MXC_MMC bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index d2b7a91..c8734bd 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX1_CAMERA) += platform-mx1-camera.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI) += platform-mxc-ehci.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_PWM) += platform-mxc_pwm.o diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c new file mode 100644 index 0000000..0cb67bb --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-mxc-ehci.c @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ + { \ + .id = _id, \ + .iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \ + .irq = soc ## _INT_USB_ ## hs, \ + } + +#ifdef CONFIG_SOC_IMX27 +const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst = + imx_mxc_ehci_data_entry_single(MX27, 0, OTG); +const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = { + imx_mxc_ehci_data_entry_single(MX27, 1, HS1), + imx_mxc_ehci_data_entry_single(MX27, 2, HS2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_mxc_ehci( + const struct imx_mxc_ehci_data *data, + const struct mxc_usbh_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("mxc-ehci", data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index bb3b29c..7df7a9f 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -151,6 +151,16 @@ struct platform_device *__init imx_add_mx2_camera( const struct imx_mx2_camera_data *data, const struct mx2_camera_platform_data *pdata); +#include +struct imx_mxc_ehci_data { + int id; + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_mxc_ehci( + const struct imx_mxc_ehci_data *data, + const struct mxc_usbh_platform_data *pdata); + #include struct imx_mxc_mmc_data { int id; diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 2734d24..45419b3 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -64,8 +64,10 @@ #define MX27_LCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x21000) #define MX27_SLCDC_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x22000) #define MX27_VPU_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x23000) -#define MX27_USBOTG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000) -#define MX27_OTG_BASE_ADDR MX27_USBOTG_BASE_ADDR +#define MX27_USB_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x24000) +#define MX27_USB_OTG_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0000) +#define MX27_USB_HS1_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0200) +#define MX27_USB_HS2_BASE_ADDR (MX27_USB_BASE_ADDR + 0x0400) #define MX27_SAHARA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x25000) #define MX27_EMMAPP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26000) #define MX27_EMMAPRP_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x26400) @@ -187,9 +189,9 @@ static inline void mx27_setup_weimcs(size_t cs, #define MX27_INT_EMMAPRP 51 #define MX27_INT_EMMAPP 52 #define MX27_INT_VPU 53 -#define MX27_INT_USB1 54 -#define MX27_INT_USB2 55 -#define MX27_INT_USB3 56 +#define MX27_INT_USB_HS1 54 +#define MX27_INT_USB_HS2 55 +#define MX27_INT_USB_OTG 56 #define MX27_INT_SCC_SMN 57 #define MX27_INT_SCC_SCM 58 #define MX27_INT_SAHARA 59 -- cgit v0.10.2 From bd455ed36c487b949068182bfee478b785ee090b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 9 Nov 2010 17:52:14 +0100 Subject: ARM: imx: dynamically allocate fsl-usb2-udc devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 025e969..e50a164 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -128,6 +128,7 @@ endchoice config MACH_CPUIMX27 bool "Eukrea CPUIMX27 module" + select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART @@ -200,6 +201,7 @@ config MACH_IMX27LITE config MACH_PCA100 bool "Phytec phyCARD-s (pca100)" + select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 51b9155..51bb42d 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -13,6 +13,10 @@ extern const struct imx_fec_data imx27_fec_data __initconst; #define imx27_add_fec(pdata) \ imx_add_fec(&imx27_fec_data, pdata) +extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst; +#define imx27_add_fsl_usb2_udc(pdata) \ + imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata) + extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst; #define imx27_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx27_imx2_wdt_data) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index 2a6d707..d026cfb 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -76,34 +76,6 @@ int __init imx1_register_gpios(void) } #endif -#ifdef CONFIG_MACH_MX27 -static struct resource otg_resources[] = { - { - .start = MX27_USB_OTG_BASE_ADDR, - .end = MX27_USB_OTG_BASE_ADDR + 0x1ff, - .flags = IORESOURCE_MEM, - }, { - .start = MX27_INT_USB_OTG, - .end = MX27_INT_USB_OTG, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 otg_dmamask = DMA_BIT_MASK(32); - -/* OTG gadget device */ -struct platform_device mxc_otg_udc_device = { - .name = "fsl-usb2-udc", - .id = -1, - .dev = { - .dma_mask = &otg_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .resource = otg_resources, - .num_resources = ARRAY_SIZE(otg_resources), -}; -#endif - #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) /* GPIO port description */ #define DEFINE_MXC_GPIO_PORT_IRQ(SOC, n, _irq) \ diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index 7a00bba..a788566 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,5 +1,4 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) -extern struct platform_device mxc_otg_udc_device; extern struct platform_device mx21_usbhc_device; extern struct platform_device imx_kpp_device; #endif diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index c70b038..9ae5bed 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -28,7 +28,6 @@ #include #include #include -#include #include #include @@ -223,7 +222,7 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = { }; #endif -static struct fsl_usb2_platform_data otg_device_pdata = { +static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .operating_mode = FSL_USB2_DR_DEVICE, .phy_mode = FSL_USB2_PHY_ULPI, }; @@ -289,7 +288,7 @@ static void __init eukrea_cpuimx27_init(void) imx27_add_mxc_ehci_hs(2, &usbh2_pdata); #endif if (!otg_mode_host) - mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); + imx27_add_fsl_usb2_udc(&otg_device_pdata); #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD eukrea_mbimx27_baseboard_init(); diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 683374d..d9e2dda 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include @@ -297,7 +296,7 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = { }; #endif -static struct fsl_usb2_platform_data otg_device_pdata = { +static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .operating_mode = FSL_USB2_DR_DEVICE, .phy_mode = FSL_USB2_PHY_ULPI, }; @@ -419,7 +418,7 @@ static void __init pca100_init(void) #endif if (!otg_mode_host) { gpio_set_value(OTG_PHY_CS_GPIO, 0); - mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); + imx27_add_fsl_usb2_udc(&otg_device_pdata); } imx27_add_imx_fb(&pca100_fb_data); diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index d2d096c..26196d9 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -9,6 +9,9 @@ config IMX_HAVE_PLATFORM_FLEXCAN select HAVE_CAN_FLEXCAN if CAN bool +config IMX_HAVE_PLATFORM_FSL_USB2_UDC + bool + config IMX_HAVE_PLATFORM_GPIO_KEYS bool default y if ARCH_MX51 diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index c8734bd..e40897e 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -1,6 +1,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_ESDHC) += platform-esdhc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-y += platform-imx-dma.o diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c new file mode 100644 index 0000000..3116f9a --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2010 Pengutronix + * Uwe Kleine-Koenig + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include +#include + +#define imx_fsl_usb2_udc_data_entry_single(soc) \ + { \ + .iobase = soc ## _USB_OTG_BASE_ADDR, \ + .irq = soc ## _INT_USB_OTG, \ + } + +#ifdef CONFIG_SOC_IMX27 +const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst = + imx_fsl_usb2_udc_data_entry_single(MX27); +#endif /* ifdef CONFIG_SOC_IMX27 */ + +struct platform_device *__init imx_add_fsl_usb2_udc( + const struct imx_fsl_usb2_udc_data *data, + const struct fsl_usb2_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("fsl-usb2-udc", -1, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata), DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 7df7a9f..f01fd28 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -44,6 +44,15 @@ struct platform_device *__init imx_add_flexcan( const struct imx_flexcan_data *data, const struct flexcan_platform_data *pdata); +#include +struct imx_fsl_usb2_udc_data { + resource_size_t iobase; + resource_size_t irq; +}; +struct platform_device *__init imx_add_fsl_usb2_udc( + const struct imx_fsl_usb2_udc_data *data, + const struct fsl_usb2_platform_data *pdata); + #include struct platform_device *__init imx_add_gpio_keys( const struct gpio_keys_platform_data *pdata); -- cgit v0.10.2 From 3f880141b8d12cdbb5faf0b9941ee50ac515ea1e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 10 Nov 2010 09:58:56 +0100 Subject: ARM: imx: dynamically allocate imx-keypad devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e50a164..86bab49 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -163,6 +163,7 @@ choice config MACH_EUKREA_MBIMX27_BASEBOARD bool "Eukrea MBIMX27 development board" select IMX_HAVE_PLATFORM_IMX_FB + select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC @@ -175,6 +176,7 @@ endchoice config MACH_MX27_3DS bool "MX27PDK platform" + select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC help diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index a97e921..0c0eab1 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -21,6 +21,10 @@ extern const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst; #define imx21_add_imx_i2c(pdata) \ imx_add_imx_i2c(&imx21_imx_i2c_data, pdata) +extern const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst; +#define imx21_add_imx_keypad(pdata) \ + imx_add_imx_keypad(&imx21_imx_keypad_data, pdata) + extern const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst; #define imx21_add_imx_ssi(id, pdata) \ imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata) diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 51bb42d..f1272d4 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -29,6 +29,10 @@ extern const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst; #define imx27_add_imx_i2c(id, pdata) \ imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata) +extern const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst; +#define imx27_add_imx_keypad(pdata) \ + imx_add_imx_keypad(&imx27_imx_keypad_data, pdata) + extern const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst; #define imx27_add_imx_ssi(id, pdata) \ imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata) diff --git a/arch/arm/mach-imx/devices.c b/arch/arm/mach-imx/devices.c index d026cfb..4360b9c 100644 --- a/arch/arm/mach-imx/devices.c +++ b/arch/arm/mach-imx/devices.c @@ -149,23 +149,4 @@ struct platform_device mx21_usbhc_device = { }; #endif -static struct resource imx_kpp_resources[] = { - { - .start = MX2x_KPP_BASE_ADDR, - .end = MX2x_KPP_BASE_ADDR + 0xf, - .flags = IORESOURCE_MEM - }, { - .start = MX2x_INT_KPP, - .end = MX2x_INT_KPP, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device imx_kpp_device = { - .name = "imx-keypad", - .id = -1, - .num_resources = ARRAY_SIZE(imx_kpp_resources), - .resource = imx_kpp_resources, -}; - #endif diff --git a/arch/arm/mach-imx/devices.h b/arch/arm/mach-imx/devices.h index a788566..d1e7f48 100644 --- a/arch/arm/mach-imx/devices.h +++ b/arch/arm/mach-imx/devices.h @@ -1,4 +1,3 @@ #if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27) extern struct platform_device mx21_usbhc_device; -extern struct platform_device imx_kpp_device; #endif diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index fa5aade..3aaa3b9 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -26,7 +26,6 @@ #include #include #include