From 1ec26db1f8cae0aca64708e0fe1f687eab7c82e5 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 11 Nov 2008 21:45:57 +0800 Subject: pxafb: introduce LCD_TYPE_MASK and use it. Signed-off-by: Daniel Mack Signed-off-by: Eric Miao diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index 8e59111..cbda4d3 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h @@ -33,6 +33,7 @@ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) +#define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 9720449..6499059 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -1372,7 +1372,7 @@ static void pxafb_decode_mach_info(struct pxafb_info *fbi, fbi->cmap_inverse = inf->cmap_inverse; fbi->cmap_static = inf->cmap_static; - switch (lcd_conn & 0xf) { + switch (lcd_conn & LCD_TYPE_MASK) { case LCD_TYPE_MONO_STN: fbi->lccr0 = LCCR0_CMS; break; -- cgit v0.10.2 From 6cc4abe43e9362034881ad8c005f4ab8a684ae3e Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 11 Nov 2008 21:47:07 +0800 Subject: pxafb: only initialize the smart panel thread when dealing with a smartpanel Signed-off-by: Daniel Mack Signed-off-by: Eric Miao diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 6499059..cc59c52 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -804,6 +804,9 @@ static int pxafb_smart_thread(void *arg) static int pxafb_smart_init(struct pxafb_info *fbi) { + if (!(fbi->lccr0 | LCCR0_LCDT)) + return 0; + fbi->smart_thread = kthread_run(pxafb_smart_thread, fbi, "lcd_refresh"); if (IS_ERR(fbi->smart_thread)) { -- cgit v0.10.2 From 38cd809e675e29ea1c3bce8ed743b0fe8aa10eea Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Sat, 15 Nov 2008 23:41:56 +0800 Subject: [ARM] pxa: fix I2C controller device being registered twice on Akita Signed-off-by: Eric Miao Cc: Richard Purdie diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index f0a5bba..51db952 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -686,7 +686,6 @@ static void __init akita_init(void) spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; - pxa_set_i2c_info(NULL); i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); common_init(); -- cgit v0.10.2 From faf2f0ab13d259f2386d156d24c405ec8cee30ff Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Sun, 16 Nov 2008 15:56:58 +0800 Subject: [ARM] pxa: fix incorrect PCMCIA PSKTSEL pin configuration for spitz The original incorrect configuration caused GPIO79_nCS_3 being overriden, thus resulted in the NAND flash not being detected. The real PSKTSEL pin is on GPIO104 instead of GPIO79. Signed-off-by: Eric Miao Cc: Richard Purdie diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 51db952..3be76ee 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -67,6 +67,7 @@ static unsigned long spitz_pin_config[] __initdata = { /* Chip Selects */ GPIO78_nCS_2, /* SCOOP #2 */ + GPIO79_nCS_3, /* NAND */ GPIO80_nCS_4, /* SCOOP #1 */ /* LCD - 16bpp Active TFT */ @@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = { GPIO51_nPIOW, GPIO85_nPCE_1, GPIO54_nPCE_2, - GPIO79_PSKTSEL, GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, + GPIO104_PSKTSEL, /* MMC */ GPIO32_MMC_CLK, -- cgit v0.10.2 From 28105fda1ecadfa7c827b22d323c169f19dc04b0 Mon Sep 17 00:00:00 2001 From: Jaya Kumar Date: Tue, 11 Nov 2008 12:17:05 +0100 Subject: [ARM] 5330/1: mach-pxa: Fixup reset for systems using reboot=cold or other strings This patch makes do_hw_reset the default reboot behavior when nothing else matches. This restores reboot functionality on gumstix basix devices where reboot=cold is the default boot argument. Signed-off-by: Jaya Kumar Acked-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 1b2af57..00b2dc2 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -90,12 +90,13 @@ void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); break; - case 'h': - do_hw_reset(); - break; case 'g': do_gpio_reset(); break; + case 'h': + default: + do_hw_reset(); + break; } } -- cgit v0.10.2 From 2c5643b1c5c7fbb13f340d4c58944d9642f41796 Mon Sep 17 00:00:00 2001 From: Hitoshi Mitake Date: Sun, 30 Nov 2008 17:16:04 +0900 Subject: x86: provide readq()/writeq() on 32-bit too Impact: add new API for drivers Add implementation of readq/writeq to x86_32, and add config value to the x86 architecture to determine existence of readq/writeq. Signed-off-by: Hitoshi Mitake Acked-by: Sam Ravnborg Signed-off-by: Ingo Molnar diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ac22bb7..a7d50f5 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -19,6 +19,8 @@ config X86_64 config X86 def_bool y select HAVE_AOUT if X86_32 + select HAVE_READQ + select HAVE_WRITEQ select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index ac2abc8..2594644 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -4,6 +4,7 @@ #define ARCH_HAS_IOREMAP_WC #include +#include #define build_mmio_read(name, size, type, reg, barrier) \ static inline type name(const volatile void __iomem *addr) \ @@ -57,6 +58,29 @@ build_mmio_write(__writeq, "q", unsigned long, "r", ) /* Let people know we have them */ #define readq readq #define writeq writeq + +#else /* CONFIG_X86_32 from here */ + +static inline __u64 readq(const volatile void __iomem *addr) +{ + const volatile u32 __iomem *p = addr; + u32 l, h; + + l = readl(p); + h = readl(p + 1); + + return l + ((u64)h << 32); +} + +static inline void writeq(__u64 val, volatile void __iomem *addr) +{ + writel(val, addr); + writel(val >> 32, addr+4); +} + +#define readq readq +#define writeq writeq + #endif extern int iommu_bio_merge; -- cgit v0.10.2 From a0b1131e479e5af32eefac8bc54c9742e23d638e Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Sun, 30 Nov 2008 09:33:55 +0100 Subject: x86: provide readq()/writeq() on 32-bit too, cleanup Impact: cleanup Signed-off-by: Ingo Molnar diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 2594644..3ccfaf6 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -55,21 +55,17 @@ build_mmio_write(__writeq, "q", unsigned long, "r", ) #define __raw_readq __readq #define __raw_writeq writeq -/* Let people know we have them */ -#define readq readq -#define writeq writeq - #else /* CONFIG_X86_32 from here */ static inline __u64 readq(const volatile void __iomem *addr) { const volatile u32 __iomem *p = addr; - u32 l, h; + u32 low, high; - l = readl(p); - h = readl(p + 1); + low = readl(p); + high = readl(p + 1); - return l + ((u64)h << 32); + return low + ((u64)high << 32); } static inline void writeq(__u64 val, volatile void __iomem *addr) @@ -78,11 +74,12 @@ static inline void writeq(__u64 val, volatile void __iomem *addr) writel(val >> 32, addr+4); } +#endif + +/* Let people know that we have them */ #define readq readq #define writeq writeq -#endif - extern int iommu_bio_merge; #ifdef CONFIG_X86_32 -- cgit v0.10.2 From 93093d099e5dd0c258fd530c12668e828c20df41 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Sun, 30 Nov 2008 10:20:20 +0100 Subject: x86: provide readq()/writeq() on 32-bit too, complete if HAVE_READQ/HAVE_WRITEQ are defined, the full range of readq/writeq APIs has to be provided to drivers: drivers/infiniband/hw/amso1100/c2.c: In function 'c2_tx_ring_alloc': drivers/infiniband/hw/amso1100/c2.c:133: error: implicit declaration of function '__raw_writeq' So provide them on 32-bit as well. Also, map all the APIs to the strongest ordering variant. It's way too easy to mess such details up in drivers and the difference between "memory" and "" constrained asm() constructs is in the noise range. Signed-off-by: Ingo Molnar diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 3ccfaf6..33513b9 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -46,16 +46,11 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define mmiowb() barrier() #ifdef CONFIG_X86_64 + build_mmio_read(readq, "q", unsigned long, "=r", :"memory") -build_mmio_read(__readq, "q", unsigned long, "=r", ) build_mmio_write(writeq, "q", unsigned long, "r", :"memory") -build_mmio_write(__writeq, "q", unsigned long, "r", ) - -#define readq_relaxed(a) __readq(a) -#define __raw_readq __readq -#define __raw_writeq writeq -#else /* CONFIG_X86_32 from here */ +#else static inline __u64 readq(const volatile void __iomem *addr) { @@ -76,9 +71,14 @@ static inline void writeq(__u64 val, volatile void __iomem *addr) #endif +#define readq_relaxed(a) readq(a) + +#define __raw_readq(a) readq(a) +#define __raw_writeq(val, addr) writeq(val, addr) + /* Let people know that we have them */ -#define readq readq -#define writeq writeq +#define readq readq +#define writeq writeq extern int iommu_bio_merge; -- cgit v0.10.2