From 5d416e1f6cd73adbc857936e82c4fca409e82e39 Mon Sep 17 00:00:00 2001
From: Mandy Lavi <mandy.lavi@freescale.com>
Date: Wed, 15 Apr 2015 21:58:33 +0900
Subject: Expose RCW in the ccsr_guts structure

This will enable the reading of essential h/w configuration setup
from within the kernel space

Change-Id: I8d5ffbf48b02b5ef6ad6bf546f3440485ccd9778
Reviewed-on: http://git.am.freescale.net:8181/35025
Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com>
Reviewed-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
Tested-by: Honghua Yin <Hong-Hua.Yin@freescale.com>

diff --git a/arch/powerpc/include/asm/fsl_guts.h b/arch/powerpc/include/asm/fsl_guts.h
index 1b5055d..77b5bd8 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -68,7 +68,10 @@ struct ccsr_guts {
 	u8	res0b4[0xc0 - 0xb4];
 	__be32  iovselsr;	/* 0x.00c0 - I/O voltage select status register
 					     Called 'elbcvselcr' on 86xx SOCs */
-	u8	res0c4[0x224 - 0xc4];
+	u8	res0c4[0x100 - 0xc4];
+	__be32	rcwsr[16];	/* 0x.0100 - Reset Control Word Status registers
+					     There are 16 registers */
+	u8	res140[0x224 - 0x140];
 	__be32  iodelay1;	/* 0x.0224 - IO delay control register 1 */
 	__be32  iodelay2;	/* 0x.0228 - IO delay control register 2 */
 	u8	res22c[0x604 - 0x22c];
-- 
cgit v0.10.2