From dd4704480372fdbf3e8f7826274a883c4c7c335a Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 8 May 2013 14:29:03 +0100 Subject: clk: ux500: Provide device enumeration number suffix for SMSC911x First Ethernet device has a ".0" appended onto the device name. It appears that we need this in order to obtain the correct clock. Without this fix Ethernet does not function on Ux500 devices, which is a regression. Cc: Ulf Hansson Signed-off-by: Lee Jones Signed-off-by: Mike Turquette [mturquette@linaro.org: improved changelog] diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 0b4f35a..80069c3 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -325,7 +325,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base, BIT(0), 0); clk_register_clkdev(clk, "fsmc", NULL); - clk_register_clkdev(clk, NULL, "smsc911x"); + clk_register_clkdev(clk, NULL, "smsc911x.0"); clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base, BIT(1), 0); -- cgit v0.10.2 From f586938ba2cf83ed4cbebe96436220d182a7808e Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Tue, 30 Apr 2013 14:45:06 +0200 Subject: clk: ux500: clk-sysctrl: handle clocks with no parents Fix clk_reg_sysctrl() to set main clock registers of new struct clk_sysctrl even if the registered clock has no parents. This fixes an issue where "ulpclk" was registered with all clk->reg_* fields uninitialized, causing a -EINVAL error from clk_prepare(). Signed-off-by: Fabio Baltieri Acked-by: Ulf Hansson Signed-off-by: Mike Turquette diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c index bc7e9bd..e364c9d 100644 --- a/drivers/clk/ux500/clk-sysctrl.c +++ b/drivers/clk/ux500/clk-sysctrl.c @@ -145,7 +145,13 @@ static struct clk *clk_reg_sysctrl(struct device *dev, return ERR_PTR(-ENOMEM); } - for (i = 0; i < num_parents; i++) { + /* set main clock registers */ + clk->reg_sel[0] = reg_sel[0]; + clk->reg_bits[0] = reg_bits[0]; + clk->reg_mask[0] = reg_mask[0]; + + /* handle clocks with more than one parent */ + for (i = 1; i < num_parents; i++) { clk->reg_sel[i] = reg_sel[i]; clk->reg_bits[i] = reg_bits[i]; clk->reg_mask[i] = reg_mask[i]; -- cgit v0.10.2 From 056f3d58db6f7d19be7dbc2aab8d049f28e20d6e Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Fri, 10 May 2013 18:38:09 +0200 Subject: clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocks Currently no driver *) handles the sysreg clock, with an assumption that this clock is always left in its default state (enabled). Before commit 6e6aac7590f902d14d90bace3fd499 ARM: EXYNOS: Migrate clock support to common clock framework the sysreg clock was not even defined and hence wasn't handled explicitly in the kernel. To restore the previous behaviour disable masking the sysreg clock off in the clock core by default. *) Except the Exynos4x12 FIMC-IS driver, which will be modified to not touch the sysreg clock. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Signed-off-by: Mike Turquette diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index d0940e6..3c1f888 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -791,7 +791,8 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0), GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0), GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), - GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), + GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, + CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0), GATE(smmu_rotator, "smmu_rotator", "aclk200", E4210_GATE_IP_IMAGE, 4, 0, 0), @@ -819,7 +820,8 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), - GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, 0, 0), + GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, + CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0), GATE(sclk_mdnie0, "sclk_mdnie0", "div_mdnie0", SRC_MASK_LCD0, 4, CLK_SET_RATE_PARENT, 0), -- cgit v0.10.2 From 67e1e2268e598861dc771e3c976daf07db380638 Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Fri, 3 May 2013 07:53:22 +0200 Subject: clk: si5351: Fix clkout rate computation. Rate was incorrectly computed because we read from wrong divider register. Signed-off-by: Marek Belisko Acked-by: Sebastian Hesselbarth Signed-off-by: Mike Turquette Cc: stable@kernel.org diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 8927284..cf39e53 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -932,7 +932,7 @@ static unsigned long si5351_clkout_recalc_rate(struct clk_hw *hw, unsigned char reg; unsigned char rdiv; - if (hwdata->num > 5) + if (hwdata->num <= 5) reg = si5351_msynth_params_address(hwdata->num) + 2; else reg = SI5351_CLK6_7_OUTPUT_DIVIDER; -- cgit v0.10.2 From 6532cb71fb31436b8d31818a056f45b8f95dfb31 Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Fri, 3 May 2013 07:53:23 +0200 Subject: clk: si5351: Set initial clkout rate when defined in platform data. clock-frequency property from platform data was read but never used. Apply defined rate when clock is registered. Signed-off-by: Marek Belisko Acked-by: Sebastian Hesselbarth Signed-off-by: Mike Turquette [mturquette@linaro.org: add missing changelog] Cc: stable@kernel.org Signed-off-by: Mike Turquette diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index cf39e53..24f5536 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -1477,6 +1477,16 @@ static int si5351_i2c_probe(struct i2c_client *client, return -EINVAL; } drvdata->onecell.clks[n] = clk; + + /* set initial clkout rate */ + if (pdata->clkout[n].rate != 0) { + int ret; + ret = clk_set_rate(clk, pdata->clkout[n].rate); + if (ret != 0) { + dev_err(&client->dev, "Cannot set rate : %d\n", + ret); + } + } } ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get, -- cgit v0.10.2 From 419e321df8d7d605f21f980903befc65ee66e848 Mon Sep 17 00:00:00 2001 From: Tony Prisk Date: Sat, 18 May 2013 09:18:49 +1200 Subject: clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate() With the addition of a DVO clock, a bug is now evident in the vt8500 clock code: [ 0.290000] WARNING: at init/main.c:698 do_one_initcall+0x158/0x18c() [ 0.300000] initcall wm8505fb_driver_init+0x0/0xc returned with disabled int This is caused by an unbalanced spinlock in vt8500_dclk_set_rate(). Replace the second call to spin_lock_irqsave() with spin_unlock_irqrestore(). Signed-off-by: Tony Prisk Signed-off-by: Mike Turquette diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index debf688..553ac35 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -183,7 +183,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, writel(divisor, cdev->div_reg); vt8500_pmc_wait_busy(); - spin_lock_irqsave(cdev->lock, flags); + spin_unlock_irqrestore(cdev->lock, flags); return 0; } -- cgit v0.10.2 From d68c380590c390a488fe214e5ebf9439216ac3ba Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 27 May 2013 12:28:25 -0300 Subject: clk: mxs: Include clk mxs header file Fix the following sparse warnings: drivers/clk/mxs/clk-imx28.c:72:5: warning: symbol 'mxs_saif_clkmux_select' was not declared. Should it be static? drivers/clk/mxs/clk-imx28.c:156:12: warning: symbol 'mx28_clocks_init' was not declared. Should it be static? Signed-off-by: Fabio Estevam Acked-by: Shawn Guo Signed-off-by: Mike Turquette [mturquette@linaro.org: fixed $SUBJECT line] diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index d0e5eed..4faf0af 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include -- cgit v0.10.2