From ec7f1bf74013559bae9fd7740f990a563c7b09b0 Mon Sep 17 00:00:00 2001 From: Mandy Lavi Date: Sun, 15 Feb 2015 15:20:15 +0200 Subject: fmd: create new config flavor for FManV3L CONFIG_FMAN_T4240 was eliminated Instead, there are now two flags representing FmanV3: CONFIG_FMAN_V3H for FmanV3H arch and CONFIG_FMAN_V3L for FmanV3L arch. FmanV3H h/w block is integrated in B4860, B4420, T4240, T4160, T2080 etc FmanV3L h/w block is integrated in T1040, T1024, T1020, T1022 etc defconfig files changes: corenet64_fmanv3_smp_defconfig -> corenet64_fmanv3l_smp_defconfig corenet32_fmanv3_smp_defconfig -> corenet32_fmanv3l_smp_defconfig 85xx/e6500rev2_defconfig -> corenet64_fmanv3h_smp_defconfig Change-Id: I9fcfb454bc3bd2d72c5d55c616400a808e181413 Signed-off-by: Mandy Lavi Reviewed-on: http://git.am.freescale.net:8181/30539 Tested-by: Review Code-CDREVIEW Reviewed-by: Shengzhou Liu Reviewed-by: Honghua Yin diff --git a/arch/powerpc/configs/85xx/e6500rev2_defconfig b/arch/powerpc/configs/85xx/e6500rev2_defconfig deleted file mode 100644 index 53f9761..0000000 --- a/arch/powerpc/configs/85xx/e6500rev2_defconfig +++ /dev/null @@ -1,200 +0,0 @@ -CONFIG_PPC64=y -CONFIG_PPC_BOOK3E_64=y -# CONFIG_FSL_ERRATUM_A_004801 is not set -# CONFIG_FSL_ERRATUM_A_005337 is not set -CONFIG_ALTIVEC=y -CONFIG_SMP=y -CONFIG_NR_CPUS=24 -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_AUDIT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_RCU_FANOUT=32 -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_MAC_PARTITION=y -CONFIG_PPC_QEMU_E500=y -CONFIG_CORENET_GENERIC=y -# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_MISC=m -CONFIG_IRQ_ALL_CPUS=y -# CONFIG_SUSPEND is not set -CONFIG_FSL_LBC=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_MSI=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_STATISTICS=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_ARPD=y -CONFIG_INET_AH=y -CONFIG_INET_ESP=y -CONFIG_INET_IPCOMP=y -# CONFIG_INET_LRO is not set -CONFIG_IPV6=y -CONFIG_IP_SCTP=m -CONFIG_VLAN_8021Q=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_SPI_NOR_BASE=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_FSL_IFC=y -CONFIG_MTD_SPI_NOR_BASE=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=262144 -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -CONFIG_BLK_DEV_SR=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SPI_ATTRS=y -CONFIG_ATA=y -CONFIG_SATA_FSL=y -CONFIG_SATA_SIL24=y -CONFIG_MD=y -CONFIG_BLK_DEV_MD=y -# CONFIG_MD_AUTODETECT is not set -CONFIG_MD_RAID456=y -CONFIG_MULTICORE_RAID456=y -CONFIG_NETDEVICES=y -CONFIG_FSL_XGMAC_MDIO=y -CONFIG_FMAN_T4240=y -CONFIG_FSL_DPAA_ETH=y -CONFIG_E1000E=y -CONFIG_FSL_10GBASE_KR=y -CONFIG_VITESSE_PHY=y -CONFIG_FIXED_PHY=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_PPC_EPAPR_HV_BYTECHAN=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MPC=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_SPI=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_FSL_SPI=y -CONFIG_SPI_FSL_ESPI=y -CONFIG_HWMON=y -CONFIG_SENSORS_LM90=y -CONFIG_SENSORS_INA2XX=y -CONFIG_SENSORS_W83793=y -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_FSL=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -CONFIG_EDAC=y -CONFIG_EDAC_MM_EDAC=y -CONFIG_EDAC_MPC85XX=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1374=y -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_CMOS=y -CONFIG_DMADEVICES=y -CONFIG_UIO=y -CONFIG_STAGING=y -CONFIG_UIO_FSL_DMA=y -CONFIG_FSL_PME2=y -CONFIG_FSL_PAMU=y -CONFIG_VIRT_DRIVERS=y -CONFIG_FSL_HV_MANAGER=y -CONFIG_MEMORY=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_CODEPAGE_850=y -CONFIG_NLS_ISO8859_1=y -CONFIG_PROC_KCORE=y -CONFIG_TMPFS=y -CONFIG_HUGETLBFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=m -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_SHIRQ=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEBUG_INFO=y -CONFIG_RCU_TRACE=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_FSL_DCE=y diff --git a/arch/powerpc/configs/corenet32_fmanv3_smp_defconfig b/arch/powerpc/configs/corenet32_fmanv3_smp_defconfig deleted file mode 100644 index df6f744..0000000 --- a/arch/powerpc/configs/corenet32_fmanv3_smp_defconfig +++ /dev/null @@ -1,203 +0,0 @@ -CONFIG_PPC_85xx=y -CONFIG_SMP=y -CONFIG_NR_CPUS=8 -CONFIG_EXPERIMENTAL=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_AUDIT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y -CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_MAC_PARTITION=y -CONFIG_PPC_QEMU_E500=y -CONFIG_CORENET_GENERIC=y -CONFIG_MPIC_TIMER=y -CONFIG_FSL_MPIC_TIMER_WAKEUP=y -CONFIG_HIGHMEM=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_BINFMT_MISC=m -CONFIG_KEXEC=y -CONFIG_FORCE_MAX_ZONEORDER=13 -CONFIG_SUSPEND=y -CONFIG_PCI=y -CONFIG_PCIEPORTBUS=y -# CONFIG_PCIEASPM is not set -CONFIG_PCI_MSI=y -CONFIG_RAPIDIO=y -CONFIG_FSL_RIO=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_STATISTICS=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_ARPD=y -CONFIG_INET_AH=y -CONFIG_INET_ESP=y -CONFIG_INET_IPCOMP=y -# CONFIG_INET_LRO is not set -CONFIG_IPV6=y -CONFIG_IP_SCTP=m -CONFIG_VLAN_8021Q=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_FSL_ELBC=y -CONFIG_MTD_NAND_FSL_IFC=y -CONFIG_MTD_SPI_NOR_BASE=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=131072 -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -CONFIG_BLK_DEV_SR=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_ATA=y -CONFIG_SATA_AHCI=y -CONFIG_SATA_FSL=y -CONFIG_SATA_SIL24=y -CONFIG_SATA_SIL=y -CONFIG_PATA_SIL680=y -CONFIG_NETDEVICES=y -CONFIG_FSL_PQ_MDIO=y -CONFIG_FSL_XGMAC_MDIO=y -CONFIG_FMAN_T4240=y -CONFIG_FMAN_V3L=y -CONFIG_FSL_DPAA_ETH=y -CONFIG_E1000=y -CONFIG_E1000E=y -CONFIG_VITESSE_PHY=y -CONFIG_FIXED_PHY=y -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_PPC_EPAPR_HV_BYTECHAN=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -CONFIG_NVRAM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MPC=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_SPI=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_FSL_SPI=y -CONFIG_SPI_FSL_ESPI=y -CONFIG_SENSORS_LM90=y -CONFIG_SENSORS_INA2XX=y -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_FB_FSL_DIU=y -CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_LOGO=y -CONFIG_USB_HID=m -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_FSL=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PPC_OF_BE=y -CONFIG_USB_OHCI_HCD_PPC_OF_LE=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -CONFIG_EDAC=y -CONFIG_EDAC_MM_EDAC=y -CONFIG_EDAC_MPC85XX=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_CMOS=y -CONFIG_UIO=y -CONFIG_STAGING=y -CONFIG_FSL_PME2=y -CONFIG_FSL_PAMU=y -CONFIG_VIRT_DRIVERS=y -CONFIG_FSL_HV_MANAGER=y -CONFIG_MEMORY=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=y -CONFIG_PROC_KCORE=y -CONFIG_TMPFS=y -CONFIG_HUGETLBFS=y -CONFIG_JFFS2_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_SHIRQ=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEBUG_INFO=y -CONFIG_RCU_TRACE=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_FSL_CAAM=y diff --git a/arch/powerpc/configs/corenet32_fmanv3l_smp_defconfig b/arch/powerpc/configs/corenet32_fmanv3l_smp_defconfig new file mode 100644 index 0000000..7fe07c4 --- /dev/null +++ b/arch/powerpc/configs/corenet32_fmanv3l_smp_defconfig @@ -0,0 +1,202 @@ +CONFIG_PPC_85xx=y +CONFIG_SMP=y +CONFIG_NR_CPUS=8 +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_PPC_QEMU_E500=y +CONFIG_CORENET_GENERIC=y +CONFIG_MPIC_TIMER=y +CONFIG_FSL_MPIC_TIMER_WAKEUP=y +CONFIG_HIGHMEM=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_MISC=m +CONFIG_KEXEC=y +CONFIG_FORCE_MAX_ZONEORDER=13 +CONFIG_SUSPEND=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIEASPM is not set +CONFIG_PCI_MSI=y +CONFIG_RAPIDIO=y +CONFIG_FSL_RIO=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_ARPD=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IP_SCTP=m +CONFIG_VLAN_8021Q=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSL_ELBC=y +CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=131072 +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SYM53C8XX_2=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_FSL=y +CONFIG_SATA_SIL24=y +CONFIG_SATA_SIL=y +CONFIG_PATA_SIL680=y +CONFIG_NETDEVICES=y +CONFIG_FSL_PQ_MDIO=y +CONFIG_FSL_XGMAC_MDIO=y +CONFIG_FMAN_V3L=y +CONFIG_FSL_DPAA_ETH=y +CONFIG_E1000=y +CONFIG_E1000E=y +CONFIG_VITESSE_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_PPC_EPAPR_HV_BYTECHAN=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_NVRAM=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MPC=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_FSL_SPI=y +CONFIG_SPI_FSL_ESPI=y +CONFIG_SENSORS_LM90=y +CONFIG_SENSORS_INA2XX=y +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +CONFIG_FB_FSL_DIU=y +CONFIG_VGACON_SOFT_SCROLLBACK=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FONTS=y +CONFIG_LOGO=y +CONFIG_USB_HID=m +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +CONFIG_USB_OHCI_HCD_PPC_OF_LE=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +CONFIG_EDAC=y +CONFIG_EDAC_MM_EDAC=y +CONFIG_EDAC_MPC85XX=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_CMOS=y +CONFIG_UIO=y +CONFIG_STAGING=y +CONFIG_FSL_PME2=y +CONFIG_FSL_PAMU=y +CONFIG_VIRT_DRIVERS=y +CONFIG_FSL_HV_MANAGER=y +CONFIG_MEMORY=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_HUGETLBFS=y +CONFIG_JFFS2_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=m +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_INFO=y +CONFIG_RCU_TRACE=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y diff --git a/arch/powerpc/configs/corenet64_fmanv3_smp_defconfig b/arch/powerpc/configs/corenet64_fmanv3_smp_defconfig deleted file mode 100644 index 984889a..0000000 --- a/arch/powerpc/configs/corenet64_fmanv3_smp_defconfig +++ /dev/null @@ -1,212 +0,0 @@ -CONFIG_PPC64=y -CONFIG_PPC_BOOK3E_64=y -CONFIG_SMP=y -CONFIG_NR_CPUS=24 -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -CONFIG_IRQ_DOMAIN_DEBUG=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -CONFIG_SLAB=y -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y -CONFIG_MAC_PARTITION=y -CONFIG_PPC_QEMU_E500=y -CONFIG_CORENET_GENERIC=y -# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set -CONFIG_MPIC_TIMER=y -CONFIG_FSL_MPIC_TIMER_WAKEUP=y -CONFIG_BINFMT_MISC=m -CONFIG_SUSPEND=y -CONFIG_FSL_IFC=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_MSI=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_XFRM_USER=y -CONFIG_XFRM_SUB_POLICY=y -CONFIG_XFRM_STATISTICS=y -CONFIG_NET_KEY=y -CONFIG_NET_KEY_MIGRATE=y -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_MULTIPATH=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_NET_IPIP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_ARPD=y -CONFIG_INET_AH=y -CONFIG_INET_ESP=y -CONFIG_INET_IPCOMP=y -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_IPV6=y -CONFIG_IP_SCTP=m -CONFIG_VLAN_8021Q=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_MTD=y -CONFIG_MTD_PARTITIONS=y -CONFIG_MTD_OF_PARTS=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -CONFIG_FTL=y -CONFIG_MTD_CFI=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_FSL_ELBC=y -CONFIG_MTD_NAND_FSL_IFC=y -CONFIG_MTD_UBI=y -CONFIG_MTD_SPI_NOR_BASE=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=131072 -CONFIG_EEPROM_LEGACY=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -CONFIG_BLK_DEV_SR=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SPI_ATTRS=y -CONFIG_ATA=y -CONFIG_SATA_FSL=y -CONFIG_SATA_SIL24=y -CONFIG_MD=y -CONFIG_BLK_DEV_MD=y -CONFIG_MD_RAID456=y -CONFIG_MULTICORE_RAID456=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -CONFIG_FSL_PQ_MDIO=y -CONFIG_FSL_XGMAC_MDIO=y -CONFIG_FMAN_T4240=y -CONFIG_FMAN_V3L=y -CONFIG_FSL_DPAA_ETH=y -CONFIG_E1000E=y -CONFIG_VITESSE_PHY=y -CONFIG_FIXED_PHY=y -CONFIG_INPUT_FF_MEMLESS=m -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_SERIO_LIBPS2=y -CONFIG_PPC_EPAPR_HV_BYTECHAN=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_MANY_PORTS=y -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_SERIAL_8250_RSA=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MPC=y -CONFIG_I2C_MUX=y -CONFIG_I2C_MUX_PCA954x=y -CONFIG_SPI=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_FSL_SPI=y -CONFIG_SPI_FSL_ESPI=y -CONFIG_SENSORS_LM90=y -CONFIG_SENSORS_INA2XX=y -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_FB=y -CONFIG_FB_FSL_DIU=y -CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_LOGO=y -CONFIG_USB_HID=m -CONFIG_USB=y -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_FSL=y -CONFIG_USB_STORAGE=y -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -CONFIG_EDAC=y -CONFIG_EDAC_MM_EDAC=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS3232=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_CMOS=y -CONFIG_DMADEVICES=y -CONFIG_FSL_RAID=y -CONFIG_NET_DMA=y -CONFIG_ASYNC_TX_DMA=y -CONFIG_UIO=y -CONFIG_UIO_FSL_SRIO=y -CONFIG_UIO_FSL_RMU=y -CONFIG_UIO_FSL_DMA=y -CONFIG_STAGING=y -CONFIG_FSL_PME2=y -CONFIG_FSL_PAMU=y -CONFIG_VIRT_DRIVERS=y -CONFIG_FSL_HV_MANAGER=y -CONFIG_MEMORY=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_ISO9660_FS=m -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=y -CONFIG_NTFS_FS=y -CONFIG_PROC_KCORE=y -CONFIG_TMPFS=y -CONFIG_HUGETLBFS=y -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=1 -CONFIG_UBIFS_FS=y -CONFIG_CRAMFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V4=y -CONFIG_ROOT_NFS=y -CONFIG_NFSD=m -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS_UTF8=m -CONFIG_CRC_T10DIF=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_DEBUG_SHIRQ=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEBUG_INFO=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_FSL_CAAM=y diff --git a/arch/powerpc/configs/corenet64_fmanv3h_smp_defconfig b/arch/powerpc/configs/corenet64_fmanv3h_smp_defconfig new file mode 100644 index 0000000..e51b8a8 --- /dev/null +++ b/arch/powerpc/configs/corenet64_fmanv3h_smp_defconfig @@ -0,0 +1,200 @@ +CONFIG_PPC64=y +CONFIG_PPC_BOOK3E_64=y +# CONFIG_FSL_ERRATUM_A_004801 is not set +# CONFIG_FSL_ERRATUM_A_005337 is not set +CONFIG_ALTIVEC=y +CONFIG_SMP=y +CONFIG_NR_CPUS=24 +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_RCU_FANOUT=32 +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_PPC_QEMU_E500=y +CONFIG_CORENET_GENERIC=y +# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_BINFMT_MISC=m +CONFIG_IRQ_ALL_CPUS=y +# CONFIG_SUSPEND is not set +CONFIG_FSL_LBC=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_MSI=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_ARPD=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IP_SCTP=m +CONFIG_VLAN_8021Q=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_SPI_NOR_BASE=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_SPI_NOR_BASE=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=262144 +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_ATA=y +CONFIG_SATA_FSL=y +CONFIG_SATA_SIL24=y +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +# CONFIG_MD_AUTODETECT is not set +CONFIG_MD_RAID456=y +CONFIG_MULTICORE_RAID456=y +CONFIG_NETDEVICES=y +CONFIG_FSL_XGMAC_MDIO=y +CONFIG_FMAN_V3H=y +CONFIG_FSL_DPAA_ETH=y +CONFIG_E1000E=y +CONFIG_FSL_10GBASE_KR=y +CONFIG_VITESSE_PHY=y +CONFIG_FIXED_PHY=y +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_LEGACY_PTYS is not set +CONFIG_PPC_EPAPR_HV_BYTECHAN=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MPC=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_FSL_SPI=y +CONFIG_SPI_FSL_ESPI=y +CONFIG_HWMON=y +CONFIG_SENSORS_LM90=y +CONFIG_SENSORS_INA2XX=y +CONFIG_SENSORS_W83793=y +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +CONFIG_EDAC=y +CONFIG_EDAC_MM_EDAC=y +CONFIG_EDAC_MPC85XX=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_DS1374=y +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_CMOS=y +CONFIG_DMADEVICES=y +CONFIG_UIO=y +CONFIG_STAGING=y +CONFIG_UIO_FSL_DMA=y +CONFIG_FSL_PME2=y +CONFIG_FSL_PAMU=y +CONFIG_VIRT_DRIVERS=y +CONFIG_FSL_HV_MANAGER=y +CONFIG_MEMORY=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_HUGETLBFS=y +CONFIG_JFFS2_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=m +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_INFO=y +CONFIG_RCU_TRACE=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_FSL_DCE=y diff --git a/arch/powerpc/configs/corenet64_fmanv3l_smp_defconfig b/arch/powerpc/configs/corenet64_fmanv3l_smp_defconfig new file mode 100644 index 0000000..034db07 --- /dev/null +++ b/arch/powerpc/configs/corenet64_fmanv3l_smp_defconfig @@ -0,0 +1,211 @@ +CONFIG_PPC64=y +CONFIG_PPC_BOOK3E_64=y +CONFIG_SMP=y +CONFIG_NR_CPUS=24 +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_IRQ_DOMAIN_DEBUG=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_SLAB=y +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_PPC_QEMU_E500=y +CONFIG_CORENET_GENERIC=y +# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set +CONFIG_MPIC_TIMER=y +CONFIG_FSL_MPIC_TIMER_WAKEUP=y +CONFIG_BINFMT_MISC=m +CONFIG_SUSPEND=y +CONFIG_FSL_IFC=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_MSI=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=y +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_ARPD=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IP_SCTP=m +CONFIG_VLAN_8021Q=y +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_MTD=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_OF_PARTS=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +CONFIG_FTL=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSL_ELBC=y +CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_UBI=y +CONFIG_MTD_SPI_NOR_BASE=y +CONFIG_PROC_DEVICETREE=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=131072 +CONFIG_EEPROM_LEGACY=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_ATA=y +CONFIG_SATA_FSL=y +CONFIG_SATA_SIL24=y +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_RAID456=y +CONFIG_MULTICORE_RAID456=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_FSL_PQ_MDIO=y +CONFIG_FSL_XGMAC_MDIO=y +CONFIG_FMAN_V3L=y +CONFIG_FSL_DPAA_ETH=y +CONFIG_E1000E=y +CONFIG_VITESSE_PHY=y +CONFIG_FIXED_PHY=y +CONFIG_INPUT_FF_MEMLESS=m +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_PPC_EPAPR_HV_BYTECHAN=y +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MPC=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_SPI=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_FSL_SPI=y +CONFIG_SPI_FSL_ESPI=y +CONFIG_SENSORS_LM90=y +CONFIG_SENSORS_INA2XX=y +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +CONFIG_FB_FSL_DIU=y +CONFIG_VGACON_SOFT_SCROLLBACK=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FONTS=y +CONFIG_LOGO=y +CONFIG_USB_HID=m +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +CONFIG_EDAC=y +CONFIG_EDAC_MM_EDAC=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_CMOS=y +CONFIG_DMADEVICES=y +CONFIG_FSL_RAID=y +CONFIG_NET_DMA=y +CONFIG_ASYNC_TX_DMA=y +CONFIG_UIO=y +CONFIG_UIO_FSL_SRIO=y +CONFIG_UIO_FSL_RMU=y +CONFIG_UIO_FSL_DMA=y +CONFIG_STAGING=y +CONFIG_FSL_PME2=y +CONFIG_FSL_PAMU=y +CONFIG_VIRT_DRIVERS=y +CONFIG_FSL_HV_MANAGER=y +CONFIG_MEMORY=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_NTFS_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_HUGETLBFS=y +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=1 +CONFIG_UBIFS_FS=y +CONFIG_CRAMFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=m +CONFIG_CRC_T10DIF=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_INFO=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_DEV_FSL_CAAM=y diff --git a/drivers/net/ethernet/freescale/fman/Kconfig b/drivers/net/ethernet/freescale/fman/Kconfig index 5e05864..69b2d81 100644 --- a/drivers/net/ethernet/freescale/fman/Kconfig +++ b/drivers/net/ethernet/freescale/fman/Kconfig @@ -26,23 +26,20 @@ config FMAN_P3040_P4080_P5020 config FMAN_P1023 bool "P1023" -config FMAN_T4240 - bool "T4240" - -endchoice -endmenu +config FMAN_V3H + bool "FmanV3H" + ---help--- + Choose "FmanV3H" for Fman rev3H: + B4860, T4240, T4160, etc config FMAN_V3L - depends on FMAN_T4240 - bool "FMAN_V3L like T1040, T1042, T1020, T1022" - default n + bool "FmanV3L" ---help--- - There are two FMAN V3 version: FMAN_V3H and FMAN_V3L. - T1040, T1042, T1020, T1022, T1023, T1024 belong to FMAN_V3L, there - are 4 Offline/Host Command Ports (O/H n) in FMAN_V3L. - But there are 6 Offline/Host Command Ports (O/H n) in - FMAN_V3H. - Say "Y" if chips are T1040, T1042, T1020, T1022, T1023, T1024 family. + Choose "FmanV3L" for Fman rev3L: + T1040, T1042, T1020, T1022, T1023, T1024, etc + +endchoice +endmenu config FMAN_MIB_CNT_OVF_IRQ_EN bool "Enable the dTSEC MIB counters overflow interrupt" @@ -102,7 +99,7 @@ config FSL_FM_RX_EXTRA_HEADROOM config FMAN_PFC bool "FMan PFC support (EXPERIMENTAL)" - depends on FMAN_T4240 && FSL_FMAN + depends on ( FMAN_V3H || FMAN_V3L ) && FSL_FMAN default n ---help--- This option enables PFC support on FMan v3 ports. diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/Makefile b/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/Makefile index 6a31a12..2151450 100644 --- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/Makefile +++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/Makefile @@ -16,6 +16,10 @@ fsl-ncsw-MAC-objs := dtsec.o dtsec_mii_acc.o fm_mac.o tgec.o tgec_mii_acc.o \ fman_dtsec.o fman_dtsec_mii_acc.o fman_memac.o \ fman_tgec.o fman_crc32.o -ifeq ($(CONFIG_FMAN_T4240),y) +ifeq ($(CONFIG_FMAN_V3H),y) fsl-ncsw-MAC-objs += memac.o memac_mii_acc.o fman_memac_mii_acc.o endif +ifeq ($(CONFIG_FMAN_V3L),y) +fsl-ncsw-MAC-objs += memac.o memac_mii_acc.o fman_memac_mii_acc.o +endif + diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/Makefile b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/Makefile index 965c63f..1922350 100644 --- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/Makefile +++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Pcd/Makefile @@ -14,6 +14,10 @@ obj-y += fsl-ncsw-Pcd.o fsl-ncsw-Pcd-objs := fman_kg.o fman_prs.o fm_cc.o fm_kg.o fm_pcd.o fm_plcr.o fm_prs.o fm_manip.o -ifeq ($(CONFIG_FMAN_T4240),y) +ifeq ($(CONFIG_FMAN_V3H),y) fsl-ncsw-Pcd-objs += fm_replic.o endif +ifeq ($(CONFIG_FMAN_V3L),y) +fsl-ncsw-Pcd-objs += fm_replic.o +endif + diff --git a/drivers/net/ethernet/freescale/fman/fmanv3h_dflags.h b/drivers/net/ethernet/freescale/fman/fmanv3h_dflags.h new file mode 100644 index 0000000..435b0d2 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/fmanv3h_dflags.h @@ -0,0 +1,57 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __dflags_h +#define __dflags_h + + +#define NCSW_LINUX + +#define T4240 +#define NCSW_PPC_CORE + +#define DEBUG_ERRORS 1 + +#if defined(DEBUG) +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO + +#define DEBUG_XX_MALLOC +#define DEBUG_MEM_LEAKS + +#else +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING +#endif /* (DEBUG) */ + +#define REPORT_EVENTS 1 +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR + +#endif /* __dflags_h */ diff --git a/drivers/net/ethernet/freescale/fman/fmanv3l_dflags.h b/drivers/net/ethernet/freescale/fman/fmanv3l_dflags.h new file mode 100644 index 0000000..789eb87 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/fmanv3l_dflags.h @@ -0,0 +1,56 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __dflags_h +#define __dflags_h + + +#define NCSW_LINUX + +#define NCSW_PPC_CORE + +#define DEBUG_ERRORS 1 + +#if defined(DEBUG) +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO + +#define DEBUG_XX_MALLOC +#define DEBUG_MEM_LEAKS + +#else +#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING +#endif /* (DEBUG) */ + +#define REPORT_EVENTS 1 +#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR + +#endif /* __dflags_h */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/dpaa_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/dpaa_integration_ext.h new file mode 100644 index 0000000..ce6fba1 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/dpaa_integration_ext.h @@ -0,0 +1,290 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + + @File dpaa_integration_ext.h + + @Description T4240 FM external definitions and structures. +*//***************************************************************************/ +#ifndef __DPAA_INTEGRATION_EXT_H +#define __DPAA_INTEGRATION_EXT_H + +#include "std_ext.h" + + +#define DPAA_VERSION 11 + +/**************************************************************************//** + @Description DPAA SW Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_SWPORTAL0 = 0, + e_DPAA_SWPORTAL1, + e_DPAA_SWPORTAL2, + e_DPAA_SWPORTAL3, + e_DPAA_SWPORTAL4, + e_DPAA_SWPORTAL5, + e_DPAA_SWPORTAL6, + e_DPAA_SWPORTAL7, + e_DPAA_SWPORTAL8, + e_DPAA_SWPORTAL9, + e_DPAA_SWPORTAL10, + e_DPAA_SWPORTAL11, + e_DPAA_SWPORTAL12, + e_DPAA_SWPORTAL13, + e_DPAA_SWPORTAL14, + e_DPAA_SWPORTAL15, + e_DPAA_SWPORTAL16, + e_DPAA_SWPORTAL17, + e_DPAA_SWPORTAL18, + e_DPAA_SWPORTAL19, + e_DPAA_SWPORTAL20, + e_DPAA_SWPORTAL21, + e_DPAA_SWPORTAL22, + e_DPAA_SWPORTAL23, + e_DPAA_SWPORTAL24, + e_DPAA_SWPORTAL_DUMMY_LAST +} e_DpaaSwPortal; + +/**************************************************************************//** + @Description DPAA Direct Connect Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_DCPORTAL0 = 0, + e_DPAA_DCPORTAL1, + e_DPAA_DCPORTAL2, + e_DPAA_DCPORTAL_DUMMY_LAST +} e_DpaaDcPortal; + +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST + +/***************************************************************************** + QMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */ +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */ +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */ +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE) + /**< FQIDs range - 24 bits */ + +/**************************************************************************//** + @Description Work Queue Channel assignments in QMan. +*//***************************************************************************/ +typedef enum +{ + e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */ + e_QM_FQ_CHANNEL_SWPORTAL1, + e_QM_FQ_CHANNEL_SWPORTAL2, + e_QM_FQ_CHANNEL_SWPORTAL3, + e_QM_FQ_CHANNEL_SWPORTAL4, + e_QM_FQ_CHANNEL_SWPORTAL5, + e_QM_FQ_CHANNEL_SWPORTAL6, + e_QM_FQ_CHANNEL_SWPORTAL7, + e_QM_FQ_CHANNEL_SWPORTAL8, + e_QM_FQ_CHANNEL_SWPORTAL9, + e_QM_FQ_CHANNEL_SWPORTAL10, + e_QM_FQ_CHANNEL_SWPORTAL11, + e_QM_FQ_CHANNEL_SWPORTAL12, + e_QM_FQ_CHANNEL_SWPORTAL13, + e_QM_FQ_CHANNEL_SWPORTAL14, + e_QM_FQ_CHANNEL_SWPORTAL15, + e_QM_FQ_CHANNEL_SWPORTAL16, + e_QM_FQ_CHANNEL_SWPORTAL17, + e_QM_FQ_CHANNEL_SWPORTAL18, + e_QM_FQ_CHANNEL_SWPORTAL19, + e_QM_FQ_CHANNEL_SWPORTAL20, + e_QM_FQ_CHANNEL_SWPORTAL21, + e_QM_FQ_CHANNEL_SWPORTAL22, + e_QM_FQ_CHANNEL_SWPORTAL23, + e_QM_FQ_CHANNEL_SWPORTAL24, + + e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */ + e_QM_FQ_CHANNEL_POOL2, + e_QM_FQ_CHANNEL_POOL3, + e_QM_FQ_CHANNEL_POOL4, + e_QM_FQ_CHANNEL_POOL5, + e_QM_FQ_CHANNEL_POOL6, + e_QM_FQ_CHANNEL_POOL7, + e_QM_FQ_CHANNEL_POOL8, + e_QM_FQ_CHANNEL_POOL9, + e_QM_FQ_CHANNEL_POOL10, + e_QM_FQ_CHANNEL_POOL11, + e_QM_FQ_CHANNEL_POOL12, + e_QM_FQ_CHANNEL_POOL13, + e_QM_FQ_CHANNEL_POOL14, + e_QM_FQ_CHANNEL_POOL15, + + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0: + connected to FMan 0; assigned in incrementing order to + each sub-portal (SP) in the portal */ + e_QM_FQ_CHANNEL_FMAN0_SP1, + e_QM_FQ_CHANNEL_FMAN0_SP2, + e_QM_FQ_CHANNEL_FMAN0_SP3, + e_QM_FQ_CHANNEL_FMAN0_SP4, + e_QM_FQ_CHANNEL_FMAN0_SP5, + e_QM_FQ_CHANNEL_FMAN0_SP6, + e_QM_FQ_CHANNEL_FMAN0_SP7, + e_QM_FQ_CHANNEL_FMAN0_SP8, + e_QM_FQ_CHANNEL_FMAN0_SP9, + e_QM_FQ_CHANNEL_FMAN0_SP10, + e_QM_FQ_CHANNEL_FMAN0_SP11, + e_QM_FQ_CHANNEL_FMAN0_SP12, + e_QM_FQ_CHANNEL_FMAN0_SP13, + e_QM_FQ_CHANNEL_FMAN0_SP14, + e_QM_FQ_CHANNEL_FMAN0_SP15, + + e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */ + e_QM_FQ_CHANNEL_RMAN_SP1, + + e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2: + connected to SEC */ +} e_QmFQChannel; + +/***************************************************************************** + BMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */ + +/***************************************************************************** + SEC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define SEC_NUM_OF_DECOS 3 +#define SEC_ALL_DECOS_MASK 0x00000003 + + +/***************************************************************************** + FM INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define INTG_MAX_NUM_OF_FM 2 +/* Ports defines */ +#define FM_MAX_NUM_OF_1G_MACS 6 +#define FM_MAX_NUM_OF_10G_MACS 2 +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS) +#define FM_MAX_NUM_OF_OH_PORTS 6 + +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS) + +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS) + +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */ +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */ +#define FM_MAX_NUM_OF_SUB_PORTALS 16 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0 + +#define FM_VSP_MAX_NUM_OF_ENTRIES 64 +#define FM_MAX_NUM_OF_PFC_PRIORITIES 8 + +/* RAMs defines */ +#define FM_MURAM_SIZE (384 * KILOBYTE) +#define FM_IRAM_SIZE ( 64 * KILOBYTE) +#define FM_NUM_OF_CTRL 4 + +/* PCD defines */ +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */ +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */ +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */ +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000440 /**< Number of bytes saved for patches */ +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */ + +/* RTC defines */ +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */ +#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */ +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */ + +/* QMI defines */ +#define QMI_MAX_NUM_OF_TNUMS 64 +#define QMI_DEF_TNUMS_THRESH 32 +/* FPM defines */ +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4 + +/* DMA defines */ +#define DMA_THRESH_MAX_COMMQ 83 +#define DMA_THRESH_MAX_BUF 127 + +/* BMI defines */ +#define BMI_MAX_NUM_OF_TASKS 128 +#define BMI_MAX_NUM_OF_DMAS 84 + +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE) +#define PORT_MAX_WEIGHT 16 + +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE + +/* Unique T4240 */ +#define FM_OP_OPEN_DMA_MIN_LIMIT +#define FM_NO_RESTRICT_ON_ACCESS_RSRC +#define FM_NO_OP_OBSERVED_POOLS +#define FM_FRAME_END_PARAMS_FOR_OP +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION + +#define FM_NO_GUARANTEED_RESET_VALUES + +/* FM errata */ +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 +#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127 +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675 +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 + +#define FM_BCB_ERRATA_BMI_SW001 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002 +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */ +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */ + +/***************************************************************************** + RMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */ +#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */ + +/* RMan erratas */ +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756 + +/***************************************************************************** + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define NUM_OF_RX_SC 16 +#define NUM_OF_TX_SC 16 + +#define NUM_OF_SA_PER_RX_SC 2 +#define NUM_OF_SA_PER_TX_SC 2 + +#endif /* __DPAA_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_ext.h new file mode 100644 index 0000000..0d62dd1 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_ext.h @@ -0,0 +1,71 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************//** + + @File part_ext.h + + @Description Definitions for the part (integration) module. +*//***************************************************************************/ + +#ifndef __PART_EXT_H +#define __PART_EXT_H + +#include "std_ext.h" +#include "part_integration_ext.h" + +#if !(defined(P1023) || \ + defined(P2041) || \ + defined(P3041) || \ + defined(P4080) || \ + defined(P5020) || \ + defined(P5040) || \ + defined(B4860) || \ + defined(T4240)) +#error "unable to proceed without chip-definition" +#endif + + +/**************************************************************************//* + @Description Part data structure - must be contained in any integration + data structure. +*//***************************************************************************/ +typedef struct t_Part +{ + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId); + /**< Returns the address of the module's memory map base. */ + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress); + /**< Returns the module's ID according to its memory map base. */ +} t_Part; + + +#endif /* __PART_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_integration_ext.h new file mode 100644 index 0000000..3254c76 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3H/part_integration_ext.h @@ -0,0 +1,304 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + + @File part_integration_ext.h + + @Description T4240 external definitions and structures. +*//***************************************************************************/ +#ifndef __PART_INTEGRATION_EXT_H +#define __PART_INTEGRATION_EXT_H + +#include "std_ext.h" +#include "ddr_std_ext.h" +#include "enet_ext.h" +#include "dpaa_integration_ext.h" + + +/**************************************************************************//** + @Group T4240_chip_id T4240 Application Programming Interface + + @Description T4240 Chip functions,definitions and enums. + + @{ +*//***************************************************************************/ + +#define CORE_E6500 + +#define INTG_MAX_NUM_OF_CORES 24 + + +/**************************************************************************//** + @Description Module types. +*//***************************************************************************/ +typedef enum e_ModuleId +{ + e_MODULE_ID_DUART_1 = 0, + e_MODULE_ID_DUART_2, + e_MODULE_ID_DUART_3, + e_MODULE_ID_DUART_4, + e_MODULE_ID_LAW, + e_MODULE_ID_IFC, + e_MODULE_ID_PAMU, + e_MODULE_ID_QM, /**< Queue manager module */ + e_MODULE_ID_BM, /**< Buffer manager module */ + e_MODULE_ID_QM_CE_PORTAL_0, + e_MODULE_ID_QM_CI_PORTAL_0, + e_MODULE_ID_QM_CE_PORTAL_1, + e_MODULE_ID_QM_CI_PORTAL_1, + e_MODULE_ID_QM_CE_PORTAL_2, + e_MODULE_ID_QM_CI_PORTAL_2, + e_MODULE_ID_QM_CE_PORTAL_3, + e_MODULE_ID_QM_CI_PORTAL_3, + e_MODULE_ID_QM_CE_PORTAL_4, + e_MODULE_ID_QM_CI_PORTAL_4, + e_MODULE_ID_QM_CE_PORTAL_5, + e_MODULE_ID_QM_CI_PORTAL_5, + e_MODULE_ID_QM_CE_PORTAL_6, + e_MODULE_ID_QM_CI_PORTAL_6, + e_MODULE_ID_QM_CE_PORTAL_7, + e_MODULE_ID_QM_CI_PORTAL_7, + e_MODULE_ID_QM_CE_PORTAL_8, + e_MODULE_ID_QM_CI_PORTAL_8, + e_MODULE_ID_QM_CE_PORTAL_9, + e_MODULE_ID_QM_CI_PORTAL_9, + e_MODULE_ID_BM_CE_PORTAL_0, + e_MODULE_ID_BM_CI_PORTAL_0, + e_MODULE_ID_BM_CE_PORTAL_1, + e_MODULE_ID_BM_CI_PORTAL_1, + e_MODULE_ID_BM_CE_PORTAL_2, + e_MODULE_ID_BM_CI_PORTAL_2, + e_MODULE_ID_BM_CE_PORTAL_3, + e_MODULE_ID_BM_CI_PORTAL_3, + e_MODULE_ID_BM_CE_PORTAL_4, + e_MODULE_ID_BM_CI_PORTAL_4, + e_MODULE_ID_BM_CE_PORTAL_5, + e_MODULE_ID_BM_CI_PORTAL_5, + e_MODULE_ID_BM_CE_PORTAL_6, + e_MODULE_ID_BM_CI_PORTAL_6, + e_MODULE_ID_BM_CE_PORTAL_7, + e_MODULE_ID_BM_CI_PORTAL_7, + e_MODULE_ID_BM_CE_PORTAL_8, + e_MODULE_ID_BM_CI_PORTAL_8, + e_MODULE_ID_BM_CE_PORTAL_9, + e_MODULE_ID_BM_CI_PORTAL_9, + e_MODULE_ID_FM, /**< Frame manager module */ + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */ + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */ + e_MODULE_ID_FM_BMI, /**< FM BMI block */ + e_MODULE_ID_FM_QMI, /**< FM QMI block */ + e_MODULE_ID_FM_PARSER, /**< FM parser block */ + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */ + e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */ + e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */ + e_MODULE_ID_FM_PLCR, /**< FM Policer */ + e_MODULE_ID_FM_KG, /**< FM Keygen */ + e_MODULE_ID_FM_DMA, /**< FM DMA */ + e_MODULE_ID_FM_FPM, /**< FM FPM */ + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */ + e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */ + e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */ + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */ + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */ + e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */ + e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */ + e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */ + e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */ + e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */ + e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */ + e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */ + + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */ + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */ + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */ + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */ + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */ + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */ + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */ + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */ + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */ + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */ + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */ + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */ + + e_MODULE_ID_PIC, /**< PIC */ + e_MODULE_ID_GPIO, /**< GPIO */ + e_MODULE_ID_SERDES, /**< SERDES */ + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */ + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */ + + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */ + + e_MODULE_ID_DUMMY_LAST +} e_ModuleId; + +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST + +#if 0 /* using unified values */ +/***************************************************************************** + INTEGRATION-SPECIFIC MODULE CODES +******************************************************************************/ +#define MODULE_UNKNOWN 0x00000000 +#define MODULE_MEM 0x00010000 +#define MODULE_MM 0x00020000 +#define MODULE_CORE 0x00030000 +#define MODULE_T4240 0x00040000 +#define MODULE_T4240_PLATFORM 0x00050000 +#define MODULE_PM 0x00060000 +#define MODULE_MMU 0x00070000 +#define MODULE_PIC 0x00080000 +#define MODULE_CPC 0x00090000 +#define MODULE_DUART 0x000a0000 +#define MODULE_SERDES 0x000b0000 +#define MODULE_PIO 0x000c0000 +#define MODULE_QM 0x000d0000 +#define MODULE_BM 0x000e0000 +#define MODULE_SEC 0x000f0000 +#define MODULE_LAW 0x00100000 +#define MODULE_LBC 0x00110000 +#define MODULE_PAMU 0x00120000 +#define MODULE_FM 0x00130000 +#define MODULE_FM_MURAM 0x00140000 +#define MODULE_FM_PCD 0x00150000 +#define MODULE_FM_RTC 0x00160000 +#define MODULE_FM_MAC 0x00170000 +#define MODULE_FM_PORT 0x00180000 +#define MODULE_FM_SP 0x00190000 +#define MODULE_DPA_PORT 0x001a0000 +#define MODULE_MII 0x001b0000 +#define MODULE_I2C 0x001c0000 +#define MODULE_DMA 0x001d0000 +#define MODULE_DDR 0x001e0000 +#define MODULE_ESPI 0x001f0000 +#define MODULE_DPAA_IPSEC 0x00200000 +#endif /* using unified values */ + +/***************************************************************************** + PAMU INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define PAMU_NUM_OF_PARTITIONS 4 + +/***************************************************************************** + LAW INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define LAW_NUM_OF_WINDOWS 32 +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4 Kbytes */ +#define LAW_MAX_WINDOW_SIZE 0x0000010000000000LL /**< 1 Tbytes for 40-bit address space */ + + +/***************************************************************************** + LBC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +/**************************************************************************//** + @Group lbc_exception_grp LBC Exception Unit + + @Description LBC Exception unit API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Anchor lbc_exbm + + @Collection LBC Errors Bit Mask + + These errors are reported through the exceptions callback.. + The values can be or'ed in any combination in the errors mask + parameter of the errors report structure. + + These errors can also be passed as a bit-mask to + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(), + for enabling or disabling error checking. + @{ +*//***************************************************************************/ +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */ +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */ +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */ +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */ + +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \ + LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT) + /**< All possible errors */ +/* @} */ +/** @} */ /* end of lbc_exception_grp group */ + +#define LBC_INCORRECT_ERROR_REPORT_ERRATA + +#define LBC_NUM_OF_BANKS 8 +#define LBC_MAX_CS_SIZE 0x0000000100000000LL /* Up to 4G memory block size */ +#define LBC_PARITY_SUPPORT +#define LBC_ADDRESS_HOLD_TIME_CTRL +#define LBC_HIGH_CLK_DIVIDERS +#define LBC_FCM_AVAILABLE + +/***************************************************************************** + GPIO INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define GPIO_PORT_OFFSET_0x1000 + +#define GPIO_NUM_OF_PORTS 3 /**< Number of ports in GPIO module; + Each port contains up to 32 I/O pins. */ + +#define GPIO_VALID_PIN_MASKS \ + { /* Port A */ 0xFFFFFFFF, \ + /* Port B */ 0xFFFFFFFF, \ + /* Port C */ 0xFFFFFFFF } + +#define GPIO_VALID_INTR_MASKS \ + { /* Port A */ 0xFFFFFFFF, \ + /* Port B */ 0xFFFFFFFF, \ + /* Port C */ 0xFFFFFFFF } + + + +#endif /* __PART_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/dpaa_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/dpaa_integration_ext.h new file mode 100644 index 0000000..13b14b0 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/dpaa_integration_ext.h @@ -0,0 +1,289 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + + @File dpaa_integration_ext.h + + @Description T4240 FM external definitions and structures. +*//***************************************************************************/ +#ifndef __DPAA_INTEGRATION_EXT_H +#define __DPAA_INTEGRATION_EXT_H + +#include "std_ext.h" + + +#define DPAA_VERSION 11 + +/**************************************************************************//** + @Description DPAA SW Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_SWPORTAL0 = 0, + e_DPAA_SWPORTAL1, + e_DPAA_SWPORTAL2, + e_DPAA_SWPORTAL3, + e_DPAA_SWPORTAL4, + e_DPAA_SWPORTAL5, + e_DPAA_SWPORTAL6, + e_DPAA_SWPORTAL7, + e_DPAA_SWPORTAL8, + e_DPAA_SWPORTAL9, + e_DPAA_SWPORTAL10, + e_DPAA_SWPORTAL11, + e_DPAA_SWPORTAL12, + e_DPAA_SWPORTAL13, + e_DPAA_SWPORTAL14, + e_DPAA_SWPORTAL15, + e_DPAA_SWPORTAL16, + e_DPAA_SWPORTAL17, + e_DPAA_SWPORTAL18, + e_DPAA_SWPORTAL19, + e_DPAA_SWPORTAL20, + e_DPAA_SWPORTAL21, + e_DPAA_SWPORTAL22, + e_DPAA_SWPORTAL23, + e_DPAA_SWPORTAL24, + e_DPAA_SWPORTAL_DUMMY_LAST +} e_DpaaSwPortal; + +/**************************************************************************//** + @Description DPAA Direct Connect Portals Enumeration. +*//***************************************************************************/ +typedef enum +{ + e_DPAA_DCPORTAL0 = 0, + e_DPAA_DCPORTAL1, + e_DPAA_DCPORTAL2, + e_DPAA_DCPORTAL_DUMMY_LAST +} e_DpaaDcPortal; + +#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST +#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST + +/***************************************************************************** + QMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */ +#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */ +#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */ +#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE) + /**< FQIDs range - 24 bits */ + +/**************************************************************************//** + @Description Work Queue Channel assignments in QMan. +*//***************************************************************************/ +typedef enum +{ + e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */ + e_QM_FQ_CHANNEL_SWPORTAL1, + e_QM_FQ_CHANNEL_SWPORTAL2, + e_QM_FQ_CHANNEL_SWPORTAL3, + e_QM_FQ_CHANNEL_SWPORTAL4, + e_QM_FQ_CHANNEL_SWPORTAL5, + e_QM_FQ_CHANNEL_SWPORTAL6, + e_QM_FQ_CHANNEL_SWPORTAL7, + e_QM_FQ_CHANNEL_SWPORTAL8, + e_QM_FQ_CHANNEL_SWPORTAL9, + e_QM_FQ_CHANNEL_SWPORTAL10, + e_QM_FQ_CHANNEL_SWPORTAL11, + e_QM_FQ_CHANNEL_SWPORTAL12, + e_QM_FQ_CHANNEL_SWPORTAL13, + e_QM_FQ_CHANNEL_SWPORTAL14, + e_QM_FQ_CHANNEL_SWPORTAL15, + e_QM_FQ_CHANNEL_SWPORTAL16, + e_QM_FQ_CHANNEL_SWPORTAL17, + e_QM_FQ_CHANNEL_SWPORTAL18, + e_QM_FQ_CHANNEL_SWPORTAL19, + e_QM_FQ_CHANNEL_SWPORTAL20, + e_QM_FQ_CHANNEL_SWPORTAL21, + e_QM_FQ_CHANNEL_SWPORTAL22, + e_QM_FQ_CHANNEL_SWPORTAL23, + e_QM_FQ_CHANNEL_SWPORTAL24, + + e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */ + e_QM_FQ_CHANNEL_POOL2, + e_QM_FQ_CHANNEL_POOL3, + e_QM_FQ_CHANNEL_POOL4, + e_QM_FQ_CHANNEL_POOL5, + e_QM_FQ_CHANNEL_POOL6, + e_QM_FQ_CHANNEL_POOL7, + e_QM_FQ_CHANNEL_POOL8, + e_QM_FQ_CHANNEL_POOL9, + e_QM_FQ_CHANNEL_POOL10, + e_QM_FQ_CHANNEL_POOL11, + e_QM_FQ_CHANNEL_POOL12, + e_QM_FQ_CHANNEL_POOL13, + e_QM_FQ_CHANNEL_POOL14, + e_QM_FQ_CHANNEL_POOL15, + + e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0: + connected to FMan 0; assigned in incrementing order to + each sub-portal (SP) in the portal */ + e_QM_FQ_CHANNEL_FMAN0_SP1, + e_QM_FQ_CHANNEL_FMAN0_SP2, + e_QM_FQ_CHANNEL_FMAN0_SP3, + e_QM_FQ_CHANNEL_FMAN0_SP4, + e_QM_FQ_CHANNEL_FMAN0_SP5, + e_QM_FQ_CHANNEL_FMAN0_SP6, + e_QM_FQ_CHANNEL_FMAN0_SP7, + e_QM_FQ_CHANNEL_FMAN0_SP8, + e_QM_FQ_CHANNEL_FMAN0_SP9, + e_QM_FQ_CHANNEL_FMAN0_SP10, + e_QM_FQ_CHANNEL_FMAN0_SP11, + e_QM_FQ_CHANNEL_FMAN0_SP12, + e_QM_FQ_CHANNEL_FMAN0_SP13, + e_QM_FQ_CHANNEL_FMAN0_SP14, + e_QM_FQ_CHANNEL_FMAN0_SP15, + + e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */ + e_QM_FQ_CHANNEL_RMAN_SP1, + + e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2: + connected to SEC */ +} e_QmFQChannel; + +/***************************************************************************** + BMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */ + +/***************************************************************************** + SEC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define SEC_NUM_OF_DECOS 3 +#define SEC_ALL_DECOS_MASK 0x00000003 + + +/***************************************************************************** + FM INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define INTG_MAX_NUM_OF_FM 1 +/* Ports defines */ +#define FM_MAX_NUM_OF_1G_MACS 5 +#define FM_MAX_NUM_OF_10G_MACS 1 +#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS) +#define FM_MAX_NUM_OF_OH_PORTS 4 + +#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS) + +#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS +#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS +#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS) + +#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */ +#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */ +#define FM_MAX_NUM_OF_SUB_PORTALS 16 +#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0 + +#define FM_VSP_MAX_NUM_OF_ENTRIES 32 +#define FM_MAX_NUM_OF_PFC_PRIORITIES 8 + +/* RAMs defines */ +#define FM_MURAM_SIZE (192 * KILOBYTE) +#define FM_IRAM_SIZE (32 * KILOBYTE) +#define FM_NUM_OF_CTRL 2 + +/* PCD defines */ +#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */ +#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */ +#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */ +#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000440 /**< Number of bytes saved for patches */ +#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */ + +/* RTC defines */ +#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */ +#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */ +#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */ + +/* QMI defines */ +#define QMI_MAX_NUM_OF_TNUMS 64 +#define QMI_DEF_TNUMS_THRESH 32 +/* FPM defines */ +#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4 + +/* DMA defines */ +#define DMA_THRESH_MAX_COMMQ 83 +#define DMA_THRESH_MAX_BUF 127 + +/* BMI defines */ +#define BMI_MAX_NUM_OF_TASKS 64 +#define BMI_MAX_NUM_OF_DMAS 32 + +#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE) +#define PORT_MAX_WEIGHT 16 + +#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE + +/* Unique T4240 */ +#define FM_OP_OPEN_DMA_MIN_LIMIT +#define FM_NO_RESTRICT_ON_ACCESS_RSRC +#define FM_NO_OP_OBSERVED_POOLS +#define FM_FRAME_END_PARAMS_FOR_OP +#define FM_DEQ_PIPELINE_PARAMS_FOR_OP +#define FM_QMI_NO_SINGLE_ECC_EXCEPTION + +#define FM_NO_GUARANTEED_RESET_VALUES + +/* FM errata */ +#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 +#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 +#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675 +#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 + +#define FM_BCB_ERRATA_BMI_SW001 +#define FM_LEN_CHECK_ERRATA_FMAN_SW002 +#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */ +#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */ + +/***************************************************************************** + RMan INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */ +#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */ + +/* RMan erratas */ +#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756 + +/***************************************************************************** + FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define NUM_OF_RX_SC 16 +#define NUM_OF_TX_SC 16 + +#define NUM_OF_SA_PER_RX_SC 2 +#define NUM_OF_SA_PER_TX_SC 2 + +#endif /* __DPAA_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_ext.h new file mode 100644 index 0000000..ba9732e --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_ext.h @@ -0,0 +1,59 @@ +/* + * Copyright 2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/**************************************************************************//** + + @File part_ext.h + + @Description Definitions for the part (integration) module. +*//***************************************************************************/ + +#ifndef __PART_EXT_H +#define __PART_EXT_H + +#include "std_ext.h" +#include "part_integration_ext.h" + +/**************************************************************************//* + @Description Part data structure - must be contained in any integration + data structure. +*//***************************************************************************/ +typedef struct t_Part +{ + uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId); + /**< Returns the address of the module's memory map base. */ + e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress); + /**< Returns the module's ID according to its memory map base. */ +} t_Part; + + +#endif /* __PART_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_integration_ext.h new file mode 100644 index 0000000..3254c76 --- /dev/null +++ b/drivers/net/ethernet/freescale/fman/inc/integrations/FMANV3L/part_integration_ext.h @@ -0,0 +1,304 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + + @File part_integration_ext.h + + @Description T4240 external definitions and structures. +*//***************************************************************************/ +#ifndef __PART_INTEGRATION_EXT_H +#define __PART_INTEGRATION_EXT_H + +#include "std_ext.h" +#include "ddr_std_ext.h" +#include "enet_ext.h" +#include "dpaa_integration_ext.h" + + +/**************************************************************************//** + @Group T4240_chip_id T4240 Application Programming Interface + + @Description T4240 Chip functions,definitions and enums. + + @{ +*//***************************************************************************/ + +#define CORE_E6500 + +#define INTG_MAX_NUM_OF_CORES 24 + + +/**************************************************************************//** + @Description Module types. +*//***************************************************************************/ +typedef enum e_ModuleId +{ + e_MODULE_ID_DUART_1 = 0, + e_MODULE_ID_DUART_2, + e_MODULE_ID_DUART_3, + e_MODULE_ID_DUART_4, + e_MODULE_ID_LAW, + e_MODULE_ID_IFC, + e_MODULE_ID_PAMU, + e_MODULE_ID_QM, /**< Queue manager module */ + e_MODULE_ID_BM, /**< Buffer manager module */ + e_MODULE_ID_QM_CE_PORTAL_0, + e_MODULE_ID_QM_CI_PORTAL_0, + e_MODULE_ID_QM_CE_PORTAL_1, + e_MODULE_ID_QM_CI_PORTAL_1, + e_MODULE_ID_QM_CE_PORTAL_2, + e_MODULE_ID_QM_CI_PORTAL_2, + e_MODULE_ID_QM_CE_PORTAL_3, + e_MODULE_ID_QM_CI_PORTAL_3, + e_MODULE_ID_QM_CE_PORTAL_4, + e_MODULE_ID_QM_CI_PORTAL_4, + e_MODULE_ID_QM_CE_PORTAL_5, + e_MODULE_ID_QM_CI_PORTAL_5, + e_MODULE_ID_QM_CE_PORTAL_6, + e_MODULE_ID_QM_CI_PORTAL_6, + e_MODULE_ID_QM_CE_PORTAL_7, + e_MODULE_ID_QM_CI_PORTAL_7, + e_MODULE_ID_QM_CE_PORTAL_8, + e_MODULE_ID_QM_CI_PORTAL_8, + e_MODULE_ID_QM_CE_PORTAL_9, + e_MODULE_ID_QM_CI_PORTAL_9, + e_MODULE_ID_BM_CE_PORTAL_0, + e_MODULE_ID_BM_CI_PORTAL_0, + e_MODULE_ID_BM_CE_PORTAL_1, + e_MODULE_ID_BM_CI_PORTAL_1, + e_MODULE_ID_BM_CE_PORTAL_2, + e_MODULE_ID_BM_CI_PORTAL_2, + e_MODULE_ID_BM_CE_PORTAL_3, + e_MODULE_ID_BM_CI_PORTAL_3, + e_MODULE_ID_BM_CE_PORTAL_4, + e_MODULE_ID_BM_CI_PORTAL_4, + e_MODULE_ID_BM_CE_PORTAL_5, + e_MODULE_ID_BM_CI_PORTAL_5, + e_MODULE_ID_BM_CE_PORTAL_6, + e_MODULE_ID_BM_CI_PORTAL_6, + e_MODULE_ID_BM_CE_PORTAL_7, + e_MODULE_ID_BM_CI_PORTAL_7, + e_MODULE_ID_BM_CE_PORTAL_8, + e_MODULE_ID_BM_CI_PORTAL_8, + e_MODULE_ID_BM_CE_PORTAL_9, + e_MODULE_ID_BM_CI_PORTAL_9, + e_MODULE_ID_FM, /**< Frame manager module */ + e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */ + e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */ + e_MODULE_ID_FM_BMI, /**< FM BMI block */ + e_MODULE_ID_FM_QMI, /**< FM QMI block */ + e_MODULE_ID_FM_PARSER, /**< FM parser block */ + e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */ + e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */ + e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */ + e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */ + e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */ + e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */ + e_MODULE_ID_FM_PLCR, /**< FM Policer */ + e_MODULE_ID_FM_KG, /**< FM Keygen */ + e_MODULE_ID_FM_DMA, /**< FM DMA */ + e_MODULE_ID_FM_FPM, /**< FM FPM */ + e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */ + e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */ + e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */ + e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */ + e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */ + e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */ + e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */ + e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */ + e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */ + e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */ + e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */ + e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */ + + e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */ + e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */ + e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */ + e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */ + e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */ + e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */ + e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */ + e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */ + e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */ + e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */ + e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */ + e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */ + + e_MODULE_ID_PIC, /**< PIC */ + e_MODULE_ID_GPIO, /**< GPIO */ + e_MODULE_ID_SERDES, /**< SERDES */ + e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */ + e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */ + + e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */ + + e_MODULE_ID_DUMMY_LAST +} e_ModuleId; + +#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST + +#if 0 /* using unified values */ +/***************************************************************************** + INTEGRATION-SPECIFIC MODULE CODES +******************************************************************************/ +#define MODULE_UNKNOWN 0x00000000 +#define MODULE_MEM 0x00010000 +#define MODULE_MM 0x00020000 +#define MODULE_CORE 0x00030000 +#define MODULE_T4240 0x00040000 +#define MODULE_T4240_PLATFORM 0x00050000 +#define MODULE_PM 0x00060000 +#define MODULE_MMU 0x00070000 +#define MODULE_PIC 0x00080000 +#define MODULE_CPC 0x00090000 +#define MODULE_DUART 0x000a0000 +#define MODULE_SERDES 0x000b0000 +#define MODULE_PIO 0x000c0000 +#define MODULE_QM 0x000d0000 +#define MODULE_BM 0x000e0000 +#define MODULE_SEC 0x000f0000 +#define MODULE_LAW 0x00100000 +#define MODULE_LBC 0x00110000 +#define MODULE_PAMU 0x00120000 +#define MODULE_FM 0x00130000 +#define MODULE_FM_MURAM 0x00140000 +#define MODULE_FM_PCD 0x00150000 +#define MODULE_FM_RTC 0x00160000 +#define MODULE_FM_MAC 0x00170000 +#define MODULE_FM_PORT 0x00180000 +#define MODULE_FM_SP 0x00190000 +#define MODULE_DPA_PORT 0x001a0000 +#define MODULE_MII 0x001b0000 +#define MODULE_I2C 0x001c0000 +#define MODULE_DMA 0x001d0000 +#define MODULE_DDR 0x001e0000 +#define MODULE_ESPI 0x001f0000 +#define MODULE_DPAA_IPSEC 0x00200000 +#endif /* using unified values */ + +/***************************************************************************** + PAMU INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define PAMU_NUM_OF_PARTITIONS 4 + +/***************************************************************************** + LAW INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define LAW_NUM_OF_WINDOWS 32 +#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4 Kbytes */ +#define LAW_MAX_WINDOW_SIZE 0x0000010000000000LL /**< 1 Tbytes for 40-bit address space */ + + +/***************************************************************************** + LBC INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +/**************************************************************************//** + @Group lbc_exception_grp LBC Exception Unit + + @Description LBC Exception unit API functions, definitions and enums + + @{ +*//***************************************************************************/ + +/**************************************************************************//** + @Anchor lbc_exbm + + @Collection LBC Errors Bit Mask + + These errors are reported through the exceptions callback.. + The values can be or'ed in any combination in the errors mask + parameter of the errors report structure. + + These errors can also be passed as a bit-mask to + LBC_EnableErrorChecking() or LBC_DisableErrorChecking(), + for enabling or disabling error checking. + @{ +*//***************************************************************************/ +#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */ +#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */ +#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */ +#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */ + +#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \ + LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT) + /**< All possible errors */ +/* @} */ +/** @} */ /* end of lbc_exception_grp group */ + +#define LBC_INCORRECT_ERROR_REPORT_ERRATA + +#define LBC_NUM_OF_BANKS 8 +#define LBC_MAX_CS_SIZE 0x0000000100000000LL /* Up to 4G memory block size */ +#define LBC_PARITY_SUPPORT +#define LBC_ADDRESS_HOLD_TIME_CTRL +#define LBC_HIGH_CLK_DIVIDERS +#define LBC_FCM_AVAILABLE + +/***************************************************************************** + GPIO INTEGRATION-SPECIFIC DEFINITIONS +******************************************************************************/ +#define GPIO_PORT_OFFSET_0x1000 + +#define GPIO_NUM_OF_PORTS 3 /**< Number of ports in GPIO module; + Each port contains up to 32 I/O pins. */ + +#define GPIO_VALID_PIN_MASKS \ + { /* Port A */ 0xFFFFFFFF, \ + /* Port B */ 0xFFFFFFFF, \ + /* Port C */ 0xFFFFFFFF } + +#define GPIO_VALID_INTR_MASKS \ + { /* Port A */ 0xFFFFFFFF, \ + /* Port B */ 0xFFFFFFFF, \ + /* Port C */ 0xFFFFFFFF } + + + +#endif /* __PART_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/dpaa_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/dpaa_integration_ext.h deleted file mode 100644 index cd7e579..0000000 --- a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/dpaa_integration_ext.h +++ /dev/null @@ -1,317 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - - @File dpaa_integration_ext.h - - @Description T4240 FM external definitions and structures. -*//***************************************************************************/ -#ifndef __DPAA_INTEGRATION_EXT_H -#define __DPAA_INTEGRATION_EXT_H - -#include "std_ext.h" - - -#define DPAA_VERSION 11 - -/**************************************************************************//** - @Description DPAA SW Portals Enumeration. -*//***************************************************************************/ -typedef enum -{ - e_DPAA_SWPORTAL0 = 0, - e_DPAA_SWPORTAL1, - e_DPAA_SWPORTAL2, - e_DPAA_SWPORTAL3, - e_DPAA_SWPORTAL4, - e_DPAA_SWPORTAL5, - e_DPAA_SWPORTAL6, - e_DPAA_SWPORTAL7, - e_DPAA_SWPORTAL8, - e_DPAA_SWPORTAL9, - e_DPAA_SWPORTAL10, - e_DPAA_SWPORTAL11, - e_DPAA_SWPORTAL12, - e_DPAA_SWPORTAL13, - e_DPAA_SWPORTAL14, - e_DPAA_SWPORTAL15, - e_DPAA_SWPORTAL16, - e_DPAA_SWPORTAL17, - e_DPAA_SWPORTAL18, - e_DPAA_SWPORTAL19, - e_DPAA_SWPORTAL20, - e_DPAA_SWPORTAL21, - e_DPAA_SWPORTAL22, - e_DPAA_SWPORTAL23, - e_DPAA_SWPORTAL24, - e_DPAA_SWPORTAL_DUMMY_LAST -} e_DpaaSwPortal; - -/**************************************************************************//** - @Description DPAA Direct Connect Portals Enumeration. -*//***************************************************************************/ -typedef enum -{ - e_DPAA_DCPORTAL0 = 0, - e_DPAA_DCPORTAL1, - e_DPAA_DCPORTAL2, - e_DPAA_DCPORTAL_DUMMY_LAST -} e_DpaaDcPortal; - -#define DPAA_MAX_NUM_OF_SW_PORTALS e_DPAA_SWPORTAL_DUMMY_LAST -#define DPAA_MAX_NUM_OF_DC_PORTALS e_DPAA_DCPORTAL_DUMMY_LAST - -/***************************************************************************** - QMan INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define QM_MAX_NUM_OF_POOL_CHANNELS 15 /**< Total number of channels, dedicated and pool */ -#define QM_MAX_NUM_OF_WQ 8 /**< Number of work queues per channel */ -#define QM_MAX_NUM_OF_CGS 256 /**< Congestion groups number */ -#define QM_MAX_NUM_OF_FQIDS (16 * MEGABYTE) - /**< FQIDs range - 24 bits */ - -/**************************************************************************//** - @Description Work Queue Channel assignments in QMan. -*//***************************************************************************/ -typedef enum -{ - e_QM_FQ_CHANNEL_SWPORTAL0 = 0x0, /**< Dedicated channels serviced by software portals 0 to 24 */ - e_QM_FQ_CHANNEL_SWPORTAL1, - e_QM_FQ_CHANNEL_SWPORTAL2, - e_QM_FQ_CHANNEL_SWPORTAL3, - e_QM_FQ_CHANNEL_SWPORTAL4, - e_QM_FQ_CHANNEL_SWPORTAL5, - e_QM_FQ_CHANNEL_SWPORTAL6, - e_QM_FQ_CHANNEL_SWPORTAL7, - e_QM_FQ_CHANNEL_SWPORTAL8, - e_QM_FQ_CHANNEL_SWPORTAL9, - e_QM_FQ_CHANNEL_SWPORTAL10, - e_QM_FQ_CHANNEL_SWPORTAL11, - e_QM_FQ_CHANNEL_SWPORTAL12, - e_QM_FQ_CHANNEL_SWPORTAL13, - e_QM_FQ_CHANNEL_SWPORTAL14, - e_QM_FQ_CHANNEL_SWPORTAL15, - e_QM_FQ_CHANNEL_SWPORTAL16, - e_QM_FQ_CHANNEL_SWPORTAL17, - e_QM_FQ_CHANNEL_SWPORTAL18, - e_QM_FQ_CHANNEL_SWPORTAL19, - e_QM_FQ_CHANNEL_SWPORTAL20, - e_QM_FQ_CHANNEL_SWPORTAL21, - e_QM_FQ_CHANNEL_SWPORTAL22, - e_QM_FQ_CHANNEL_SWPORTAL23, - e_QM_FQ_CHANNEL_SWPORTAL24, - - e_QM_FQ_CHANNEL_POOL1 = 0x401, /**< Pool channels that can be serviced by any of the software portals */ - e_QM_FQ_CHANNEL_POOL2, - e_QM_FQ_CHANNEL_POOL3, - e_QM_FQ_CHANNEL_POOL4, - e_QM_FQ_CHANNEL_POOL5, - e_QM_FQ_CHANNEL_POOL6, - e_QM_FQ_CHANNEL_POOL7, - e_QM_FQ_CHANNEL_POOL8, - e_QM_FQ_CHANNEL_POOL9, - e_QM_FQ_CHANNEL_POOL10, - e_QM_FQ_CHANNEL_POOL11, - e_QM_FQ_CHANNEL_POOL12, - e_QM_FQ_CHANNEL_POOL13, - e_QM_FQ_CHANNEL_POOL14, - e_QM_FQ_CHANNEL_POOL15, - - e_QM_FQ_CHANNEL_FMAN0_SP0 = 0x800, /**< Dedicated channels serviced by Direct Connect Portal 0: - connected to FMan 0; assigned in incrementing order to - each sub-portal (SP) in the portal */ - e_QM_FQ_CHANNEL_FMAN0_SP1, - e_QM_FQ_CHANNEL_FMAN0_SP2, - e_QM_FQ_CHANNEL_FMAN0_SP3, - e_QM_FQ_CHANNEL_FMAN0_SP4, - e_QM_FQ_CHANNEL_FMAN0_SP5, - e_QM_FQ_CHANNEL_FMAN0_SP6, - e_QM_FQ_CHANNEL_FMAN0_SP7, - e_QM_FQ_CHANNEL_FMAN0_SP8, - e_QM_FQ_CHANNEL_FMAN0_SP9, - e_QM_FQ_CHANNEL_FMAN0_SP10, - e_QM_FQ_CHANNEL_FMAN0_SP11, - e_QM_FQ_CHANNEL_FMAN0_SP12, - e_QM_FQ_CHANNEL_FMAN0_SP13, - e_QM_FQ_CHANNEL_FMAN0_SP14, - e_QM_FQ_CHANNEL_FMAN0_SP15, - - e_QM_FQ_CHANNEL_RMAN_SP0 = 0x820, /**< Dedicated channels serviced by Direct Connect Portal 1: connected to RMan */ - e_QM_FQ_CHANNEL_RMAN_SP1, - - e_QM_FQ_CHANNEL_CAAM = 0x840 /**< Dedicated channel serviced by Direct Connect Portal 2: - connected to SEC */ -} e_QmFQChannel; - -/***************************************************************************** - BMan INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define BM_MAX_NUM_OF_POOLS 64 /**< Number of buffers pools */ - -/***************************************************************************** - SEC INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define SEC_NUM_OF_DECOS 3 -#define SEC_ALL_DECOS_MASK 0x00000003 - - -/***************************************************************************** - FM INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -/* Add T1 Port constraint:T1040, T1042, T1020, T1022 (T1040RM Rev D, 04/2014) */ -#ifdef CONFIG_FMAN_V3L -#define INTG_MAX_NUM_OF_FM 1 -/* Ports defines */ -#define FM_MAX_NUM_OF_1G_MACS 5 -#define FM_MAX_NUM_OF_10G_MACS 1 -#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS) -#define FM_MAX_NUM_OF_OH_PORTS 4 -#else /* CONFIG_FMAN_V3L */ -#define INTG_MAX_NUM_OF_FM 2 -/* Ports defines */ -#define FM_MAX_NUM_OF_1G_MACS 6 -#define FM_MAX_NUM_OF_10G_MACS 2 -#define FM_MAX_NUM_OF_MACS (FM_MAX_NUM_OF_1G_MACS + FM_MAX_NUM_OF_10G_MACS) -#define FM_MAX_NUM_OF_OH_PORTS 6 -#endif - -#define FM_MAX_NUM_OF_1G_RX_PORTS FM_MAX_NUM_OF_1G_MACS -#define FM_MAX_NUM_OF_10G_RX_PORTS FM_MAX_NUM_OF_10G_MACS -#define FM_MAX_NUM_OF_RX_PORTS (FM_MAX_NUM_OF_10G_RX_PORTS + FM_MAX_NUM_OF_1G_RX_PORTS) - -#define FM_MAX_NUM_OF_1G_TX_PORTS FM_MAX_NUM_OF_1G_MACS -#define FM_MAX_NUM_OF_10G_TX_PORTS FM_MAX_NUM_OF_10G_MACS -#define FM_MAX_NUM_OF_TX_PORTS (FM_MAX_NUM_OF_10G_TX_PORTS + FM_MAX_NUM_OF_1G_TX_PORTS) - -#define FM_PORT_MAX_NUM_OF_EXT_POOLS 4 /**< Number of external BM pools per Rx port */ -#define FM_PORT_NUM_OF_CONGESTION_GRPS 256 /**< Total number of congestion groups in QM */ -#define FM_MAX_NUM_OF_SUB_PORTALS 16 -#define FM_PORT_MAX_NUM_OF_OBSERVED_EXT_POOLS 0 - -#ifdef CONFIG_FMAN_V3L -#define FM_VSP_MAX_NUM_OF_ENTRIES 32 -#else /* CONFIG_FMAN_V3L */ -#define FM_VSP_MAX_NUM_OF_ENTRIES 64 -#endif -#define FM_MAX_NUM_OF_PFC_PRIORITIES 8 - -/* RAMs defines */ -#ifdef CONFIG_FMAN_V3L -#define FM_MURAM_SIZE (192 * KILOBYTE) -#define FM_IRAM_SIZE (32 * KILOBYTE) -#define FM_NUM_OF_CTRL 2 -#else /* CONFIG_FMAN_V3L */ -#define FM_MURAM_SIZE (384 * KILOBYTE) -#define FM_IRAM_SIZE ( 64 * KILOBYTE) -#define FM_NUM_OF_CTRL 4 -#endif - -/* PCD defines */ -#define FM_PCD_PLCR_NUM_ENTRIES 256 /**< Total number of policer profiles */ -#define FM_PCD_KG_NUM_OF_SCHEMES 32 /**< Total number of KG schemes */ -#define FM_PCD_MAX_NUM_OF_CLS_PLANS 256 /**< Number of classification plan entries. */ -#define FM_PCD_PRS_SW_PATCHES_SIZE 0x00000440 /**< Number of bytes saved for patches */ -#define FM_PCD_SW_PRS_SIZE 0x00000800 /**< Total size of SW parser area */ - -/* RTC defines */ -#define FM_RTC_NUM_OF_ALARMS 2 /**< RTC number of alarms */ -#define FM_RTC_NUM_OF_PERIODIC_PULSES 3 /**< RTC number of periodic pulses */ -#define FM_RTC_NUM_OF_EXT_TRIGGERS 2 /**< RTC number of external triggers */ - -/* QMI defines */ -#define QMI_MAX_NUM_OF_TNUMS 64 -#define QMI_DEF_TNUMS_THRESH 32 -/* FPM defines */ -#define FM_NUM_OF_FMAN_CTRL_EVENT_REGS 4 - -/* DMA defines */ -#define DMA_THRESH_MAX_COMMQ 83 -#define DMA_THRESH_MAX_BUF 127 - -/* BMI defines */ -#ifdef CONFIG_FMAN_V3L -#define BMI_MAX_NUM_OF_TASKS 64 -#define BMI_MAX_NUM_OF_DMAS 32 -#else -#define BMI_MAX_NUM_OF_TASKS 128 -#define BMI_MAX_NUM_OF_DMAS 84 -#endif - -#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE) -#define PORT_MAX_WEIGHT 16 - -#define FM_CHECK_PORT_RESTRICTIONS(__validPorts, __newPortIndx) TRUE - -/* Unique T4240 */ -#define FM_OP_OPEN_DMA_MIN_LIMIT -#define FM_NO_RESTRICT_ON_ACCESS_RSRC -#define FM_NO_OP_OBSERVED_POOLS -#define FM_FRAME_END_PARAMS_FOR_OP -#define FM_DEQ_PIPELINE_PARAMS_FOR_OP -#define FM_QMI_NO_SINGLE_ECC_EXCEPTION - -#define FM_NO_GUARANTEED_RESET_VALUES - -/* FM errata */ -#define FM_HEAVY_TRAFFIC_HANG_ERRATA_FMAN_A005669 -#ifndef CONFIG_FMAN_V3L -#define FM_WRONG_RESET_VALUES_ERRATA_FMAN_A005127 -#endif -#define FM_RX_FIFO_CORRUPT_ERRATA_10GMAC_A006320 -#define FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675 -#define FM_HEAVY_TRAFFIC_SEQUENCER_HANG_ERRATA_FMAN_A006981 - -#define FM_BCB_ERRATA_BMI_SW001 -#define FM_LEN_CHECK_ERRATA_FMAN_SW002 -#define FM_AID_MODE_NO_TNUM_SW005 /* refer to pdm TKT068794 - only support of port_id on aid */ -#define FM_ERROR_VSP_NO_MATCH_SW006 /* refer to pdm TKT174304 - no match between errorQ and VSP */ - -/***************************************************************************** - RMan INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define RM_MAX_NUM_OF_IB 4 /**< Number of inbound blocks */ -#define RM_NUM_OF_IBCU 8 /**< NUmber of classification units in an inbound block */ - -/* RMan erratas */ -#define RM_ERRONEOUS_ACK_ERRATA_RMAN_A006756 - -/***************************************************************************** - FM MACSEC INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define NUM_OF_RX_SC 16 -#define NUM_OF_TX_SC 16 - -#define NUM_OF_SA_PER_RX_SC 2 -#define NUM_OF_SA_PER_TX_SC 2 - -#endif /* __DPAA_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_ext.h deleted file mode 100644 index 0d62dd1..0000000 --- a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_ext.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/**************************************************************************//** - - @File part_ext.h - - @Description Definitions for the part (integration) module. -*//***************************************************************************/ - -#ifndef __PART_EXT_H -#define __PART_EXT_H - -#include "std_ext.h" -#include "part_integration_ext.h" - -#if !(defined(P1023) || \ - defined(P2041) || \ - defined(P3041) || \ - defined(P4080) || \ - defined(P5020) || \ - defined(P5040) || \ - defined(B4860) || \ - defined(T4240)) -#error "unable to proceed without chip-definition" -#endif - - -/**************************************************************************//* - @Description Part data structure - must be contained in any integration - data structure. -*//***************************************************************************/ -typedef struct t_Part -{ - uintptr_t (* f_GetModuleBase)(t_Handle h_Part, e_ModuleId moduleId); - /**< Returns the address of the module's memory map base. */ - e_ModuleId (* f_GetModuleIdByBase)(t_Handle h_Part, uintptr_t baseAddress); - /**< Returns the module's ID according to its memory map base. */ -} t_Part; - - -#endif /* __PART_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_integration_ext.h b/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_integration_ext.h deleted file mode 100644 index 3254c76..0000000 --- a/drivers/net/ethernet/freescale/fman/inc/integrations/T4240/part_integration_ext.h +++ /dev/null @@ -1,304 +0,0 @@ -/* - * Copyright 2008-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** - - @File part_integration_ext.h - - @Description T4240 external definitions and structures. -*//***************************************************************************/ -#ifndef __PART_INTEGRATION_EXT_H -#define __PART_INTEGRATION_EXT_H - -#include "std_ext.h" -#include "ddr_std_ext.h" -#include "enet_ext.h" -#include "dpaa_integration_ext.h" - - -/**************************************************************************//** - @Group T4240_chip_id T4240 Application Programming Interface - - @Description T4240 Chip functions,definitions and enums. - - @{ -*//***************************************************************************/ - -#define CORE_E6500 - -#define INTG_MAX_NUM_OF_CORES 24 - - -/**************************************************************************//** - @Description Module types. -*//***************************************************************************/ -typedef enum e_ModuleId -{ - e_MODULE_ID_DUART_1 = 0, - e_MODULE_ID_DUART_2, - e_MODULE_ID_DUART_3, - e_MODULE_ID_DUART_4, - e_MODULE_ID_LAW, - e_MODULE_ID_IFC, - e_MODULE_ID_PAMU, - e_MODULE_ID_QM, /**< Queue manager module */ - e_MODULE_ID_BM, /**< Buffer manager module */ - e_MODULE_ID_QM_CE_PORTAL_0, - e_MODULE_ID_QM_CI_PORTAL_0, - e_MODULE_ID_QM_CE_PORTAL_1, - e_MODULE_ID_QM_CI_PORTAL_1, - e_MODULE_ID_QM_CE_PORTAL_2, - e_MODULE_ID_QM_CI_PORTAL_2, - e_MODULE_ID_QM_CE_PORTAL_3, - e_MODULE_ID_QM_CI_PORTAL_3, - e_MODULE_ID_QM_CE_PORTAL_4, - e_MODULE_ID_QM_CI_PORTAL_4, - e_MODULE_ID_QM_CE_PORTAL_5, - e_MODULE_ID_QM_CI_PORTAL_5, - e_MODULE_ID_QM_CE_PORTAL_6, - e_MODULE_ID_QM_CI_PORTAL_6, - e_MODULE_ID_QM_CE_PORTAL_7, - e_MODULE_ID_QM_CI_PORTAL_7, - e_MODULE_ID_QM_CE_PORTAL_8, - e_MODULE_ID_QM_CI_PORTAL_8, - e_MODULE_ID_QM_CE_PORTAL_9, - e_MODULE_ID_QM_CI_PORTAL_9, - e_MODULE_ID_BM_CE_PORTAL_0, - e_MODULE_ID_BM_CI_PORTAL_0, - e_MODULE_ID_BM_CE_PORTAL_1, - e_MODULE_ID_BM_CI_PORTAL_1, - e_MODULE_ID_BM_CE_PORTAL_2, - e_MODULE_ID_BM_CI_PORTAL_2, - e_MODULE_ID_BM_CE_PORTAL_3, - e_MODULE_ID_BM_CI_PORTAL_3, - e_MODULE_ID_BM_CE_PORTAL_4, - e_MODULE_ID_BM_CI_PORTAL_4, - e_MODULE_ID_BM_CE_PORTAL_5, - e_MODULE_ID_BM_CI_PORTAL_5, - e_MODULE_ID_BM_CE_PORTAL_6, - e_MODULE_ID_BM_CI_PORTAL_6, - e_MODULE_ID_BM_CE_PORTAL_7, - e_MODULE_ID_BM_CI_PORTAL_7, - e_MODULE_ID_BM_CE_PORTAL_8, - e_MODULE_ID_BM_CI_PORTAL_8, - e_MODULE_ID_BM_CE_PORTAL_9, - e_MODULE_ID_BM_CI_PORTAL_9, - e_MODULE_ID_FM, /**< Frame manager module */ - e_MODULE_ID_FM_RTC, /**< FM Real-Time-Clock */ - e_MODULE_ID_FM_MURAM, /**< FM Multi-User-RAM */ - e_MODULE_ID_FM_BMI, /**< FM BMI block */ - e_MODULE_ID_FM_QMI, /**< FM QMI block */ - e_MODULE_ID_FM_PARSER, /**< FM parser block */ - e_MODULE_ID_FM_PORT_HO1, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO2, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO3, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO4, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO5, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO6, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_HO7, /**< FM Host-command/offline-parsing port block */ - e_MODULE_ID_FM_PORT_1GRx1, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GRx2, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GRx3, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GRx4, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GRx5, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GRx6, /**< FM Rx 1G MAC port block */ - e_MODULE_ID_FM_PORT_10GRx1, /**< FM Rx 10G MAC port block */ - e_MODULE_ID_FM_PORT_10GRx2, /**< FM Rx 10G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx1, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx2, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx3, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx4, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx5, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_1GTx6, /**< FM Tx 1G MAC port block */ - e_MODULE_ID_FM_PORT_10GTx1, /**< FM Tx 10G MAC port block */ - e_MODULE_ID_FM_PORT_10GTx2, /**< FM Tx 10G MAC port block */ - e_MODULE_ID_FM_PLCR, /**< FM Policer */ - e_MODULE_ID_FM_KG, /**< FM Keygen */ - e_MODULE_ID_FM_DMA, /**< FM DMA */ - e_MODULE_ID_FM_FPM, /**< FM FPM */ - e_MODULE_ID_FM_IRAM, /**< FM Instruction-RAM */ - e_MODULE_ID_FM_1GMDIO, /**< FM 1G MDIO MAC */ - e_MODULE_ID_FM_10GMDIO, /**< FM 10G MDIO */ - e_MODULE_ID_FM_PRS_IRAM, /**< FM SW-parser Instruction-RAM */ - e_MODULE_ID_FM_1GMAC1, /**< FM 1G MAC #1 */ - e_MODULE_ID_FM_1GMAC2, /**< FM 1G MAC #2 */ - e_MODULE_ID_FM_1GMAC3, /**< FM 1G MAC #3 */ - e_MODULE_ID_FM_1GMAC4, /**< FM 1G MAC #4 */ - e_MODULE_ID_FM_1GMAC5, /**< FM 1G MAC #5 */ - e_MODULE_ID_FM_1GMAC6, /**< FM 1G MAC #6 */ - e_MODULE_ID_FM_10GMAC1, /**< FM 10G MAC */ - e_MODULE_ID_FM_10GMAC2, /**< FM 10G MAC */ - - e_MODULE_ID_SEC_GEN, /**< SEC 4.0 General registers */ - e_MODULE_ID_SEC_QI, /**< SEC 4.0 QI registers */ - e_MODULE_ID_SEC_JQ0, /**< SEC 4.0 JQ-0 registers */ - e_MODULE_ID_SEC_JQ1, /**< SEC 4.0 JQ-1 registers */ - e_MODULE_ID_SEC_JQ2, /**< SEC 4.0 JQ-2 registers */ - e_MODULE_ID_SEC_JQ3, /**< SEC 4.0 JQ-3 registers */ - e_MODULE_ID_SEC_RTIC, /**< SEC 4.0 RTIC registers */ - e_MODULE_ID_SEC_DECO0_CCB0, /**< SEC 4.0 DECO-0/CCB-0 registers */ - e_MODULE_ID_SEC_DECO1_CCB1, /**< SEC 4.0 DECO-1/CCB-1 registers */ - e_MODULE_ID_SEC_DECO2_CCB2, /**< SEC 4.0 DECO-2/CCB-2 registers */ - e_MODULE_ID_SEC_DECO3_CCB3, /**< SEC 4.0 DECO-3/CCB-3 registers */ - e_MODULE_ID_SEC_DECO4_CCB4, /**< SEC 4.0 DECO-4/CCB-4 registers */ - - e_MODULE_ID_PIC, /**< PIC */ - e_MODULE_ID_GPIO, /**< GPIO */ - e_MODULE_ID_SERDES, /**< SERDES */ - e_MODULE_ID_CPC_1, /**< CoreNet-Platform-Cache 1 */ - e_MODULE_ID_CPC_2, /**< CoreNet-Platform-Cache 2 */ - - e_MODULE_ID_SRIO_PORTS, /**< RapidIO controller */ - - e_MODULE_ID_DUMMY_LAST -} e_ModuleId; - -#define NUM_OF_MODULES e_MODULE_ID_DUMMY_LAST - -#if 0 /* using unified values */ -/***************************************************************************** - INTEGRATION-SPECIFIC MODULE CODES -******************************************************************************/ -#define MODULE_UNKNOWN 0x00000000 -#define MODULE_MEM 0x00010000 -#define MODULE_MM 0x00020000 -#define MODULE_CORE 0x00030000 -#define MODULE_T4240 0x00040000 -#define MODULE_T4240_PLATFORM 0x00050000 -#define MODULE_PM 0x00060000 -#define MODULE_MMU 0x00070000 -#define MODULE_PIC 0x00080000 -#define MODULE_CPC 0x00090000 -#define MODULE_DUART 0x000a0000 -#define MODULE_SERDES 0x000b0000 -#define MODULE_PIO 0x000c0000 -#define MODULE_QM 0x000d0000 -#define MODULE_BM 0x000e0000 -#define MODULE_SEC 0x000f0000 -#define MODULE_LAW 0x00100000 -#define MODULE_LBC 0x00110000 -#define MODULE_PAMU 0x00120000 -#define MODULE_FM 0x00130000 -#define MODULE_FM_MURAM 0x00140000 -#define MODULE_FM_PCD 0x00150000 -#define MODULE_FM_RTC 0x00160000 -#define MODULE_FM_MAC 0x00170000 -#define MODULE_FM_PORT 0x00180000 -#define MODULE_FM_SP 0x00190000 -#define MODULE_DPA_PORT 0x001a0000 -#define MODULE_MII 0x001b0000 -#define MODULE_I2C 0x001c0000 -#define MODULE_DMA 0x001d0000 -#define MODULE_DDR 0x001e0000 -#define MODULE_ESPI 0x001f0000 -#define MODULE_DPAA_IPSEC 0x00200000 -#endif /* using unified values */ - -/***************************************************************************** - PAMU INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define PAMU_NUM_OF_PARTITIONS 4 - -/***************************************************************************** - LAW INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define LAW_NUM_OF_WINDOWS 32 -#define LAW_MIN_WINDOW_SIZE 0x0000000000001000LL /**< 4 Kbytes */ -#define LAW_MAX_WINDOW_SIZE 0x0000010000000000LL /**< 1 Tbytes for 40-bit address space */ - - -/***************************************************************************** - LBC INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -/**************************************************************************//** - @Group lbc_exception_grp LBC Exception Unit - - @Description LBC Exception unit API functions, definitions and enums - - @{ -*//***************************************************************************/ - -/**************************************************************************//** - @Anchor lbc_exbm - - @Collection LBC Errors Bit Mask - - These errors are reported through the exceptions callback.. - The values can be or'ed in any combination in the errors mask - parameter of the errors report structure. - - These errors can also be passed as a bit-mask to - LBC_EnableErrorChecking() or LBC_DisableErrorChecking(), - for enabling or disabling error checking. - @{ -*//***************************************************************************/ -#define LBC_ERR_BUS_MONITOR 0x80000000 /**< Bus monitor error */ -#define LBC_ERR_PARITY_ECC 0x20000000 /**< Parity error for GPCM/UPM */ -#define LBC_ERR_WRITE_PROTECT 0x04000000 /**< Write protection error */ -#define LBC_ERR_CHIP_SELECT 0x00080000 /**< Unrecognized chip select */ - -#define LBC_ERR_ALL (LBC_ERR_BUS_MONITOR | LBC_ERR_PARITY_ECC | \ - LBC_ERR_WRITE_PROTECT | LBC_ERR_CHIP_SELECT) - /**< All possible errors */ -/* @} */ -/** @} */ /* end of lbc_exception_grp group */ - -#define LBC_INCORRECT_ERROR_REPORT_ERRATA - -#define LBC_NUM_OF_BANKS 8 -#define LBC_MAX_CS_SIZE 0x0000000100000000LL /* Up to 4G memory block size */ -#define LBC_PARITY_SUPPORT -#define LBC_ADDRESS_HOLD_TIME_CTRL -#define LBC_HIGH_CLK_DIVIDERS -#define LBC_FCM_AVAILABLE - -/***************************************************************************** - GPIO INTEGRATION-SPECIFIC DEFINITIONS -******************************************************************************/ -#define GPIO_PORT_OFFSET_0x1000 - -#define GPIO_NUM_OF_PORTS 3 /**< Number of ports in GPIO module; - Each port contains up to 32 I/O pins. */ - -#define GPIO_VALID_PIN_MASKS \ - { /* Port A */ 0xFFFFFFFF, \ - /* Port B */ 0xFFFFFFFF, \ - /* Port C */ 0xFFFFFFFF } - -#define GPIO_VALID_INTR_MASKS \ - { /* Port A */ 0xFFFFFFFF, \ - /* Port B */ 0xFFFFFFFF, \ - /* Port C */ 0xFFFFFFFF } - - - -#endif /* __PART_INTEGRATION_EXT_H */ diff --git a/drivers/net/ethernet/freescale/fman/ncsw_config.mk b/drivers/net/ethernet/freescale/fman/ncsw_config.mk index 7b386e2..b4c634c 100644 --- a/drivers/net/ethernet/freescale/fman/ncsw_config.mk +++ b/drivers/net/ethernet/freescale/fman/ncsw_config.mk @@ -11,8 +11,11 @@ endif ifeq ("$(CONFIG_FMAN_P1023)", "y") ccflags-y +=-include $(FMAN)/p1023_dflags.h endif -ifdef CONFIG_FMAN_T4240 -ccflags-y +=-include $(FMAN)/t4240_dflags.h +ifdef CONFIG_FMAN_V3H +ccflags-y +=-include $(FMAN)/fmanv3h_dflags.h +endif +ifdef CONFIG_FMAN_V3L +ccflags-y +=-include $(FMAN)/fmanv3l_dflags.h endif ccflags-y += -I$(DRV_DPA)/ @@ -28,8 +31,11 @@ endif ifeq ("$(CONFIG_FMAN_P1023)", "y") ccflags-y += -I$(FMAN)/inc/integrations/P1023 endif -ifdef CONFIG_FMAN_T4240 -ccflags-y += -I$(FMAN)/inc/integrations/T4240 +ifdef CONFIG_FMAN_V3H +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3H +endif +ifdef CONFIG_FMAN_V3L +ccflags-y += -I$(FMAN)/inc/integrations/FMANV3L endif ccflags-y += -I$(FMAN)/src/inc diff --git a/drivers/net/ethernet/freescale/fman/t4240_dflags.h b/drivers/net/ethernet/freescale/fman/t4240_dflags.h deleted file mode 100644 index 435b0d2..0000000 --- a/drivers/net/ethernet/freescale/fman/t4240_dflags.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __dflags_h -#define __dflags_h - - -#define NCSW_LINUX - -#define T4240 -#define NCSW_PPC_CORE - -#define DEBUG_ERRORS 1 - -#if defined(DEBUG) -#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_INFO - -#define DEBUG_XX_MALLOC -#define DEBUG_MEM_LEAKS - -#else -#define DEBUG_GLOBAL_LEVEL REPORT_LEVEL_WARNING -#endif /* (DEBUG) */ - -#define REPORT_EVENTS 1 -#define EVENT_GLOBAL_LEVEL REPORT_LEVEL_MINOR - -#endif /* __dflags_h */ -- cgit v0.10.2