From f93eaffcacb43b5764fb440ef50bf88dc7a2eb3e Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 5 Dec 2012 13:51:20 -0700 Subject: iwlegacy: Use standard #defines for PCIe Capability ASPM fields Use the standard #defines rather than creating local definitions for PCIe Capability ASPM fields. Signed-off-by: Bjorn Helgaas Acked-by: Stanislaw Gruszka diff --git a/drivers/net/wireless/iwlegacy/4965.h b/drivers/net/wireless/iwlegacy/4965.h index 2d092f3..1b15b0b 100644 --- a/drivers/net/wireless/iwlegacy/4965.h +++ b/drivers/net/wireless/iwlegacy/4965.h @@ -917,10 +917,6 @@ struct il4965_scd_bc_tbl { /* PCI registers */ #define PCI_CFG_RETRY_TIMEOUT 0x041 -/* PCI register values */ -#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 -#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 - #define IL4965_DEFAULT_TX_RETRY 15 /* EEPROM */ diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c index 1811507..7e16d10 100644 --- a/drivers/net/wireless/iwlegacy/common.c +++ b/drivers/net/wireless/iwlegacy/common.c @@ -1186,7 +1186,7 @@ il_power_initialize(struct il_priv *il) u16 lctl; pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); - il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); + il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); il->power_data.debug_sleep_level_override = -1; @@ -4235,8 +4235,7 @@ il_apm_init(struct il_priv *il) */ if (il->cfg->set_l0s) { pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl); - if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == - PCI_CFG_LINK_CTRL_VAL_L1_EN) { + if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { /* L1-ASPM enabled; disable(!) L0S */ il_set_bit(il, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h index c9a5022..e181f3b 100644 --- a/drivers/net/wireless/iwlegacy/common.h +++ b/drivers/net/wireless/iwlegacy/common.h @@ -2426,10 +2426,6 @@ struct il_tfd { /* PCI registers */ #define PCI_CFG_RETRY_TIMEOUT 0x041 -/* PCI register values */ -#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 -#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 - struct il_rate_info { u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ -- cgit v0.10.2