From a1149ae975547142f78e96745a994cb9b0e98fd2 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Mon, 14 Jan 2013 14:57:50 +0000 Subject: ARM: ux500: Disable Power Supply and Battery Management by default The AB8500 Battery Management collection of drivers are more than a little bit broken. There is lots of work still on-going in that area and it's improving day by day; however, it's not ready to be enabled by default just yet. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index 231dca6..426270f 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig @@ -66,9 +66,9 @@ CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_GPIO_STMPE=y CONFIG_GPIO_TC3589X=y -CONFIG_POWER_SUPPLY=y -CONFIG_AB8500_BM=y -CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y +# CONFIG_POWER_SUPPLY is not set +# CONFIG_AB8500_BM is not set +# CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set CONFIG_THERMAL=y CONFIG_CPU_THERMAL=y CONFIG_MFD_STMPE=y -- cgit v0.10.2 From 5cc23666c3766705aac716bc517353cce8d68464 Mon Sep 17 00:00:00 2001 From: Steve Zhan Date: Wed, 23 Jan 2013 11:24:47 +0100 Subject: ARM: ux500: add spin_unlock(&master_lock). Add the missing spin_unlock statement to unlock master_lock when prcmu_gic_decouple() return TRUE Signed-off-by: steve zhan Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c index b54884bd..ce91493 100644 --- a/arch/arm/mach-ux500/cpuidle.c +++ b/arch/arm/mach-ux500/cpuidle.c @@ -40,8 +40,10 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev, goto wfi; /* decouple the gic from the A9 cores */ - if (prcmu_gic_decouple()) + if (prcmu_gic_decouple()) { + spin_unlock(&master_lock); goto out; + } /* If an error occur, we will have to recouple the gic * manually */ -- cgit v0.10.2 From fd2704e82daa93923921dd1c9052ead74b2fdc79 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Wed, 23 Jan 2013 09:38:16 +0100 Subject: Dove: activate GPIO interrupts in DT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In a DT, the interrupts of an interrupt-controller are not usable when #interrupt-cells is missing. This patch activates the interrupts of the GPIOs 0 and 1 for the Marvell Dove SoC. Signed-off-by: Jean-François Moine Signed-off-by: Jason Cooper diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 42eac1f..740630f 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -93,6 +93,7 @@ reg = <0xd0400 0x20>; ngpios = <32>; interrupt-controller; + #interrupt-cells = <2>; interrupts = <12>, <13>, <14>, <60>; }; @@ -103,6 +104,7 @@ reg = <0xd0420 0x20>; ngpios = <32>; interrupt-controller; + #interrupt-cells = <2>; interrupts = <61>; }; -- cgit v0.10.2 From 830f8b9105b2d88cd2b115994e14bfe992f9a000 Mon Sep 17 00:00:00 2001 From: Gerlando Falauto Date: Wed, 23 Jan 2013 14:50:59 +0100 Subject: arm: plat-orion: fix printing of "MPP config unavailable on this hardware" refactored printing of the kernel warning: "orion_mpp_conf: requested MPP%u config unavailable on this hardware\n" which is not to be printed in case of variant_mask = 0 (unknown variant). This check should be performed using a logical AND (&&) as opposed to a bitwise AND (&). Otherwise, test would fail (and message would not be printed) if variant_mask != 1 Signed-off-by: Gerlando Falauto Cc: Andrew Lunn Cc: Olof Johansson Cc: Nicolas Pitre Cc: Holger Brunck Acked-by: Andrew Lunn Signed-off-by: Jason Cooper diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index e686fe7..7310bcf 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c @@ -49,7 +49,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, "number (%u)\n", num); continue; } - if (variant_mask & !(*mpp_list & variant_mask)) { + if (variant_mask && !(*mpp_list & variant_mask)) { printk(KERN_WARNING "orion_mpp_conf: requested MPP%u config " "unavailable on this hardware\n", num); -- cgit v0.10.2 From de27686b77f1c5c5dddf06d48fd322c52f098d51 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Wed, 23 Jan 2013 15:57:59 +0100 Subject: arm: mvebu: i2c come back in defconfig When the patch "arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver" was applied to a git tree and became the commit b24212fbfba25 it wrongly removed the i2c support. This patch reintroduce it. Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index b5bc96c..cbd91bc 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig @@ -33,6 +33,8 @@ CONFIG_MVNETA=y CONFIG_MARVELL_PHY=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_I2C=y +CONFIG_I2C_MV64XXX=y CONFIG_SERIAL_8250_DW=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y -- cgit v0.10.2 From 579400166a744890b2a67ca21765b5b6dc649441 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Tue, 27 Nov 2012 09:34:50 +0000 Subject: ARM: ux500: Fix u9540 booting issues The u9540 stopped booting after the v3.7 merge window due to a lack of common clk support and early PRCMU initialisation. In this patch we rectify these issues, placing the u9540 development board back into a successfully booting state. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 721e7b4..d4dcec5 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -71,13 +71,11 @@ void __init ux500_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_u9540()) db8500_prcmu_early_init(); - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_u9540()) u8500_clk_init(); - else if (cpu_is_u9540()) - u9540_clk_init(); else if (cpu_is_u8540()) u8540_clk_init(); } -- cgit v0.10.2 From e065d3d417274bafed162b3dffd2e03a5128623c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 25 Jan 2013 18:53:52 +0000 Subject: mfd/vexpress: vexpress_sysreg_setup must not be __init The patch 52666298a 'mfd: vexpress-sysreg: Don't skip initialization on probe' adds a call to vexpress_sysreg_setup from a non-__init function, so this also has to lose its __init annotation. Signed-off-by: Arnd Bergmann Cc: Pawel Moll Cc: arm@kernel.org Signed-off-by: Olof Johansson diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index 77048b1..558c292 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c @@ -313,7 +313,7 @@ static void vexpress_sysreg_config_complete(unsigned long data) } -void __init vexpress_sysreg_setup(struct device_node *node) +void vexpress_sysreg_setup(struct device_node *node) { if (WARN_ON(!vexpress_sysreg_base)) return; -- cgit v0.10.2 From 813f13e7d6ad239bb1003041f4cfae13ae27b14d Mon Sep 17 00:00:00 2001 From: Cong Ding Date: Fri, 18 Jan 2013 08:58:23 -0800 Subject: ARM: S3C24XX: fix uninitialized variable warning the use of variable tmp is uninitialized, so we fix it. Signed-off-by: Cong Ding Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 0c9e9a7..6bcf87f 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -197,7 +197,7 @@ static unsigned long s3c24xx_read_idcode_v4(void) static void s3c24xx_default_idle(void) { - unsigned long tmp; + unsigned long tmp = 0; int i; /* idle the system by using the idle mode which will wait for an -- cgit v0.10.2 From f692543287930ed6857611ae52a1f2f5f07b44e1 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Thu, 27 Dec 2012 13:25:02 -0800 Subject: ARM: dts: Fix compatible value of pinctrl module on EXYNOS5440 Fix the incorrect compatible property value of pin-controller module EXYNOS5440 SoC. Signed-off-by: Thomas Abraham Cc: Linus Walleij Cc: Grant Likely [kgene.kim@samsung.com: fixed it in gpio together for exynos5440] Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 024269d..25f0fa6 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -86,7 +86,7 @@ }; pinctrl { - compatible = "samsung,pinctrl-exynos5440"; + compatible = "samsung,exynos5440-pinctrl"; reg = <0xE0000 0x1000>; interrupt-controller; #interrupt-cells = <2>; diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 76be7ee..d03a606 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -3025,7 +3025,7 @@ static __init int samsung_gpiolib_init(void) static const struct of_device_id exynos_pinctrl_ids[] = { { .compatible = "samsung,pinctrl-exynos4210", }, { .compatible = "samsung,pinctrl-exynos4x12", }, - { .compatible = "samsung,pinctrl-exynos5440", }, + { .compatible = "samsung,exynos5440-pinctrl", }, }; for_each_matching_node(pctrl_np, exynos_pinctrl_ids) if (pctrl_np && of_device_is_available(pctrl_np)) -- cgit v0.10.2 From b533c8685b16228c3fe1b2b7f136b9576a7a6db7 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 2 Jan 2013 16:05:42 -0800 Subject: ARM: dts: fix compatible value for exynos pinctrl Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs. Cc: Thomas Abraham Acked-by: Linus Walleij Cc: Grant Likely Signed-off-by: Kukjin Kim diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index e97a278..4598a47 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -7,9 +7,9 @@ on-chip controllers onto these pads. Required Properties: - compatible: should be one of the following. - - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller. - - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller. - - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller. + - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. + - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. + - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. @@ -142,7 +142,7 @@ the following format 'pinctrl{n}' where n is a unique number for the alias. Example: A pin-controller node with pin banks: pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; @@ -185,7 +185,7 @@ Example: A pin-controller node with pin banks: Example 1: A pin-controller node with pin groups. pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; @@ -230,7 +230,7 @@ Example 1: A pin-controller node with pin groups. Example 2: A pin-controller node with external wakeup interrupt controller node. pinctrl_1: pinctrl@11000000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11000000 0x1000>; interrupts = <0 46 0> diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index e31bfc4..2feffc7 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -48,13 +48,13 @@ }; pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; }; pinctrl_1: pinctrl@11000000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; @@ -66,7 +66,7 @@ }; pinctrl_2: pinctrl@03860000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x03860000 0x1000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 179a62e..9a87806 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -37,13 +37,13 @@ }; pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; }; pinctrl_1: pinctrl@11000000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; @@ -55,14 +55,14 @@ }; pinctrl_2: pinctrl@03860000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x03860000 0x1000>; interrupt-parent = <&combiner>; interrupts = <10 0>; }; pinctrl_3: pinctrl@106E0000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x106E0000 0x1000>; interrupts = <0 72 0>; }; diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1a89824..e07da6e 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -1031,8 +1031,8 @@ static int __init exynos_init_irq_eint(void) * interrupt support code here can be completely removed. */ static const struct of_device_id exynos_pinctrl_ids[] = { - { .compatible = "samsung,pinctrl-exynos4210", }, - { .compatible = "samsung,pinctrl-exynos4x12", }, + { .compatible = "samsung,exynos4210-pinctrl", }, + { .compatible = "samsung,exynos4x12-pinctrl", }, }; struct device_node *pctrl_np, *wkup_np; const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index d03a606..b2016ed 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -3023,8 +3023,8 @@ static __init int samsung_gpiolib_init(void) */ struct device_node *pctrl_np; static const struct of_device_id exynos_pinctrl_ids[] = { - { .compatible = "samsung,pinctrl-exynos4210", }, - { .compatible = "samsung,pinctrl-exynos4x12", }, + { .compatible = "samsung,exynos4210-pinctrl", }, + { .compatible = "samsung,exynos4x12-pinctrl", }, { .compatible = "samsung,exynos5440-pinctrl", }, }; for_each_matching_node(pctrl_np, exynos_pinctrl_ids) diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index fd7b24c..044d2da 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -947,9 +947,9 @@ static int samsung_pinctrl_probe(struct platform_device *pdev) } static const struct of_device_id samsung_pinctrl_dt_match[] = { - { .compatible = "samsung,pinctrl-exynos4210", + { .compatible = "samsung,exynos4210-pinctrl", .data = (void *)exynos4210_pin_ctrl }, - { .compatible = "samsung,pinctrl-exynos4x12", + { .compatible = "samsung,exynos4x12-pinctrl", .data = (void *)exynos4x12_pin_ctrl }, {}, }; -- cgit v0.10.2 From e877a5aa178d2288212a6bd254324b8756c098c1 Mon Sep 17 00:00:00 2001 From: Giridhar Maruthy Date: Thu, 27 Dec 2012 18:02:58 -0800 Subject: ARM: dts: fix tick and alarm irq numbers for exynos5440 The interrupts for RTC tick and alarm interrupt were swapped. Has been fixed here. Signed-off-by: Giridhar Maruthy Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 25f0fa6..5f3562a 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -154,6 +154,6 @@ rtc { compatible = "samsung,s3c6410-rtc"; reg = <0x130000 0x1000>; - interrupts = <0 16 0>, <0 17 0>; + interrupts = <0 17 0>, <0 16 0>; }; }; -- cgit v0.10.2 From 60db7e5f9c9a25a7a9b01007e6e3f5a93bc16a3a Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Thu, 24 Jan 2013 10:09:13 -0800 Subject: ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440 The soft-reset control register is located in the XMU controller space. Map this controller space before writing to the soft-reset controller register. Signed-off-by: Thomas Abraham Signed-off-by: Girish K S Signed-off-by: Kukjin diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index e07da6e..0c7e3ad 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd) void exynos5_restart(char mode, const char *cmd) { + struct device_node *np; u32 val; void __iomem *addr; @@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd) val = 0x1; addr = EXYNOS_SWRESET; } else if (of_machine_is_compatible("samsung,exynos5440")) { - val = (0x10 << 20) | (0x1 << 16); - addr = EXYNOS5440_SWRESET; + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); + addr = of_iomap(np, 0) + 0xcc; + val = (0xfff << 20) | (0x1 << 16); } else { pr_err("%s: cannot support non-DT\n", __func__); return; -- cgit v0.10.2 From 65a0fe0488fb93e3af9643cdac88f856744f702f Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Mon, 28 Jan 2013 09:43:36 -0600 Subject: ARM: at91: at91sam9x5: fix usart3 pinctrl name The renaming of pinctrl_uart3 to pinctrl_usart3 was missed in commit 9e3129e (ARM: at91: fix usart/uart namimg in pinctrl). Signed-off-by: Robert Nelson Signed-off-by: Nicolas Ferre diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 8ecca69..464e34f 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -197,7 +197,7 @@ }; usart3 { - pinctrl_uart3: usart3-0 { + pinctrl_usart3: usart3-0 { atmel,pins = <2 23 0x2 0x1 /* PC22 periph B with pullup */ 2 23 0x2 0x0>; /* PC23 periph B */ -- cgit v0.10.2 From 7d4cfece23f535b60496d88a717a3d7bfca50187 Mon Sep 17 00:00:00 2001 From: Douglas Gilbert Date: Wed, 30 Jan 2013 10:09:17 +0100 Subject: ARM: at91/at91sam9x5.dtsi: fix usart3 TXD Comment for usart3 TXD (TXD3) is correct, dt code is wrong. Signed-off-by: Douglas Gilbert Signed-off-by: Nicolas Ferre diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 464e34f..0c60090 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -199,7 +199,7 @@ usart3 { pinctrl_usart3: usart3-0 { atmel,pins = - <2 23 0x2 0x1 /* PC22 periph B with pullup */ + <2 22 0x2 0x1 /* PC22 periph B with pullup */ 2 23 0x2 0x0>; /* PC23 periph B */ }; -- cgit v0.10.2 From eed8812387e201e158059fe6fb908f8a662084dd Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 31 Jan 2013 09:26:06 -0600 Subject: ARM: scu: add empty scu_enable for !CONFIG_SMP Add an empty version of scu_enable for !SMP builds. This fixes compile error for highbank suspend code on !SMP builds. Signed-off-by: Rob Herring diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h index 4eb6d00..86dff32 100644 --- a/arch/arm/include/asm/smp_scu.h +++ b/arch/arm/include/asm/smp_scu.h @@ -7,8 +7,14 @@ #ifndef __ASSEMBLER__ unsigned int scu_get_core_count(void __iomem *); -void scu_enable(void __iomem *); int scu_power_mode(void __iomem *, unsigned int); + +#ifdef CONFIG_SMP +void scu_enable(void __iomem *scu_base); +#else +static inline void scu_enable(void __iomem *scu_base) {} +#endif + #endif #endif -- cgit v0.10.2 From c7d5b93e9834f0e6cf21828a6fbf45ac440cf364 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 31 Jan 2013 13:26:29 -0600 Subject: ARM: scu: mask cluster id from cpu_logical_map With commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu id value may include the cluster id and is no longer 0-3, so we need to mask it in scu_power_mode to get the local cpu number. Since we are only dealing with the cpu we are running on, the cluster id should not ever be needed. Signed-off-by: Rob Herring diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index b9f015e..45eac87 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -75,7 +75,7 @@ void scu_enable(void __iomem *scu_base) int scu_power_mode(void __iomem *scu_base, unsigned int mode) { unsigned int val; - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (mode > 3 || mode == 1 || cpu > 3) return -EINVAL; -- cgit v0.10.2 From 63fc1370c19052fa5bec9593557431efc7ecc9fe Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 31 Jan 2013 13:28:42 -0600 Subject: ARM: highbank: mask cluster id from cpu_logical_map With commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu id value may include the cluster id and is no longer 0-3, so we need to mask it now to get the right hard cpu index. Signed-off-by: Rob Herring diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 981dc1e..e6c0612 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -28,6 +28,7 @@ #include #include +#include #include #include #include @@ -59,7 +60,7 @@ static void __init highbank_scu_map_io(void) void highbank_set_cpu_jump(int cpu, void *jump_addr) { - cpu = cpu_logical_map(cpu); + cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0); writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index 70af9d1..5995df7 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h @@ -37,7 +37,7 @@ extern void __iomem *sregs_base; static inline void highbank_set_core_pwr(void) { - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (scu_base_addr) scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); else @@ -46,7 +46,7 @@ static inline void highbank_set_core_pwr(void) static inline void highbank_clear_core_pwr(void) { - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (scu_base_addr) scu_power_mode(scu_base_addr, SCU_PM_NORMAL); else -- cgit v0.10.2 From 8dd5c66bc6b12d86b1656851c20946efd587875e Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 5 Feb 2013 14:21:06 +0800 Subject: ARM: dts: imx6: fix fec ptp clock slow 10 time ptp should use enet_ref instead of pll6_enet pll6_enet is fixed 500Mhz. There are divider between enet_ref and pll6_enet Signed-off-by: Frank Li Signed-off-by: Shawn Guo diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index d6265ca..ff1205e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -866,7 +866,7 @@ compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; - clocks = <&clks 117>, <&clks 117>, <&clks 177>; + clocks = <&clks 117>, <&clks 117>, <&clks 190>; clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; -- cgit v0.10.2