From 44f0a9a894db63d29795e63a58f6be4fe21b0ae6 Mon Sep 17 00:00:00 2001
From: Liu Gang <Gang.Liu@freescale.com>
Date: Wed, 29 Oct 2014 19:42:31 +0800
Subject: RapidIO: Add workaround for erratum A-008116

Erratum A-008116 can cause a Serial RapidIO phyiscal or
logical/transport error interrupt (PINTn) that orginates
on port 2 is incorrectly reported as originating on port 1.

Valid workaround needed if using Serial RapidIO port 2.
Upon detection of a Serial RapidIO interrupt, each port's
LTLEDCSR and PnEDCSR registers must be read to determine
the port origin.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Change-Id: Ide60f7c3bcb56f4d427102b307f895ed3c04cc45
Reviewed-on: http://git.am.freescale.net:8181/22436
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>

diff --git a/arch/powerpc/sysdev/fsl_rmu.c b/arch/powerpc/sysdev/fsl_rmu.c
index 14bd522..05263b9 100644
--- a/arch/powerpc/sysdev/fsl_rmu.c
+++ b/arch/powerpc/sysdev/fsl_rmu.c
@@ -460,6 +460,7 @@ pw_done:
 		tmp = in_be32(rio_regs_win + RIO_LTLEDCSR);
 		pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
 		fsl_rio_port_error_handler(0);
+		fsl_rio_port_error_handler(1);
 	}
 
 	if (epwisr & RIO_EPWISR_PINT2) {
-- 
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