From 1bb3f6a252c92cbc07884091e185a51b4ccb4f1d Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 8 Jul 2013 10:40:35 +1000 Subject: drm/nouveau: fix minor thinko causing bo moves to not be async on kepler Reported-by: Maarten Lankhorst Signed-off-by: Ben Skeggs diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index a1cf825..4b1afb1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -968,7 +968,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr, bool no_wait_gpu, struct ttm_mem_reg *new_mem) { struct nouveau_drm *drm = nouveau_bdev(bo->bdev); - struct nouveau_channel *chan = chan = drm->channel; + struct nouveau_channel *chan = chan = drm->ttm.chan; struct nouveau_bo *nvbo = nouveau_bo(bo); struct ttm_mem_reg *old_mem = &bo->mem; int ret; @@ -1052,6 +1052,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm) } drm->ttm.move = mthd->exec; + drm->ttm.chan = chan; name = mthd->name; break; } diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.h b/drivers/gpu/drm/nouveau/nouveau_drm.h index f2b30f8..41ff7e0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.h +++ b/drivers/gpu/drm/nouveau/nouveau_drm.h @@ -96,6 +96,7 @@ struct nouveau_drm { int (*move)(struct nouveau_channel *, struct ttm_buffer_object *, struct ttm_mem_reg *, struct ttm_mem_reg *); + struct nouveau_channel *chan; int mtrr; } ttm; -- cgit v0.10.2 From d2989b534ef6834ebf2425aecc040b894b567c91 Mon Sep 17 00:00:00 2001 From: Maarten Lankhorst Date: Sun, 7 Jul 2013 10:37:48 +0200 Subject: drm/nvc0/gr: fix gpc firmware regression "drm/nve0-/gr: some new gpc registers can have multiple copies" 5ee86c4190f9e caused a regression for nvc0, because the bit indicating last transfer has occured was no longer set, resulting in random system lockups. Reported-by: Ronald Uitermark Tested-by: Ronald Uitermark Signed-off-by: Maarten Lankhorst Signed-off-by: Ben Skeggs diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc index b52f4a8..5547c1b 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc +++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc @@ -352,6 +352,9 @@ ctx_xfer: // per-TPC mmio context xbit $r10 $flags $p1 // direction +#if !NV_PGRAPH_GPCX_UNK__SIZE + or $r10 4 // last +#endif mov $r11 0x4000 sethi $r11 0x500000 // base = NV_PGRAPH_GPC0_TPC0 ld b32 $r12 D[$r0 + #gpc_id] diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h index 2afe75c..f2b0dea 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h +++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h @@ -400,26 +400,26 @@ uint32_t nvc0_grgpc_code[] = { 0x0d98000c, 0x00e7f001, 0x016621f5, - 0xf101acf0, - 0xf04000b7, - 0x0c9850b3, - 0x0fc4b604, - 0x9800bcbb, - 0x0d98010c, - 0x060f9802, - 0x0800e7f1, - 0x016621f5, - 0x021521f5, - 0xf40601f4, -/* 0x0532: ctx_xfer_post */ - 0x17f11412, - 0x13f04afc, - 0x0d27f002, - 0xf50012d0, -/* 0x0543: ctx_xfer_done */ - 0xf5021521, - 0xf8047921, - 0x00000000, + 0xf001acf0, + 0xb7f104a5, + 0xb3f04000, + 0x040c9850, + 0xbb0fc4b6, + 0x0c9800bc, + 0x020d9801, + 0xf1060f98, + 0xf50800e7, + 0xf5016621, + 0xf4021521, + 0x12f40601, +/* 0x0535: ctx_xfer_post */ + 0xfc17f114, + 0x0213f04a, + 0xd00d27f0, + 0x21f50012, +/* 0x0546: ctx_xfer_done */ + 0x21f50215, + 0x00f80479, 0x00000000, 0x00000000, 0x00000000, -- cgit v0.10.2