From 043dd64e5d82ba6147b0034e1bfdd27d38d2f6c7 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Thu, 22 May 2008 15:07:05 +0800 Subject: [ARM] pxa: add codename zylonite for PXA3xx Development Platform Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index faa2c3f..013890b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -173,7 +173,7 @@ config MACH_COLIBRI select PXA27x config MACH_ZYLONITE - bool "PXA3xx Development Platform" + bool "PXA3xx Development Platform (aka Zylonite)" select PXA3xx select HAVE_PWM -- cgit v0.10.2 From 8a6e88736066fddec77aa33a18ffa0c5f8eb2def Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 13:30:24 +0800 Subject: [ARM] pxa: use IORESOURCE_IRQ_* instead of IRQF_* for IRQ resource Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 5306544..8a8ef2b 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -101,7 +101,7 @@ static struct resource smc91x_resources[] = { [1] = { .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, } }; -- cgit v0.10.2 From 36caeb4ec147dacb04e723080816e78f288f47cc Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 13:32:42 +0800 Subject: [ARM] pxa: fix typo of CONFIG_*_MODULE The correct macro name when a driver is built as a module is CONFIG_*_MODULE instead of CONFIG_*_MODULES. This patch fixes this in several places. Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index 8a8ef2b..ff81a84 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -112,7 +112,7 @@ static struct platform_device smc91x_device = { .resource = smc91x_resources, }; -#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES) +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) /* use bit 30, 31 as the indicator of command parameter number */ #define CMD0(x) ((0x00000000) | ((x) << 9)) #define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1)) @@ -311,9 +311,9 @@ static void littleton_init_lcd(void) } #else static inline void littleton_init_lcd(void) {}; -#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */ +#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */ -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES) +#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) static unsigned int littleton_matrix_key_map[] = { /* KEY(row, col, key_code) */ KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3), diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index f2e9e7c..6c3c37c 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -513,7 +513,7 @@ static struct pxaohci_platform_data mainstone_ohci_platform_data = { .init = mainstone_ohci_init, }; -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES) +#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) static unsigned int mainstone_matrix_keys[] = { KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 66b446c..7465a9c 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -259,7 +259,7 @@ static void __init zylonite_init_mmc(void) static inline void zylonite_init_mmc(void) {} #endif -#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES) +#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) static unsigned int zylonite_matrix_key_map[] = { /* KEY(row, col, key_code) */ KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_C), KEY(0, 5, KEY_D), -- cgit v0.10.2 From b18773d545e65fe442479e3f9853c8ebb8ec45d6 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 17:41:42 +0800 Subject: [ARM] pxa: remove WAKEUP_ON_LEVEL_HIGH from keypad direct keys Setting PKWR bits on those pins will make the resuming from low power state to fail. Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 6c3c37c..5b145fa 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -110,9 +110,9 @@ static unsigned long mainstone_pin_config[] = { GPIO45_AC97_SYSCLK, /* Keypad */ - GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, - GPIO94_KP_DKIN_1 | WAKEUP_ON_LEVEL_HIGH, - GPIO95_KP_DKIN_2 | WAKEUP_ON_LEVEL_HIGH, + GPIO93_KP_DKIN_0, + GPIO94_KP_DKIN_1, + GPIO95_KP_DKIN_2, GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, -- cgit v0.10.2 From 6d3dfe4a3141476a3cf59ce6d2d1c25f9b5cfae8 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 15:58:03 +0800 Subject: [ARM] pxa: allow display of uncompress message through STUART Some boards use UART other than FFUART for the console, E.g. Marvell PXA3xx Form Factor Platform (aka Littleton) uses STUART. This patch modifies the uncompress.h so that display of the uncompress message is routed to the STUART. Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h index dadf4c2..f455126 100644 --- a/include/asm-arm/arch-pxa/uncompress.h +++ b/include/asm-arm/arch-pxa/uncompress.h @@ -11,11 +11,11 @@ #include #include +#include -#define __REG(x) ((volatile unsigned long *)x) - -#define UART FFUART +#define __REG(x) ((volatile unsigned long *)x) +static volatile unsigned long *UART = FFUART; static inline void putc(char c) { @@ -33,8 +33,13 @@ static inline void flush(void) { } +static inline void arch_decomp_setup(void) +{ + if (machine_is_littleton()) + UART = STUART; +} + /* * nothing to do */ -#define arch_decomp_setup() #define arch_decomp_wdog() -- cgit v0.10.2 From d4a678080e83ff96e3933fa1e631cef3cda04bef Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Thu, 12 Jun 2008 18:49:08 +0800 Subject: [ARM] pxa: embed body of pxa320_init_mfp() pxa320_init_mfp() is simple enough to be embedded into pxa320_init() to simplify the code a bit. Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 74128eb..44ef0b9 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c @@ -74,16 +74,12 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { MFP_ADDR_END, }; -static void __init pxa320_init_mfp(void) -{ - pxa3xx_init_mfp(); - pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); -} - static int __init pxa320_init(void) { - if (cpu_is_pxa320()) - pxa320_init_mfp(); + if (cpu_is_pxa320()) { + pxa3xx_init_mfp(); + pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); + } return 0; } -- cgit v0.10.2 From 0fedb0cad6ebc00af01013b5bbe52dd596853c63 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 16 Jun 2008 09:38:27 +0800 Subject: [ARM] pxa: introduce dedicated __mfp_validate() to check PXA2xx MFP Signed-off-by: Eric Miao Tested-by: Robert Jarzmik Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index d1cdb4e..ed91c04 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -91,6 +91,18 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c) return 0; } +static inline int __mfp_validate(int mfp) +{ + int gpio = mfp_to_gpio(mfp); + + if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) { + pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio); + return -1; + } + + return gpio; +} + void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) { unsigned long flags; @@ -99,13 +111,9 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) for (i = 0, c = mfp_cfgs; i < num; i++, c++) { - gpio = mfp_to_gpio(MFP_PIN(*c)); - - if (!gpio_desc[gpio].valid) { - pr_warning("%s: GPIO%d is invalid pin\n", - __func__, gpio); + gpio = __mfp_validate(MFP_PIN(*c)); + if (gpio < 0) continue; - } local_irq_save(flags); -- cgit v0.10.2 From 566b450c33ea43f339d54d445f4ea1ab2e021909 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 16 Jun 2008 09:47:47 +0800 Subject: [ARM] pxa: add pxa2xx_mfp_set_lpm() to facilitate low power state change Some boards want to change low power state of pins on-the-fly, this function helps to facilitate that operation instead of switching back-n-forth between two configurations with pxa2xx_mfp_config(). Signed-off-by: Eric Miao Tested-by: Robert Jarzmik Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index ed91c04..fd4545e 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c @@ -39,6 +39,28 @@ struct gpio_desc { static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1]; +static int __mfp_config_lpm(unsigned gpio, unsigned long lpm) +{ + unsigned mask = GPIO_bit(gpio); + + /* low power state */ + switch (lpm) { + case MFP_LPM_DRIVE_HIGH: + PGSR(gpio) |= mask; + break; + case MFP_LPM_DRIVE_LOW: + PGSR(gpio) &= ~mask; + break; + case MFP_LPM_INPUT: + break; + default: + pr_warning("%s: invalid low power state for GPIO%d\n", + __func__, gpio); + return -EINVAL; + } + return 0; +} + static int __mfp_config_gpio(unsigned gpio, unsigned long c) { unsigned long gafr, mask = GPIO_bit(gpio); @@ -57,21 +79,8 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c) else GPDR(gpio) &= ~mask; - /* low power state */ - switch (c & MFP_LPM_STATE_MASK) { - case MFP_LPM_DRIVE_HIGH: - PGSR(gpio) |= mask; - break; - case MFP_LPM_DRIVE_LOW: - PGSR(gpio) &= ~mask; - break; - case MFP_LPM_INPUT: - break; - default: - pr_warning("%s: invalid low power state for GPIO%d\n", - __func__, gpio); + if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK)) return -EINVAL; - } /* give early warning if MFP_LPM_CAN_WAKEUP is set on the * configurations of those pins not able to wakeup @@ -124,6 +133,20 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num) } } +void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm) +{ + unsigned long flags; + int gpio; + + gpio = __mfp_validate(mfp); + if (gpio < 0) + return; + + local_irq_save(flags); + __mfp_config_lpm(gpio, lpm); + local_irq_restore(flags); +} + int gpio_set_wake(unsigned int gpio, unsigned int on) { struct gpio_desc *d; diff --git a/include/asm-arm/arch-pxa/mfp-pxa2xx.h b/include/asm-arm/arch-pxa/mfp-pxa2xx.h index db8d890..8de1c0d 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa2xx.h +++ b/include/asm-arm/arch-pxa/mfp-pxa2xx.h @@ -128,5 +128,6 @@ #define GPIO84_GPIO MFP_CFG_IN(GPIO84, AF0) extern void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num); +extern void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm); extern int gpio_set_wake(unsigned int gpio, unsigned int on); #endif /* __ASM_ARCH_MFP_PXA2XX_H */ -- cgit v0.10.2 From 7a2c5cb0e2cafd5c3d07df1db8de183283a3b1ac Mon Sep 17 00:00:00 2001 From: eric miao Date: Tue, 19 Feb 2008 11:13:31 +0800 Subject: [ARM] pxa: make PXA3xx_CK() and PXA3xx_CKEN() public in clock.h So processor specific clock sources can be defined in pxa300.c and pxa320.c. Signed-off-by: eric miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 83cbfab..7bd1bbb 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h @@ -52,4 +52,28 @@ extern const struct clkops clk_cken_ops; void clk_cken_enable(struct clk *clk); void clk_cken_disable(struct clk *clk); +#ifdef CONFIG_PXA3xx +#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ + { \ + .name = _name, \ + .dev = _dev, \ + .ops = &clk_pxa3xx_cken_ops, \ + .rate = _rate, \ + .cken = CKEN_##_cken, \ + .delay = _delay, \ + } + +#define PXA3xx_CK(_name, _cken, _ops, _dev) \ + { \ + .name = _name, \ + .dev = _dev, \ + .ops = _ops, \ + .cken = CKEN_##_cken, \ + } + +extern const struct clkops clk_pxa3xx_cken_ops; +extern void clk_pxa3xx_cken_enable(struct clk *); +extern void clk_pxa3xx_cken_disable(struct clk *); +#endif + void clks_register(struct clk *clks, size_t num); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 15685d2..c4a0331 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -144,7 +144,7 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk) return hsio_clk; } -static void clk_pxa3xx_cken_enable(struct clk *clk) +void clk_pxa3xx_cken_enable(struct clk *clk) { unsigned long mask = 1ul << (clk->cken & 0x1f); @@ -154,7 +154,7 @@ static void clk_pxa3xx_cken_enable(struct clk *clk) CKENB |= mask; } -static void clk_pxa3xx_cken_disable(struct clk *clk) +void clk_pxa3xx_cken_disable(struct clk *clk) { unsigned long mask = 1ul << (clk->cken & 0x1f); @@ -164,7 +164,7 @@ static void clk_pxa3xx_cken_disable(struct clk *clk) CKENB &= ~mask; } -static const struct clkops clk_pxa3xx_cken_ops = { +const struct clkops clk_pxa3xx_cken_ops = { .enable = clk_pxa3xx_cken_enable, .disable = clk_pxa3xx_cken_disable, }; @@ -196,24 +196,6 @@ static const struct clkops clk_pout_ops = { .disable = clk_pout_disable, }; -#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ - { \ - .name = _name, \ - .dev = _dev, \ - .ops = &clk_pxa3xx_cken_ops, \ - .rate = _rate, \ - .cken = CKEN_##_cken, \ - .delay = _delay, \ - } - -#define PXA3xx_CK(_name, _cken, _ops, _dev) \ - { \ - .name = _name, \ - .dev = _dev, \ - .ops = _ops, \ - .cken = CKEN_##_cken, \ - } - static struct clk pxa3xx_clks[] = { { .name = "CLK_POUT", -- cgit v0.10.2 From 7c3ada4f7cc76fa3912683da83eccf7886fca1b1 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 12 May 2008 09:25:37 +0800 Subject: [ARM] pxa: move pxa310 specific MMC3 clk out of generic pxa3xx.c Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index 0a0d387..a0db6fa 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c @@ -15,10 +15,16 @@ #include #include +#include #include +#include #include +#include "generic.h" +#include "devices.h" +#include "clock.h" + static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), @@ -79,6 +85,10 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { MFP_ADDR_END, }; +static struct clk pxa310_clks[] = { + PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), +}; + static int __init pxa300_init(void) { if (cpu_is_pxa300() || cpu_is_pxa310()) { @@ -86,8 +96,10 @@ static int __init pxa300_init(void) pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); } - if (cpu_is_pxa310()) + if (cpu_is_pxa310()) { pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); + clks_register(ARRAY_AND_SIZE(pxa310_clks)); + } return 0; } diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index c4a0331..f491025 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -226,7 +226,6 @@ static struct clk pxa3xx_clks[] = { PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), - PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), }; #ifdef CONFIG_PM -- cgit v0.10.2 From 9ae819a819b4dfc60ac13dd1f1e1a7eaa3d4a6cb Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 15:22:03 +0800 Subject: [ARM] pxa: add pxa3xx NAND device and clock sources A pxa3xx_set_nand_info() is also introduced to set the PXA3xx NAND driver specific platform_data structure pointer. Signed-off-by: Eric Miao Cc: Sergey Podstavin Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index abc161d..84489dc 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "devices.h" #include "generic.h" @@ -831,6 +832,48 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) pxa_register_device(&pxa3xx_device_mci3, info); } +static struct resource pxa3xx_resources_nand[] = { + [0] = { + .start = 0x43100000, + .end = 0x43100053, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_NAND, + .end = IRQ_NAND, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* DRCMR for Data DMA */ + .start = 97, + .end = 97, + .flags = IORESOURCE_DMA, + }, + [3] = { + /* DRCMR for Command DMA */ + .start = 99, + .end = 99, + .flags = IORESOURCE_DMA, + }, +}; + +static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32); + +struct platform_device pxa3xx_device_nand = { + .name = "pxa3xx-nand", + .id = -1, + .dev = { + .dma_mask = &pxa3xx_nand_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(pxa3xx_resources_nand), + .resource = pxa3xx_resources_nand, +}; + +void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info) +{ + pxa_register_device(&pxa3xx_device_nand, info); +} #endif /* CONFIG_PXA3xx */ /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index b852eb1..887c738 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -31,4 +31,6 @@ extern struct platform_device pxa25x_device_pwm1; extern struct platform_device pxa27x_device_pwm0; extern struct platform_device pxa27x_device_pwm1; +extern struct platform_device pxa3xx_device_nand; + void __init pxa_register_device(struct platform_device *dev, void *data); diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c index a0db6fa..da92e97 100644 --- a/arch/arm/mach-pxa/pxa300.c +++ b/arch/arm/mach-pxa/pxa300.c @@ -85,6 +85,10 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { MFP_ADDR_END, }; +static struct clk common_clks[] = { + PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev), +}; + static struct clk pxa310_clks[] = { PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), }; @@ -94,6 +98,7 @@ static int __init pxa300_init(void) if (cpu_is_pxa300() || cpu_is_pxa310()) { pxa3xx_init_mfp(); pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); + clks_register(ARRAY_AND_SIZE(common_clks)); } if (cpu_is_pxa310()) { diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c index 44ef0b9..c557c23 100644 --- a/arch/arm/mach-pxa/pxa320.c +++ b/arch/arm/mach-pxa/pxa320.c @@ -15,11 +15,17 @@ #include #include +#include #include #include +#include #include +#include "generic.h" +#include "devices.h" +#include "clock.h" + static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { MFP_ADDR_X(GPIO0, GPIO4, 0x0124), @@ -74,11 +80,16 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { MFP_ADDR_END, }; +static struct clk pxa320_clks[] = { + PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev), +}; + static int __init pxa320_init(void) { if (cpu_is_pxa320()) { pxa3xx_init_mfp(); pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); + clks_register(ARRAY_AND_SIZE(pxa320_clks)); } return 0; diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h index 81a8937..eb4b190 100644 --- a/include/asm-arm/arch-pxa/pxa3xx_nand.h +++ b/include/asm-arm/arch-pxa/pxa3xx_nand.h @@ -15,4 +15,6 @@ struct pxa3xx_nand_platform_data { struct mtd_partition *parts; unsigned int nr_parts; }; + +extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); #endif /* __ASM_ARCH_PXA3XX_NAND_H */ -- cgit v0.10.2 From 481b55262e396930e6e35b8a6d41e7c146e10241 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 15:37:20 +0800 Subject: [ARM] pxa: add pxa3xx NAND support for zylonite Signed-off-by: Eric Miao Cc: Sergey Podstavin Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 7465a9c..13ab298 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "devices.h" #include "generic.h" @@ -324,6 +325,57 @@ static void __init zylonite_init_keypad(void) static inline void zylonite_init_keypad(void) {} #endif +#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) +static struct mtd_partition zylonite_nand_partitions[] = { + [0] = { + .name = "Bootloader", + .offset = 0, + .size = 0x060000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [1] = { + .name = "Kernel", + .offset = 0x060000, + .size = 0x200000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [2] = { + .name = "Filesystem", + .offset = 0x0260000, + .size = 0x3000000, /* 48M - rootfs */ + }, + [3] = { + .name = "MassStorage", + .offset = 0x3260000, + .size = 0x3d40000, + }, + [4] = { + .name = "BBT", + .offset = 0x6FA0000, + .size = 0x80000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* NOTE: we reserve some blocks at the end of the NAND flash for + * bad block management, and the max number of relocation blocks + * differs on different platforms. Please take care with it when + * defining the partition table. + */ +}; + +static struct pxa3xx_nand_platform_data zylonite_nand_info = { + .enable_arbiter = 1, + .parts = zylonite_nand_partitions, + .nr_parts = ARRAY_SIZE(zylonite_nand_partitions), +}; + +static void __init zylonite_init_nand(void) +{ + pxa3xx_set_nand_info(&zylonite_nand_info); +} +#else +static inline void zylonite_init_nand(void) {} +#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ + static void __init zylonite_init(void) { /* board-processor specific initialization */ @@ -342,6 +394,7 @@ static void __init zylonite_init(void) zylonite_init_lcd(); zylonite_init_mmc(); zylonite_init_keypad(); + zylonite_init_nand(); } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") -- cgit v0.10.2 From 9c1db1a1333197bc04dfd0c71d15f8ed43eb844d Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Mon, 2 Jun 2008 15:42:14 +0800 Subject: [ARM] pxa: add pxa3xx NAND support for littleton Signed-off-by: Eric Miao Cc: Sergey Podstavin Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index ff81a84..9a4f51d 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include "generic.h" @@ -361,6 +362,57 @@ static void __init littleton_init_keypad(void) static inline void littleton_init_keypad(void) {} #endif +#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) +static struct mtd_partition littleton_nand_partitions[] = { + [0] = { + .name = "Bootloader", + .offset = 0, + .size = 0x060000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [1] = { + .name = "Kernel", + .offset = 0x060000, + .size = 0x200000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + [2] = { + .name = "Filesystem", + .offset = 0x0260000, + .size = 0x3000000, /* 48M - rootfs */ + }, + [3] = { + .name = "MassStorage", + .offset = 0x3260000, + .size = 0x3d40000, + }, + [4] = { + .name = "BBT", + .offset = 0x6FA0000, + .size = 0x80000, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* NOTE: we reserve some blocks at the end of the NAND flash for + * bad block management, and the max number of relocation blocks + * differs on different platforms. Please take care with it when + * defining the partition table. + */ +}; + +static struct pxa3xx_nand_platform_data littleton_nand_info = { + .enable_arbiter = 1, + .parts = littleton_nand_partitions, + .nr_parts = ARRAY_SIZE(littleton_nand_partitions), +}; + +static void __init littleton_init_nand(void) +{ + pxa3xx_set_nand_info(&littleton_nand_info); +} +#else +static inline void littleton_init_nand(void) {} +#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */ + static void __init littleton_init(void) { /* initialize MFP configurations */ @@ -374,6 +426,7 @@ static void __init littleton_init(void) littleton_init_lcd(); littleton_init_keypad(); + littleton_init_nand(); } MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") -- cgit v0.10.2 From a1f7fc48c143537e2bf70affee7e8932f5be9bb4 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 28 May 2008 10:44:16 +0800 Subject: [ARM] pxa: add GPIO expander (PCA9539) support for zylonite And also reserve 32 IRQs for the two GPIO expanders. Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 6f7ae97..75bf61f 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -16,9 +16,12 @@ #include #include #include +#include +#include #include #include +#include #include #include "generic.h" @@ -109,6 +112,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { GPIO12_MMC2_DAT3, GPIO13_MMC2_CLK, GPIO14_MMC2_CMD, + + /* Standard I2C */ + GPIO21_I2C_SCL, + GPIO22_I2C_SDA, }; static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { @@ -192,6 +199,39 @@ static void __init zylonite_detect_lcd_panel(void) pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]); } +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +static struct pca953x_platform_data gpio_exp[] = { + [0] = { + .gpio_base = 128, + }, + [1] = { + .gpio_base = 144, + }, +}; + +struct i2c_board_info zylonite_i2c_board_info[] = { + { + .type = "pca9539", + .addr = 0x74, + .platform_data = &gpio_exp[0], + .irq = IRQ_GPIO(18), + }, { + .type = "pca9539", + .addr = 0x75, + .platform_data = &gpio_exp[1], + .irq = IRQ_GPIO(19), + }, +}; + +static void __init zylonite_init_i2c(void) +{ + pxa_set_i2c_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(zylonite_i2c_board_info)); +} +#else +static inline void zylonite_init_i2c(void) {} +#endif + void __init zylonite_pxa300_init(void) { if (cpu_is_pxa300() || cpu_is_pxa310()) { @@ -207,6 +247,8 @@ void __init zylonite_pxa300_init(void) /* WM9713 IRQ */ wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26); + + zylonite_init_i2c(); } if (cpu_is_pxa300()) { diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index b6c8fe3..d857360 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -184,6 +184,8 @@ defined(CONFIG_MACH_PCM027) || \ defined(CONFIG_MACH_MAGICIAN) #define NR_IRQS (IRQ_BOARD_END) +#elif defined(CONFIG_MACH_ZYLONITE) +#define NR_IRQS (IRQ_BOARD_START + 32) #else #define NR_IRQS (IRQ_BOARD_START) #endif -- cgit v0.10.2 From 5c9f50e90e8056fb5a8bdd479ab0591d5dad79a0 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 17 Jun 2008 19:03:54 +0800 Subject: [ARM] pxa: add simple gpio debug LEDs support for zylonite Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 13ab298..4a4711d 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -38,6 +38,8 @@ struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; int gpio_eth_irq; +int gpio_debug_led1; +int gpio_debug_led2; int wm9713_irq; @@ -64,6 +66,42 @@ static struct platform_device smc91x_device = { .resource = smc91x_resources, }; +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +static struct gpio_led zylonite_debug_leds[] = { + [0] = { + .name = "zylonite:yellow:1", + .default_trigger = "heartbeat", + }, + [1] = { + .name = "zylonite:yellow:2", + .default_trigger = "default-on", + }, +}; + +static struct gpio_led_platform_data zylonite_debug_leds_info = { + .leds = zylonite_debug_leds, + .num_leds = ARRAY_SIZE(zylonite_debug_leds), +}; + +static struct platform_device zylonite_device_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &zylonite_debug_leds_info, + } +}; + +static void __init zylonite_init_leds(void) +{ + zylonite_debug_leds[0].gpio = gpio_debug_led1; + zylonite_debug_leds[1].gpio = gpio_debug_led2; + + platform_device_register(&zylonite_device_leds); +} +#else +static inline void zylonite_init_leds(void) {} +#endif + #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) static struct platform_pwm_backlight_data zylonite_backlight_data = { .pwm_id = 3, @@ -395,6 +433,7 @@ static void __init zylonite_init(void) zylonite_init_mmc(); zylonite_init_keypad(); zylonite_init_nand(); + zylonite_init_leds(); } MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 75bf61f..b28d46e 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -264,4 +264,8 @@ void __init zylonite_pxa300_init(void) zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30); zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31); } + + /* GPIOs for Debug LEDs */ + gpio_debug_led1 = EXT_GPIO(25); + gpio_debug_led2 = EXT_GPIO(26); } diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 2b4fc34..2b7fba7 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c @@ -116,6 +116,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = { GPIO27_MMC2_DAT3, GPIO28_MMC2_CLK, GPIO29_MMC2_CMD, + + /* Debug LEDs */ + GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH, + GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH, }; #define NUM_LCD_DETECT_PINS 7 @@ -189,6 +193,8 @@ void __init zylonite_pxa320_init(void) /* GPIO pin assignment */ gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); + gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2); + gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2); /* MMC card detect & write protect for controller 0 */ zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1); diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h index de577de..0d35ca0 100644 --- a/include/asm-arm/arch-pxa/zylonite.h +++ b/include/asm-arm/arch-pxa/zylonite.h @@ -16,6 +16,8 @@ struct platform_mmc_slot { extern struct platform_mmc_slot zylonite_mmc_slot[]; extern int gpio_eth_irq; +extern int gpio_debug_led1; +extern int gpio_debug_led2; extern int wm9713_irq; -- cgit v0.10.2 From 20072fd0c93349e19527dd2fa9588b4335960e62 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Fri, 6 Jun 2008 16:34:03 +0800 Subject: [ARM] pxa: add support for L2 outer cache on XScale3 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The initial patch from Lothar, and Lennert make it into a cleaner one, modified and tested on PXA320 by Eric Miao. This patch moves the L2 cache operations out of proc-xsc3.S into dedicated outer cache support code. CACHE_XSC3L2 can be deselected so no L2 cache specific code will be linked in, and that L2 enable bit will not be set, this applies to the following cases: a. _only_ PXA300/PXA310 support included and no L2 cache wanted b. PXA320 support included, but want L2 be disabled So the enabling of L2 depends on two things: - CACHE_XSC3L2 is selected - and L2 cache is present Where the latter is only a safeguard (previous testing shows it works OK even when this bit is turned on). IXP series of processors with XScale3 cannot disable L2 cache for the moment since they depend on the L2 cache for its coherent memory, so IXP may always select CACHE_XSC3L2. Other L2 relevant bits are always turned on (i.e. the original code enclosed by #if L2_CACHE_ENABLED .. #endif), as they showed no side effects. Specifically, these bits are: - OC bits in TTBASE register (table walk outer cache attributes) - LLR Outer Cache Attributes (OC) in Auxiliary Control Register Signed-off-by: Lothar WaÃ<9f>mann Signed-off-by: Lennert Buytenhek Signed-off-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 32b2d2d..e7c14e3 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -74,3 +74,5 @@ obj-$(CONFIG_CPU_V6) += proc-v6.o obj-$(CONFIG_CPU_V7) += proc-v7.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o +obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o + -- cgit v0.10.2 From bbae02035a87a3ef45f751032ec8d2bb6f3ed496 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 19 Jun 2008 03:18:09 +0100 Subject: [ARM] 5108/2: PXA SSP: Don't unconditionally free interrupt Callers may stop the SSP core requesting the interrupt so it can't be freed unconditionally. Also use NO_IRQ like we should. Signed-off-by: Mark Brown Acked-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 00af7f2..363668c 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -285,7 +285,7 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags) goto out_region; dev->irq = ssp->irq; } else - dev->irq = 0; + dev->irq = NO_IRQ; /* turn on SSP port clock */ clk_enable(ssp->clk); @@ -306,7 +306,8 @@ void ssp_exit(struct ssp_dev *dev) struct ssp_device *ssp = dev->ssp; ssp_disable(dev); - free_irq(dev->irq, dev); + if (dev->irq != NO_IRQ) + free_irq(dev->irq, dev); clk_disable(ssp->clk); ssp_free(ssp); } -- cgit v0.10.2 From 919dcb2111dea341a8281a3dc893967c7dccd93f Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 19 Jun 2008 02:55:52 +0100 Subject: [ARM] 5110/1: PXA SSP: Remember the platform device on probe() pdev is used later on by dev_printk() so must be set. Signed-off-by: Mark Brown Acked-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 363668c..20d0a06 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -361,6 +361,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type) dev_err(&pdev->dev, "failed to allocate memory"); return -ENOMEM; } + ssp->pdev = pdev; ssp->clk = clk_get(&pdev->dev, "SSPCLK"); if (IS_ERR(ssp->clk)) { -- cgit v0.10.2 From d6c47417a4ddf500a106fc8718c0f6107c7d5211 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 19 Jun 2008 03:11:50 +0100 Subject: [ARM] 5112/1: PXA SSP: Strip in-code changelog It's not been updated in quite some time and we now have git for history. Signed-off-by: Mark Brown Acked-by: Eric Miao Signed-off-by: Russell King diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 20d0a06..0d48fbd 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c @@ -14,13 +14,6 @@ * IO-based SSP applications and allows easy port setup for DMA access. * * Author: Liam Girdwood - * - * Revision history: - * 22nd Aug 2003 Initial version. - * 20th Dec 2004 Added ssp_config for changing port config without - * closing the port. - * 4th Aug 2005 Added option to disable irq handler registration and - * cleaned up irq and clock detection. */ #include -- cgit v0.10.2 From 54b238469bce3a1b5012b2f0ebf261cf1c53e664 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 19 Jun 2008 03:11:49 +0100 Subject: [ARM] 5113/1: PXA SSP: Additional register definitions for PXA3xx SSP Also add some white space for a little clarity. Signed-off-by: Mark Brown Acked-by: Eric Miao Signed-off-by: Russell King diff --git a/include/asm-arm/arch-pxa/regs-ssp.h b/include/asm-arm/arch-pxa/regs-ssp.h index 0255328..3c04cde 100644 --- a/include/asm-arm/arch-pxa/regs-ssp.h +++ b/include/asm-arm/arch-pxa/regs-ssp.h @@ -20,6 +20,10 @@ #define SSTSS (0x38) /* SSP Timeslot Status */ #define SSACD (0x3C) /* SSP Audio Clock Divider */ +#if defined(CONFIG_PXA3xx) +#define SSACDD (0x40) /* SSP Audio Clock Dither Divider */ +#endif + /* Common PXA2xx bits first */ #define SSCR0_DSS (0x0000000f) /* Data Size Select (mask) */ #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ @@ -29,10 +33,12 @@ #define SSCR0_National (0x2 << 4) /* National Microwire */ #define SSCR0_ECS (1 << 6) /* External clock select */ #define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ + #if defined(CONFIG_PXA25x) #define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ -#elif defined(CONFIG_PXA27x) + +#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) #define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ #define SSCR0_EDSS (1 << 20) /* Extended data size select */ @@ -45,6 +51,10 @@ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif +#if defined(CONFIG_PXA3xx) +#define SSCR0_FPCKE (1 << 29) /* FIFO packing enable */ +#endif + #define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ #define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ #define SSCR1_LBM (1 << 2) /* Loop-Back Mode */ @@ -109,5 +119,9 @@ #define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */ #define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ +#if defined(CONFIG_PXA3xx) +#define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */ +#endif + #endif /* __ASM_ARCH_REGS_SSP_H */ -- cgit v0.10.2