From 3ca507920d4f618a960aed19609bcce6c4d15387 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 26 Jun 2007 19:37:20 +0200 Subject: [MIPS] __ucmpdi2 arguments are unsigned long long. Reported by Eugene Surovegin . Signed-off-by: Ralf Baechle diff --git a/arch/mips/lib/ucmpdi2.c b/arch/mips/lib/ucmpdi2.c index e9ff258..e2ff607 100644 --- a/arch/mips/lib/ucmpdi2.c +++ b/arch/mips/lib/ucmpdi2.c @@ -2,7 +2,7 @@ #include "libgcc.h" -word_type __ucmpdi2 (unsigned long a, unsigned long b) +word_type __ucmpdi2 (unsigned long long a, unsigned long long b) { const DWunion au = {.ll = a}; const DWunion bu = {.ll = b}; -- cgit v0.10.2 From 2ec0e59aff1b51ff80c2c544cbef17b7613c8d38 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Mon, 21 May 2007 23:02:34 +0900 Subject: [MIPS] add io_map_base to pci_controller on Cobalt Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c index d91027f..cfce7af 100644 --- a/arch/mips/cobalt/pci.c +++ b/arch/mips/cobalt/pci.c @@ -35,6 +35,7 @@ static struct pci_controller cobalt_pci_controller = { .mem_resource = &cobalt_mem_resource, .io_resource = &cobalt_io_resource, .io_offset = 0 - GT_DEF_PCI0_IO_BASE, + .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE), }; static int __init cobalt_pci_init(void) -- cgit v0.10.2 From e460b73c8790bb14959cc99a8eb040e6bd2ecbf0 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Mon, 28 May 2007 22:54:28 +0900 Subject: [MIPS] remove "support for" from system type entry Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9528ee9..c03ecde 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -317,7 +317,7 @@ config PNX8550_JBS select SYS_SUPPORTS_LITTLE_ENDIAN config PNX8550_STB810 - bool "Support for Philips PNX8550 based STB810 board" + bool "Philips PNX8550 based STB810 board" select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN @@ -392,7 +392,7 @@ config QEMU can be found at http://www.linux-mips.org/wiki/Qemu. config MARKEINS - bool "Support for NEC EMMA2RH Mark-eins" + bool "NEC EMMA2RH Mark-eins" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU -- cgit v0.10.2 From 08a45936823d0c47db9e328185fdaad6c62d16bd Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Mon, 28 May 2007 23:13:50 +0900 Subject: [MIPS] Alchemy: Fix wrong cast Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/au1000/pb1100/init.c index 1fae39a..6131b56 100644 --- a/arch/mips/au1000/pb1100/init.c +++ b/arch/mips/au1000/pb1100/init.c @@ -53,7 +53,7 @@ void __init prom_init(void) prom_argc = fw_arg0; prom_argv = (char **) fw_arg1; - prom_envp = (int *) fw_arg3; + prom_envp = (char **) fw_arg3; mips_machgroup = MACH_GROUP_ALCHEMY; mips_machtype = MACH_PB1100; -- cgit v0.10.2 From b3a04a6d07453664abdf8b36296a640752ad4a70 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Mon, 28 May 2007 23:26:56 +0900 Subject: [MIPS] Fix pb1500 reg B access au_readl() is correct here. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c index 0ffdb4f..c9b6556 100644 --- a/arch/mips/au1000/pb1500/board_setup.c +++ b/arch/mips/au1000/pb1500/board_setup.c @@ -125,7 +125,7 @@ void __init board_setup(void) au_writel((au_readl(0xac000028) | 0x20), 0xac000028); } /* Put the clock in BCD mode */ - if (readl(0xac00002C) & 0x4) { /* reg B */ + if (au_readl(0xac00002C) & 0x4) { /* reg B */ au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); au_sync(); } -- cgit v0.10.2 From b0c10b9f4c4123dfb2f9e0d3df244a402c938561 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 1 Jun 2007 15:47:46 +0100 Subject: [MIPS] AP/SP requires shadow registers, auto enable support. Noticed by Chris Dearman (chris@mips.com). Signed-off-by: Ralf Baechle diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c03ecde..7345538 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1392,6 +1392,7 @@ config MIPS_VPE_LOADER depends on SYS_SUPPORTS_MULTITHREADING select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI + select CPU_MIPSR2_SRS select MIPS_MT help Includes a loader for loading an elf relocatable object -- cgit v0.10.2 From c8eae71dc81af15809d87d7aabb94810cea9577d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 12 Jun 2007 13:04:09 +0100 Subject: [MIPS] 20K: Handle WAIT related bugs according to errata information We used to avoid the WAIT entirely on the 20K but really only need to do this on early revs of the 20K. Without this a 20K was a bit of a power hog. Well, in the lower power power hog category ;-) Signed-off-by: Ralf Baechle diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ab755ea..0fc90ba 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -137,7 +137,6 @@ static inline void check_wait(void) case CPU_4KEC: case CPU_4KSC: case CPU_5KC: -/* case CPU_20KC:*/ case CPU_24K: case CPU_25KF: case CPU_34K: @@ -156,6 +155,17 @@ static inline void check_wait(void) if (allow_au1k_wait) cpu_wait = au1k_wait; break; + case CPU_20KC: + /* + * WAIT on Rev1.0 has E1, E2, E3 and E16. + * WAIT on Rev2.0 and Rev3.0 has E16. + * Rev3.1 WAIT is nop, why bother + */ + if ((c->processor_id & 0xff) <= 0x64) + break; + + cpu_wait = r4k_wait; + break; case CPU_RM9000: if ((c->processor_id & 0x00ff) >= 0x40) cpu_wait = r4k_wait; -- cgit v0.10.2 From a76f3a417a431eaf673323459357d8e684b52c49 Mon Sep 17 00:00:00 2001 From: Pavel Kiryukhin Date: Tue, 5 Jun 2007 13:42:20 +0400 Subject: [MIPS] use compat_siginfo in rt_sigframe_n32 Signed-off-by: Pavel Kiryukhin Signed-off-by: Ralf Baechle diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 003f815..486b8e5 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -36,68 +36,6 @@ #include "signal-common.h" -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) - -typedef struct compat_siginfo { - int si_signo; - int si_code; - int si_errno; - - union { - int _pad[SI_PAD_SIZE32]; - - /* kill() */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - } _kill; - - /* SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_uid_t _uid; /* sender's uid */ - int _status; /* exit code */ - compat_clock_t _utime; - compat_clock_t _stime; - } _sigchld; - - /* IRIX SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_clock_t _utime; - int _status; /* exit code */ - compat_clock_t _stime; - } _irix_sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ - struct { - s32 _addr; /* faulting insn/memory ref. */ - } _sigfault; - - /* SIGPOLL, SIGXFSZ (To do ...) */ - struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ - int _fd; - } _sigpoll; - - /* POSIX.1b timers */ - struct { - timer_t _tid; /* timer id */ - int _overrun; /* overrun count */ - compat_sigval_t _sigval;/* same as below */ - int _sys_private; /* not to be passed to user */ - } _timer; - - /* POSIX.1b signals */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - compat_sigval_t _sigval; - } _rt; - - } _sifields; -} compat_siginfo_t; - /* * Including would give use the 64-bit syscall numbers ... */ diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index 4cf9ff2..eb7e059 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c @@ -72,7 +72,7 @@ struct ucontextn32 { struct rt_sigframe_n32 { u32 rs_ass[4]; /* argument save space for o32 */ u32 rs_code[2]; /* signal trampoline */ - struct siginfo rs_info; + struct compat_siginfo rs_info; struct ucontextn32 rs_uc; }; @@ -81,7 +81,7 @@ struct rt_sigframe_n32 { struct rt_sigframe_n32 { u32 rs_ass[4]; /* argument save space for o32 */ u32 rs_pad[2]; - struct siginfo rs_info; + struct compat_siginfo rs_info; struct ucontextn32 rs_uc; u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */ }; @@ -187,7 +187,7 @@ static int setup_rt_frame_n32(struct k_sigaction * ka, install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn); /* Create siginfo. */ - err |= copy_siginfo_to_user(&frame->rs_info, info); + err |= copy_siginfo_to_user32(&frame->rs_info, info); /* Create the ucontext. */ err |= __put_user(0, &frame->rs_uc.uc_flags); diff --git a/include/asm-mips/compat-signal.h b/include/asm-mips/compat-signal.h index 6599a90..368a99e 100644 --- a/include/asm-mips/compat-signal.h +++ b/include/asm-mips/compat-signal.h @@ -10,6 +10,68 @@ #include +#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) + +typedef struct compat_siginfo { + int si_signo; + int si_code; + int si_errno; + + union { + int _pad[SI_PAD_SIZE32]; + + /* kill() */ + struct { + compat_pid_t _pid; /* sender's pid */ + compat_uid_t _uid; /* sender's uid */ + } _kill; + + /* SIGCHLD */ + struct { + compat_pid_t _pid; /* which child */ + compat_uid_t _uid; /* sender's uid */ + int _status; /* exit code */ + compat_clock_t _utime; + compat_clock_t _stime; + } _sigchld; + + /* IRIX SIGCHLD */ + struct { + compat_pid_t _pid; /* which child */ + compat_clock_t _utime; + int _status; /* exit code */ + compat_clock_t _stime; + } _irix_sigchld; + + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ + struct { + s32 _addr; /* faulting insn/memory ref. */ + } _sigfault; + + /* SIGPOLL, SIGXFSZ (To do ...) */ + struct { + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + int _fd; + } _sigpoll; + + /* POSIX.1b timers */ + struct { + timer_t _tid; /* timer id */ + int _overrun; /* overrun count */ + compat_sigval_t _sigval;/* same as below */ + int _sys_private; /* not to be passed to user */ + } _timer; + + /* POSIX.1b signals */ + struct { + compat_pid_t _pid; /* sender's pid */ + compat_uid_t _uid; /* sender's uid */ + compat_sigval_t _sigval; + } _rt; + + } _sifields; +} compat_siginfo_t; + static inline int __copy_conv_sigset_to_user(compat_sigset_t __user *d, const sigset_t *s) { -- cgit v0.10.2 From 8e09ffb60bbc2b49c06718d5a1252860c709a660 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 14 Jun 2007 00:56:31 +0900 Subject: [MIPS] Remove a duplicated local variable in test_and_clear_bit() Fix a sparse warning caused by 2c921d07f8c641e691b0dfd80a5cfe14c60ec489 include2/asm/bitops.h:313:23: warning: symbol 'res' shadows an earlier one include2/asm/bitops.h:309:16: originally declared here Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index ffe245b..d9e81af 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -310,7 +310,7 @@ static inline int test_and_clear_bit(unsigned long nr, if (cpu_has_llsc && R10000_LLSC_WAR) { unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); - unsigned long temp, res; + unsigned long temp; __asm__ __volatile__( " .set mips3 \n" -- cgit v0.10.2 From 3207cd5c4b852b54126f5a4b2564652c64d93a6a Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 18 Jun 2007 16:36:11 +0100 Subject: [MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work. Neither rtc_mips_get_time nor rtc_mips_set_time are being initialized by the EMMA2RH setup code, so genrtc at best was a RTC dummy avoiding a few error messages but not providing actual functionality. Signed-off-by: Ralf Baechle diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig index 3044579..2e3e155 100644 --- a/arch/mips/configs/emma2rh_defconfig +++ b/arch/mips/configs/emma2rh_defconfig @@ -951,8 +951,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_WATCHDOG is not set # CONFIG_HW_RANDOM is not set CONFIG_RTC=m -CONFIG_GEN_RTC=m -CONFIG_GEN_RTC_X=y +# CONFIG_GEN_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -- cgit v0.10.2 From 2fae3731b1b02316c219c4556bb7ad3a920f73cc Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 20 Jun 2007 14:25:27 +0100 Subject: [MIPS] SMTC and non-SMTC kernel and modules are incompatible So don't allow mixing. Signed-off-by: Ralf Baechle diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 399d03f..c5ef324 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -122,6 +122,13 @@ search_module_dbetables(unsigned long addr) #define MODULE_KERNEL_TYPE "64BIT " #endif -#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_KERNEL_TYPE +#ifdef CONFIG_MIPS_MT_SMTC +#define MODULE_KERNEL_SMTC "MT_SMTC " +#else +#define MODULE_KERNEL_SMTC "" +#endif + +#define MODULE_ARCH_VERMAGIC \ + MODULE_PROC_FAMILY MODULE_KERNEL_TYPE MODULE_KERNEL_SMTC #endif /* _ASM_MODULE_H */ -- cgit v0.10.2 From 8e15a0e35fdaf19e1aeb7923571e928bd6123cfd Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Thu, 21 Jun 2007 12:59:58 +0100 Subject: [MIPS] Count timer interrupts correctly. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 2e01147..046b03b 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi) switch (type_copy) { case SMTC_CLOCK_TICK: irq_enter(); - kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++; + kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++; /* Invoke Clock "Interrupt" */ ipi_timer_latch[dest_copy] = 0; #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG -- cgit v0.10.2