From cd22c0e44b105aecd78e5f9e77abab3a1b8dc00c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 29 Mar 2011 11:36:05 +0200 Subject: genirq: Fix harmless typo The late night fixup missed to convert the data type from irq_desc to irq_data, which results in a harmless but annoying warning. Signed-off-by: Thomas Gleixner diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index acf5407..b3bf54f 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -132,7 +132,7 @@ irq_get_pending(struct cpumask *mask, struct irq_desc *desc) } #else static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; } -static inline bool irq_move_pending(struct irq_desc *data) { return false; } +static inline bool irq_move_pending(struct irq_data *data) { return false; } static inline void irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } static inline void -- cgit v0.10.2 From 11f2cde1165b56c88701954088437a556ddff07f Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 27 Mar 2011 19:45:00 +0200 Subject: arm: bios32: Remove non exisiting machine code The id removal left this machine check in which breaks the build on some platforms. Remove it. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index d86fcd4..e4ee050 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -159,31 +159,6 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285); /* - * Same as above. The PrPMC800 carrier board for the PrPMC1100 - * card maps the host-bridge @ 00:01:00 for some reason and it - * ends up getting scanned. Note that we only want to do this - * fixup when we find the IXP4xx on a PrPMC system, which is why - * we check the machine type. We could be running on a board - * with an IXP4xx target device and we don't want to kill the - * resources in that case. - */ -static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev) -{ - int i; - - if (machine_is_prpmc1100()) { - dev->class &= 0xff; - dev->class |= PCI_CLASS_BRIDGE_HOST << 8; - for (i = 0; i < PCI_NUM_RESOURCES; i++) { - dev->resource[i].start = 0; - dev->resource[i].end = 0; - dev->resource[i].flags = 0; - } - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100); - -/* * PCI IDE controllers use non-standard I/O port decoding, respect it. */ static void __devinit pci_fixup_ide_bases(struct pci_dev *dev) -- cgit v0.10.2 From f2e0bf2181e4117fa7319be2c9249df968ad9096 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 11:25:40 +0200 Subject: arm: footbridge: Make cksrc_dc21285_disable() void This clocksource function needs to be void. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index a921fe9..5f1f986 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c @@ -30,7 +30,7 @@ static int cksrc_dc21285_enable(struct clocksource *cs) return 0; } -static int cksrc_dc21285_disable(struct clocksource *cs) +static void cksrc_dc21285_disable(struct clocksource *cs) { *CSR_TIMER2_CNTL = 0; } -- cgit v0.10.2 From a68e5e0b9f744e0c884db8fcba8d365f6724b4cc Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 12:32:39 +0200 Subject: arm: at91: at572d940hf: Fix SDRAMC define That wants to be AT91_SDRAMC0 Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h index 2d9b0af..be510cf 100644 --- a/arch/arm/mach-at91/include/mach/at572d940hf.h +++ b/arch/arm/mach-at91/include/mach/at572d940hf.h @@ -89,7 +89,7 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) +#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -- cgit v0.10.2 From a40bd62153db5031f2afacd1615be8759684ce18 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 11:26:09 +0200 Subject: arm: dove: Use correct GPIO_BASE and remove orion_gpio_init() leftover commit 9eac6d0 (ARM: Remove dependency of plat-orion GPIO code on mach directory includes) missed to convert one instance of DOVE_GPIO_VIRT_BASE and left the orion_gpio_init() in mpp.c Fix it up. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h index e5fcdd3..b20ec9a 100644 --- a/arch/arm/mach-dove/include/mach/dove.h +++ b/arch/arm/mach-dove/include/mach/dove.h @@ -136,7 +136,7 @@ #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) #define DOVE_NAND_GPIO_EN (1 << 0) -#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) +#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40) #define DOVE_SPI_GPIO_SEL (1 << 5) #define DOVE_UART1_GPIO_SEL (1 << 4) #define DOVE_AU1_GPIO_SEL (1 << 3) diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c index 71db2bd..c66c763 100644 --- a/arch/arm/mach-dove/mpp.c +++ b/arch/arm/mach-dove/mpp.c @@ -147,9 +147,6 @@ void __init dove_mpp_conf(unsigned int *mpp_list) u32 pmu_sig_ctrl[PMU_SIG_REGS]; int i; - /* Initialize gpiolib. */ - orion_gpio_init(); - for (i = 0; i < MPP_NR_REGS; i++) mpp_ctrl[i] = readl(MPP_CTRL(i)); -- cgit v0.10.2 From 504f1dfeccb3f523a3faefb0802016c818efa5fb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 12:11:46 +0200 Subject: arm: ns9xxx: Remove non exisiting machine checks The machine id cleanup missed to remove the checks for now removed ids. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h index f7e9196..19ca6de 100644 --- a/arch/arm/mach-ns9xxx/include/mach/board.h +++ b/arch/arm/mach-ns9xxx/include/mach/board.h @@ -14,12 +14,10 @@ #include #define board_is_a9m9750dev() (0 \ - || machine_is_cc9p9360dev() \ || machine_is_cc9p9750dev() \ ) #define board_is_a9mvali() (0 \ - || machine_is_cc9p9360val() \ || machine_is_cc9p9750val() \ ) diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h index f851a6b..628e975 100644 --- a/arch/arm/mach-ns9xxx/include/mach/module.h +++ b/arch/arm/mach-ns9xxx/include/mach/module.h @@ -18,7 +18,6 @@ ) #define module_is_cc9c() (0 \ - || machine_is_cc9c() \ ) #define module_is_cc9p9210() (0 \ @@ -32,21 +31,17 @@ ) #define module_is_cc9p9360() (0 \ - || machine_is_a9m9360() \ || machine_is_cc9p9360dev() \ || machine_is_cc9p9360js() \ - || machine_is_cc9p9360val() \ ) #define module_is_cc9p9750() (0 \ || machine_is_a9m9750() \ - || machine_is_cc9p9750dev() \ || machine_is_cc9p9750js() \ || machine_is_cc9p9750val() \ ) #define module_is_ccw9c() (0 \ - || machine_is_ccw9c() \ ) #define module_is_inc20otter() (0 \ -- cgit v0.10.2 From 4fe25e3898ec53de322f32b67afa2be872f8ed21 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:12:20 +0200 Subject: arm: nomadik: Remove non existing cpu id check Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 80643bc..6436ba5 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -541,13 +541,6 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip, int gpio, bool on) { -#ifdef CONFIG_ARCH_U8500 - if (cpu_is_u8500v2()) { - __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, - on ? NMK_GPIO_SLPM_WAKEUP_ENABLE - : NMK_GPIO_SLPM_WAKEUP_DISABLE); - } -#endif __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on); } -- cgit v0.10.2 From 1738209a1500a10fe3cce0b11b81b5bb1c6dffbe Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 10:54:40 +0200 Subject: arm: h720x: Fix irq conversion fallout The conversion missed, that one of the irq functions is called from the init code. Split it out, so the irq number based call works. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index ac3f914..bcf91a5 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -141,13 +141,18 @@ h7202_timer_interrupt(int irq, void *dev_id) /* * mask multiplexed timer IRQs */ -static void inline mask_timerx_irq(struct irq_data *d) +static void inline __mask_timerx_irq(unsigned int irq) { unsigned int bit; - bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); + bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; } +static void inline mask_timerx_irq(struct irq_data *d) +{ + __mask_timerx_irq(d->irq); +} + /* * unmask multiplexed timer IRQs */ @@ -196,7 +201,7 @@ void __init h7202_init_irq (void) for (irq = IRQ_TIMER1; irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { - mask_timerx_irq(irq); + __mask_timerx_irq(irq); set_irq_chip(irq, &h7202_timerx_chip); set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); -- cgit v0.10.2 From b0f18edaf6ee4e6fac89cae63a90bd38ad2a3418 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Wed, 9 Feb 2011 16:46:14 +0100 Subject: arm: tegra: Remove unused bogus irq enable/disable magic The core code handles thees already. Signed-off-by: Thomas Gleixner Cc: Colin Cross Cc: linux-tegra@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 12090a2..094e61a 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -275,13 +275,6 @@ void tegra_gpio_resume(void) } local_irq_restore(flags); - - for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { - struct irq_desc *desc = irq_to_desc(i); - if (!desc || (desc->status & IRQ_WAKEUP)) - continue; - enable_irq(i); - } } void tegra_gpio_suspend(void) @@ -289,18 +282,6 @@ void tegra_gpio_suspend(void) unsigned long flags; int b, p, i; - for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { - struct irq_desc *desc = irq_to_desc(i); - if (!desc) - continue; - if (desc->status & IRQ_WAKEUP) { - int gpio = i - INT_GPIO_BASE; - pr_debug("gpio %d.%d is wakeup\n", gpio/8, gpio&7); - continue; - } - disable_irq(i); - } - local_irq_save(flags); for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; -- cgit v0.10.2 From 1475b85d08b51b5ee2b7b426247d3ef3f531eafe Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 22 Mar 2011 17:11:09 +0100 Subject: arm: Use genirq lockdep helper to set lock class Remove the open coded access to irq_desc which will fail on sparse irq and use the proper wrappers. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index af818a2..5abcfc0 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -518,7 +518,7 @@ void __init at91_gpio_irq_setup(void) __raw_writel(~0, this->regbase + PIO_IDR); for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { - lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); + irq_set_lockdep_class(pin, &gpio_lock_class); /* * Can use the "simple" and not "edge" handler since it's diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 094e61a..8ab2131 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -340,7 +340,7 @@ static int __init tegra_gpio_init(void) for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) { bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; - lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class); + irq_set_lockdep_class(i, &gpio_lock_class); set_irq_chip_data(i, bank); set_irq_chip(i, &tegra_gpio_irq_chip); set_irq_handler(i, handle_simple_irq); diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 971d186..08af188 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -1672,9 +1672,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank) for (j = bank->virtual_irq_start; j < bank->virtual_irq_start + bank_width; j++) { - struct irq_desc *d = irq_to_desc(j); - - lockdep_set_class(&d->lock, &gpio_lock_class); + irq_set_lockdep_class(j, &gpio_lock_class); set_irq_chip_data(j, bank); if (bank_is_mpuio(bank)) set_irq_chip(j, &mpuio_irq_chip); -- cgit v0.10.2 From 1b7a2d90c83bec624ac89f0642cb57bed17a2d3d Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 7 Feb 2011 22:30:49 +0100 Subject: arm: Use irq flag setter function Use the proper accessor function instead of fiddling in the status bits directly. Signed-off-by: Thomas Gleixner Cc: linux-arm-kernel@lists.infradead.org diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 3535d37..9b3a6d8 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -144,24 +144,21 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs) void set_irq_flags(unsigned int irq, unsigned int iflags) { - struct irq_desc *desc; - unsigned long flags; + unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; if (irq >= nr_irqs) { printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); return; } - desc = irq_to_desc(irq); - raw_spin_lock_irqsave(&desc->lock, flags); - desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; if (iflags & IRQF_VALID) - desc->status &= ~IRQ_NOREQUEST; + clr |= IRQ_NOREQUEST; if (iflags & IRQF_PROBE) - desc->status &= ~IRQ_NOPROBE; + clr |= IRQ_NOPROBE; if (!(iflags & IRQF_NOAUTOEN)) - desc->status &= ~IRQ_NOAUTOEN; - raw_spin_unlock_irqrestore(&desc->lock, flags); + clr |= IRQ_NOAUTOEN; + /* Order is clear bits in "clr" then set bits in "set" */ + irq_modify_status(irq, clr, set & ~clr); } void __init init_IRQ(void) -- cgit v0.10.2 From cf8d1581c46254d286c51d12154196f7b94c46d2 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 11:58:31 +0100 Subject: arm: msm: Convert to new irq chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c index 0de19ec..394689a 100644 --- a/arch/arm/mach-msm/gpio-v2.c +++ b/arch/arm/mach-msm/gpio-v2.c @@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio) val, val2); } -static void msm_gpio_irq_ack(unsigned int irq) +static void msm_gpio_irq_ack(struct irq_data *d) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); if (test_bit(gpio, msm_gpio.dual_edge_irqs)) msm_gpio_update_dual_edge_pos(gpio); } -static void msm_gpio_irq_mask(unsigned int irq) +static void msm_gpio_irq_mask(struct irq_data *d) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); unsigned long irq_flags; spin_lock_irqsave(&tlmm_lock, irq_flags); @@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq) spin_unlock_irqrestore(&tlmm_lock, irq_flags); } -static void msm_gpio_irq_unmask(unsigned int irq) +static void msm_gpio_irq_unmask(struct irq_data *d) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); unsigned long irq_flags; spin_lock_irqsave(&tlmm_lock, irq_flags); @@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq) spin_unlock_irqrestore(&tlmm_lock, irq_flags); } -static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) +static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); unsigned long irq_flags; uint32_t bits; @@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) */ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) { + struct irq_data *data = irq_desc_get_irq_data(desc); unsigned long i; for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); @@ -318,12 +319,12 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, i)); } - desc->chip->ack(irq); + data->chip->irq_ack(data); } -static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) +static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); if (on) { if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) @@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) static struct irq_chip msm_gpio_irq_chip = { .name = "msmgpio", - .mask = msm_gpio_irq_mask, - .unmask = msm_gpio_irq_unmask, - .ack = msm_gpio_irq_ack, - .set_type = msm_gpio_irq_set_type, - .set_wake = msm_gpio_irq_set_wake, + .irq_mask = msm_gpio_irq_mask, + .irq_unmask = msm_gpio_irq_unmask, + .irq_ack = msm_gpio_irq_ack, + .irq_set_type = msm_gpio_irq_set_type, + .irq_set_wake = msm_gpio_irq_set_wake, }; static int __devinit msm_gpio_probe(struct platform_device *dev) -- cgit v0.10.2 From e83bbb115e3afc87bdb1d375d33bcfe910920002 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:35:19 +0100 Subject: arm: Cleanup irq_desc access Use the proper wrappers and use the flow type in irq_data. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 078894b..222327b 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -324,9 +324,8 @@ EXPORT_SYMBOL(orion_gpio_set_blink); static void gpio_irq_ack(struct irq_data *d) { struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); - int type; + int type = irqd_get_trigger_type(d); - type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { int pin = d->irq - ochip->secondary_irq_base; @@ -337,11 +336,10 @@ static void gpio_irq_ack(struct irq_data *d) static void gpio_irq_mask(struct irq_data *d) { struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); - int type; + int type = irqd_get_trigger_type(d); void __iomem *reg; int pin; - type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) reg = GPIO_EDGE_MASK(ochip); else @@ -355,11 +353,10 @@ static void gpio_irq_mask(struct irq_data *d) static void gpio_irq_unmask(struct irq_data *d) { struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d); - int type; + int type = irqd_get_trigger_type(d); void __iomem *reg; int pin; - type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) reg = GPIO_EDGE_MASK(ochip); else @@ -389,9 +386,9 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type) * Set edge/level type. */ if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { - set_irq_handler(d->irq, handle_edge_irq); + __irq_set_handler_locked(d->irq, handle_edge_irq); } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { - set_irq_handler(d->irq, handle_level_irq); + __irq_set_handler_locked(d->irq, handle_level_irq); } else { printk(KERN_ERR "failed to set irq=%d (type=%d)\n", d->irq, type); @@ -480,7 +477,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio, set_irq_chip(irq, &orion_gpio_irq_chip); set_irq_handler(irq, handle_level_irq); set_irq_chip_data(irq, ochip); - irq_desc[irq].status |= IRQ_LEVEL; + irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); } } @@ -488,7 +485,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio, void orion_gpio_irq_handler(int pinoff) { struct orion_gpio_chip *ochip; - u32 cause; + u32 cause, type; int i; ochip = orion_gpio_chip_find(pinoff); @@ -500,15 +497,14 @@ void orion_gpio_irq_handler(int pinoff) for (i = 0; i < ochip->chip.ngpio; i++) { int irq; - struct irq_desc *desc; irq = ochip->secondary_irq_base + i; if (!(cause & (1 << i))) continue; - desc = irq_desc + irq; - if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { + type = irqd_get_trigger_type(irq_get_irq_data(irq)); + if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { /* Swap polarity (race with GPIO line) */ u32 polarity; @@ -516,7 +512,6 @@ void orion_gpio_irq_handler(int pinoff) polarity ^= 1 << i; writel(polarity, GPIO_IN_POL(ochip)); } - - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } } diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index 7d0c7eb..c163f90 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -59,7 +59,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) set_irq_chip(irq, &orion_irq_chip); set_irq_chip_data(irq, maskaddr); set_irq_handler(irq, handle_level_irq); - irq_desc[irq].status |= IRQ_LEVEL; + irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); } } -- cgit v0.10.2 From 7222f3912fe3f00cdca0a6db16708af281ff97b6 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:36:46 +0100 Subject: arm: plat-samsung: Use proper irq accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 4e77035..b721c04 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c @@ -107,7 +107,6 @@ static struct irq_chip s3c_irq_uart = { static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) { - struct irq_desc *desc = irq_to_desc(uirq->parent_irq); void __iomem *reg_base = uirq->regs; unsigned int irq; int offs; @@ -124,8 +123,8 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) set_irq_flags(irq, IRQF_VALID); } - desc->irq_data.handler_data = uirq; - set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); + irq_set_handler_data(uirq->parent_irq, uirq); + irq_set_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); } /** diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c index dd8692a..d6ad66a 100644 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ b/arch/arm/plat-samsung/irq-vic-timer.c @@ -77,14 +77,11 @@ static struct irq_chip s3c_irq_timer = { void __init s3c_init_vic_timer_irq(unsigned int parent_irq, unsigned int timer_irq) { - struct irq_desc *desc = irq_to_desc(parent_irq); - set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer); + irq_set_chained_handler(parent_irq, s3c_irq_demux_vic_timer); + irq_set_handler_data(parent_irq, (void *)timer_irq); - set_irq_chip(timer_irq, &s3c_irq_timer); - set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0))); - set_irq_handler(timer_irq, handle_level_irq); + irq_set_chip_and_handler(timer_irq, &s3c_irq_timer, handle_level_irq); + irq_set_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0))); set_irq_flags(timer_irq, IRQF_VALID); - - desc->irq_data.handler_data = (void *)timer_irq; } diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c index 2e09b6a..dc81403 100644 --- a/arch/arm/plat-samsung/wakeup-mask.c +++ b/arch/arm/plat-samsung/wakeup-mask.c @@ -22,7 +22,7 @@ void samsung_sync_wakemask(void __iomem *reg, struct samsung_wakeup_mask *mask, int nr_mask) { - struct irq_desc *desc; + struct irq_data *data; u32 val; val = __raw_readl(reg); @@ -33,10 +33,10 @@ void samsung_sync_wakemask(void __iomem *reg, continue; } - desc = irq_to_desc(mask->irq); + data = irq_get_irq_data(mask->irq); - /* bit of a liberty to read this directly from irq_desc. */ - if (desc->wake_depth > 0) + /* bit of a liberty to read this directly from irq_data. */ + if (irqd_is_wakeup_set(data)) val &= ~mask->bit; else val |= mask->bit; -- cgit v0.10.2 From e0fc5b3226cc5668afc8a1277f79a271ec5ffcb5 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:38:17 +0100 Subject: arm: stmp3xxx: Use generic_handle_irq() Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c index 66d5bac..c9c38e8 100644 --- a/arch/arm/plat-stmp3xxx/pinmux.c +++ b/arch/arm/plat-stmp3xxx/pinmux.c @@ -495,8 +495,7 @@ static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc) while (stat) { if (stat & 1) - irq_desc[gpio_irq].handle_irq(gpio_irq, - &irq_desc[gpio_irq]); + generic_handle_irq(gpio_irq); gpio_irq++; stat >>= 1; } -- cgit v0.10.2 From d1118f68b66ef6e0f36c9887c504462f2ec02d0d Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:38:50 +0100 Subject: arm: nomadik: Use local irq state Store the enabled mask in the local state, so there is no need to fiddle in the irq descriptor. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 6436ba5..1b402a8 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -54,6 +54,7 @@ struct nmk_gpio_chip { u32 rwimsc; u32 fwimsc; u32 slpm; + u32 enabled; }; static struct nmk_gpio_chip * @@ -557,6 +558,11 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable) if (!nmk_chip) return -EINVAL; + if (enable) + nmk_chip->enabled |= bitmask; + else + nmk_chip->enabled &= ~bitmask; + spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); @@ -583,8 +589,6 @@ static void nmk_gpio_irq_unmask(struct irq_data *d) static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { - struct irq_desc *desc = irq_to_desc(d->irq); - bool enabled = !(desc->status & IRQ_DISABLED); struct nmk_gpio_chip *nmk_chip; unsigned long flags; u32 bitmask; @@ -599,7 +603,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) spin_lock_irqsave(&nmk_gpio_slpm_lock, flags); spin_lock(&nmk_chip->lock); - if (!enabled) + if (!(nmk_chip->enabled & bitmask)) __nmk_gpio_set_wake(nmk_chip, gpio, on); if (on) @@ -615,9 +619,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) { - struct irq_desc *desc = irq_to_desc(d->irq); - bool enabled = !(desc->status & IRQ_DISABLED); - bool wake = desc->wake_depth; + bool enabled, wake = irqd_is_wakeup_set(d); int gpio; struct nmk_gpio_chip *nmk_chip; unsigned long flags; @@ -634,6 +636,8 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) if (type & IRQ_TYPE_LEVEL_LOW) return -EINVAL; + enabled = nmk_chip->enabled & bitmask; + spin_lock_irqsave(&nmk_chip->lock, flags); if (enabled) -- cgit v0.10.2 From 8c04a1769f9efa6e072114229b1714ddc0c86ad1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:40:15 +0100 Subject: arm: plat-omap: Cleanup irq_desc access 1) Core code stores the flow type already 2) Flow type is accessible in irq_data Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 08af188..af07333 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -755,12 +755,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) bank = irq_data_get_irq_chip_data(d); spin_lock_irqsave(&bank->lock, flags); retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); - if (retval == 0) { - struct irq_desc *desc = irq_to_desc(d->irq); - - desc->status &= ~IRQ_TYPE_SENSE_MASK; - desc->status |= type; - } spin_unlock_irqrestore(&bank->lock, flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) @@ -1270,8 +1264,7 @@ static void gpio_unmask_irq(struct irq_data *d) unsigned int gpio = d->irq - IH_GPIO_BASE; struct gpio_bank *bank = irq_data_get_irq_chip_data(d); unsigned int irq_mask = 1 << get_gpio_index(gpio); - struct irq_desc *desc = irq_to_desc(d->irq); - u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK; + u32 trigger = irqd_get_trigger_type(d); if (trigger) _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); -- cgit v0.10.2 From 70c4fa2265dde6570fe5bd300fe56986190d7c8c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:41:27 +0100 Subject: arm: msm: Use proper irq accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c index 394689a..e00e4de 100644 --- a/arch/arm/mach-msm/gpio-v2.c +++ b/arch/arm/mach-msm/gpio-v2.c @@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) if (flow_type & IRQ_TYPE_EDGE_BOTH) { bits |= BIT(INTR_DECT_CTL); - irq_desc[irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(d->irq, handle_edge_irq); if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) __set_bit(gpio, msm_gpio.dual_edge_irqs); else __clear_bit(gpio, msm_gpio.dual_edge_irqs); } else { bits &= ~BIT(INTR_DECT_CTL); - irq_desc[irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(d->irq, handle_level_irq); __clear_bit(gpio, msm_gpio.dual_edge_irqs); } diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index 176af9d..448f267 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c @@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) val = readl(msm_chip->regs.int_edge); if (flow_type & IRQ_TYPE_EDGE_BOTH) { writel(val | mask, msm_chip->regs.int_edge); - irq_desc[d->irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(d->irq, handle_edge_irq); } else { writel(val & ~mask, msm_chip->regs.int_edge); - irq_desc[d->irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(d->irq, handle_level_irq); } if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { msm_chip->both_edge_detect |= mask; diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c index 68c28bb..84b8103 100644 --- a/arch/arm/mach-msm/irq-vic.c +++ b/arch/arm/mach-msm/irq-vic.c @@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) type = msm_irq_shadow_reg[index].int_type; if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { type |= b; - irq_desc[d->irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(d->irq, handle_edge_irq); } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { type &= ~b; - irq_desc[d->irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(d->irq, handle_level_irq); } writel(type, treg); msm_irq_shadow_reg[index].int_type = type; diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 0b27d89..8033c6a 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { writel(readl(treg) | b, treg); - irq_desc[d->irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(d->irq, handle_edge_irq); } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { writel(readl(treg) & (~b), treg); - irq_desc[d->irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(d->irq, handle_level_irq); } return 0; } diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c index 11b54c7..cfab1c4 100644 --- a/arch/arm/mach-msm/sirc.c +++ b/arch/arm/mach-msm/sirc.c @@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type) val = readl(sirc_regs.int_type); if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { val |= mask; - irq_desc[d->irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(d->irq, handle_edge_irq); } else { val &= ~mask; - irq_desc[d->irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(d->irq, handle_level_irq); } writel(val, sirc_regs.int_type); -- cgit v0.10.2 From ce4ed256b8c2e67f6743cdb9a5ac1904ff9d2f0d Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:42:50 +0100 Subject: arm: vt8500: Use proper irq accessors Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c index 5f4ddde..cba4695 100644 --- a/arch/arm/mach-vt8500/irq.c +++ b/arch/arm/mach-vt8500/irq.c @@ -97,15 +97,15 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) return -EINVAL; case IRQF_TRIGGER_HIGH: dctr |= VT8500_TRIGGER_HIGH; - irq_desc[orig_irq].handle_irq = handle_level_irq; + __irq_set_handler_locked(orig_irq, handle_level_irq); break; case IRQF_TRIGGER_FALLING: dctr |= VT8500_TRIGGER_FALLING; - irq_desc[orig_irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(orig_irq, handle_edge_irq); break; case IRQF_TRIGGER_RISING: dctr |= VT8500_TRIGGER_RISING; - irq_desc[orig_irq].handle_irq = handle_edge_irq; + __irq_set_handler_locked(orig_irq, handle_edge_irq); break; } writeb(dctr, base + VT8500_IC_DCTR + irq); -- cgit v0.10.2 From eb2d7188f9bf68523248c45f4986313011389f5f Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:43:25 +0100 Subject: arm: mxc: Use generic_handle_irq() Signed-off-by: Thomas Gleixner diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index c856fa3..8a2fb70 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c @@ -100,14 +100,9 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) expio_irq = MXC_BOARD_IRQ_START; for (; int_valid != 0; int_valid >>= 1, expio_irq++) { - struct irq_desc *d; if ((int_valid & 1) == 0) continue; - d = irq_desc + expio_irq; - if (unlikely(!(d->handle_irq))) - pr_err("\nEXPIO irq: %d unhandled\n", expio_irq); - else - d->handle_irq(expio_irq, d); + generic_handle_irq(expio_irq); } desc->irq_data.chip->irq_ack(&desc->irq_data); -- cgit v0.10.2 From a0b0f5ac7816672534f3839672c38f027158b81f Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:44:54 +0100 Subject: arm: gemini: Use proper irq accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index fa3d333..c999b16 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c @@ -127,8 +127,8 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type) static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) { + unsigned int port = (unsigned int)irq_desc_get_handler_data(desc); unsigned int gpio_irq_no, irq_stat; - unsigned int port = (unsigned int)get_irq_data(irq); irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); @@ -138,9 +138,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) if ((irq_stat & 1) == 0) continue; - BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); - irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, - &irq_desc[gpio_irq_no]); + generic_handle_irq(gpio_irq_no); } } -- cgit v0.10.2 From d1735a2ebd8868ee9b5bb419860e633f0f839042 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:45:56 +0100 Subject: arm: ep93xx: Use proper irq accessor functions No need to write the flow type. Core code does already. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 34e071d..6e7bbf7 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -117,7 +117,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d) int port = line >> 3; int port_mask = 1 << (line & 7); - if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { + if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) { gpio_int_type2[port] ^= port_mask; /* switch edge direction */ ep93xx_gpio_update_int_params(port); } @@ -131,7 +131,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) int port = line >> 3; int port_mask = 1 << (line & 7); - if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) + if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) gpio_int_type2[port] ^= port_mask; /* switch edge direction */ gpio_int_unmasked[port] &= ~port_mask; @@ -165,10 +165,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d) */ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) { - struct irq_desc *desc = irq_desc + d->irq; const int gpio = irq_to_gpio(d->irq); const int port = gpio >> 3; const int port_mask = 1 << (gpio & 7); + irq_flow_handler_t handler; gpio_direction_input(gpio); @@ -176,22 +176,22 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_RISING: gpio_int_type1[port] |= port_mask; gpio_int_type2[port] |= port_mask; - desc->handle_irq = handle_edge_irq; + handler = handle_edge_irq; break; case IRQ_TYPE_EDGE_FALLING: gpio_int_type1[port] |= port_mask; gpio_int_type2[port] &= ~port_mask; - desc->handle_irq = handle_edge_irq; + handler = handle_edge_irq; break; case IRQ_TYPE_LEVEL_HIGH: gpio_int_type1[port] &= ~port_mask; gpio_int_type2[port] |= port_mask; - desc->handle_irq = handle_level_irq; + handler = handle_level_irq; break; case IRQ_TYPE_LEVEL_LOW: gpio_int_type1[port] &= ~port_mask; gpio_int_type2[port] &= ~port_mask; - desc->handle_irq = handle_level_irq; + handler = handle_level_irq; break; case IRQ_TYPE_EDGE_BOTH: gpio_int_type1[port] |= port_mask; @@ -200,17 +200,16 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) gpio_int_type2[port] &= ~port_mask; /* falling */ else gpio_int_type2[port] |= port_mask; /* rising */ - desc->handle_irq = handle_edge_irq; + handler = handle_edge_irq; break; default: pr_err("failed to set irq type %d for gpio %d\n", type, gpio); return -EINVAL; } - gpio_int_enabled[port] |= port_mask; + __irq_set_handler_locked(d->irq, handler); - desc->status &= ~IRQ_TYPE_SENSE_MASK; - desc->status |= type & IRQ_TYPE_SENSE_MASK; + gpio_int_enabled[port] |= port_mask; ep93xx_gpio_update_int_params(port); -- cgit v0.10.2 From 5093aec872e5be7a55d8dd2b639e8a3818dc19db Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:47:04 +0100 Subject: arm: davinci: Cleanup irq chip code Make use of the new functionality which ensures that irq_set_type is called with the chip masked. Unmask is only done when the interrupt is not disabled. Retrieve the trigger type from irq_data in unmask Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index 20d66e5..f33d438 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -218,7 +218,7 @@ static void gpio_irq_enable(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); u32 mask = (u32) irq_data_get_irq_data(d); - unsigned status = irq_desc[d->irq].status; + unsigned status = irqd_get_trigger_type(d); status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (!status) @@ -238,16 +238,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned trigger) if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; - irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK; - irq_desc[d->irq].status |= trigger; - - /* don't enable the IRQ if it's currently disabled */ - if (irq_desc[d->irq].depth == 0) { - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) - ? &g->set_falling : &g->clr_falling); - __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) - ? &g->set_rising : &g->clr_rising); - } return 0; } @@ -256,6 +246,7 @@ static struct irq_chip gpio_irqchip = { .irq_enable = gpio_irq_enable, .irq_disable = gpio_irq_disable, .irq_set_type = gpio_irq_type, + .flags = IRQCHIP_SET_TYPE_MASKED, }; static void @@ -395,7 +386,7 @@ static int __init davinci_gpio_irq_setup(void) /* AINTC handles mask/unmask; GPIO handles triggering */ irq = bank_irq; - gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); + gpio_irqchip_unbanked = *irq_get_chip(irq); gpio_irqchip_unbanked.name = "GPIO-AINTC"; gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; @@ -409,7 +400,7 @@ static int __init davinci_gpio_irq_setup(void) set_irq_chip(irq, &gpio_irqchip_unbanked); set_irq_data(irq, (void *) __gpio_mask(gpio)); set_irq_chip_data(irq, (__force void *) g); - irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH; + irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); } goto done; -- cgit v0.10.2 From ac93cdbd6e5e2547a031e2739e0dd445824bf1c8 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:48:18 +0100 Subject: arm: at91: Cleanup irq chip Avoid the whole lazy disable dance in the demux handler by providing a irq_disable() callback. Use the proper accessor functions and tidy up gpio_irq_handler() Signed-off-by: Thomas Gleixner diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 5abcfc0..6fd8248 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -375,6 +375,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) static struct irq_chip gpio_irqchip = { .name = "GPIO", + .irq_disable = gpio_irq_mask, .irq_mask = gpio_irq_mask, .irq_unmask = gpio_irq_unmask, .irq_set_type = gpio_irq_type, @@ -384,16 +385,14 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { unsigned pin; - struct irq_desc *gpio; - struct at91_gpio_chip *at91_gpio; - void __iomem *pio; + struct irq_data *idata = irq_desc_get_irq_data(desc); + struct irq_chip *chip = irq_data_get_irq_chip(idata); + struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); + void __iomem *pio = at91_gpio->regbase; u32 isr; - at91_gpio = get_irq_chip_data(irq); - pio = at91_gpio->regbase; - /* temporarily mask (level sensitive) parent IRQ */ - desc->irq_data.chip->irq_ack(&desc->irq_data); + chip->irq_ack(idata); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need @@ -409,27 +408,15 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) } pin = at91_gpio->chip.base; - gpio = &irq_desc[pin]; while (isr) { - if (isr & 1) { - if (unlikely(gpio->depth)) { - /* - * The core ARM interrupt handler lazily disables IRQs so - * another IRQ must be generated before it actually gets - * here to be disabled on the GPIO controller. - */ - gpio_irq_mask(irq_get_irq_data(pin)); - } - else - generic_handle_irq(pin); - } + if (isr & 1) + generic_handle_irq(pin); pin++; - gpio++; isr >>= 1; } } - desc->irq_data.chip->irq_unmask(&desc->irq_data); + chip->irq_unmask(idata); /* now it may re-trigger */ } -- cgit v0.10.2 From fdea77b88ea19525cce3b850f9183286b8a554e0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:48:54 +0100 Subject: arm: gic: Use proper accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index cb6b041..90919d5 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -382,7 +382,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq) unsigned long flags; local_irq_save(flags); - irq_to_desc(irq)->status |= IRQ_NOPROBE; + irq_set_status_flags(irq, IRQ_NOPROBE); gic_unmask_irq(irq_get_irq_data(irq)); local_irq_restore(flags); } -- cgit v0.10.2 From cf0d6b76c11b565f8d8b7d527d17b9f82eb3b3a5 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:33:40 +0100 Subject: arm: dove: Use proper irq accessor functions Remove the obsolete desc_handle_irq() helper. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/include/asm/hw_irq.h b/arch/arm/include/asm/hw_irq.h index 5586b7c..a71b417 100644 --- a/arch/arm/include/asm/hw_irq.h +++ b/arch/arm/include/asm/hw_irq.h @@ -10,14 +10,6 @@ static inline void ack_bad_irq(int irq) irq_err_count++; } -/* - * Obsolete inline function for calling irq descriptor handlers. - */ -static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc) -{ - desc->handle_irq(irq, desc); -} - void set_irq_flags(unsigned int irq, unsigned int flags); #define IRQF_VALID (1 << 0) diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index 101707f..aac6e23 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -86,8 +86,7 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) if (!(cause & (1 << irq))) continue; irq = pmu_to_irq(irq); - desc = irq_desc + irq; - desc_handle_irq(irq, desc); + generic_handle_irq(irq); } } @@ -124,7 +123,7 @@ void __init dove_init_irq(void) for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { set_irq_chip(i, &pmu_irq_chip); set_irq_handler(i, handle_level_irq); - irq_desc[i].status |= IRQ_LEVEL; + irq_set_status_flags(i, IRQ_LEVEL); set_irq_flags(i, IRQF_VALID); } set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); -- cgit v0.10.2 From 25a5662a13e604d86b0a9fd71703582a7393d8ec Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 12:02:11 +0100 Subject: arm: Use generic show_interrupts() Use the generic version and just keep the arch specific output. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index efe06e0..7c0effb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -28,6 +28,7 @@ config ARM select HAVE_C_RECORDMCOUNT select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ + select GENERIC_IRQ_SHOW help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 9b3a6d8..83bbad0 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -51,63 +51,18 @@ unsigned long irq_err_count; -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, cpu; - struct irq_desc *desc; - struct irqaction * action; - unsigned long flags; - int prec, n; - - for (prec = 3, n = 1000; prec < 10 && n <= nr_irqs; prec++) - n *= 10; - -#ifdef CONFIG_SMP - if (prec < 4) - prec = 4; -#endif - - if (i == 0) { - char cpuname[12]; - - seq_printf(p, "%*s ", prec, ""); - for_each_present_cpu(cpu) { - sprintf(cpuname, "CPU%d", cpu); - seq_printf(p, " %10s", cpuname); - } - seq_putc(p, '\n'); - } - - if (i < nr_irqs) { - desc = irq_to_desc(i); - raw_spin_lock_irqsave(&desc->lock, flags); - action = desc->action; - if (!action) - goto unlock; - - seq_printf(p, "%*d: ", prec, i); - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); - seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-"); - seq_printf(p, " %s", action->name); - for (action = action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -unlock: - raw_spin_unlock_irqrestore(&desc->lock, flags); - } else if (i == nr_irqs) { #ifdef CONFIG_FIQ - show_fiq_list(p, prec); + show_fiq_list(p, prec); #endif #ifdef CONFIG_SMP - show_ipi_list(p, prec); + show_ipi_list(p, prec); #endif #ifdef CONFIG_LOCAL_TIMERS - show_local_irqs(p, prec); + show_local_irqs(p, prec); #endif - seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); - } + seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); return 0; } -- cgit v0.10.2 From 6845664a6a7d443f03883db59d10749d38d98b8e Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 13:25:22 +0100 Subject: arm: Cleanup the irq namespace Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 90919d5..50d5b20 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { - struct gic_chip_data *chip_data = get_irq_data(irq); - struct irq_chip *chip = get_irq_chip(irq); + struct gic_chip_data *chip_data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_get_chip(irq); unsigned int cascade_irq, gic_irq; unsigned long status; @@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) { if (gic_nr >= MAX_GIC_NR) BUG(); - if (set_irq_data(irq, &gic_data[gic_nr]) != 0) + if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0) BUG(); - set_irq_chained_handler(irq, gic_handle_cascade_irq); + irq_set_chained_handler(irq, gic_handle_cascade_irq); } static void __init gic_dist_init(struct gic_chip_data *gic, @@ -319,9 +319,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic, * Setup the Linux IRQ subsystem. */ for (i = irq_start; i < irq_limit; i++) { - set_irq_chip(i, &gic_chip); - set_irq_chip_data(i, gic); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &gic_chip); + irq_set_chip_data(i, gic); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index fcddd48..c815d00 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -88,8 +88,8 @@ void it8152_init_irq(void) __raw_writel((0), IT8152_INTC_LDCNIRR); for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { - set_irq_chip(irq, &it8152_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &it8152_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index a026a6b..ea18b35 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = { static void locomo_handler(unsigned int irq, struct irq_desc *desc) { - struct locomo *lchip = get_irq_chip_data(irq); + struct locomo *lchip = irq_get_chip_data(irq); int req, i; /* Acknowledge the parent IRQ */ @@ -197,15 +197,15 @@ static void locomo_setup_irq(struct locomo *lchip) /* * Install handler for IRQ_LOCOMO_HW. */ - set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); - set_irq_chip_data(lchip->irq, lchip); - set_irq_chained_handler(lchip->irq, locomo_handler); + irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); + irq_set_chip_data(lchip->irq, lchip); + irq_set_chained_handler(lchip->irq, locomo_handler); /* Install handlers for IRQ_LOCOMO_* */ for ( ; irq <= lchip->irq_base + 3; irq++) { - set_irq_chip(irq, &locomo_chip); - set_irq_chip_data(irq, lchip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &locomo_chip); + irq_set_chip_data(irq, lchip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } @@ -476,8 +476,8 @@ static void __locomo_remove(struct locomo *lchip) device_for_each_child(lchip->dev, NULL, locomo_remove_child); if (lchip->irq != NO_IRQ) { - set_irq_chained_handler(lchip->irq, NULL); - set_irq_data(lchip->irq, NULL); + irq_set_chained_handler(lchip->irq, NULL); + irq_set_handler_data(lchip->irq, NULL); } iounmap(lchip->base); diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index eb9796b..11ab3c2 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -202,7 +202,7 @@ static void sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) { unsigned int stat0, stat1, i; - struct sa1111 *sachip = get_irq_data(irq); + struct sa1111 *sachip = irq_get_handler_data(irq); void __iomem *mapbase = sachip->base + SA1111_INTC; stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); @@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip) sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { - set_irq_chip(irq, &sa1111_low_chip); - set_irq_chip_data(irq, sachip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &sa1111_low_chip); + irq_set_chip_data(irq, sachip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { - set_irq_chip(irq, &sa1111_high_chip); - set_irq_chip_data(irq, sachip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &sa1111_high_chip); + irq_set_chip_data(irq, sachip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* * Register SA1111 interrupt */ - set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); - set_irq_data(sachip->irq, sachip); - set_irq_chained_handler(sachip->irq, sa1111_irq_handler); + irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); + irq_set_handler_data(sachip->irq, sachip); + irq_set_chained_handler(sachip->irq, sa1111_irq_handler); } /* @@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip) clk_disable(sachip->clk); if (sachip->irq != NO_IRQ) { - set_irq_chained_handler(sachip->irq, NULL); - set_irq_data(sachip->irq, NULL); + irq_set_chained_handler(sachip->irq, NULL); + irq_set_handler_data(sachip->irq, NULL); release_mem_region(sachip->phys + SA1111_INTC, 512); } diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index ae5fe72..297078b 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base, if (vic_sources & (1 << i)) { unsigned int irq = irq_start + i; - set_irq_chip(irq, &vic_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &vic_chip); + irq_set_chip_data(irq, base); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 2ad62df..a9690f1 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type) */ if (slot < 8) { ec->irq = 32 + slot; - set_irq_chip(ec->irq, &ecard_chip); - set_irq_handler(ec->irq, handle_level_irq); + irq_set_chip(ec->irq, &ecard_chip); + irq_set_handler(ec->irq, handle_level_irq); set_irq_flags(ec->irq, IRQF_VALID); } @@ -1103,7 +1103,7 @@ static int __init ecard_init(void) irqhw = ecard_probeirqhw(); - set_irq_chained_handler(IRQ_EXPANSIONCARD, + irq_set_chained_handler(IRQ_EXPANSIONCARD, irqhw ? ecard_irqexp_handler : ecard_irq_handler); ecard_proc_init(); diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index d1f775e..9ffbf3a 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c @@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) return; if (cpu_is_at91cap9_revB()) - set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { @@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = { void __init at91_add_device_usba(struct usba_platform_data *data) { if (cpu_is_at91cap9_revB()) { - set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | AT91_MATRIX_UDPHS_BYPASS_LOCK); } @@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) return; if (cpu_is_at91cap9_revB()) - set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 6fd8248..8512b79 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) else wakeups[bank] &= ~mask; - set_irq_wake(gpio_chip[bank].bank->id, state); + irq_set_irq_wake(gpio_chip[bank].bank->id, state); return 0; } @@ -511,8 +511,8 @@ void __init at91_gpio_irq_setup(void) * Can use the "simple" and not "edge" handler since it's * shorter, and the AIC handles interrupts sanely. */ - set_irq_chip(pin, &gpio_irqchip); - set_irq_handler(pin, handle_simple_irq); + irq_set_chip(pin, &gpio_irqchip); + irq_set_handler(pin, handle_simple_irq); set_irq_flags(pin, IRQF_VALID); } @@ -523,8 +523,8 @@ void __init at91_gpio_irq_setup(void) if (prev && prev->next == this) continue; - set_irq_chip_data(id, this); - set_irq_chained_handler(id, gpio_irq_handler); + irq_set_chip_data(id, this); + irq_set_chained_handler(id, gpio_irq_handler); } pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); } diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index b56d6b3a..566cec1 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -143,8 +143,8 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) /* Active Low interrupt, with the specified priority */ at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - set_irq_chip(i, &at91_aic_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &at91_aic_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c index 84dcda0..c48feaf 100644 --- a/arch/arm/mach-bcmring/irq.c +++ b/arch/arm/mach-bcmring/irq.c @@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip, unsigned int i; for (i = 0; i < 32; i++) { unsigned int irq = irq_start + i; - set_irq_chip(irq, chip); - set_irq_chip_data(irq, base); + irq_set_chip(irq, chip); + irq_set_chip_data(irq, base); if (vic_sources & (1 << i)) { - set_irq_handler(irq, handle_level_irq); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } @@ -119,9 +119,9 @@ void __init bcmring_init_irq(void) /* special cases */ if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) { - set_irq_handler(IRQ_GPIO0, handle_simple_irq); + irq_set_handler(IRQ_GPIO0, handle_simple_irq); } if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) { - set_irq_handler(IRQ_GPIO1, handle_simple_irq); + irq_set_handler(IRQ_GPIO1, handle_simple_irq); } } diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c index 86da7a1..5c5ec01 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/irq.c @@ -112,13 +112,13 @@ void __init clps711x_init_irq(void) for (i = 0; i < NR_IRQS; i++) { if (INT1_IRQS & (1 << i)) { - set_irq_handler(i, handle_level_irq); - set_irq_chip(i, &int1_chip); + irq_set_handler(i, handle_level_irq); + irq_set_chip(i, &int1_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } if (INT2_IRQS & (1 << i)) { - set_irq_handler(i, handle_level_irq); - set_irq_chip(i, &int2_chip); + irq_set_handler(i, handle_level_irq); + irq_set_chip(i, &int2_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index 9abc80a..f83152d 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c @@ -167,9 +167,9 @@ void __init cp_intc_init(void) /* Set up genirq dispatching for cp_intc */ for (i = 0; i < num_irq; i++) { - set_irq_chip(i, &cp_intc_irq_chip); + irq_set_chip(i, &cp_intc_irq_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - set_irq_handler(i, handle_edge_irq); + irq_set_handler(i, handle_edge_irq); } /* Enable global interrupt */ diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index f33d438..a0b8388 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq) { struct davinci_gpio_regs __iomem *g; - g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq); + g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq); return g; } @@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup); static void gpio_irq_disable(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_data(d); + u32 mask = (u32) irq_data_get_irq_handler_data(d); __raw_writel(mask, &g->clr_falling); __raw_writel(mask, &g->clr_rising); @@ -217,7 +217,7 @@ static void gpio_irq_disable(struct irq_data *d) static void gpio_irq_enable(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_data(d); + u32 mask = (u32) irq_data_get_irq_handler_data(d); unsigned status = irqd_get_trigger_type(d); status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; @@ -233,7 +233,7 @@ static void gpio_irq_enable(struct irq_data *d) static int gpio_irq_type(struct irq_data *d, unsigned trigger) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_data(d); + u32 mask = (u32) irq_data_get_irq_handler_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; @@ -276,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) status >>= 16; /* now demux them to the right lowlevel handler */ - n = (int)get_irq_data(irq); + n = (int)irq_get_handler_data(irq); while (status) { res = ffs(status); n += res; @@ -314,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_data(d); + u32 mask = (u32) irq_data_get_irq_handler_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; @@ -397,9 +397,9 @@ static int __init davinci_gpio_irq_setup(void) /* set the direct IRQs up to use that irqchip */ for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { - set_irq_chip(irq, &gpio_irqchip_unbanked); - set_irq_data(irq, (void *) __gpio_mask(gpio)); - set_irq_chip_data(irq, (__force void *) g); + irq_set_chip(irq, &gpio_irqchip_unbanked); + irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); + irq_set_chip_data(irq, (__force void *)g); irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); } @@ -421,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void) __raw_writel(~0, &g->clr_rising); /* set up all irqs in this bank */ - set_irq_chained_handler(bank_irq, gpio_irq_handler); - set_irq_chip_data(bank_irq, (__force void *) g); - set_irq_data(bank_irq, (void *) irq); + irq_set_chained_handler(bank_irq, gpio_irq_handler); + irq_set_chip_data(bank_irq, (__force void *)g); + irq_set_handler_data(bank_irq, (void *)irq); for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { - set_irq_chip(irq, &gpio_irqchip); - set_irq_chip_data(irq, (__force void *) g); - set_irq_data(irq, (void *) __gpio_mask(gpio)); - set_irq_handler(irq, handle_simple_irq); + irq_set_chip(irq, &gpio_irqchip); + irq_set_chip_data(irq, (__force void *)g); + irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); + irq_set_handler(irq, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 5e05c9b..e6269a6 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -154,11 +154,11 @@ void __init davinci_irq_init(void) /* set up genirq dispatch for ARM INTC */ for (i = 0; i < davinci_soc_info.intc_irq_num; i++) { - set_irq_chip(i, &davinci_irq_chip_0); + irq_set_chip(i, &davinci_irq_chip_0); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); if (i != IRQ_TINT1_TINT34) - set_irq_handler(i, handle_edge_irq); + irq_set_handler(i, handle_edge_irq); else - set_irq_handler(i, handle_level_irq); + irq_set_handler(i, handle_level_irq); } } diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index aac6e23..f038a19 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -102,14 +102,14 @@ void __init dove_init_irq(void) */ orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, IRQ_DOVE_GPIO_START); - set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); + irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, IRQ_DOVE_GPIO_START + 32); - set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); + irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0, IRQ_DOVE_GPIO_START + 64); @@ -121,10 +121,10 @@ void __init dove_init_irq(void) writel(0, PMU_INTERRUPT_CAUSE); for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { - set_irq_chip(i, &pmu_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &pmu_irq_chip); + irq_set_handler(i, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); set_irq_flags(i, IRQF_VALID); } - set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); + irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); } diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 7df083f..caf6cba 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void) local_irq_restore(flags); for (irq = 0; irq < NR_IRQS; irq++) { - set_irq_chip(irq, &ebsa110_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ebsa110_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 6e7bbf7..7da0a5c 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -231,20 +231,29 @@ void __init ep93xx_gpio_init_irq(void) for (gpio_irq = gpio_to_irq(0); gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { - set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); - set_irq_handler(gpio_irq, handle_level_irq); + irq_set_chip(gpio_irq, &ep93xx_gpio_irq_chip); + irq_set_handler(gpio_irq, handle_level_irq); set_irq_flags(gpio_irq, IRQF_VALID); } - set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler); - set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO_AB, + ep93xx_gpio_ab_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX, + ep93xx_gpio_f_irq_handler); + irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX, + ep93xx_gpio_f_irq_handler); } diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c index 31618d9..0c18080 100644 --- a/arch/arm/mach-exynos4/irq-combiner.c +++ b/arch/arm/mach-exynos4/irq-combiner.c @@ -54,8 +54,8 @@ static void combiner_unmask_irq(struct irq_data *data) static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { - struct combiner_chip_data *chip_data = get_irq_data(irq); - struct irq_chip *chip = get_irq_chip(irq); + struct combiner_chip_data *chip_data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_get_chip(irq); unsigned int cascade_irq, combiner_irq; unsigned long status; @@ -93,9 +93,9 @@ void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) { if (combiner_nr >= MAX_COMBINER_NR) BUG(); - if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0) + if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) BUG(); - set_irq_chained_handler(irq, combiner_handle_cascade_irq); + irq_set_chained_handler(irq, combiner_handle_cascade_irq); } void __init combiner_init(unsigned int combiner_nr, void __iomem *base, @@ -119,9 +119,9 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base, for (i = irq_start; i < combiner_data[combiner_nr].irq_offset + MAX_IRQ_IN_COMBINER; i++) { - set_irq_chip(i, &combiner_chip); - set_irq_chip_data(i, &combiner_data[combiner_nr]); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &combiner_chip); + irq_set_chip_data(i, &combiner_data[combiner_nr]); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c index 4f7ad4a..0441dfc 100644 --- a/arch/arm/mach-exynos4/irq-eint.c +++ b/arch/arm/mach-exynos4/irq-eint.c @@ -190,8 +190,8 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) { - u32 *irq_data = get_irq_data(irq); - struct irq_chip *chip = get_irq_chip(irq); + u32 *irq_data = irq_get_handler_data(irq); + struct irq_chip *chip = irq_get_chip(irq); chip->irq_mask(&desc->irq_data); @@ -208,18 +208,19 @@ int __init exynos4_init_irq_eint(void) int irq; for (irq = 0 ; irq <= 31 ; irq++) { - set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint); - set_irq_handler(IRQ_EINT(irq), handle_level_irq); + irq_set_chip(IRQ_EINT(irq), &exynos4_irq_eint); + irq_set_handler(IRQ_EINT(irq), handle_level_irq); set_irq_flags(IRQ_EINT(irq), IRQF_VALID); } - set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); + irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); for (irq = 0 ; irq <= 15 ; irq++) { eint0_15_data[irq] = IRQ_EINT(irq); - set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]); - set_irq_chained_handler(exynos4_get_irq_nr(irq), + irq_set_handler_data(exynos4_get_irq_nr(irq), + &eint0_15_data[irq]); + irq_set_chained_handler(exynos4_get_irq_nr(irq), exynos4_irq_eint0_15); } diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 84c5f25..06239f9 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -102,8 +102,8 @@ static void __init __fb_init_irq(void) *CSR_FIQ_DISABLE = -1; for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { - set_irq_chip(irq, &fb_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &fb_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c index de7a5cb..0bc528e 100644 --- a/arch/arm/mach-footbridge/isa-irq.c +++ b/arch/arm/mach-footbridge/isa-irq.c @@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq) if (host_irq != (unsigned int)-1) { for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { - set_irq_chip(irq, &isa_lo_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &isa_lo_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { - set_irq_chip(irq, &isa_hi_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &isa_hi_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } @@ -166,7 +166,7 @@ void __init isa_init_irq(unsigned int host_irq) request_resource(&ioport_resource, &pic2_resource); setup_irq(IRQ_ISA_CASCADE, &irq_cascade); - set_irq_chained_handler(host_irq, isa_irq_handler); + irq_set_chained_handler(host_irq, isa_irq_handler); /* * On the NetWinder, don't automatically diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index c999b16..0e7b56e 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c @@ -217,13 +217,13 @@ void __init gemini_gpio_init(void) for (j = GPIO_IRQ_BASE + i * 32; j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { - set_irq_chip(j, &gpio_irq_chip); - set_irq_handler(j, handle_edge_irq); + irq_set_chip(j, &gpio_irq_chip); + irq_set_handler(j, handle_edge_irq); set_irq_flags(j, IRQF_VALID); } - set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler); - set_irq_data(IRQ_GPIO(i), (void *)i); + irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler); + irq_set_handler_data(IRQ_GPIO(i), (void *)i); } BUG_ON(gpiochip_add(&gemini_gpio_chip)); diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 96bc227..9485a8f 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c @@ -81,13 +81,13 @@ void __init gemini_init_irq(void) request_resource(&iomem_resource, &irq_resource); for (i = 0; i < NR_IRQS; i++) { - set_irq_chip(i, &gemini_irq_chip); + irq_set_chip(i, &gemini_irq_chip); if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) { - set_irq_handler(i, handle_edge_irq); + irq_set_handler(i, handle_edge_irq); mode |= 1 << i; level |= 1 << i; } else { - set_irq_handler(i, handle_level_irq); + irq_set_handler(i, handle_level_irq); } set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index 1f28c90..f118182 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -199,29 +199,29 @@ void __init h720x_init_irq (void) /* Initialize global IRQ's, fast path */ for (irq = 0; irq < NR_GLBL_IRQS; irq++) { - set_irq_chip(irq, &h720x_global_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &h720x_global_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* Initialize multiplexed IRQ's, slow path */ for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { - set_irq_chip(irq, &h720x_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &h720x_gpio_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); - set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); - set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); - set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); + irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); + irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); + irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); + irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); #ifdef CONFIG_CPU_H7202 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { - set_irq_chip(irq, &h720x_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &h720x_gpio_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); + irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); #endif /* Enable multiplexed irq's */ diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index bcf91a5..dd5c72a 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -202,11 +202,11 @@ void __init h7202_init_irq (void) for (irq = IRQ_TIMER1; irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { __mask_timerx_irq(irq); - set_irq_chip(irq, &h7202_timerx_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &h7202_timerx_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); + irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); h720x_init_irq(); } diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index a233470..bc73970 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c @@ -224,15 +224,15 @@ void __init iop13xx_init_irq(void) for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { if (i < 32) - set_irq_chip(i, &iop13xx_irqchip1); + irq_set_chip(i, &iop13xx_irqchip1); else if (i < 64) - set_irq_chip(i, &iop13xx_irqchip2); + irq_set_chip(i, &iop13xx_irqchip2); else if (i < 96) - set_irq_chip(i, &iop13xx_irqchip3); + irq_set_chip(i, &iop13xx_irqchip3); else - set_irq_chip(i, &iop13xx_irqchip4); + irq_set_chip(i, &iop13xx_irqchip4); - set_irq_handler(i, handle_level_irq); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c index c9c02e3..560d5b2 100644 --- a/arch/arm/mach-iop13xx/msi.c +++ b/arch/arm/mach-iop13xx/msi.c @@ -118,7 +118,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) void __init iop13xx_msi_init(void) { - set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); + irq_set_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); } /* @@ -178,7 +178,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) if (irq < 0) return irq; - set_irq_msi(irq, desc); + irq_set_msi_desc(irq, desc); msg.address_hi = 0x0; msg.address_lo = IOP13XX_MU_MIMR_PCI; @@ -187,7 +187,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f); write_msi_msg(irq, &msg); - set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); + irq_set_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); return 0; } diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index d3426a1..2266046 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -68,8 +68,8 @@ void __init iop32x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - set_irq_chip(i, &ext_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &ext_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index 0ff2f74..7b205e9 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -110,8 +110,9 @@ void __init iop33x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, + (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 5fc4e06..98956a1 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void) */ for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { - set_irq_chip(irq, &ixp2000_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp2000_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } @@ -485,21 +485,21 @@ void __init ixp2000_init_irq(void) for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & IXP2000_VALID_ERR_IRQ_MASK) { - set_irq_chip(irq, &ixp2000_err_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp2000_err_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } - set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); + irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { - set_irq_chip(irq, &ixp2000_GPIO_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp2000_GPIO_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); + irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); /* * Enable PCI irqs. The actual PCI[AB] decoding is done in @@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void) */ ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { - set_irq_chip(irq, &ixp2000_pci_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp2000_pci_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 7d90d3f..52f8864 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -158,13 +158,13 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne *board_irq_mask = 0xffffffff; for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) { - set_irq_chip(irq, &ixdp2x00_cpld_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixdp2x00_cpld_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } /* Hook into PCI interrupt */ - set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); + irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); } /************************************************************************* diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 34b1b2a..f1ff50b 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void) for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { if (irq & valid_irq_mask) { - set_irq_chip(irq, &ixdp2x01_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixdp2x01_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else { set_irq_flags(irq, 0); @@ -124,7 +124,7 @@ void __init ixdp2x01_init_irq(void) } /* Hook into PCI interrupts */ - set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); + irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); } diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 9c8a339..f203972 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type) { switch (type) { case IXP23XX_IRQ_LEVEL: - set_irq_chip(irq, &ixp23xx_irq_level_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp23xx_irq_level_chip); + irq_set_handler(irq, handle_level_irq); break; case IXP23XX_IRQ_EDGE: - set_irq_chip(irq, &ixp23xx_irq_edge_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &ixp23xx_irq_edge_chip); + irq_set_handler(irq, handle_edge_irq); break; } set_irq_flags(irq, IRQF_VALID); @@ -324,12 +324,12 @@ void __init ixp23xx_init_irq(void) } for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) { - set_irq_chip(irq, &ixp23xx_pci_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixp23xx_pci_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); + irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); } diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 181116a..720befb 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - set_irq_handler(irq, handle_level_irq); - set_irq_chip(irq, &ixdp2351_inta_chip); + irq_set_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixdp2351_inta_chip); } } @@ -147,13 +147,13 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - set_irq_handler(irq, handle_level_irq); - set_irq_chip(irq, &ixdp2351_intb_chip); + irq_set_handler(irq, handle_level_irq); + irq_set_chip(irq, &ixdp2351_intb_chip); } } - set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); - set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); + irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); + irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); } /* diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index 76c61ba..8fe0c62 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c @@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) static void __init roadrunner_pci_preinit(void) { - set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); - set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); ixp23xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c index 845e1b5..162043f 100644 --- a/arch/arm/mach-ixp4xx/avila-pci.c +++ b/arch/arm/mach-ixp4xx/avila-pci.c @@ -39,10 +39,10 @@ void __init avila_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 9fd8942..eca5590 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void) /* Default to all level triggered */ for(i = 0; i < NR_IRQS; i++) { - set_irq_chip(i, &ixp4xx_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &ixp4xx_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c index b978ea8..37fda7d 100644 --- a/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/arch/arm/mach-ixp4xx/coyote-pci.c @@ -32,8 +32,8 @@ void __init coyote_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c index fa70fed..c761201 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-pci.c +++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c @@ -35,12 +35,12 @@ void __init dsmg600_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c index 5a810c9..44ccde9 100644 --- a/arch/arm/mach-ixp4xx/fsg-pci.c +++ b/arch/arm/mach-ixp4xx/fsg-pci.c @@ -32,9 +32,9 @@ void __init fsg_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c index 7e93a09..fc11241 100644 --- a/arch/arm/mach-ixp4xx/gateway7001-pci.c +++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c @@ -29,8 +29,8 @@ void __init gateway7001_pci_preinit(void) { - set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); - set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index d0e4861..3e8c0e3 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -420,8 +420,8 @@ static void __init gmlr_init(void) gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT); gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN); gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN); - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); set_control(CONTROL_HSS0_DTR_N, 1); set_control(CONTROL_HSS1_DTR_N, 1); @@ -441,10 +441,10 @@ static void __init gmlr_init(void) #ifdef CONFIG_PCI static void __init gmlr_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c index 25d2c33..38cc072 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c @@ -43,8 +43,8 @@ */ void __init gtwx5715_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index 1ba165a..58f4004 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -36,10 +36,10 @@ void __init ixdp425_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c index 4ed7ac6..e64f6d0 100644 --- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c @@ -25,8 +25,8 @@ void __init ixdpg425_pci_preinit(void) { - set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); - set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c index d0cea34..428d120 100644 --- a/arch/arm/mach-ixp4xx/nas100d-pci.c +++ b/arch/arm/mach-ixp4xx/nas100d-pci.c @@ -33,11 +33,11 @@ void __init nas100d_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c index 1eb5a90..2e85f76 100644 --- a/arch/arm/mach-ixp4xx/nslu2-pci.c +++ b/arch/arm/mach-ixp4xx/nslu2-pci.c @@ -32,9 +32,9 @@ void __init nslu2_pci_preinit(void) { - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c index f3111c6..03bdec5 100644 --- a/arch/arm/mach-ixp4xx/vulcan-pci.c +++ b/arch/arm/mach-ixp4xx/vulcan-pci.c @@ -38,8 +38,8 @@ void __init vulcan_pci_preinit(void) pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n", (int)(pci_cardbus_mem_size >> 20)); #endif - set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c index 9b59ed0..17f3cf5 100644 --- a/arch/arm/mach-ixp4xx/wg302v2-pci.c +++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c @@ -29,8 +29,8 @@ void __init wg302v2_pci_preinit(void) { - set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); - set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index cbdb586..05d193a 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -35,14 +35,15 @@ void __init kirkwood_init_irq(void) */ orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0, IRQ_KIRKWOOD_GPIO_START); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0, IRQ_KIRKWOOD_GPIO_START + 32); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, + gpio_irq_handler); } diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c index 55fbf71..31e4565 100644 --- a/arch/arm/mach-ks8695/gpio.c +++ b/arch/arm/mach-ks8695/gpio.c @@ -80,7 +80,7 @@ int ks8695_gpio_interrupt(unsigned int pin, unsigned int type) local_irq_restore(flags); /* Set IRQ triggering type */ - set_irq_type(gpio_irq[pin], type); + irq_set_irq_type(gpio_irq[pin], type); /* enable interrupt mode */ ks8695_gpio_mode(pin, 0); diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c index 7998cca..da54a5d 100644 --- a/arch/arm/mach-ks8695/irq.c +++ b/arch/arm/mach-ks8695/irq.c @@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type) } if (level_triggered) { - set_irq_chip(d->irq, &ks8695_irq_level_chip); - set_irq_handler(d->irq, handle_level_irq); + irq_set_chip(d->irq, &ks8695_irq_level_chip); + irq_set_handler(d->irq, handle_level_irq); } else { - set_irq_chip(d->irq, &ks8695_irq_edge_chip); - set_irq_handler(d->irq, handle_edge_irq); + irq_set_chip(d->irq, &ks8695_irq_edge_chip); + irq_set_handler(d->irq, handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); @@ -158,16 +158,16 @@ void __init ks8695_init_irq(void) case KS8695_IRQ_UART_RX: case KS8695_IRQ_COMM_TX: case KS8695_IRQ_COMM_RX: - set_irq_chip(irq, &ks8695_irq_level_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &ks8695_irq_level_chip); + irq_set_handler(irq, handle_level_irq); break; /* Edge-triggered interrupts */ default: /* clear pending bit */ ks8695_irq_ack(irq_get_irq_data(irq)); - set_irq_chip(irq, &ks8695_irq_edge_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &ks8695_irq_edge_chip); + irq_set_handler(irq, handle_edge_irq); } set_irq_flags(irq, IRQF_VALID); diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index 316ecbf..3088ca3 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c @@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) } /* Ok to use the level handler for all types */ - set_irq_handler(d->irq, handle_level_irq); + irq_set_handler(d->irq, handle_level_irq); return 0; } @@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void) /* Configure supported IRQ's */ for (i = 0; i < NR_IRQS; i++) { - set_irq_chip(i, &lpc32xx_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &lpc32xx_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } @@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void) __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); /* MIC SUBIRQx interrupts will route handling to the chain handlers */ - set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); - set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); + irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); + irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); /* Initially disable all wake events */ __raw_writel(0, LPC32XX_CLKPWR_P01_ER); diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index fa03703..d21c544 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c @@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num) if (chip->irq_ack) chip->irq_ack(d); - set_irq_chip(irq, chip); + irq_set_chip(irq, chip); set_irq_flags(irq, IRQF_VALID); - set_irq_handler(irq, handle_level_irq); + irq_set_handler(irq, handle_level_irq); } } @@ -122,7 +122,7 @@ void __init mmp2_init_icu(void) for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - set_irq_chip(irq, &icu_irq_chip); + irq_set_chip(irq, &icu_irq_chip); set_irq_flags(irq, IRQF_VALID); switch (irq) { @@ -133,7 +133,7 @@ void __init mmp2_init_icu(void) case IRQ_MMP2_SSP_MUX: break; default: - set_irq_handler(irq, handle_level_irq); + irq_set_handler(irq, handle_level_irq); break; } } @@ -149,9 +149,9 @@ void __init mmp2_init_icu(void) init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15); init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2); - set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); - set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); - set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); - set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); - set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); + irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); + irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); + irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); + irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); + irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); } diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c index f86b450..6a86762 100644 --- a/arch/arm/mach-mmp/irq-pxa168.c +++ b/arch/arm/mach-mmp/irq-pxa168.c @@ -48,8 +48,8 @@ void __init icu_init_irq(void) for (irq = 0; irq < 64; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - set_irq_chip(irq, &icu_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &icu_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 1993721..35c7cee 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c @@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void) */ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - set_irq_handler(i, handle_percpu_irq); + irq_set_handler(i, handle_percpu_irq); } } diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index b3c55f1..1163b6f 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c @@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void) */ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - set_irq_handler(i, handle_percpu_irq); + irq_set_handler(i, handle_percpu_irq); } } diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c index 31117a4..ffcd4f3 100644 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ b/arch/arm/mach-msm/board-trout-gpio.c @@ -214,17 +214,17 @@ int __init trout_init_gpio(void) { int i; for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { - set_irq_chip(i, &trout_gpio_irq_chip); - set_irq_handler(i, handle_edge_irq); + irq_set_chip(i, &trout_gpio_irq_chip); + irq_set_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) gpiochip_add(&msm_gpio_banks[i].chip); - set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); - set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); - set_irq_wake(MSM_GPIO_TO_INT(17), 1); + irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); + irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); + irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1); return 0; } diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c index 44be846..f7a9724 100644 --- a/arch/arm/mach-msm/board-trout-mmc.c +++ b/arch/arm/mach-msm/board-trout-mmc.c @@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev) if (IS_ERR(vreg_sdslot)) return PTR_ERR(vreg_sdslot); - set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); + irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); if (!opt_disable_sdcard) msm_add_sdcc(2, &trout_sdslot_data, diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c index e00e4de..997ded1 100644 --- a/arch/arm/mach-msm/gpio-v2.c +++ b/arch/arm/mach-msm/gpio-v2.c @@ -328,12 +328,12 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) if (on) { if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) - set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); + irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); set_bit(gpio, msm_gpio.wake_irqs); } else { clear_bit(gpio, msm_gpio.wake_irqs); if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) - set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); + irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); } return 0; @@ -362,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev) for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); - set_irq_chip(irq, &msm_gpio_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &msm_gpio_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ, + irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ, msm_summary_irq_handler); return 0; } @@ -379,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev) if (ret < 0) return ret; - set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); + irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); return 0; } diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index 448f267..c9e0c61 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c @@ -354,9 +354,9 @@ static int __init msm_init_gpio(void) msm_gpio_chips[j].chip.base + msm_gpio_chips[j].chip.ngpio) j++; - set_irq_chip_data(i, &msm_gpio_chips[j]); - set_irq_chip(i, &msm_gpio_irq_chip); - set_irq_handler(i, handle_edge_irq); + irq_set_chip_data(i, &msm_gpio_chips[j]); + irq_set_chip(i, &msm_gpio_irq_chip); + irq_set_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } @@ -366,10 +366,10 @@ static int __init msm_init_gpio(void) gpiochip_add(&msm_gpio_chips[i].chip); } - set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); - set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); - set_irq_wake(INT_GPIO_GROUP1, 1); - set_irq_wake(INT_GPIO_GROUP2, 2); + irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); + irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); + irq_set_irq_wake(INT_GPIO_GROUP1, 1); + irq_set_irq_wake(INT_GPIO_GROUP2, 2); return 0; } diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c index 84b8103..7a805be 100644 --- a/arch/arm/mach-msm/irq-vic.c +++ b/arch/arm/mach-msm/irq-vic.c @@ -357,8 +357,8 @@ void __init msm_init_irq(void) writel(3, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - set_irq_chip(n, &msm_irq_chip); - set_irq_handler(n, handle_level_irq); + irq_set_chip(n, &msm_irq_chip); + irq_set_handler(n, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 8033c6a..782e805 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -145,8 +145,8 @@ void __init msm_init_irq(void) writel(1, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - set_irq_chip(n, &msm_irq_chip); - set_irq_handler(n, handle_level_irq); + irq_set_chip(n, &msm_irq_chip); + irq_set_handler(n, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c index cfab1c4..276f918 100644 --- a/arch/arm/mach-msm/sirc.c +++ b/arch/arm/mach-msm/sirc.c @@ -158,15 +158,15 @@ void __init msm_init_sirc(void) wake_enable = 0; for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { - set_irq_chip(i, &sirc_irq_chip); - set_irq_handler(i, handle_edge_irq); + irq_set_chip(i, &sirc_irq_chip); + irq_set_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) { - set_irq_chained_handler(sirc_reg_table[i].cascade_irq, + irq_set_chained_handler(sirc_reg_table[i].cascade_irq, sirc_irq_handler); - set_irq_wake(sirc_reg_table[i].cascade_irq, 1); + irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1); } return; } diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 08da497..3e24431 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -38,8 +38,8 @@ void __init mv78xx0_init_irq(void) orion_gpio_init(0, 32, GPIO_VIRT_BASE, mv78xx0_core_index() ? 0x18 : 0, IRQ_MV78XX0_GPIO_START); - set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); + irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); } diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c index 4e4b780..de49452 100644 --- a/arch/arm/mach-mx3/mach-mx31ads.c +++ b/arch/arm/mach-mx3/mach-mx31ads.c @@ -199,12 +199,12 @@ static void __init mx31ads_init_expio(void) __raw_writew(0xFFFF, PBC_INTSTATUS_REG); for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { - set_irq_chip(i, &expio_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &expio_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } - set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); - set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); + irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); + irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); } #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index e83ffad..4a85505 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -212,7 +212,7 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); gpio_direction_input(MBIMX51_TSC2007_GPIO); - set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); + irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); i2c_register_board_info(1, mbimx51_i2c_devices, ARRAY_SIZE(mbimx51_i2c_devices)); diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c index 56fa2ed..a1e01dd 100644 --- a/arch/arm/mach-mxs/gpio.c +++ b/arch/arm/mach-mxs/gpio.c @@ -136,7 +136,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; - struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); + struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq); u32 gpio_irq_no_base = port->virtual_irq_start; desc->irq_data.chip->irq_ack(&desc->irq_data); @@ -265,14 +265,14 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { - set_irq_chip(j, &gpio_irq_chip); - set_irq_handler(j, handle_level_irq); + irq_set_chip(j, &gpio_irq_chip); + irq_set_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } /* setup one handler for each entry */ - set_irq_chained_handler(port[i].irq, mxs_gpio_irq_handler); - set_irq_data(port[i].irq, &port[i]); + irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler); + irq_set_handler_data(port[i].irq, &port[i]); /* register gpio chip */ port[i].chip.direction_input = mxs_gpio_direction_input; diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 0f4c120..ae8a0d9 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -74,8 +74,8 @@ void __init icoll_init_irq(void) mxs_reset_block(icoll_base + HW_ICOLL_CTRL); for (i = 0; i < MXS_INTERNAL_IRQS; i++) { - set_irq_chip(i, &mxs_icoll_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &mxs_icoll_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 29ffa75..783e327 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -171,13 +171,13 @@ void __init netx_init_irq(void) vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { - set_irq_chip(irq, &netx_hif_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &netx_hif_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); - set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); + irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); } static int __init netx_init(void) diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 0c0d524..7e29e4a 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void) __func__); for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { - set_irq_chip(i, &a9m9750dev_fpga_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &a9m9750dev_fpga_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } @@ -118,8 +118,8 @@ void __init board_a9m9750dev_init_irq(void) REGSET(eic, SYS_EIC, LVEDG, LEVEL); __raw_writel(eic, SYS_EIC(2)); - set_irq_chained_handler(IRQ_NS9XXX_EXT2, - a9m9750dev_fpga_demux_handler); + irq_set_chained_handler(IRQ_NS9XXX_EXT2, + a9m9750dev_fpga_demux_handler); } void __init board_a9m9750dev_init_machine(void) diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index bf0fd48..14997e9 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -67,8 +67,8 @@ void __init ns9xxx_init_irq(void) __raw_writel(prio2irq(i), SYS_IVA(i)); for (i = 0; i <= 31; ++i) { - set_irq_chip(i, &ns9xxx_chip); - set_irq_handler(i, handle_fasteoi_irq); + irq_set_chip(i, &ns9xxx_chip); + irq_set_handler(i, handle_fasteoi_irq); set_irq_flags(i, IRQF_VALID); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c index 1f8a05a..fcf1212 100644 --- a/arch/arm/mach-nuc93x/irq.c +++ b/arch/arm/mach-nuc93x/irq.c @@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void) __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) { - set_irq_chip(irqno, &nuc93x_irq_chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &nuc93x_irq_chip); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 7c5e211..e68dfde 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -276,7 +276,7 @@ static void __init osk_init_cf(void) return; } /* the CF I/O IRQ is really active-low */ - set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } static void __init osk_init_irq(void) @@ -482,7 +482,7 @@ static void __init osk_mistral_init(void) omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ gpio_request(4, "ts_int"); gpio_direction_input(4); - set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); spi_register_board_info(mistral_boardinfo, ARRAY_SIZE(mistral_boardinfo)); @@ -500,7 +500,7 @@ static void __init osk_mistral_init(void) int irq = gpio_to_irq(OMAP_MPUIO(2)); gpio_direction_input(OMAP_MPUIO(2)); - set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); #ifdef CONFIG_PM /* share the IRQ in case someone wants to use the * button for more than wakeup from system sleep. diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index d7bbbe7..45f01d2 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c @@ -256,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id) { if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) { printk(KERN_INFO "PM: Power cable connected\n"); - set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), + IRQ_TYPE_EDGE_FALLING); } else { printk(KERN_INFO "PM: Power cable disconnected\n"); - set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), + IRQ_TYPE_EDGE_RISING); } return IRQ_HANDLED; } diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index bdc0ac8..65d2420 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c @@ -279,10 +279,10 @@ static void __init voiceblue_init(void) gpio_request(13, "16C554 irq"); gpio_request(14, "16C554 irq"); gpio_request(15, "16C554 irq"); - set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING); platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); omap_board_config = voiceblue_config; diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 0ace799..cddbf8b 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void) * The touchscreen interrupt is level-sensitive, so * we'll use the regular mask_ack routine for it. */ - set_irq_chip(i, &omap_fpga_irq_ack); + irq_set_chip(i, &omap_fpga_irq_ack); } else { /* * All FPGA interrupts except the touchscreen are * edge-sensitive, so we won't mask them. */ - set_irq_chip(i, &omap_fpga_irq); + irq_set_chip(i, &omap_fpga_irq); } - set_irq_handler(i, handle_edge_irq); + irq_set_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } @@ -183,6 +183,6 @@ void omap1510_fpga_init_irq(void) return; } gpio_direction_input(13); - set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); - set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); + irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); + irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); } diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 731dd33..53dbb5d 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -230,8 +230,8 @@ void __init omap_init_irq(void) irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); omap_irq_set_cfg(j, 0, 0, irq_trigger); - set_irq_chip(j, &omap_irq_chip); - set_irq_handler(j, handle_level_irq); + irq_set_chip(j, &omap_irq_chip); + irq_set_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } } diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 493505c..130034b 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -743,7 +743,7 @@ static int __init gpmc_init(void) /* initalize the irq_chained */ irq = OMAP_GPMC_IRQ_BASE; for (cs = 0; cs < GPMC_CS_NUM; cs++) { - set_irq_chip_and_handler(irq, &dummy_irq_chip, + irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); irq++; diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index bc524b9..4fff5e3 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -223,8 +223,8 @@ void __init omap_init_irq(void) nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); for (i = 0; i < nr_of_irqs; i++) { - set_irq_chip(i, &omap_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &omap_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index c10a117..b7d4591 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield " "to set_irq_type pin %d\n", pin); diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index ed85891..43cf8bc 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -34,8 +34,8 @@ void __init orion5x_init_irq(void) * Initialize gpiolib for GPIOs 0-31. */ orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); - set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); } diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 67ec695..4fc4677 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; if (gpio_request(pin, "PCI IntA") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; if (gpio_request(pin, "PCI IntB") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c index 5653ee6..6160041 100644 --- a/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void) pin = TSP2_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "tsp2_pci_preinit failed " "to set_irq_type pin %d\n", pin); diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 8bbd27e..f0f43e1 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed to " "set_irq_type pin %d\n", pin); @@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed " "to set_irq_type pin %d\n", pin); diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c index c69c180..7608c7a 100644 --- a/arch/arm/mach-pnx4008/irq.c +++ b/arch/arm/mach-pnx4008/irq.c @@ -58,22 +58,22 @@ static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_RISING: __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */ - set_irq_handler(d->irq, handle_edge_irq); + irq_set_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */ - set_irq_handler(d->irq, handle_edge_irq); + irq_set_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_LEVEL_LOW: __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */ - set_irq_handler(d->irq, handle_level_irq); + irq_set_handler(d->irq, handle_level_irq); break; case IRQ_TYPE_LEVEL_HIGH: __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */ - set_irq_handler(d->irq, handle_level_irq); + irq_set_handler(d->irq, handle_level_irq); break; /* IRQ_TYPE_EDGE_BOTH is not supported */ @@ -98,7 +98,7 @@ void __init pnx4008_init_irq(void) /* configure IRQ's */ for (i = 0; i < NR_IRQS; i++) { set_irq_flags(i, IRQF_VALID); - set_irq_chip(i, &pnx4008_irq_chip); + irq_set_chip(i, &pnx4008_irq_chip); pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]); } diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index d2af733..a773b73 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -527,13 +527,13 @@ static void __init balloon3_init_irq(void) pxa27x_init_irq(); /* setup extra Balloon3 irqs */ for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { - set_irq_chip(irq, &balloon3_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &balloon3_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); - set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); + irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); + irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); pr_debug("%s: chained handler installed - irq %d automatically " "enabled\n", __func__, BALLOON3_AUX_NIRQ); diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index a2380cd..8b1a309 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -70,9 +70,10 @@ void __cmx2xx_pci_init_irq(int irq_gpio) cmx2xx_it8152_irq_gpio = irq_gpio; - set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); - set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); + irq_set_chained_handler(gpio_to_irq(irq_gpio), + cmx2xx_it8152_irq_demux); } #ifdef CONFIG_PM diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index bfca7ed..06d0a03 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -765,7 +765,7 @@ static void __init cm_x300_init_da9030(void) { pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); i2c_register_board_info(1, &cm_x300_pmic_info, 1); - set_irq_wake(IRQ_WAKEUP0, 1); + irq_set_irq_wake(IRQ_WAKEUP0, 1); } static void __init cm_x300_init_wi2wi(void) diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 2693e3c..cc7bfc3 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -137,9 +137,9 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn) GEDR0 = 0x3; for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { - set_irq_chip(irq, &pxa_low_gpio_chip); - set_irq_chip_data(irq, irq_base(0)); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &pxa_low_gpio_chip); + irq_set_chip_data(irq, irq_base(0)); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID); } @@ -165,9 +165,9 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i)); irq = PXA_IRQ(i); - set_irq_chip(irq, &pxa_internal_irq_chip); - set_irq_chip_data(irq, base); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &pxa_internal_irq_chip); + irq_set_chip_data(irq, base); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index c9a3e77..a1b0942 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -149,12 +149,12 @@ static void __init lpd270_init_irq(void) /* setup extra LogicPD PXA270 irqs */ for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { - set_irq_chip(irq, &lpd270_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &lpd270_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); - set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); + irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); + irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); } diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index dca20de..061d01b 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -165,13 +165,13 @@ static void __init lubbock_init_irq(void) /* setup extra lubbock irqs */ for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { - set_irq_chip(irq, &lubbock_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &lubbock_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); - set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); + irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); + irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); } #ifdef CONFIG_PM diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index f954222..9ee7032 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -166,8 +166,8 @@ static void __init mainstone_init_irq(void) /* setup extra Mainstone irqs */ for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { - set_irq_chip(irq, &mainstone_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &mainstone_irq_chip); + irq_set_handler(irq, handle_level_irq); if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); else @@ -179,8 +179,8 @@ static void __init mainstone_init_irq(void) MST_INTMSKENA = 0; MST_INTSETCLR = 0; - set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); - set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); + irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); + irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); } #ifdef CONFIG_PM diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 9dbf3cc..6c02b58 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -281,16 +281,16 @@ static void __init pcm990_init_irq(void) /* setup extra PCM990 irqs */ for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { - set_irq_chip(irq, &pcm990_irq_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &pcm990_irq_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ PCM990_INTSETCLR = 0xFF; - set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); - set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); + irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); + irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); } static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index f374247..8abe93f 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -362,8 +362,8 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) int irq; for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { - set_irq_chip(irq, &pxa_ext_wakeup_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &pxa_ext_wakeup_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 1227921..26facf1 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -310,14 +310,14 @@ static void __init viper_init_irq(void) /* setup ISA IRQs */ for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { isa_irq = viper_bit_to_irq(level); - set_irq_chip(isa_irq, &viper_irq_chip); - set_irq_handler(isa_irq, handle_edge_irq); + irq_set_chip(isa_irq, &viper_irq_chip); + irq_set_handler(isa_irq, handle_edge_irq); set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); } - set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), + irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO), viper_irq_handler); - set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH); } /* Flat Panel */ diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 730f51e..a7cdc4a 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -136,22 +136,23 @@ static void __init zeus_init_irq(void) /* Peripheral IRQs. It would be nice to move those inside driver configuration, but it is not supported at the moment. */ - set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING); - set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), IRQ_TYPE_EDGE_FALLING); - set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), + IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING); /* Setup ISA IRQs */ for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { isa_irq = zeus_bit_to_irq(level); - set_irq_chip(isa_irq, &zeus_irq_chip); - set_irq_handler(isa_irq, handle_edge_irq); + irq_set_chip(isa_irq, &zeus_irq_chip); + irq_set_handler(isa_irq, handle_edge_irq); set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); } - set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); - set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler); + irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING); + irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler); } diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index d29cd9b..49fb988 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -133,25 +133,25 @@ void __init rpc_init_irq(void) switch (irq) { case 0 ... 7: - set_irq_chip(irq, &iomd_a_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &iomd_a_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, flags); break; case 8 ... 15: - set_irq_chip(irq, &iomd_b_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &iomd_b_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, flags); break; case 16 ... 21: - set_irq_chip(irq, &iomd_dma_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &iomd_dma_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, flags); break; case 64 ... 71: - set_irq_chip(irq, &iomd_fiq_chip); + irq_set_chip(irq, &iomd_fiq_chip); set_irq_flags(irq, IRQF_VALID); break; } diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 606cb6b..4139f5f 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -147,15 +147,15 @@ static __init int bast_irq_init(void) __raw_writeb(0x0, BAST_VA_PC104_IRQMASK); - set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux); + irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux); /* register our IRQs */ for (i = 0; i < 4; i++) { unsigned int irqno = bast_pc104_irqs[i]; - set_irq_chip(irqno, &bast_pc104_chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &bast_pc104_chip); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index eddb52b..30f79ae 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -175,18 +175,18 @@ static int s3c2412_irq_add(struct sys_device *sysdev) unsigned int irqno; for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { - set_irq_chip(irqno, &s3c2412_irq_eint0t4); - set_irq_handler(irqno, handle_edge_irq); + irq_set_chip(irqno, &s3c2412_irq_eint0t4); + irq_set_handler(irqno, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } /* add demux support for CF/SDI */ - set_irq_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi); + irq_set_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi); for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) { - set_irq_chip(irqno, &s3c2412_irq_cfsdi); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c2412_irq_cfsdi); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } @@ -195,7 +195,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev) s3c2412_irq_rtc_chip = s3c_irq_chip; s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake; - set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); + irq_set_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); return 0; } diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c index 680fe38..de21c84 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c2416/irq.c @@ -202,13 +202,13 @@ static int __init s3c2416_add_sub(unsigned int base, { unsigned int irqno; - set_irq_chip(base, &s3c_irq_level_chip); - set_irq_handler(base, handle_level_irq); - set_irq_chained_handler(base, demux); + irq_set_chip(base, &s3c_irq_level_chip); + irq_set_handler(base, handle_level_irq); + irq_set_chained_handler(base, demux); for (irqno = start; irqno <= end; irqno++) { - set_irq_chip(irqno, chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, chip); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index acad442..0c564b1 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c @@ -100,13 +100,13 @@ static int s3c2440_irq_add(struct sys_device *sysdev) /* add new chained handler for wdt, ac7 */ - set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); - set_irq_handler(IRQ_WDT, handle_level_irq); - set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); + irq_set_chip(IRQ_WDT, &s3c_irq_level_chip); + irq_set_handler(IRQ_WDT, handle_level_irq); + irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { - set_irq_chip(irqno, &s3c_irq_wdtac97); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_wdtac97); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c index 83daf4e..5a48881 100644 --- a/arch/arm/mach-s3c2440/s3c244x-irq.c +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c @@ -95,19 +95,19 @@ static int s3c244x_irq_add(struct sys_device *sysdev) { unsigned int irqno; - set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); - set_irq_handler(IRQ_NFCON, handle_level_irq); + irq_set_chip(IRQ_NFCON, &s3c_irq_level_chip); + irq_set_handler(IRQ_NFCON, handle_level_irq); set_irq_flags(IRQ_NFCON, IRQF_VALID); /* add chained handler for camera */ - set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); - set_irq_handler(IRQ_CAM, handle_level_irq); - set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); + irq_set_chip(IRQ_CAM, &s3c_irq_level_chip); + irq_set_handler(IRQ_CAM, handle_level_irq); + irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam); for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { - set_irq_chip(irqno, &s3c_irq_cam); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_cam); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index c7820f9..b12431f 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c @@ -230,13 +230,13 @@ static int __init s3c2443_add_sub(unsigned int base, { unsigned int irqno; - set_irq_chip(base, &s3c_irq_level_chip); - set_irq_handler(base, handle_level_irq); - set_irq_chained_handler(base, demux); + irq_set_chip(base, &s3c_irq_level_chip); + irq_set_handler(base, handle_level_irq); + irq_set_chained_handler(base, demux); for (irqno = start; irqno <= end; irqno++) { - set_irq_chip(irqno, chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, chip); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c index 2ead818..9a4c7ae 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/irq-eint.c @@ -197,16 +197,16 @@ static int __init s3c64xx_init_irq_eint(void) int irq; for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { - set_irq_chip(irq, &s3c_irq_eint); - set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq)); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &s3c_irq_eint); + irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3); - set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11); - set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19); - set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27); + irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3); + irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11); + irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19); + irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27); return 0; } diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 98d7806..7f3da4b 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -96,7 +96,7 @@ static struct resource cerf_flash_resource = { static void __init cerf_init_irq(void) { sa1100_init_irq(); - set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING); } static struct map_desc cerf_io_desc[] __initdata = { diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 3d85dfa..0f109e1 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -323,28 +323,28 @@ void __init sa1100_init_irq(void) ICCR = 1; for (irq = 0; irq <= 10; irq++) { - set_irq_chip(irq, &sa1100_low_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &sa1100_low_gpio_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = 12; irq <= 31; irq++) { - set_irq_chip(irq, &sa1100_normal_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &sa1100_normal_chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } for (irq = 32; irq <= 48; irq++) { - set_irq_chip(irq, &sa1100_high_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &sa1100_high_gpio_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* * Install handler for GPIO 11-27 edge detect interrupts */ - set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip); - set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); + irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip); + irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler); sa1100_init_gpio(); } diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 4aad01f..b4fa53a 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -145,8 +145,8 @@ static int __devinit neponset_probe(struct platform_device *dev) /* * Install handler for GPIO25. */ - set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); - set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler); + irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); + irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler); /* * We would set IRQ_GPIO25 to be a wake-up IRQ, but @@ -161,9 +161,9 @@ static int __devinit neponset_probe(struct platform_device *dev) * Setup other Neponset IRQs. SA1111 will be done by the * generic SA1111 code. */ - set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq); + irq_set_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq); set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); - set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq); + irq_set_handler(IRQ_NEPONSET_USAR, handle_simple_irq); set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); /* diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 42b8040..65161f2 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -142,7 +142,7 @@ static void __init pleb_map_io(void) GPDR &= ~GPIO_ETH0_IRQ; - set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING); } MACHINE_START(PLEB, "PLEB") diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 831fc66..2e6da5f 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c @@ -80,8 +80,8 @@ void __init shark_init_irq(void) int irq; for (irq = 0; irq < NR_IRQS; irq++) { - set_irq_chip(irq, &fb_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &fb_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index a94f29d..08cc451 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -1255,7 +1255,7 @@ static void __init ap4evb_init(void) gpio_request(GPIO_FN_KEYIN4, NULL); /* enable TouchScreen */ - set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW); tsc_device.irq = IRQ28; i2c_register_board_info(1, &tsc_device, 1); @@ -1311,7 +1311,7 @@ static void __init ap4evb_init(void) lcdc_info.ch[0].lcd_size_cfg.height = 91; /* enable TouchScreen */ - set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); tsc_device.irq = IRQ7; i2c_register_board_info(0, &tsc_device, 1); diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 49bc074..f0d0af1 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -1124,15 +1124,15 @@ static void __init mackerel_init(void) /* enable Keypad */ gpio_request(GPIO_FN_IRQ9_42, NULL); - set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH); /* enable Touchscreen */ gpio_request(GPIO_FN_IRQ7_40, NULL); - set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW); /* enable Accelerometer */ gpio_request(GPIO_FN_IRQ21, NULL); - set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); /* enable SDHI0 */ gpio_request(GPIO_FN_SDHICD0, NULL); diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index 2fe9704..cc442d1 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c @@ -421,7 +421,7 @@ static struct intc_desc intcs_desc __initdata = { static void intcs_demux(unsigned int irq, struct irq_desc *desc) { - void __iomem *reg = (void *)get_irq_data(irq); + void __iomem *reg = (void *)irq_get_handler_data(irq); unsigned int evtcodeas = ioread32(reg); generic_handle_irq(intcs_evt2irq(evtcodeas)); @@ -435,6 +435,6 @@ void __init sh7367_init_irq(void) register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ - set_irq_data(evt2irq(0xf80), (void *)intevtsa); - set_irq_chained_handler(evt2irq(0xf80), intcs_demux); + irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); + irq_set_chained_handler(evt2irq(0xf80), intcs_demux); } diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index ca5f9d1..7a4960f 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c @@ -601,7 +601,7 @@ static struct intc_desc intcs_desc __initdata = { static void intcs_demux(unsigned int irq, struct irq_desc *desc) { - void __iomem *reg = (void *)get_irq_data(irq); + void __iomem *reg = (void *)irq_get_handler_data(irq); unsigned int evtcodeas = ioread32(reg); generic_handle_irq(intcs_evt2irq(evtcodeas)); @@ -615,6 +615,6 @@ void __init sh7372_init_irq(void) register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ - set_irq_data(evt2irq(0xf80), (void *)intevtsa); - set_irq_chained_handler(evt2irq(0xf80), intcs_demux); + irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa); + irq_set_chained_handler(evt2irq(0xf80), intcs_demux); } diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c index dd56838..fe45154 100644 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ b/arch/arm/mach-shmobile/intc-sh7377.c @@ -626,7 +626,7 @@ static struct intc_desc intcs_desc __initdata = { static void intcs_demux(unsigned int irq, struct irq_desc *desc) { - void __iomem *reg = (void *)get_irq_data(irq); + void __iomem *reg = (void *)irq_get_handler_data(irq); unsigned int evtcodeas = ioread32(reg); generic_handle_irq(intcs_evt2irq(evtcodeas)); @@ -641,6 +641,6 @@ void __init sh7377_init_irq(void) register_intc_controller(&intcs_desc); /* demux using INTEVTSA */ - set_irq_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); - set_irq_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); + irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa); + irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux); } diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c index aa9231f..209fa5c 100644 --- a/arch/arm/mach-tcc8k/irq.c +++ b/arch/arm/mach-tcc8k/irq.c @@ -102,10 +102,10 @@ void __init tcc8k_init_irq(void) for (irqno = 0; irqno < NR_IRQS; irqno++) { if (irqno < 32) - set_irq_chip(irqno, &tcc8000_irq_chip0); + irq_set_chip(irqno, &tcc8000_irq_chip0); else - set_irq_chip(irqno, &tcc8000_irq_chip1); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &tcc8000_irq_chip1); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 8ab2131..4148048 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -208,9 +208,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) spin_unlock_irqrestore(&bank->lvl_lock[port], flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - __set_irq_handler_unlocked(d->irq, handle_level_irq); + __irq_set_handler_locked(d->irq, handle_level_irq); else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) - __set_irq_handler_unlocked(d->irq, handle_edge_irq); + __irq_set_handler_locked(d->irq, handle_edge_irq); return 0; } @@ -224,7 +224,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); - bank = get_irq_data(irq); + bank = irq_get_handler_data(irq); for (port = 0; port < 4; port++) { int gpio = tegra_gpio_compose(bank->bank, port, 0); @@ -301,7 +301,7 @@ void tegra_gpio_suspend(void) static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) { struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); - return set_irq_wake(bank->irq, enable); + return irq_set_irq_wake(bank->irq, enable); } #endif @@ -341,17 +341,17 @@ static int __init tegra_gpio_init(void) bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))]; irq_set_lockdep_class(i, &gpio_lock_class); - set_irq_chip_data(i, bank); - set_irq_chip(i, &tegra_gpio_irq_chip); - set_irq_handler(i, handle_simple_irq); + irq_set_chip_data(i, bank); + irq_set_chip(i, &tegra_gpio_irq_chip); + irq_set_handler(i, handle_simple_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { bank = &tegra_gpio_banks[i]; - set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); - set_irq_data(bank->irq, bank); + irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler); + irq_set_handler_data(bank->irq, bank); for (j = 0; j < 4; j++) spin_lock_init(&bank->lvl_lock[j]); diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index dfbc219..6b5c8b8 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -144,7 +144,7 @@ void __init tegra_init_irq(void) gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); - gic = get_irq_chip(29); + gic = irq_get_chip(29); tegra_gic_unmask_irq = gic->irq_unmask; tegra_gic_mask_irq = gic->irq_mask; tegra_gic_ack_irq = gic->irq_ack; @@ -154,8 +154,8 @@ void __init tegra_init_irq(void) for (i = 0; i < INT_MAIN_NR; i++) { irq = INT_PRI_BASE + i; - set_irq_chip(irq, &tegra_irq); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &tegra_irq); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-ux500/modem-irq-db5500.c b/arch/arm/mach-ux500/modem-irq-db5500.c index e1296a7..5f2322e 100644 --- a/arch/arm/mach-ux500/modem-irq-db5500.c +++ b/arch/arm/mach-ux500/modem-irq-db5500.c @@ -90,8 +90,8 @@ static irqreturn_t modem_cpu_irq_handler(int irq, void *data) static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip) { - set_irq_chip(irq, modem_irq_chip); - set_irq_handler(irq, handle_simple_irq); + irq_set_chip(irq, modem_irq_chip); + irq_set_handler(irq, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); pr_debug("modem_irq: Created virtual IRQ %d\n", irq); diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index eb7ffa0..96e59e3 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -314,7 +314,7 @@ static struct mmci_platform_data mmc0_plat_data = { .gpio_cd = -1, }; -static struct resource char_lcd_resources[] = { +static struct resource chalcd_resources[] = { { .start = VERSATILE_CHAR_LCD_BASE, .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1), diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c index cba4695..e495c01 100644 --- a/arch/arm/mach-vt8500/irq.c +++ b/arch/arm/mach-vt8500/irq.c @@ -136,8 +136,8 @@ void __init vt8500_init_irq(void) /* Disable all interrupts and route them to IRQ */ writeb(0x00, ic_regbase + VT8500_IC_DCTR + i); - set_irq_chip(i, &vt8500_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &vt8500_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } else { @@ -167,8 +167,8 @@ void __init wm8505_init_irq(void) writeb(0x00, sic_regbase + VT8500_IC_DCTR + i - 64); - set_irq_chip(i, &vt8500_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &vt8500_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } else { diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c index 9c35010..5947d1f 100644 --- a/arch/arm/mach-w90x900/irq.c +++ b/arch/arm/mach-w90x900/irq.c @@ -207,8 +207,8 @@ void __init nuc900_init_irq(void) __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) { - set_irq_chip(irqno, &nuc900_irq_chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &nuc900_irq_chip); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index 8a2fb70..9d424ce9 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c @@ -181,12 +181,12 @@ int __init mxc_expio_init(u32 base, u32 p_irq) __raw_writew(0x1F, brd_io + INTR_MASK_REG); for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { - set_irq_chip(i, &expio_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &expio_irq_chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } - set_irq_type(p_irq, IRQF_TRIGGER_LOW); - set_irq_chained_handler(p_irq, mxc_expio_irq_handler); + irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW); + irq_set_chained_handler(p_irq, mxc_expio_irq_handler); /* Register Lan device on the debugboard */ smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index deb284b..8b30c83 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -139,8 +139,8 @@ void __init mxc_init_irq(void __iomem *irqbase) __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); for (i = 0; i < MXC_INTERNAL_IRQS; i++) { - set_irq_chip(i, &mxc_avic_chip.base); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &mxc_avic_chip.base); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 57d5985..2ff0b3f 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -175,7 +175,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; - struct mxc_gpio_port *port = get_irq_data(irq); + struct mxc_gpio_port *port = irq_get_handler_data(irq); irq_stat = __raw_readl(port->base + GPIO_ISR) & __raw_readl(port->base + GPIO_IMR); @@ -188,7 +188,7 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) { int i; u32 irq_msk, irq_stat; - struct mxc_gpio_port *port = get_irq_data(irq); + struct mxc_gpio_port *port = irq_get_handler_data(irq); /* walk through all interrupt status registers */ for (i = 0; i < gpio_table_size; i++) { @@ -311,8 +311,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) __raw_writel(~0, port[i].base + GPIO_ISR); for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { - set_irq_chip(j, &gpio_irq_chip); - set_irq_handler(j, handle_level_irq); + irq_set_chip(j, &gpio_irq_chip); + irq_set_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } @@ -331,21 +331,23 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { /* setup one handler for each entry */ - set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); - set_irq_data(port[i].irq, &port[i]); + irq_set_chained_handler(port[i].irq, + mx3_gpio_irq_handler); + irq_set_handler_data(port[i].irq, &port[i]); if (port[i].irq_high) { /* setup handler for GPIO 16 to 31 */ - set_irq_chained_handler(port[i].irq_high, - mx3_gpio_irq_handler); - set_irq_data(port[i].irq_high, &port[i]); + irq_set_chained_handler(port[i].irq_high, + mx3_gpio_irq_handler); + irq_set_handler_data(port[i].irq_high, + &port[i]); } } } if (cpu_is_mx2()) { /* setup one handler for all GPIO interrupts */ - set_irq_chained_handler(port[0].irq, mx2_gpio_irq_handler); - set_irq_data(port[0].irq, port); + irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); + irq_set_handler_data(port[0].irq, port); } return 0; diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index 0c799ac..e1c6eff 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c @@ -29,7 +29,7 @@ int imx_irq_set_priority(unsigned char irq, unsigned char prio) ret = -ENOSYS; - base = get_irq_chip(irq); + base = irq_get_chip(irq); if (base) { chip = container_of(base, struct mxc_irq_chip, base); if (chip->set_priority) @@ -48,7 +48,7 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) ret = -ENOSYS; - base = get_irq_chip(irq); + base = irq_get_chip(irq); if (base) { chip = container_of(base, struct mxc_irq_chip, base); if (chip->set_irq_fiq) diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index bc3a6be..c299152 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -167,8 +167,8 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ for (i = 0; i < MXC_INTERNAL_IRQS; i++) { - set_irq_chip(i, &mxc_tzic_chip.base); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &mxc_tzic_chip.base); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 1b402a8..63adc4d 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -319,7 +319,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep) struct nmk_gpio_chip *nmk_chip; int pin = PIN_NUM(cfgs[i]); - nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(pin)); + nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin)); if (!nmk_chip) { ret = -EINVAL; break; @@ -398,7 +398,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode) struct nmk_gpio_chip *nmk_chip; unsigned long flags; - nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); + nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); if (!nmk_chip) return -EINVAL; @@ -431,7 +431,7 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull) struct nmk_gpio_chip *nmk_chip; unsigned long flags; - nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); + nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); if (!nmk_chip) return -EINVAL; @@ -457,7 +457,7 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode) struct nmk_gpio_chip *nmk_chip; unsigned long flags; - nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); + nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); if (!nmk_chip) return -EINVAL; @@ -474,7 +474,7 @@ int nmk_gpio_get_mode(int gpio) struct nmk_gpio_chip *nmk_chip; u32 afunc, bfunc, bit; - nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); + nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); if (!nmk_chip) return -EINVAL; @@ -678,7 +678,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc, u32 status) { struct nmk_gpio_chip *nmk_chip; - struct irq_chip *host_chip = get_irq_chip(irq); + struct irq_chip *host_chip = irq_get_chip(irq); unsigned int first_irq; if (host_chip->irq_mask_ack) @@ -689,7 +689,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc, host_chip->irq_ack(&desc->irq_data); } - nmk_chip = get_irq_data(irq); + nmk_chip = irq_get_handler_data(irq); first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); while (status) { int bit = __ffs(status); @@ -703,7 +703,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc, static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) { - struct nmk_gpio_chip *nmk_chip = get_irq_data(irq); + struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq); u32 status = readl(nmk_chip->addr + NMK_GPIO_IS); __nmk_gpio_irq_handler(irq, desc, status); @@ -712,7 +712,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) static void nmk_gpio_secondary_irq_handler(unsigned int irq, struct irq_desc *desc) { - struct nmk_gpio_chip *nmk_chip = get_irq_data(irq); + struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq); u32 status = nmk_chip->get_secondary_status(nmk_chip->bank); __nmk_gpio_irq_handler(irq, desc, status); @@ -725,20 +725,20 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) { - set_irq_chip(i, &nmk_gpio_irq_chip); - set_irq_handler(i, handle_edge_irq); + irq_set_chip(i, &nmk_gpio_irq_chip); + irq_set_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); - set_irq_chip_data(i, nmk_chip); - set_irq_type(i, IRQ_TYPE_EDGE_FALLING); + irq_set_chip_data(i, nmk_chip); + irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING); } - set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); - set_irq_data(nmk_chip->parent_irq, nmk_chip); + irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); + irq_set_handler_data(nmk_chip->parent_irq, nmk_chip); if (nmk_chip->secondary_parent_irq >= 0) { - set_irq_chained_handler(nmk_chip->secondary_parent_irq, + irq_set_chained_handler(nmk_chip->secondary_parent_irq, nmk_gpio_secondary_irq_handler); - set_irq_data(nmk_chip->secondary_parent_irq, nmk_chip); + irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip); } return 0; diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index af07333..d2adcdd 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -758,9 +758,9 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) spin_unlock_irqrestore(&bank->lock, flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - __set_irq_handler_unlocked(d->irq, handle_level_irq); + __irq_set_handler_locked(d->irq, handle_level_irq); else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) - __set_irq_handler_unlocked(d->irq, handle_edge_irq); + __irq_set_handler_locked(d->irq, handle_edge_irq); return retval; } @@ -1140,7 +1140,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) desc->irq_data.chip->irq_ack(&desc->irq_data); - bank = get_irq_data(irq); + bank = irq_get_handler_data(irq); #ifdef CONFIG_ARCH_OMAP1 if (bank->method == METHOD_MPUIO) isr_reg = bank->base + @@ -1666,16 +1666,16 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank) for (j = bank->virtual_irq_start; j < bank->virtual_irq_start + bank_width; j++) { irq_set_lockdep_class(j, &gpio_lock_class); - set_irq_chip_data(j, bank); + irq_set_chip_data(j, bank); if (bank_is_mpuio(bank)) - set_irq_chip(j, &mpuio_irq_chip); + irq_set_chip(j, &mpuio_irq_chip); else - set_irq_chip(j, &gpio_irq_chip); - set_irq_handler(j, handle_simple_irq); + irq_set_chip(j, &gpio_irq_chip); + irq_set_handler(j, handle_simple_irq); set_irq_flags(j, IRQF_VALID); } - set_irq_chained_handler(bank->irq, gpio_irq_handler); - set_irq_data(bank->irq, bank); + irq_set_chained_handler(bank->irq, gpio_irq_handler); + irq_set_handler_data(bank->irq, bank); } static int __devinit omap_gpio_probe(struct platform_device *pdev) diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 222327b..9ea0ae4 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -474,9 +474,9 @@ void __init orion_gpio_init(int gpio_base, int ngpio, for (i = 0; i < ngpio; i++) { unsigned int irq = secondary_irq_base + i; - set_irq_chip(irq, &orion_gpio_irq_chip); - set_irq_handler(irq, handle_level_irq); - set_irq_chip_data(irq, ochip); + irq_set_chip(irq, &orion_gpio_irq_chip); + irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, ochip); irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index c163f90..aba3ffe 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -56,9 +56,9 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) for (i = 0; i < 32; i++) { unsigned int irq = irq_start + i; - set_irq_chip(irq, &orion_irq_chip); - set_irq_chip_data(irq, maskaddr); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &orion_irq_chip); + irq_set_chip_data(irq, maskaddr); + irq_set_handler(irq, handle_level_irq); irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c index e7de6ae..5e05467 100644 --- a/arch/arm/plat-pxa/gpio.c +++ b/arch/arm/plat-pxa/gpio.c @@ -284,13 +284,13 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) } for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { - set_irq_chip(irq, &pxa_muxed_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &pxa_muxed_gpio_chip); + irq_set_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* Install handler for GPIO>=2 edge detect interrupts */ - set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); + irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler); pxa_muxed_gpio_chip.irq_set_wake = fn; } diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 4434cb5..c2a42d5 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -592,8 +592,8 @@ void __init s3c24xx_init_irq(void) case IRQ_UART1: case IRQ_UART2: case IRQ_ADCPARENT: - set_irq_chip(irqno, &s3c_irq_level_chip); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_level_chip); + irq_set_handler(irqno, handle_level_irq); break; case IRQ_RESERVED6: @@ -603,35 +603,35 @@ void __init s3c24xx_init_irq(void) default: //irqdbf("registering irq %d (s3c irq)\n", irqno); - set_irq_chip(irqno, &s3c_irq_chip); - set_irq_handler(irqno, handle_edge_irq); + irq_set_chip(irqno, &s3c_irq_chip); + irq_set_handler(irqno, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } } /* setup the cascade irq handlers */ - set_irq_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7); - set_irq_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8); + irq_set_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7); + irq_set_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8); - set_irq_chained_handler(IRQ_UART0, s3c_irq_demux_uart0); - set_irq_chained_handler(IRQ_UART1, s3c_irq_demux_uart1); - set_irq_chained_handler(IRQ_UART2, s3c_irq_demux_uart2); - set_irq_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc); + irq_set_chained_handler(IRQ_UART0, s3c_irq_demux_uart0); + irq_set_chained_handler(IRQ_UART1, s3c_irq_demux_uart1); + irq_set_chained_handler(IRQ_UART2, s3c_irq_demux_uart2); + irq_set_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc); /* external interrupts */ for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { irqdbf("registering irq %d (ext int)\n", irqno); - set_irq_chip(irqno, &s3c_irq_eint0t4); - set_irq_handler(irqno, handle_edge_irq); + irq_set_chip(irqno, &s3c_irq_eint0t4); + irq_set_handler(irqno, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) { irqdbf("registering irq %d (extended s3c irq)\n", irqno); - set_irq_chip(irqno, &s3c_irqext_chip); - set_irq_handler(irqno, handle_edge_irq); + irq_set_chip(irqno, &s3c_irqext_chip); + irq_set_handler(irqno, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } @@ -641,29 +641,29 @@ void __init s3c24xx_init_irq(void) for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) { irqdbf("registering irq %d (s3c uart0 irq)\n", irqno); - set_irq_chip(irqno, &s3c_irq_uart0); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_uart0); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) { irqdbf("registering irq %d (s3c uart1 irq)\n", irqno); - set_irq_chip(irqno, &s3c_irq_uart1); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_uart1); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) { irqdbf("registering irq %d (s3c uart2 irq)\n", irqno); - set_irq_chip(irqno, &s3c_irq_uart2); - set_irq_handler(irqno, handle_level_irq); + irq_set_chip(irqno, &s3c_irq_uart2); + irq_set_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) { irqdbf("registering irq %d (s3c adc irq)\n", irqno); - set_irq_chip(irqno, &s3c_irq_adc); - set_irq_handler(irqno, handle_edge_irq); + irq_set_chip(irqno, &s3c_irq_adc); + irq_set_handler(irqno, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index 225aa25..f3d15e8 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c @@ -205,15 +205,15 @@ int __init s5p_init_irq_eint(void) int irq; for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) - set_irq_chip(irq, &s5p_irq_vic_eint); + irq_set_chip(irq, &s5p_irq_vic_eint); for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { - set_irq_chip(irq, &s5p_irq_eint); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &s5p_irq_eint); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); + irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); return 0; } diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index cd87d32..46dd078 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c @@ -43,13 +43,13 @@ LIST_HEAD(banks); static int s5p_gpioint_get_offset(struct irq_data *data) { - struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); + struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data); return data->irq - chip->irq_base; } static void s5p_gpioint_ack(struct irq_data *data) { - struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); + struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data); int group, offset, pend_offset; unsigned int value; @@ -64,7 +64,7 @@ static void s5p_gpioint_ack(struct irq_data *data) static void s5p_gpioint_mask(struct irq_data *data) { - struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); + struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data); int group, offset, mask_offset; unsigned int value; @@ -79,7 +79,7 @@ static void s5p_gpioint_mask(struct irq_data *data) static void s5p_gpioint_unmask(struct irq_data *data) { - struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); + struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data); int group, offset, mask_offset; unsigned int value; @@ -100,7 +100,7 @@ static void s5p_gpioint_mask_ack(struct irq_data *data) static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type) { - struct s3c_gpio_chip *chip = irq_data_get_irq_data(data); + struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data); int group, offset, con_offset; unsigned int value; @@ -149,7 +149,7 @@ static struct irq_chip s5p_gpioint = { static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) { - struct s5p_gpioint_bank *bank = get_irq_data(irq); + struct s5p_gpioint_bank *bank = irq_get_handler_data(irq); int group, pend_offset, mask_offset; unsigned int pend, mask; @@ -200,8 +200,8 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) if (!bank->chips) return -ENOMEM; - set_irq_chained_handler(bank->irq, s5p_gpioint_handler); - set_irq_data(bank->irq, bank); + irq_set_chained_handler(bank->irq, s5p_gpioint_handler); + irq_set_handler_data(bank->irq, bank); bank->handler = s5p_gpioint_handler; printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n", bank->irq); @@ -219,9 +219,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) bank->chips[group - bank->start] = chip; for (i = 0; i < chip->chip.ngpio; i++) { irq = chip->irq_base + i; - set_irq_chip(irq, &s5p_gpioint); - set_irq_data(irq, chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &s5p_gpioint); + irq_set_handler_data(irq, chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } return 0; diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index b721c04..3c064a0 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c @@ -117,9 +117,9 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) for (offs = 0; offs < 3; offs++) { irq = uirq->base_irq + offs; - set_irq_chip(irq, &s3c_irq_uart); - set_irq_chip_data(irq, uirq); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &s3c_irq_uart); + irq_set_chip_data(irq, uirq); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c index 7818903..b4294cc 100644 --- a/arch/arm/plat-spear/shirq.c +++ b/arch/arm/plat-spear/shirq.c @@ -68,7 +68,7 @@ static struct irq_chip shirq_chip = { static void shirq_handler(unsigned irq, struct irq_desc *desc) { u32 i, val, mask; - struct spear_shirq *shirq = get_irq_data(irq); + struct spear_shirq *shirq = irq_get_handler_data(irq); desc->irq_data.chip->irq_ack(&desc->irq_data); while ((val = readl(shirq->regs.base + shirq->regs.status_reg) & @@ -105,14 +105,14 @@ int spear_shirq_register(struct spear_shirq *shirq) if (!shirq->dev_count) return -EINVAL; - set_irq_chained_handler(shirq->irq, shirq_handler); + irq_set_chained_handler(shirq->irq, shirq_handler); for (i = 0; i < shirq->dev_count; i++) { - set_irq_chip(shirq->dev_config[i].virq, &shirq_chip); - set_irq_handler(shirq->dev_config[i].virq, handle_simple_irq); + irq_set_chip(shirq->dev_config[i].virq, &shirq_chip); + irq_set_handler(shirq->dev_config[i].virq, handle_simple_irq); set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID); - set_irq_chip_data(shirq->dev_config[i].virq, shirq); + irq_set_chip_data(shirq->dev_config[i].virq, shirq); } - set_irq_data(shirq->irq, shirq); + irq_set_handler_data(shirq->irq, shirq); return 0; } diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c index aaa1686..fc2e764 100644 --- a/arch/arm/plat-stmp3xxx/irq.c +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -35,8 +35,8 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip) /* Disable all interrupts initially */ for (i = 0; i < NR_REAL_IRQS; i++) { chip->irq_mask(irq_get_irq_data(i)); - set_irq_chip(i, chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, chip); + irq_set_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c index c9c38e8..9057d93 100644 --- a/arch/arm/plat-stmp3xxx/pinmux.c +++ b/arch/arm/plat-stmp3xxx/pinmux.c @@ -489,7 +489,7 @@ static void stmp3xxx_gpio_free(struct gpio_chip *chip, unsigned offset) static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc) { - struct stmp3xxx_pinmux_bank *pm = get_irq_data(irq); + struct stmp3xxx_pinmux_bank *pm = irq_get_handler_data(irq); int gpio_irq = pm->virq; u32 stat = __raw_readl(pm->irqstat); @@ -533,15 +533,15 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start) for (virq = pm->virq; virq < pm->virq; virq++) { gpio_irq_chip.irq_mask(irq_get_irq_data(virq)); - set_irq_chip(virq, &gpio_irq_chip); - set_irq_handler(virq, handle_level_irq); + irq_set_chip(virq, &gpio_irq_chip); + irq_set_handler(virq, handle_level_irq); set_irq_flags(virq, IRQF_VALID); } r = gpiochip_add(&pm->chip); if (r < 0) break; - set_irq_chained_handler(pm->irq, stmp3xxx_gpio_irq); - set_irq_data(pm->irq, pm); + irq_set_chained_handler(pm->irq, stmp3xxx_gpio_irq); + irq_set_handler_data(pm->irq, pm); } return r; } diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c index 31d945d..f21d838 100644 --- a/arch/arm/plat-versatile/fpga-irq.c +++ b/arch/arm/plat-versatile/fpga-irq.c @@ -30,7 +30,7 @@ static void fpga_irq_unmask(struct irq_data *d) static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc) { - struct fpga_irq_data *f = get_irq_desc_data(desc); + struct fpga_irq_data *f = irq_desc_get_handler_data(desc); u32 status = readl(f->base + IRQ_STATUS); if (status == 0) { @@ -55,17 +55,17 @@ void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f) f->chip.irq_unmask = fpga_irq_unmask; if (parent_irq != -1) { - set_irq_data(parent_irq, f); - set_irq_chained_handler(parent_irq, fpga_irq_handle); + irq_set_handler_data(parent_irq, f); + irq_set_chained_handler(parent_irq, fpga_irq_handle); } for (i = 0; i < 32; i++) { if (valid & (1 << i)) { unsigned int irq = f->irq_start + i; - set_irq_chip_data(irq, f); - set_irq_chip(irq, &f->chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip_data(irq, f); + irq_set_chip(irq, &f->chip); + irq_set_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } -- cgit v0.10.2 From 9323f26186403433293e87e717a7785f74f75d80 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 13:29:39 +0100 Subject: arm: Reorder irq_set_ function calls Reorder irq_set_chip() irq_set_chip_data() irq_set_handler() to irq_set_chip() irq_set_handler() irq_set_chip_data() so the next patch can combine irq_set_chip() and irq_set_handler() to irq_set_chip_and_handler(). Automated conversion with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 50d5b20..630d46b 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -320,8 +320,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic, */ for (i = irq_start; i < irq_limit; i++) { irq_set_chip(i, &gic_chip); - irq_set_chip_data(i, gic); irq_set_handler(i, handle_level_irq); + irq_set_chip_data(i, gic); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index ea18b35..54d91f8 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -204,8 +204,8 @@ static void locomo_setup_irq(struct locomo *lchip) /* Install handlers for IRQ_LOCOMO_* */ for ( ; irq <= lchip->irq_base + 3; irq++) { irq_set_chip(irq, &locomo_chip); - irq_set_chip_data(irq, lchip); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, lchip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 11ab3c2..f098f5c 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -473,15 +473,15 @@ static void sa1111_setup_irq(struct sa1111 *sachip) for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { irq_set_chip(irq, &sa1111_low_chip); - irq_set_chip_data(irq, sachip); irq_set_handler(irq, handle_edge_irq); + irq_set_chip_data(irq, sachip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { irq_set_chip(irq, &sa1111_high_chip); - irq_set_chip_data(irq, sachip); irq_set_handler(irq, handle_edge_irq); + irq_set_chip_data(irq, sachip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 297078b..e282fd1 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -306,8 +306,8 @@ static void __init vic_set_irq_sources(void __iomem *base, unsigned int irq = irq_start + i; irq_set_chip(irq, &vic_chip); - irq_set_chip_data(irq, base); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, base); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c index 0c18080..3a217be 100644 --- a/arch/arm/mach-exynos4/irq-combiner.c +++ b/arch/arm/mach-exynos4/irq-combiner.c @@ -120,8 +120,8 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base, for (i = irq_start; i < combiner_data[combiner_nr].irq_offset + MAX_IRQ_IN_COMBINER; i++) { irq_set_chip(i, &combiner_chip); - irq_set_chip_data(i, &combiner_data[combiner_nr]); irq_set_handler(i, handle_level_irq); + irq_set_chip_data(i, &combiner_data[combiner_nr]); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index cc7bfc3..70344cc 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -138,8 +138,8 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn) for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { irq_set_chip(irq, &pxa_low_gpio_chip); - irq_set_chip_data(irq, irq_base(0)); irq_set_handler(irq, handle_edge_irq); + irq_set_chip_data(irq, irq_base(0)); set_irq_flags(irq, IRQF_VALID); } @@ -166,8 +166,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) irq = PXA_IRQ(i); irq_set_chip(irq, &pxa_internal_irq_chip); - irq_set_chip_data(irq, base); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, base); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c index 9a4c7ae..6d70348 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/irq-eint.c @@ -198,8 +198,8 @@ static int __init s3c64xx_init_irq_eint(void) for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { irq_set_chip(irq, &s3c_irq_eint); - irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index aba3ffe..f533bde 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -57,8 +57,8 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) unsigned int irq = irq_start + i; irq_set_chip(irq, &orion_irq_chip); - irq_set_chip_data(irq, maskaddr); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, maskaddr); irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 3c064a0..9dbad70 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c @@ -118,8 +118,8 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) irq = uirq->base_irq + offs; irq_set_chip(irq, &s3c_irq_uart); - irq_set_chip_data(irq, uirq); irq_set_handler(irq, handle_level_irq); + irq_set_chip_data(irq, uirq); set_irq_flags(irq, IRQF_VALID); } -- cgit v0.10.2 From f38c02f3b338651e145aac2889ba976baf6b28b3 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 13:35:09 +0100 Subject: arm: Fold irq_set_chip/irq_set_handler Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 630d46b..f70ec7d 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -319,8 +319,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic, * Setup the Linux IRQ subsystem. */ for (i = irq_start; i < irq_limit; i++) { - irq_set_chip(i, &gic_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &gic_chip, handle_level_irq); irq_set_chip_data(i, gic); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index c815d00..7a21927 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -88,8 +88,8 @@ void it8152_init_irq(void) __raw_writel((0), IT8152_INTC_LDCNIRR); for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { - irq_set_chip(irq, &it8152_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &it8152_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index 54d91f8..b55c362 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -203,8 +203,7 @@ static void locomo_setup_irq(struct locomo *lchip) /* Install handlers for IRQ_LOCOMO_* */ for ( ; irq <= lchip->irq_base + 3; irq++) { - irq_set_chip(irq, &locomo_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq); irq_set_chip_data(irq, lchip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index f098f5c..a12b33c 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -472,15 +472,15 @@ static void sa1111_setup_irq(struct sa1111 *sachip) sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { - irq_set_chip(irq, &sa1111_low_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &sa1111_low_chip, + handle_edge_irq); irq_set_chip_data(irq, sachip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { - irq_set_chip(irq, &sa1111_high_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &sa1111_high_chip, + handle_edge_irq); irq_set_chip_data(irq, sachip); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index e282fd1..113085a 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -305,8 +305,8 @@ static void __init vic_set_irq_sources(void __iomem *base, if (vic_sources & (1 << i)) { unsigned int irq = irq_start + i; - irq_set_chip(irq, &vic_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &vic_chip, + handle_level_irq); irq_set_chip_data(irq, base); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index a9690f1..d165001 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type) */ if (slot < 8) { ec->irq = 32 + slot; - irq_set_chip(ec->irq, &ecard_chip); - irq_set_handler(ec->irq, handle_level_irq); + irq_set_chip_and_handler(ec->irq, &ecard_chip, + handle_level_irq); set_irq_flags(ec->irq, IRQF_VALID); } diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 8512b79..4615528 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -511,8 +511,8 @@ void __init at91_gpio_irq_setup(void) * Can use the "simple" and not "edge" handler since it's * shorter, and the AIC handles interrupts sanely. */ - irq_set_chip(pin, &gpio_irqchip); - irq_set_handler(pin, handle_simple_irq); + irq_set_chip_and_handler(pin, &gpio_irqchip, + handle_simple_irq); set_irq_flags(pin, IRQF_VALID); } diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 566cec1..9665265e 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -143,8 +143,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) /* Active Low interrupt, with the specified priority */ at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - irq_set_chip(i, &at91_aic_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c index 5c5ec01..c2eceee 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/irq.c @@ -112,13 +112,13 @@ void __init clps711x_init_irq(void) for (i = 0; i < NR_IRQS; i++) { if (INT1_IRQS & (1 << i)) { - irq_set_handler(i, handle_level_irq); - irq_set_chip(i, &int1_chip); + irq_set_chip_and_handler(i, &int1_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } if (INT2_IRQS & (1 << i)) { - irq_set_handler(i, handle_level_irq); - irq_set_chip(i, &int2_chip); + irq_set_chip_and_handler(i, &int2_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index f038a19..f07fd16 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -121,8 +121,7 @@ void __init dove_init_irq(void) writel(0, PMU_INTERRUPT_CAUSE); for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { - irq_set_chip(i, &pmu_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index caf6cba..087bc77 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void) local_irq_restore(flags); for (irq = 0; irq < NR_IRQS; irq++) { - irq_set_chip(irq, &ebsa110_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ebsa110_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index 7da0a5c..180b8a9 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -231,8 +231,8 @@ void __init ep93xx_gpio_init_irq(void) for (gpio_irq = gpio_to_irq(0); gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { - irq_set_chip(gpio_irq, &ep93xx_gpio_irq_chip); - irq_set_handler(gpio_irq, handle_level_irq); + irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip, + handle_level_irq); set_irq_flags(gpio_irq, IRQF_VALID); } diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c index 3a217be..f488b66 100644 --- a/arch/arm/mach-exynos4/irq-combiner.c +++ b/arch/arm/mach-exynos4/irq-combiner.c @@ -119,8 +119,7 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base, for (i = irq_start; i < combiner_data[combiner_nr].irq_offset + MAX_IRQ_IN_COMBINER; i++) { - irq_set_chip(i, &combiner_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); irq_set_chip_data(i, &combiner_data[combiner_nr]); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c index 0441dfc..9d87d2a 100644 --- a/arch/arm/mach-exynos4/irq-eint.c +++ b/arch/arm/mach-exynos4/irq-eint.c @@ -208,8 +208,8 @@ int __init exynos4_init_irq_eint(void) int irq; for (irq = 0 ; irq <= 31 ; irq++) { - irq_set_chip(IRQ_EINT(irq), &exynos4_irq_eint); - irq_set_handler(IRQ_EINT(irq), handle_level_irq); + irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, + handle_level_irq); set_irq_flags(IRQ_EINT(irq), IRQF_VALID); } diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 06239f9..38a44f9 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -102,8 +102,7 @@ static void __init __fb_init_irq(void) *CSR_FIQ_DISABLE = -1; for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { - irq_set_chip(irq, &fb_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c index 0bc528e..c3a0abb 100644 --- a/arch/arm/mach-footbridge/isa-irq.c +++ b/arch/arm/mach-footbridge/isa-irq.c @@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq) if (host_irq != (unsigned int)-1) { for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { - irq_set_chip(irq, &isa_lo_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &isa_lo_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { - irq_set_chip(irq, &isa_hi_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &isa_hi_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index 0e7b56e..fdc7ef1 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c @@ -217,8 +217,8 @@ void __init gemini_gpio_init(void) for (j = GPIO_IRQ_BASE + i * 32; j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { - irq_set_chip(j, &gpio_irq_chip); - irq_set_handler(j, handle_edge_irq); + irq_set_chip_and_handler(j, &gpio_irq_chip, + handle_edge_irq); set_irq_flags(j, IRQF_VALID); } diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index f118182..51d4e44 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -199,15 +199,15 @@ void __init h720x_init_irq (void) /* Initialize global IRQ's, fast path */ for (irq = 0; irq < NR_GLBL_IRQS; irq++) { - irq_set_chip(irq, &h720x_global_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &h720x_global_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* Initialize multiplexed IRQ's, slow path */ for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { - irq_set_chip(irq, &h720x_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &h720x_gpio_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); @@ -217,8 +217,8 @@ void __init h720x_init_irq (void) #ifdef CONFIG_CPU_H7202 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { - irq_set_chip(irq, &h720x_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &h720x_gpio_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index dd5c72a..c37d570 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -202,8 +202,8 @@ void __init h7202_init_irq (void) for (irq = IRQ_TIMER1; irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { __mask_timerx_irq(irq); - irq_set_chip(irq, &h7202_timerx_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &h7202_timerx_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index 2266046..d7ee278 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -68,8 +68,7 @@ void __init iop32x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - irq_set_chip(i, &ext_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &ext_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index 7b205e9..f7f5d3e 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -110,9 +110,9 @@ void __init iop33x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - irq_set_chip(i, - (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, + (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2, + handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index 98956a1..4068166 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void) */ for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { - irq_set_chip(irq, &ixp2000_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp2000_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } @@ -485,8 +485,8 @@ void __init ixp2000_init_irq(void) for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & IXP2000_VALID_ERR_IRQ_MASK) { - irq_set_chip(irq, &ixp2000_err_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else @@ -495,8 +495,8 @@ void __init ixp2000_init_irq(void) irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { - irq_set_chip(irq, &ixp2000_GPIO_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); @@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void) */ ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { - irq_set_chip(irq, &ixp2000_pci_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 52f8864..235638f 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -158,8 +158,8 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne *board_irq_mask = 0xffffffff; for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) { - irq_set_chip(irq, &ixdp2x00_cpld_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index f1ff50b..84835b2 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void) for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { if (irq & valid_irq_mask) { - irq_set_chip(irq, &ixdp2x01_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else { set_irq_flags(irq, 0); diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index f203972..a1bee33 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type) { switch (type) { case IXP23XX_IRQ_LEVEL: - irq_set_chip(irq, &ixp23xx_irq_level_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip, + handle_level_irq); break; case IXP23XX_IRQ_EDGE: - irq_set_chip(irq, &ixp23xx_irq_edge_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip, + handle_edge_irq); break; } set_irq_flags(irq, IRQF_VALID); @@ -324,8 +324,8 @@ void __init ixp23xx_init_irq(void) } for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) { - irq_set_chip(irq, &ixp23xx_pci_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 720befb..8dcba17 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - irq_set_handler(irq, handle_level_irq); - irq_set_chip(irq, &ixdp2351_inta_chip); + irq_set_chip_and_handler(irq, &ixdp2351_inta_chip, + handle_level_irq); } } @@ -147,8 +147,8 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - irq_set_handler(irq, handle_level_irq); - irq_set_chip(irq, &ixdp2351_intb_chip); + irq_set_chip_and_handler(irq, &ixdp2351_intb_chip, + handle_level_irq); } } diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index eca5590..ed19bc3 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void) /* Default to all level triggered */ for(i = 0; i < NR_IRQS; i++) { - irq_set_chip(i, &ixp4xx_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &ixp4xx_irq_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c index da54a5d..a78092d 100644 --- a/arch/arm/mach-ks8695/irq.c +++ b/arch/arm/mach-ks8695/irq.c @@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type) } if (level_triggered) { - irq_set_chip(d->irq, &ks8695_irq_level_chip); - irq_set_handler(d->irq, handle_level_irq); + irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip, + handle_level_irq); } else { - irq_set_chip(d->irq, &ks8695_irq_edge_chip); - irq_set_handler(d->irq, handle_edge_irq); + irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip, + handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); @@ -158,16 +158,18 @@ void __init ks8695_init_irq(void) case KS8695_IRQ_UART_RX: case KS8695_IRQ_COMM_TX: case KS8695_IRQ_COMM_RX: - irq_set_chip(irq, &ks8695_irq_level_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, + &ks8695_irq_level_chip, + handle_level_irq); break; /* Edge-triggered interrupts */ default: /* clear pending bit */ ks8695_irq_ack(irq_get_irq_data(irq)); - irq_set_chip(irq, &ks8695_irq_edge_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, + &ks8695_irq_edge_chip, + handle_edge_irq); } set_irq_flags(irq, IRQF_VALID); diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index 3088ca3..4eae566 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c @@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void) /* Configure supported IRQ's */ for (i = 0; i < NR_IRQS; i++) { - irq_set_chip(i, &lpc32xx_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &lpc32xx_irq_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c index 6a86762..89706a0 100644 --- a/arch/arm/mach-mmp/irq-pxa168.c +++ b/arch/arm/mach-mmp/irq-pxa168.c @@ -48,8 +48,7 @@ void __init icu_init_irq(void) for (irq = 0; irq < 64; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - irq_set_chip(irq, &icu_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c index ffcd4f3..87e1d01 100644 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ b/arch/arm/mach-msm/board-trout-gpio.c @@ -214,8 +214,8 @@ int __init trout_init_gpio(void) { int i; for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { - irq_set_chip(i, &trout_gpio_irq_chip); - irq_set_handler(i, handle_edge_irq); + irq_set_chip_and_handler(i, &trout_gpio_irq_chip, + handle_edge_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c index 997ded1..56a964e 100644 --- a/arch/arm/mach-msm/gpio-v2.c +++ b/arch/arm/mach-msm/gpio-v2.c @@ -362,8 +362,8 @@ static int __devinit msm_gpio_probe(struct platform_device *dev) for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); - irq_set_chip(irq, &msm_gpio_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &msm_gpio_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index c9e0c61..5ea273b 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c @@ -355,8 +355,8 @@ static int __init msm_init_gpio(void) msm_gpio_chips[j].chip.ngpio) j++; irq_set_chip_data(i, &msm_gpio_chips[j]); - irq_set_chip(i, &msm_gpio_irq_chip); - irq_set_handler(i, handle_edge_irq); + irq_set_chip_and_handler(i, &msm_gpio_irq_chip, + handle_edge_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c index 7a805be..1b54f80 100644 --- a/arch/arm/mach-msm/irq-vic.c +++ b/arch/arm/mach-msm/irq-vic.c @@ -357,8 +357,7 @@ void __init msm_init_irq(void) writel(3, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip(n, &msm_irq_chip); - irq_set_handler(n, handle_level_irq); + irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 782e805..ea514be 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -145,8 +145,7 @@ void __init msm_init_irq(void) writel(1, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip(n, &msm_irq_chip); - irq_set_handler(n, handle_level_irq); + irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c index 276f918..689e78c 100644 --- a/arch/arm/mach-msm/sirc.c +++ b/arch/arm/mach-msm/sirc.c @@ -158,8 +158,7 @@ void __init msm_init_sirc(void) wake_enable = 0; for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { - irq_set_chip(i, &sirc_irq_chip); - irq_set_handler(i, handle_edge_irq); + irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c index de49452..3d095d6 100644 --- a/arch/arm/mach-mx3/mach-mx31ads.c +++ b/arch/arm/mach-mx3/mach-mx31ads.c @@ -199,8 +199,7 @@ static void __init mx31ads_init_expio(void) __raw_writew(0xFFFF, PBC_INTSTATUS_REG); for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { - irq_set_chip(i, &expio_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID); } irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c index a1e01dd..2c950fe 100644 --- a/arch/arm/mach-mxs/gpio.c +++ b/arch/arm/mach-mxs/gpio.c @@ -265,8 +265,8 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { - irq_set_chip(j, &gpio_irq_chip); - irq_set_handler(j, handle_level_irq); + irq_set_chip_and_handler(j, &gpio_irq_chip, + handle_level_irq); set_irq_flags(j, IRQF_VALID); } diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index ae8a0d9..23ca9d0 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -74,8 +74,7 @@ void __init icoll_init_irq(void) mxs_reset_block(icoll_base + HW_ICOLL_CTRL); for (i = 0; i < MXS_INTERNAL_IRQS; i++) { - irq_set_chip(i, &mxs_icoll_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 783e327..00023b5 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -171,8 +171,8 @@ void __init netx_init_irq(void) vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { - irq_set_chip(irq, &netx_hif_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &netx_hif_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index 7e29e4a..e27687d 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void) __func__); for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { - irq_set_chip(i, &a9m9750dev_fpga_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 14997e9..37ab0a2 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -67,8 +67,7 @@ void __init ns9xxx_init_irq(void) __raw_writel(prio2irq(i), SYS_IVA(i)); for (i = 0; i <= 31; ++i) { - irq_set_chip(i, &ns9xxx_chip); - irq_set_handler(i, handle_fasteoi_irq); + irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq); set_irq_flags(i, IRQF_VALID); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c index fcf1212..aa279f2 100644 --- a/arch/arm/mach-nuc93x/irq.c +++ b/arch/arm/mach-nuc93x/irq.c @@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void) __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) { - irq_set_chip(irqno, &nuc93x_irq_chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &nuc93x_irq_chip, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 53dbb5d..5d3da7a 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -230,8 +230,8 @@ void __init omap_init_irq(void) irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); omap_irq_set_cfg(j, 0, 0, irq_trigger); - irq_set_chip(j, &omap_irq_chip); - irq_set_handler(j, handle_level_irq); + irq_set_chip_and_handler(j, &omap_irq_chip, + handle_level_irq); set_irq_flags(j, IRQF_VALID); } } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 4fff5e3..237e453 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -223,8 +223,7 @@ void __init omap_init_irq(void) nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); for (i = 0; i < nr_of_irqs; i++) { - irq_set_chip(i, &omap_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index a773b73..38dea05 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -527,8 +527,8 @@ static void __init balloon3_init_irq(void) pxa27x_init_irq(); /* setup extra Balloon3 irqs */ for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { - irq_set_chip(irq, &balloon3_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &balloon3_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 70344cc..6251e3f 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -137,8 +137,8 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn) GEDR0 = 0x3; for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { - irq_set_chip(irq, &pxa_low_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &pxa_low_gpio_chip, + handle_edge_irq); irq_set_chip_data(irq, irq_base(0)); set_irq_flags(irq, IRQF_VALID); } @@ -165,8 +165,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i)); irq = PXA_IRQ(i); - irq_set_chip(irq, &pxa_internal_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &pxa_internal_irq_chip, + handle_level_irq); irq_set_chip_data(irq, base); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index a1b0942..6307f70 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -149,8 +149,8 @@ static void __init lpd270_init_irq(void) /* setup extra LogicPD PXA270 irqs */ for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) { - irq_set_chip(irq, &lpd270_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &lpd270_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 061d01b..0fea945 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -165,8 +165,8 @@ static void __init lubbock_init_irq(void) /* setup extra lubbock irqs */ for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { - irq_set_chip(irq, &lubbock_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &lubbock_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 9ee7032..29b6e7a 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -166,8 +166,8 @@ static void __init mainstone_init_irq(void) /* setup extra Mainstone irqs */ for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { - irq_set_chip(irq, &mainstone_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &mainstone_irq_chip, + handle_level_irq); if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); else diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 6c02b58..4d01205 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -281,8 +281,8 @@ static void __init pcm990_init_irq(void) /* setup extra PCM990 irqs */ for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { - irq_set_chip(irq, &pcm990_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &pcm990_irq_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 8abe93f..8dd1073 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -362,8 +362,8 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) int irq; for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) { - irq_set_chip(irq, &pxa_ext_wakeup_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 26facf1..aa70331 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -310,8 +310,8 @@ static void __init viper_init_irq(void) /* setup ISA IRQs */ for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { isa_irq = viper_bit_to_irq(level); - irq_set_chip(isa_irq, &viper_irq_chip); - irq_set_handler(isa_irq, handle_edge_irq); + irq_set_chip_and_handler(isa_irq, &viper_irq_chip, + handle_edge_irq); set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index a7cdc4a..139aa7f 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -146,8 +146,8 @@ static void __init zeus_init_irq(void) /* Setup ISA IRQs */ for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) { isa_irq = zeus_bit_to_irq(level); - irq_set_chip(isa_irq, &zeus_irq_chip); - irq_set_handler(isa_irq, handle_edge_irq); + irq_set_chip_and_handler(isa_irq, &zeus_irq_chip, + handle_edge_irq); set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 49fb988..2e1b530 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -133,20 +133,20 @@ void __init rpc_init_irq(void) switch (irq) { case 0 ... 7: - irq_set_chip(irq, &iomd_a_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &iomd_a_chip, + handle_level_irq); set_irq_flags(irq, flags); break; case 8 ... 15: - irq_set_chip(irq, &iomd_b_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &iomd_b_chip, + handle_level_irq); set_irq_flags(irq, flags); break; case 16 ... 21: - irq_set_chip(irq, &iomd_dma_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &iomd_dma_chip, + handle_level_irq); set_irq_flags(irq, flags); break; diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 4139f5f..bc53d2d 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -154,8 +154,8 @@ static __init int bast_irq_init(void) for (i = 0; i < 4; i++) { unsigned int irqno = bast_pc104_irqs[i]; - irq_set_chip(irqno, &bast_pc104_chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &bast_pc104_chip, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index 30f79ae..f3355d2 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -175,8 +175,8 @@ static int s3c2412_irq_add(struct sys_device *sysdev) unsigned int irqno; for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { - irq_set_chip(irqno, &s3c2412_irq_eint0t4); - irq_set_handler(irqno, handle_edge_irq); + irq_set_chip_and_handler(irqno, &s3c2412_irq_eint0t4, + handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } @@ -185,8 +185,8 @@ static int s3c2412_irq_add(struct sys_device *sysdev) irq_set_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi); for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) { - irq_set_chip(irqno, &s3c2412_irq_cfsdi); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c2412_irq_cfsdi, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c index de21c84..77b38f2 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c2416/irq.c @@ -202,13 +202,11 @@ static int __init s3c2416_add_sub(unsigned int base, { unsigned int irqno; - irq_set_chip(base, &s3c_irq_level_chip); - irq_set_handler(base, handle_level_irq); + irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq); irq_set_chained_handler(base, demux); for (irqno = start; irqno <= end; irqno++) { - irq_set_chip(irqno, chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, chip, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 0c564b1..eb1cc0f 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c @@ -100,13 +100,13 @@ static int s3c2440_irq_add(struct sys_device *sysdev) /* add new chained handler for wdt, ac7 */ - irq_set_chip(IRQ_WDT, &s3c_irq_level_chip); - irq_set_handler(IRQ_WDT, handle_level_irq); + irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip, + handle_level_irq); irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { - irq_set_chip(irqno, &s3c_irq_wdtac97); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c index 5a48881..de07c2f 100644 --- a/arch/arm/mach-s3c2440/s3c244x-irq.c +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c @@ -95,19 +95,19 @@ static int s3c244x_irq_add(struct sys_device *sysdev) { unsigned int irqno; - irq_set_chip(IRQ_NFCON, &s3c_irq_level_chip); - irq_set_handler(IRQ_NFCON, handle_level_irq); + irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip, + handle_level_irq); set_irq_flags(IRQ_NFCON, IRQF_VALID); /* add chained handler for camera */ - irq_set_chip(IRQ_CAM, &s3c_irq_level_chip); - irq_set_handler(IRQ_CAM, handle_level_irq); + irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip, + handle_level_irq); irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam); for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { - irq_set_chip(irqno, &s3c_irq_cam); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_cam, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index b12431f..83ecb11 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c @@ -230,13 +230,11 @@ static int __init s3c2443_add_sub(unsigned int base, { unsigned int irqno; - irq_set_chip(base, &s3c_irq_level_chip); - irq_set_handler(base, handle_level_irq); + irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq); irq_set_chained_handler(base, demux); for (irqno = start; irqno <= end; irqno++) { - irq_set_chip(irqno, chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, chip, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c index 6d70348..4d203be 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/irq-eint.c @@ -197,8 +197,7 @@ static int __init s3c64xx_init_irq_eint(void) int irq; for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { - irq_set_chip(irq, &s3c_irq_eint); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq); irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq)); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 0f109e1..423ddb3 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -323,20 +323,20 @@ void __init sa1100_init_irq(void) ICCR = 1; for (irq = 0; irq <= 10; irq++) { - irq_set_chip(irq, &sa1100_low_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = 12; irq <= 31; irq++) { - irq_set_chip(irq, &sa1100_normal_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &sa1100_normal_chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID); } for (irq = 32; irq <= 48; irq++) { - irq_set_chip(irq, &sa1100_high_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 2e6da5f..5dce13e 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c @@ -80,8 +80,7 @@ void __init shark_init_irq(void) int irq; for (irq = 0; irq < NR_IRQS; irq++) { - irq_set_chip(irq, &fb_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &fb_chip, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 4148048..76a3f65 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -342,8 +342,8 @@ static int __init tegra_gpio_init(void) irq_set_lockdep_class(i, &gpio_lock_class); irq_set_chip_data(i, bank); - irq_set_chip(i, &tegra_gpio_irq_chip); - irq_set_handler(i, handle_simple_irq); + irq_set_chip_and_handler(i, &tegra_gpio_irq_chip, + handle_simple_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 6b5c8b8..4330d89 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -154,8 +154,7 @@ void __init tegra_init_irq(void) for (i = 0; i < INT_MAIN_NR; i++) { irq = INT_PRI_BASE + i; - irq_set_chip(irq, &tegra_irq); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &tegra_irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/arch/arm/mach-ux500/modem-irq-db5500.c b/arch/arm/mach-ux500/modem-irq-db5500.c index 5f2322e..6b86416 100644 --- a/arch/arm/mach-ux500/modem-irq-db5500.c +++ b/arch/arm/mach-ux500/modem-irq-db5500.c @@ -90,8 +90,7 @@ static irqreturn_t modem_cpu_irq_handler(int irq, void *data) static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip) { - irq_set_chip(irq, modem_irq_chip); - irq_set_handler(irq, handle_simple_irq); + irq_set_chip_and_handler(irq, modem_irq_chip, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); pr_debug("modem_irq: Created virtual IRQ %d\n", irq); diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c index e495c01..245140c 100644 --- a/arch/arm/mach-vt8500/irq.c +++ b/arch/arm/mach-vt8500/irq.c @@ -136,8 +136,8 @@ void __init vt8500_init_irq(void) /* Disable all interrupts and route them to IRQ */ writeb(0x00, ic_regbase + VT8500_IC_DCTR + i); - irq_set_chip(i, &vt8500_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &vt8500_irq_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } } else { @@ -167,8 +167,8 @@ void __init wm8505_init_irq(void) writeb(0x00, sic_regbase + VT8500_IC_DCTR + i - 64); - irq_set_chip(i, &vt8500_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &vt8500_irq_chip, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } } else { diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c index 5947d1f..7bf143c 100644 --- a/arch/arm/mach-w90x900/irq.c +++ b/arch/arm/mach-w90x900/irq.c @@ -207,8 +207,8 @@ void __init nuc900_init_irq(void) __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) { - irq_set_chip(irqno, &nuc900_irq_chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &nuc900_irq_chip, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index 9d424ce9..f0ba072 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c @@ -181,8 +181,7 @@ int __init mxc_expio_init(u32 base, u32 p_irq) __raw_writew(0x1F, brd_io + INTR_MASK_REG); for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { - irq_set_chip(i, &expio_irq_chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID); } irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW); diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 8b30c83..09e2bd0 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -139,8 +139,8 @@ void __init mxc_init_irq(void __iomem *irqbase) __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); for (i = 0; i < MXC_INTERNAL_IRQS; i++) { - irq_set_chip(i, &mxc_avic_chip.base); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &mxc_avic_chip.base, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 2ff0b3f..7a10724 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -311,8 +311,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) __raw_writel(~0, port[i].base + GPIO_ISR); for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { - irq_set_chip(j, &gpio_irq_chip); - irq_set_handler(j, handle_level_irq); + irq_set_chip_and_handler(j, &gpio_irq_chip, + handle_level_irq); set_irq_flags(j, IRQF_VALID); } diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index c299152..57f9395 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -167,8 +167,8 @@ void __init tzic_init_irq(void __iomem *irqbase) /* all IRQ no FIQ Warning :: No selection */ for (i = 0; i < MXC_INTERNAL_IRQS; i++) { - irq_set_chip(i, &mxc_tzic_chip.base); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, &mxc_tzic_chip.base, + handle_level_irq); set_irq_flags(i, IRQF_VALID); } diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index 63adc4d..f49748e 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -725,8 +725,8 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) { - irq_set_chip(i, &nmk_gpio_irq_chip); - irq_set_handler(i, handle_edge_irq); + irq_set_chip_and_handler(i, &nmk_gpio_irq_chip, + handle_edge_irq); set_irq_flags(i, IRQF_VALID); irq_set_chip_data(i, nmk_chip); irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING); diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 9ea0ae4..a431a13 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -474,8 +474,8 @@ void __init orion_gpio_init(int gpio_base, int ngpio, for (i = 0; i < ngpio; i++) { unsigned int irq = secondary_irq_base + i; - irq_set_chip(irq, &orion_gpio_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &orion_gpio_irq_chip, + handle_level_irq); irq_set_chip_data(irq, ochip); irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index f533bde..d8d638e 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -56,8 +56,8 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) for (i = 0; i < 32; i++) { unsigned int irq = irq_start + i; - irq_set_chip(irq, &orion_irq_chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &orion_irq_chip, + handle_level_irq); irq_set_chip_data(irq, maskaddr); irq_set_status_flags(irq, IRQ_LEVEL); set_irq_flags(irq, IRQF_VALID); diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c index 5e05467..dce088f 100644 --- a/arch/arm/plat-pxa/gpio.c +++ b/arch/arm/plat-pxa/gpio.c @@ -284,8 +284,8 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) } for (irq = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) { - irq_set_chip(irq, &pxa_muxed_gpio_chip); - irq_set_handler(irq, handle_edge_irq); + irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip, + handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index c2a42d5..9aee7e1 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -592,8 +592,8 @@ void __init s3c24xx_init_irq(void) case IRQ_UART1: case IRQ_UART2: case IRQ_ADCPARENT: - irq_set_chip(irqno, &s3c_irq_level_chip); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_level_chip, + handle_level_irq); break; case IRQ_RESERVED6: @@ -603,8 +603,8 @@ void __init s3c24xx_init_irq(void) default: //irqdbf("registering irq %d (s3c irq)\n", irqno); - irq_set_chip(irqno, &s3c_irq_chip); - irq_set_handler(irqno, handle_edge_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_chip, + handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } } @@ -623,15 +623,15 @@ void __init s3c24xx_init_irq(void) for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) { irqdbf("registering irq %d (ext int)\n", irqno); - irq_set_chip(irqno, &s3c_irq_eint0t4); - irq_set_handler(irqno, handle_edge_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_eint0t4, + handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) { irqdbf("registering irq %d (extended s3c irq)\n", irqno); - irq_set_chip(irqno, &s3c_irqext_chip); - irq_set_handler(irqno, handle_edge_irq); + irq_set_chip_and_handler(irqno, &s3c_irqext_chip, + handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } @@ -641,29 +641,28 @@ void __init s3c24xx_init_irq(void) for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) { irqdbf("registering irq %d (s3c uart0 irq)\n", irqno); - irq_set_chip(irqno, &s3c_irq_uart0); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_uart0, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) { irqdbf("registering irq %d (s3c uart1 irq)\n", irqno); - irq_set_chip(irqno, &s3c_irq_uart1); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_uart1, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) { irqdbf("registering irq %d (s3c uart2 irq)\n", irqno); - irq_set_chip(irqno, &s3c_irq_uart2); - irq_set_handler(irqno, handle_level_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_uart2, + handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) { irqdbf("registering irq %d (s3c adc irq)\n", irqno); - irq_set_chip(irqno, &s3c_irq_adc); - irq_set_handler(irqno, handle_edge_irq); + irq_set_chip_and_handler(irqno, &s3c_irq_adc, handle_edge_irq); set_irq_flags(irqno, IRQF_VALID); } diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index f3d15e8..b5bb774 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c @@ -208,8 +208,7 @@ int __init s5p_init_irq_eint(void) irq_set_chip(irq, &s5p_irq_vic_eint); for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { - irq_set_chip(irq, &s5p_irq_eint); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 9dbad70..4d4e571 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c @@ -117,8 +117,7 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) for (offs = 0; offs < 3; offs++) { irq = uirq->base_irq + offs; - irq_set_chip(irq, &s3c_irq_uart); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &s3c_irq_uart, handle_level_irq); irq_set_chip_data(irq, uirq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c index b4294cc..961fb72 100644 --- a/arch/arm/plat-spear/shirq.c +++ b/arch/arm/plat-spear/shirq.c @@ -107,8 +107,8 @@ int spear_shirq_register(struct spear_shirq *shirq) irq_set_chained_handler(shirq->irq, shirq_handler); for (i = 0; i < shirq->dev_count; i++) { - irq_set_chip(shirq->dev_config[i].virq, &shirq_chip); - irq_set_handler(shirq->dev_config[i].virq, handle_simple_irq); + irq_set_chip_and_handler(shirq->dev_config[i].virq, + &shirq_chip, handle_simple_irq); set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID); irq_set_chip_data(shirq->dev_config[i].virq, shirq); } diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c index fc2e764..6fdf9ac 100644 --- a/arch/arm/plat-stmp3xxx/irq.c +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -35,8 +35,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip) /* Disable all interrupts initially */ for (i = 0; i < NR_REAL_IRQS; i++) { chip->irq_mask(irq_get_irq_data(i)); - irq_set_chip(i, chip); - irq_set_handler(i, handle_level_irq); + irq_set_chip_and_handler(i, chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c index 9057d93..3def03b 100644 --- a/arch/arm/plat-stmp3xxx/pinmux.c +++ b/arch/arm/plat-stmp3xxx/pinmux.c @@ -533,8 +533,8 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start) for (virq = pm->virq; virq < pm->virq; virq++) { gpio_irq_chip.irq_mask(irq_get_irq_data(virq)); - irq_set_chip(virq, &gpio_irq_chip); - irq_set_handler(virq, handle_level_irq); + irq_set_chip_and_handler(virq, &gpio_irq_chip, + handle_level_irq); set_irq_flags(virq, IRQF_VALID); } r = gpiochip_add(&pm->chip); diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c index f21d838..f0cc8e1 100644 --- a/arch/arm/plat-versatile/fpga-irq.c +++ b/arch/arm/plat-versatile/fpga-irq.c @@ -64,8 +64,8 @@ void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f) unsigned int irq = f->irq_start + i; irq_set_chip_data(irq, f); - irq_set_chip(irq, &f->chip); - irq_set_handler(irq, handle_level_irq); + irq_set_chip_and_handler(irq, &f->chip, + handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } -- cgit v0.10.2 From a9eb076b21425929ce543978db03265d9db210de Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 22:17:31 +0100 Subject: alpha: Convert to new irq function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index a19d600..1461d7c 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -102,7 +102,7 @@ show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); #endif - seq_printf(p, " %14s", get_irq_desc_chip(desc)->name); + seq_printf(p, " %14s", irq_desc_get_chip(desc)->name); seq_printf(p, " %c%s", (action->flags & IRQF_DISABLED)?'+':' ', action->name); diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 411ca11..1479dc6 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c @@ -228,7 +228,7 @@ struct irqaction timer_irqaction = { void __init init_rtc_irq(void) { - set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, + irq_set_chip_and_handler_name(RTC_IRQ, &no_irq_chip, handle_simple_irq, "RTC"); setup_irq(RTC_IRQ, &timer_irqaction); } diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index c7cc981..e1861c7 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c @@ -92,7 +92,7 @@ init_i8259a_irqs(void) outb(0xff, 0xA1); /* mask all of 8259A-2 */ for (i = 0; i < 16; i++) { - set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); } setup_irq(2, &cascade); diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index b30227f..13c97a5 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c @@ -102,7 +102,7 @@ init_pyxis_irqs(unsigned long ignore_mask) for (i = 16; i < 48; ++i) { if ((ignore_mask >> i) & 1) continue; - set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index 82a47bb..a79fa30 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c @@ -51,7 +51,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) for (i = 16; i < max; ++i) { if (i < 64 && ((ignore_mask >> i) & 1)) continue; - set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &srm_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index 88d95e8..0e14399 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c @@ -125,7 +125,7 @@ alcor_init_irq(void) on while IRQ probing. */ if (i >= 16+20 && i <= 16+30) continue; - set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &alcor_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq; diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index 57eb630..c8c112d 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c @@ -105,8 +105,8 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) outb(0xff, 0x806); for (i = 16; i < 35; ++i) { - set_irq_chip_and_handler(i, &cabriolet_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i, &cabriolet_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index 481df4e..5ac00fd 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c @@ -270,7 +270,7 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - set_irq_chip_and_handler(i, ops, handle_level_irq); + irq_set_chip_and_handler(i, ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index 402e908..a7a23b4 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c @@ -118,7 +118,7 @@ eb64p_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 32; ++i) { - set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index 0b44a54..a60cd5b 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c @@ -138,7 +138,7 @@ eiger_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 128; ++i) { - set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &eiger_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index 00341b7..7f1a87f1 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c @@ -171,11 +171,11 @@ jensen_init_irq(void) { init_i8259a_irqs(); - set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); - set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); - set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); - set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); - set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); + irq_set_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); + irq_set_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); + irq_set_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); + irq_set_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); + irq_set_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); common_init_isa_dma(); } diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index e619107..388b99d 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -276,7 +276,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the lsi irqs. */ for (i = 0; i < 128; ++i) { - set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); + irq_set_chip_and_handler(base + i, lsi_ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } @@ -290,7 +290,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the msi irqs. */ for (i = 128; i < (128 + 512); ++i) { - set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); + irq_set_chip_and_handler(base + i, msi_ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } @@ -308,8 +308,8 @@ marvel_init_irq(void) /* Reserve the legacy irqs. */ for (i = 0; i < 16; ++i) { - set_irq_chip_and_handler(i, &marvel_legacy_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i, &marvel_legacy_irq_type, + handle_level_irq); } /* Init the io7 irqs. */ diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index cf7f43d..0e6e469 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c @@ -98,7 +98,8 @@ mikasa_init_irq(void) mikasa_update_irq_hw(0); for (i = 16; i < 32; ++i) { - set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &mikasa_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index 92bc188..a00ac70 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c @@ -127,7 +127,8 @@ noritake_init_irq(void) outw(0, 0x54c); for (i = 16; i < 48; ++i) { - set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &noritake_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 936d414..7f52161 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c @@ -180,7 +180,8 @@ rawhide_init_irq(void) } for (i = 16; i < 128; ++i) { - set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &rawhide_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index cea22a6..216d94d 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c @@ -99,7 +99,7 @@ rx164_init_irq(void) rx164_update_irq_hw(0); for (i = 16; i < 40; ++i) { - set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &rx164_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index a349538..da714e4 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c @@ -518,8 +518,8 @@ sable_lynx_init_irq(int nr_of_irqs) long i; for (i = 0; i < nr_of_irqs; ++i) { - set_irq_chip_and_handler(i, &sable_lynx_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i, &sable_lynx_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index 42a5331..a31f8cd 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c @@ -138,7 +138,8 @@ takara_init_irq(void) takara_update_irq_hw(i, -1); for (i = 16; i < 128; ++i) { - set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &takara_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 8c13a0c..fea0e46 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -179,7 +179,7 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - set_irq_chip_and_handler(i, ops, handle_level_irq); + irq_set_chip_and_handler(i, ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index ca60a38..d3cb28b 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c @@ -183,17 +183,17 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) for (i = 0; i < 16; ++i) { if (i == 2) continue; - set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } - set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, - handle_level_irq); + irq_set_chip_and_handler(36 + irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(36 + irq_bias, IRQ_LEVEL); for (i = 40; i < 64; ++i) { - set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } -- cgit v0.10.2 From a6e120ed42004d6051fff7c3233e2554f12ccecb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 22:20:51 +0100 Subject: alpha: Use generic show_interrupts() The only subtle difference is that alpha uses ACTUAL_NR_IRQS and prints the IRQF_DISABLED flag. Change the generic implementation to deal with ACTUAL_NR_IRQS if defined. The IRQF_DISABLED printing is pointless, as we nowadays run all interrupts with irqs disabled. Signed-off-by: Thomas Gleixner diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index cc31bec..bd4160c 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -11,6 +11,7 @@ config ALPHA select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE select AUTO_IRQ_AFFINITY if SMP + select GENERIC_IRQ_SHOW select GENERIC_HARDIRQS_NO_DEPRECATED help The Alpha is a 64-bit general-purpose processor designed and diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 1461d7c..381431a 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -67,68 +67,21 @@ int irq_select_affinity(unsigned int irq) } #endif /* CONFIG_SMP */ -int -show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { int j; - int irq = *(loff_t *) v; - struct irqaction * action; - struct irq_desc *desc; - unsigned long flags; #ifdef CONFIG_SMP - if (irq == 0) { - seq_puts(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%d ", j); - seq_putc(p, '\n'); - } -#endif - - if (irq < ACTUAL_NR_IRQS) { - desc = irq_to_desc(irq); - - if (!desc) - return 0; - - raw_spin_lock_irqsave(&desc->lock, flags); - action = desc->action; - if (!action) - goto unlock; - seq_printf(p, "%3d: ", irq); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(irq)); -#else - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); + seq_puts(p, "IPI: "); + for_each_online_cpu(j) + seq_printf(p, "%10lu ", cpu_data[j].ipi_count); + seq_putc(p, '\n'); #endif - seq_printf(p, " %14s", irq_desc_get_chip(desc)->name); - seq_printf(p, " %c%s", - (action->flags & IRQF_DISABLED)?'+':' ', - action->name); - - for (action=action->next; action; action = action->next) { - seq_printf(p, ", %c%s", - (action->flags & IRQF_DISABLED)?'+':' ', - action->name); - } - - seq_putc(p, '\n'); -unlock: - raw_spin_unlock_irqrestore(&desc->lock, flags); - } else if (irq == ACTUAL_NR_IRQS) { -#ifdef CONFIG_SMP - seq_puts(p, "IPI: "); - for_each_online_cpu(j) - seq_printf(p, "%10lu ", cpu_data[j].ipi_count); - seq_putc(p, '\n'); -#endif - seq_puts(p, "PMI: "); - for_each_online_cpu(j) - seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); - seq_puts(p, " Performance Monitoring\n"); - seq_printf(p, "ERR: %10lu\n", irq_err_count); - } + seq_puts(p, "PMI: "); + for_each_online_cpu(j) + seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); + seq_puts(p, " Performance Monitoring\n"); + seq_printf(p, "ERR: %10lu\n", irq_err_count); return 0; } diff --git a/kernel/irq/proc.c b/kernel/irq/proc.c index 626d092..dd201bd 100644 --- a/kernel/irq/proc.c +++ b/kernel/irq/proc.c @@ -364,6 +364,10 @@ int __weak arch_show_interrupts(struct seq_file *p, int prec) return 0; } +#ifndef ACTUAL_NR_IRQS +# define ACTUAL_NR_IRQS nr_irqs +#endif + int show_interrupts(struct seq_file *p, void *v) { static int prec; @@ -373,10 +377,10 @@ int show_interrupts(struct seq_file *p, void *v) struct irqaction *action; struct irq_desc *desc; - if (i > nr_irqs) + if (i > ACTUAL_NR_IRQS) return 0; - if (i == nr_irqs) + if (i == ACTUAL_NR_IRQS) return arch_show_interrupts(p, prec); /* print header and calculate the width of the first column */ -- cgit v0.10.2 From 1907d8be2d54de461c682ee2fac45d97c29fd5dd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:21:01 +0100 Subject: bfin: Final irq cleanup Use the trigger type in irq_data and check level type instead of looking at desc->handle_irq. Signed-off-by: Thomas Gleixner Cc: Mike Frysinger Cc: uclinux-dist-devel@blackfin.uclinux.org diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 5d68bf6..7b07740 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -154,13 +154,13 @@ void platform_clear_ipi(unsigned int cpu, int irq) void __cpuinit bfin_local_timer_setup(void) { #if defined(CONFIG_TICKSOURCE_CORETMR) - struct irq_chip *chip = get_irq_chip(IRQ_CORETMR); - struct irq_desc *desc = irq_to_desc(IRQ_CORETMR); + struct irq_data *data = irq_get_irq_data(IRQ_CORETMR); + struct irq_chip *chip = irq_data_get_irq_chip(data); bfin_coretmr_init(); bfin_coretmr_clockevent_init(); - chip->irq_unmask(&desc->irq_data); + chip->irq_unmask(data); #else /* Power down the core timer, just to play safe. */ bfin_write_TCNTL(0); diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 6cd5239..cbfc88e 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -578,10 +578,9 @@ static void bfin_gpio_ack_irq(struct irq_data *d) static void bfin_gpio_mask_ack_irq(struct irq_data *d) { unsigned int irq = d->irq; - struct irq_desc *desc = irq_to_desc(irq); u32 gpionr = irq_to_gpio(irq); - if (desc->handle_irq == handle_edge_irq) + if (!irqd_is_level_type(d)) set_gpio_data(gpionr, 0); set_gpio_maska(gpionr, 0); @@ -837,12 +836,11 @@ void init_pint_lut(void) static void bfin_gpio_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u32 bank = PINT_2_BANK(pint_val); - if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { + if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) { if (pint[bank]->invert_set & pintbit) pint[bank]->invert_clear = pintbit; else @@ -854,12 +852,11 @@ static void bfin_gpio_ack_irq(struct irq_data *d) static void bfin_gpio_mask_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u32 bank = PINT_2_BANK(pint_val); - if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { + if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) { if (pint[bank]->invert_set & pintbit) pint[bank]->invert_clear = pintbit; else -- cgit v0.10.2 From 43f2f1154aecce40e6ced16b46dab47fbb4de866 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:22:30 +0100 Subject: bfin: Convert irq namespace Convert to the new function names. Scripted with coccinelle. Signed-off-by: Thomas Gleixner Cc: Mike Frysinger Cc: uclinux-dist-devel@blackfin.uclinux.org diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 8f07939..1696d34 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c @@ -48,7 +48,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%3d: ", i); for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); - seq_printf(p, " %8s", get_irq_desc_chip(desc)->name); + seq_printf(p, " %8s", irq_desc_get_chip(desc)->name); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) seq_printf(p, " %s", action->name); diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index cbfc88e..43d9fb1 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -559,7 +559,7 @@ static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) #ifdef CONFIG_IPIPE handle = handle_level_irq; #endif - __set_irq_handler_unlocked(irq, handle); + __irq_set_handler_locked(irq, handle); } static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS); @@ -1163,9 +1163,9 @@ int __init init_arch_irq(void) for (irq = 0; irq <= SYS_IRQS; irq++) { if (irq <= IRQ_CORETMR) - set_irq_chip(irq, &bfin_core_irqchip); + irq_set_chip(irq, &bfin_core_irqchip); else - set_irq_chip(irq, &bfin_internal_irqchip); + irq_set_chip(irq, &bfin_internal_irqchip); switch (irq) { #if defined(CONFIG_BF53x) @@ -1189,50 +1189,50 @@ int __init init_arch_irq(void) #elif defined(CONFIG_BF538) || defined(CONFIG_BF539) case IRQ_PORTF_INTA: #endif - set_irq_chained_handler(irq, - bfin_demux_gpio_irq); + irq_set_chained_handler(irq, bfin_demux_gpio_irq); break; #ifdef BF537_GENERIC_ERROR_INT_DEMUX case IRQ_GENERIC_ERROR: - set_irq_chained_handler(irq, bfin_demux_error_irq); + irq_set_chained_handler(irq, bfin_demux_error_irq); break; #endif #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) case IRQ_MAC_ERROR: - set_irq_chained_handler(irq, bfin_demux_mac_status_irq); + irq_set_chained_handler(irq, + bfin_demux_mac_status_irq); break; #endif #ifdef CONFIG_SMP case IRQ_SUPPLE_0: case IRQ_SUPPLE_1: - set_irq_handler(irq, handle_percpu_irq); + irq_set_handler(irq, handle_percpu_irq); break; #endif #ifdef CONFIG_TICKSOURCE_CORETMR case IRQ_CORETMR: # ifdef CONFIG_SMP - set_irq_handler(irq, handle_percpu_irq); + irq_set_handler(irq, handle_percpu_irq); break; # else - set_irq_handler(irq, handle_simple_irq); + irq_set_handler(irq, handle_simple_irq); break; # endif #endif #ifdef CONFIG_TICKSOURCE_GPTMR0 case IRQ_TIMER0: - set_irq_handler(irq, handle_simple_irq); + irq_set_handler(irq, handle_simple_irq); break; #endif #ifdef CONFIG_IPIPE default: - set_irq_handler(irq, handle_level_irq); + irq_set_handler(irq, handle_level_irq); break; #else /* !CONFIG_IPIPE */ default: - set_irq_handler(irq, handle_simple_irq); + irq_set_handler(irq, handle_simple_irq); break; #endif /* !CONFIG_IPIPE */ } @@ -1240,22 +1240,22 @@ int __init init_arch_irq(void) #ifdef BF537_GENERIC_ERROR_INT_DEMUX for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++) - set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip, + irq_set_chip_and_handler(irq, &bfin_generic_error_irqchip, handle_level_irq); #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) - set_irq_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq); + irq_set_chained_handler(IRQ_MAC_ERROR, bfin_demux_mac_status_irq); #endif #endif #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++) - set_irq_chip_and_handler(irq, &bfin_mac_status_irqchip, + irq_set_chip_and_handler(irq, &bfin_mac_status_irqchip, handle_level_irq); #endif /* if configured as edge, then will be changed to do_edge_IRQ */ for (irq = GPIO_IRQ_BASE; irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++) - set_irq_chip_and_handler(irq, &bfin_gpio_irqchip, + irq_set_chip_and_handler(irq, &bfin_gpio_irqchip, handle_level_irq); bfin_write_IMASK(0); -- cgit v0.10.2 From 28a283aae3bdd5088246ca830247ec8393e3e06b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:50:50 +0200 Subject: bfin: Use proper accessors in trace Signed-off-by: Thomas Gleixner diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin/kernel/trace.c index 05b5508..050db44 100644 --- a/arch/blackfin/kernel/trace.c +++ b/arch/blackfin/kernel/trace.c @@ -912,10 +912,11 @@ void show_regs(struct pt_regs *fp) /* if no interrupts are going off, don't print this out */ if (fp->ipend & ~0x3F) { for (i = 0; i < (NR_IRQS - 1); i++) { + struct irq_desc *desc = irq_to_desc(i); if (!in_atomic) - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); + raw_spin_lock_irqsave(&desc->lock, flags); - action = irq_desc[i].action; + action = desc->action; if (!action) goto unlock; @@ -928,7 +929,7 @@ void show_regs(struct pt_regs *fp) pr_cont("\n"); unlock: if (!in_atomic) - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); + raw_spin_unlock_irqrestore(&desc->lock, flags); } } -- cgit v0.10.2 From 097e98b4fc53fa9e9ef2b7b0c5364f2f079e7d6b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 19:00:33 +0100 Subject: ia64: Convert migrate_platform_irqs() to new irq chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index d003b50..44f11ee 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c @@ -677,7 +677,7 @@ extern void fixup_irqs(void); int migrate_platform_irqs(unsigned int cpu) { int new_cpei_cpu; - struct irq_desc *desc = NULL; + struct irq_data *data = NULL; const struct cpumask *mask; int retval = 0; @@ -693,20 +693,20 @@ int migrate_platform_irqs(unsigned int cpu) new_cpei_cpu = any_online_cpu(cpu_online_map); mask = cpumask_of(new_cpei_cpu); set_cpei_target_cpu(new_cpei_cpu); - desc = irq_desc + ia64_cpe_irq; + data = irq_get_irq_data(ia64_cpe_irq); /* * Switch for now, immediately, we need to do fake intr * as other interrupts, but need to study CPEI behaviour with * polling before making changes. */ - if (desc) { - desc->chip->disable(ia64_cpe_irq); - desc->chip->set_affinity(ia64_cpe_irq, mask); - desc->chip->enable(ia64_cpe_irq); + if (data && data->chip) { + data->chip->irq_disable(data); + data->chip->irq_set_affinity(data, mask, false); + data->chip->irq_enable(data); printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); } } - if (!desc) { + if (!data) { printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); retval = -EBUSY; } -- cgit v0.10.2 From 428a40c591f5f2ac7531db8dc191534b8590f339 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:12:33 +0100 Subject: ia64: Cleanup migrate_irqs() Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index 94ee9d0..ba29817 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -130,11 +130,12 @@ unsigned int vectors_in_migration[NR_IRQS]; */ static void migrate_irqs(void) { - struct irq_desc *desc; int irq, new_cpu; for (irq=0; irq < NR_IRQS; irq++) { - desc = irq_desc + irq; + struct irq_desc *desc = irq_to_desc(irq); + struct irq_data *data = irq_desc_get_irq_data(desc); + struct irq_chip *chip = irq_data_get_irq_chip(data); if (desc->status == IRQ_DISABLED) continue; @@ -145,10 +146,10 @@ static void migrate_irqs(void) * tell CPU not to respond to these local intr sources. * such as ITV,CPEI,MCA etc. */ - if (desc->status == IRQ_PER_CPU) + if (irqd_is_per_cpu(data)) continue; - if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask) + if (cpumask_any_and(data->affinity, cpu_online_mask) >= nr_cpu_ids) { /* * Save it for phase 2 processing @@ -160,16 +161,16 @@ static void migrate_irqs(void) /* * Al three are essential, currently WARN_ON.. maybe panic? */ - if (desc->chip && desc->chip->disable && - desc->chip->enable && desc->chip->set_affinity) { - desc->chip->disable(irq); - desc->chip->set_affinity(irq, - cpumask_of(new_cpu)); - desc->chip->enable(irq); + if (chip && chip->irq_disable && + chip->irq_enable && chip->irq_set_affinity) { + chip->irq_disable(data); + chip->irq_set_affinity(data, + cpumask_of(new_cpu), false); + chip->irq_enable(data); } else { - WARN_ON((!(desc->chip) || !(desc->chip->disable) || - !(desc->chip->enable) || - !(desc->chip->set_affinity))); + WARN_ON((!chip || !chip->irq_disable || + !chip->irq_enable || + !chip->irq_set_affinity)); } } } -- cgit v0.10.2 From 3d373ce82aaa2b5380d91074aa88879108b47ecf Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 3 Feb 2011 00:46:48 +0000 Subject: ia64: Remove stale irq_chip.end irq_chip.end got obsolete with the removal of __do_IRQ(). Signed-off-by: Thomas Gleixner Cc: Peter Zijlstra Cc: Tony Luck LKML-Reference: <20110203004210.143127544@linutronix.de> diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index b272261..4a1d5fa 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c @@ -34,7 +34,6 @@ static struct irq_chip irq_type_hp_sim = { .enable = hpsim_irq_noop, .disable = hpsim_irq_noop, .ack = hpsim_irq_noop, - .end = hpsim_irq_noop, .set_affinity = hpsim_set_affinity_noop, }; diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 22c3840..d21f9af 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -460,7 +460,6 @@ iosapic_ack_edge_irq (unsigned int irq) #define iosapic_enable_edge_irq unmask_irq #define iosapic_disable_edge_irq nop -#define iosapic_end_edge_irq nop static struct irq_chip irq_type_iosapic_edge = { .name = "IO-SAPIC-edge", @@ -469,7 +468,6 @@ static struct irq_chip irq_type_iosapic_edge = { .enable = iosapic_enable_edge_irq, .disable = iosapic_disable_edge_irq, .ack = iosapic_ack_edge_irq, - .end = iosapic_end_edge_irq, .mask = mask_irq, .unmask = unmask_irq, .set_affinity = iosapic_set_affinity diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c index fc1549d..a50dffa 100644 --- a/arch/ia64/kernel/irq_lsapic.c +++ b/arch/ia64/kernel/irq_lsapic.c @@ -40,6 +40,5 @@ struct irq_chip irq_type_ia64_lsapic = { .enable = lsapic_noop, .disable = lsapic_noop, .ack = lsapic_noop, - .end = lsapic_noop, .retrigger = lsapic_retrigger, }; diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 13c15d9..658c716 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -114,28 +114,6 @@ static void sn_ack_irq(unsigned int irq) move_native_irq(irq); } -static void sn_end_irq(unsigned int irq) -{ - int ivec; - u64 event_occurred; - - ivec = irq & 0xff; - if (ivec == SGI_UART_VECTOR) { - event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED)); - /* If the UART bit is set here, we may have received an - * interrupt from the UART that the driver missed. To - * make sure, we IPI ourselves to force us to look again. - */ - if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) { - platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR, - IA64_IPI_DM_INT, 0); - } - } - __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs); - if (sn_force_interrupt_flag) - force_interrupt(irq); -} - static void sn_irq_info_free(struct rcu_head *head); struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info, @@ -275,7 +253,6 @@ struct irq_chip irq_type_sn = { .enable = sn_enable_irq, .disable = sn_disable_irq, .ack = sn_ack_irq, - .end = sn_end_irq, .mask = sn_mask_irq, .unmask = sn_unmask_irq, .set_affinity = sn_set_affinity_irq -- cgit v0.10.2 From 35d75b0e03520ac09abd4a1f9490facf6a1ac82e Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:12:06 +0100 Subject: ia64: Convert hp-sim to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index 4a1d5fa..31dacfd 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c @@ -11,30 +11,30 @@ #include static unsigned int -hpsim_irq_startup (unsigned int irq) +hpsim_irq_startup(struct irq_data *data) { return 0; } static void -hpsim_irq_noop (unsigned int irq) +hpsim_irq_noop(struct irq_data *data) { } static int -hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b) +hpsim_set_affinity_noop(struct irq_data *d, const struct cpumask *b, bool f) { return 0; } static struct irq_chip irq_type_hp_sim = { - .name = "hpsim", - .startup = hpsim_irq_startup, - .shutdown = hpsim_irq_noop, - .enable = hpsim_irq_noop, - .disable = hpsim_irq_noop, - .ack = hpsim_irq_noop, - .set_affinity = hpsim_set_affinity_noop, + .name = "hpsim", + .irq_startup = hpsim_irq_startup, + .irq_shutdown = hpsim_irq_noop, + .irq_enable = hpsim_irq_noop, + .irq_disable = hpsim_irq_noop, + .irq_ack = hpsim_irq_noop, + .irq_set_affinity = hpsim_set_affinity_noop, }; void __init -- cgit v0.10.2 From 4a983ed44f38a6a41649aaab54d699d5248d3a51 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sat, 5 Feb 2011 20:23:29 +0100 Subject: ia64: hp-sim: Cleanup direct access to irq_desc Use accessor functions instead of open coded access. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index 31dacfd..d7a3c46 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c @@ -40,12 +40,12 @@ static struct irq_chip irq_type_hp_sim = { void __init hpsim_irq_init (void) { - struct irq_desc *idesc; int i; - for (i = 0; i < NR_IRQS; ++i) { - idesc = irq_desc + i; - if (idesc->chip == &no_irq_chip) - idesc->chip = &irq_type_hp_sim; + for_each_active_irq(i) { + struct irq_chip *chip = get_irq_chip(i); + + if (chip == &no_irq_chip) + set_irq_chip(i, &irq_type_hp_sim); } } -- cgit v0.10.2 From 42c9a74d0ed6b2034ac450058b6b2cc0cc81139e Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:02:09 +0100 Subject: ia64: Convert msi_sn to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c index a5e500f..3234711 100644 --- a/arch/ia64/sn/kernel/msi_sn.c +++ b/arch/ia64/sn/kernel/msi_sn.c @@ -152,8 +152,8 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry) } #ifdef CONFIG_SMP -static int sn_set_msi_irq_affinity(unsigned int irq, - const struct cpumask *cpu_mask) +static int sn_set_msi_irq_affinity(struct irq_data *data, + const struct cpumask *cpu_mask, bool force) { struct msi_msg msg; int slice; @@ -164,7 +164,7 @@ static int sn_set_msi_irq_affinity(unsigned int irq, struct sn_irq_info *sn_irq_info; struct sn_irq_info *new_irq_info; struct sn_pcibus_provider *provider; - unsigned int cpu; + unsigned int cpu, irq = data->irq; cpu = cpumask_first(cpu_mask); sn_irq_info = sn_msi_info[irq].sn_irq_info; @@ -206,33 +206,33 @@ static int sn_set_msi_irq_affinity(unsigned int irq, msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); write_msi_msg(irq, &msg); - cpumask_copy(irq_desc[irq].affinity, cpu_mask); + cpumask_copy(data->affinity, cpu_mask); return 0; } #endif /* CONFIG_SMP */ -static void sn_ack_msi_irq(unsigned int irq) +static void sn_ack_msi_irq(struct irq_data *data) { - move_native_irq(irq); + move_native_irq(data->irq); ia64_eoi(); } -static int sn_msi_retrigger_irq(unsigned int irq) +static int sn_msi_retrigger_irq(struct irq_data *data) { - unsigned int vector = irq; + unsigned int vector = data->irq; ia64_resend_irq(vector); return 1; } static struct irq_chip sn_msi_chip = { - .name = "PCI-MSI", - .irq_mask = mask_msi_irq, - .irq_unmask = unmask_msi_irq, - .ack = sn_ack_msi_irq, + .name = "PCI-MSI", + .irq_mask = mask_msi_irq, + .irq_unmask = unmask_msi_irq, + .irq_ack = sn_ack_msi_irq, #ifdef CONFIG_SMP - .set_affinity = sn_set_msi_irq_affinity, + .irq_set_affinity = sn_set_msi_irq_affinity, #endif - .retrigger = sn_msi_retrigger_irq, + .irq_retrigger = sn_msi_retrigger_irq, }; -- cgit v0.10.2 From 545c8d8d4f03b2d9d3a556b05e7eaf2019c530d7 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:08:36 +0100 Subject: ia64: Convert sn to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 658c716..15193df 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -78,34 +78,34 @@ u64 sn_intr_redirect(nasid_t local_nasid, int local_widget, return ret_stuff.status; } -static unsigned int sn_startup_irq(unsigned int irq) +static unsigned int sn_startup_irq(struct irq_data *data) { return 0; } -static void sn_shutdown_irq(unsigned int irq) +static void sn_shutdown_irq(struct irq_data *data) { } extern void ia64_mca_register_cpev(int); -static void sn_disable_irq(unsigned int irq) +static void sn_disable_irq(struct irq_data *data) { - if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) + if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR)) ia64_mca_register_cpev(0); } -static void sn_enable_irq(unsigned int irq) +static void sn_enable_irq(struct irq_data *data) { - if (irq == local_vector_to_irq(IA64_CPE_VECTOR)) - ia64_mca_register_cpev(irq); + if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR)) + ia64_mca_register_cpev(data->irq); } -static void sn_ack_irq(unsigned int irq) +static void sn_ack_irq(struct irq_data *data) { u64 event_occurred, mask; + unsigned int irq = data->irq & 0xff; - irq = irq & 0xff; event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)); mask = event_occurred & SH_ALL_INT_MASK; HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); @@ -206,9 +206,11 @@ finish_up: return new_irq_info; } -static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask) +static int sn_set_affinity_irq(struct irq_data *data, + const struct cpumask *mask, bool force) { struct sn_irq_info *sn_irq_info, *sn_irq_info_safe; + unsigned int irq = data->irq; nasid_t nasid; int slice; @@ -237,25 +239,25 @@ void sn_set_err_irq_affinity(unsigned int irq) { } #endif static void -sn_mask_irq(unsigned int irq) +sn_mask_irq(struct irq_data *data) { } static void -sn_unmask_irq(unsigned int irq) +sn_unmask_irq(struct irq_data *data) { } struct irq_chip irq_type_sn = { - .name = "SN hub", - .startup = sn_startup_irq, - .shutdown = sn_shutdown_irq, - .enable = sn_enable_irq, - .disable = sn_disable_irq, - .ack = sn_ack_irq, - .mask = sn_mask_irq, - .unmask = sn_unmask_irq, - .set_affinity = sn_set_affinity_irq + .name = "SN hub", + .irq_startup = sn_startup_irq, + .irq_shutdown = sn_shutdown_irq, + .irq_enable = sn_enable_irq, + .irq_disable = sn_disable_irq, + .irq_ack = sn_ack_irq, + .irq_mask = sn_mask_irq, + .irq_unmask = sn_unmask_irq, + .irq_set_affinity = sn_set_affinity_irq }; ia64_vector sn_irq_to_vector(int irq) -- cgit v0.10.2 From f1f701e937b542368a43b55b437ac90d74d724d9 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:18:43 +0100 Subject: ia64: Convert msi to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index 00b19a4..b39702d 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c @@ -12,12 +12,13 @@ static struct irq_chip ia64_msi_chip; #ifdef CONFIG_SMP -static int ia64_set_msi_irq_affinity(unsigned int irq, - const cpumask_t *cpu_mask) +static int ia64_set_msi_irq_affinity(struct irq_data *idata, + const cpumask_t *cpu_mask, bool force) { struct msi_msg msg; u32 addr, data; int cpu = first_cpu(*cpu_mask); + unsigned int irq = idata->irq; if (!cpu_online(cpu)) return -1; @@ -38,7 +39,7 @@ static int ia64_set_msi_irq_affinity(unsigned int irq, msg.data = data; write_msi_msg(irq, &msg); - cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); + cpumask_copy(idata->affinity, cpumask_of(cpu)); return 0; } @@ -84,16 +85,16 @@ void ia64_teardown_msi_irq(unsigned int irq) destroy_irq(irq); } -static void ia64_ack_msi_irq(unsigned int irq) +static void ia64_ack_msi_irq(struct irq_data *data) { - irq_complete_move(irq); - move_native_irq(irq); + irq_complete_move(data->irq); + move_native_irq(data->irq); ia64_eoi(); } -static int ia64_msi_retrigger_irq(unsigned int irq) +static int ia64_msi_retrigger_irq(struct irq_data *data) { - unsigned int vector = irq_to_vector(irq); + unsigned int vector = irq_to_vector(data->irq); ia64_resend_irq(vector); return 1; @@ -103,14 +104,14 @@ static int ia64_msi_retrigger_irq(unsigned int irq) * Generic ops used on most IA64 platforms. */ static struct irq_chip ia64_msi_chip = { - .name = "PCI-MSI", - .irq_mask = mask_msi_irq, - .irq_unmask = unmask_msi_irq, - .ack = ia64_ack_msi_irq, + .name = "PCI-MSI", + .irq_mask = mask_msi_irq, + .irq_unmask = unmask_msi_irq, + .irq_ack = ia64_ack_msi_irq, #ifdef CONFIG_SMP - .set_affinity = ia64_set_msi_irq_affinity, + .irq_set_affinity = ia64_set_msi_irq_affinity, #endif - .retrigger = ia64_msi_retrigger_irq, + .irq_retrigger = ia64_msi_retrigger_irq, }; @@ -132,8 +133,10 @@ void arch_teardown_msi_irq(unsigned int irq) #ifdef CONFIG_DMAR #ifdef CONFIG_SMP -static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) +static int dmar_msi_set_affinity(struct irq_data *data, + const struct cpumask *mask, bool force) { + unsigned int irq = data->irq; struct irq_cfg *cfg = irq_cfg + irq; struct msi_msg msg; int cpu = cpumask_first(mask); @@ -152,7 +155,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); dmar_msi_write(irq, &msg); - cpumask_copy(irq_desc[irq].affinity, mask); + cpumask_copy(data->affinity, mask); return 0; } @@ -162,11 +165,11 @@ static struct irq_chip dmar_msi_type = { .name = "DMAR_MSI", .irq_unmask = dmar_msi_unmask, .irq_mask = dmar_msi_mask, - .ack = ia64_ack_msi_irq, + .irq_ack = ia64_ack_msi_irq, #ifdef CONFIG_SMP - .set_affinity = dmar_msi_set_affinity, + .irq_set_affinity = dmar_msi_set_affinity, #endif - .retrigger = ia64_msi_retrigger_irq, + .irq_retrigger = ia64_msi_retrigger_irq, }; static int -- cgit v0.10.2 From 5c217b60fed39ed2ac6a2e8b788df4a74fa68878 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:29:37 +0100 Subject: ia64: Convert lsapic to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c index a50dffa..1b3a776 100644 --- a/arch/ia64/kernel/irq_lsapic.c +++ b/arch/ia64/kernel/irq_lsapic.c @@ -15,30 +15,30 @@ #include static unsigned int -lsapic_noop_startup (unsigned int irq) +lsapic_noop_startup (struct irq_data *data) { return 0; } static void -lsapic_noop (unsigned int irq) +lsapic_noop (struct irq_data *data) { /* nothing to do... */ } -static int lsapic_retrigger(unsigned int irq) +static int lsapic_retrigger(struct irq_data *data) { - ia64_resend_irq(irq); + ia64_resend_irq(data->irq); return 1; } struct irq_chip irq_type_ia64_lsapic = { - .name = "LSAPIC", - .startup = lsapic_noop_startup, - .shutdown = lsapic_noop, - .enable = lsapic_noop, - .disable = lsapic_noop, - .ack = lsapic_noop, - .retrigger = lsapic_retrigger, + .name = "LSAPIC", + .irq_startup = lsapic_noop_startup, + .irq_shutdown = lsapic_noop, + .irq_enable = lsapic_noop, + .irq_disable = lsapic_noop, + .irq_ack = lsapic_noop, + .irq_retrigger = lsapic_retrigger, }; -- cgit v0.10.2 From 8fac171f72efb2e62f34ffeca22820823e60cdb0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 4 Feb 2011 20:31:21 +0100 Subject: ia64: Convert iosapic to new irq_chip functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index d21f9af..e395455 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -257,7 +257,7 @@ set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) } static void -nop (unsigned int irq) +nop (struct irq_data *data) { /* do nothing... */ } @@ -287,8 +287,9 @@ kexec_disable_iosapic(void) #endif static void -mask_irq (unsigned int irq) +mask_irq (struct irq_data *data) { + unsigned int irq = data->irq; u32 low32; int rte_index; struct iosapic_rte_info *rte; @@ -305,8 +306,9 @@ mask_irq (unsigned int irq) } static void -unmask_irq (unsigned int irq) +unmask_irq (struct irq_data *data) { + unsigned int irq = data->irq; u32 low32; int rte_index; struct iosapic_rte_info *rte; @@ -323,9 +325,11 @@ unmask_irq (unsigned int irq) static int -iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) +iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask, + bool force) { #ifdef CONFIG_SMP + unsigned int irq = data->irq; u32 high32, low32; int cpu, dest, rte_index; int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; @@ -379,15 +383,16 @@ iosapic_set_affinity(unsigned int irq, const struct cpumask *mask) */ static unsigned int -iosapic_startup_level_irq (unsigned int irq) +iosapic_startup_level_irq (struct irq_data *data) { - unmask_irq(irq); + unmask_irq(data); return 0; } static void -iosapic_unmask_level_irq (unsigned int irq) +iosapic_unmask_level_irq (struct irq_data *data) { + unsigned int irq = data->irq; ia64_vector vec = irq_to_vector(irq); struct iosapic_rte_info *rte; int do_unmask_irq = 0; @@ -395,16 +400,16 @@ iosapic_unmask_level_irq (unsigned int irq) irq_complete_move(irq); if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { do_unmask_irq = 1; - mask_irq(irq); + mask_irq(data); } else - unmask_irq(irq); + unmask_irq(data); list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) iosapic_eoi(rte->iosapic->addr, vec); if (unlikely(do_unmask_irq)) { move_masked_irq(irq); - unmask_irq(irq); + unmask_irq(data); } } @@ -414,15 +419,15 @@ iosapic_unmask_level_irq (unsigned int irq) #define iosapic_ack_level_irq nop static struct irq_chip irq_type_iosapic_level = { - .name = "IO-SAPIC-level", - .startup = iosapic_startup_level_irq, - .shutdown = iosapic_shutdown_level_irq, - .enable = iosapic_enable_level_irq, - .disable = iosapic_disable_level_irq, - .ack = iosapic_ack_level_irq, - .mask = mask_irq, - .unmask = iosapic_unmask_level_irq, - .set_affinity = iosapic_set_affinity + .name = "IO-SAPIC-level", + .irq_startup = iosapic_startup_level_irq, + .irq_shutdown = iosapic_shutdown_level_irq, + .irq_enable = iosapic_enable_level_irq, + .irq_disable = iosapic_disable_level_irq, + .irq_ack = iosapic_ack_level_irq, + .irq_mask = mask_irq, + .irq_unmask = iosapic_unmask_level_irq, + .irq_set_affinity = iosapic_set_affinity }; /* @@ -430,9 +435,9 @@ static struct irq_chip irq_type_iosapic_level = { */ static unsigned int -iosapic_startup_edge_irq (unsigned int irq) +iosapic_startup_edge_irq (struct irq_data *data) { - unmask_irq(irq); + unmask_irq(data); /* * IOSAPIC simply drops interrupts pended while the * corresponding pin was masked, so we can't know if an @@ -442,8 +447,9 @@ iosapic_startup_edge_irq (unsigned int irq) } static void -iosapic_ack_edge_irq (unsigned int irq) +iosapic_ack_edge_irq (struct irq_data *data) { + unsigned int irq = data->irq; struct irq_desc *idesc = irq_desc + irq; irq_complete_move(irq); @@ -455,22 +461,22 @@ iosapic_ack_edge_irq (unsigned int irq) */ if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) == (IRQ_PENDING|IRQ_DISABLED)) - mask_irq(irq); + mask_irq(data); } #define iosapic_enable_edge_irq unmask_irq #define iosapic_disable_edge_irq nop static struct irq_chip irq_type_iosapic_edge = { - .name = "IO-SAPIC-edge", - .startup = iosapic_startup_edge_irq, - .shutdown = iosapic_disable_edge_irq, - .enable = iosapic_enable_edge_irq, - .disable = iosapic_disable_edge_irq, - .ack = iosapic_ack_edge_irq, - .mask = mask_irq, - .unmask = unmask_irq, - .set_affinity = iosapic_set_affinity + .name = "IO-SAPIC-edge", + .irq_startup = iosapic_startup_edge_irq, + .irq_shutdown = iosapic_disable_edge_irq, + .irq_enable = iosapic_enable_edge_irq, + .irq_disable = iosapic_disable_edge_irq, + .irq_ack = iosapic_ack_edge_irq, + .irq_mask = mask_irq, + .irq_unmask = unmask_irq, + .irq_set_affinity = iosapic_set_affinity }; static unsigned int -- cgit v0.10.2 From e5ffece737378ddefb3412f76e8d2928915af3a1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 19:40:39 +0100 Subject: ia64: sn: Drop unused function Leftover from the irq chip conversion. Reported-by: Tony Luck Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 15193df..79ef3d0 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -23,11 +23,9 @@ #include #include -static void force_interrupt(int irq); static void register_intr_pda(struct sn_irq_info *sn_irq_info); static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); -int sn_force_interrupt_flag = 1; extern int sn_ioif_inited; struct list_head **sn_irq_lh; static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ @@ -423,20 +421,6 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info) (*pci_provider->force_interrupt)(sn_irq_info); } -static void force_interrupt(int irq) -{ - struct sn_irq_info *sn_irq_info; - - if (!sn_ioif_inited) - return; - - rcu_read_lock(); - list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) - sn_call_force_intr_provider(sn_irq_info); - - rcu_read_unlock(); -} - /* * Check for lost interrupts. If the PIC int_status reg. says that * an interrupt has been sent, but not handled, and the interrupt -- cgit v0.10.2 From dea1078e1a67f3d877ef553e3189df20fcca54e0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:16:05 +0100 Subject: ia64: iosapic: Cleanup irq_desc access Use irq_to_desc() and use accessors for setting chip and handler. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index e395455..858a995 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -566,8 +566,7 @@ static int register_intr (unsigned int gsi, int irq, unsigned char delivery, unsigned long polarity, unsigned long trigger) { - struct irq_desc *idesc; - struct irq_chip *irq_type; + struct irq_chip *chip, *irq_type; int index; struct iosapic_rte_info *rte; @@ -614,19 +613,18 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery, irq_type = iosapic_get_irq_chip(trigger); - idesc = irq_desc + irq; - if (irq_type != NULL && idesc->chip != irq_type) { - if (idesc->chip != &no_irq_chip) + chip = irq_get_chip(irq); + if (irq_type != NULL && chip != irq_type) { + if (chip != &no_irq_chip) printk(KERN_WARNING "%s: changing vector %d from %s to %s\n", __func__, irq_to_vector(irq), - idesc->chip->name, irq_type->name); - idesc->chip = irq_type; + chip->name, irq_type->name); + chip = irq_type; } - if (trigger == IOSAPIC_EDGE) - __set_irq_handler_unlocked(irq, handle_edge_irq); - else - __set_irq_handler_unlocked(irq, handle_level_irq); + __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ? + handle_edge_irq : handle_level_irq, + NULL); return 0; } @@ -736,6 +734,7 @@ iosapic_register_intr (unsigned int gsi, struct iosapic_rte_info *rte; u32 low32; unsigned char dmode; + struct irq_desc *desc; /* * If this GSI has already been registered (i.e., it's a @@ -763,12 +762,13 @@ iosapic_register_intr (unsigned int gsi, goto unlock_iosapic_lock; } - raw_spin_lock(&irq_desc[irq].lock); + desc = irq_to_desc(irq); + raw_spin_lock(&desc->lock); dest = get_target_cpu(gsi, irq); dmode = choose_dmode(); err = register_intr(gsi, irq, dmode, polarity, trigger); if (err < 0) { - raw_spin_unlock(&irq_desc[irq].lock); + raw_spin_unlock(&desc->lock); irq = err; goto unlock_iosapic_lock; } @@ -787,7 +787,7 @@ iosapic_register_intr (unsigned int gsi, (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), cpu_logical_id(dest), dest, irq_to_vector(irq)); - raw_spin_unlock(&irq_desc[irq].lock); + raw_spin_unlock(&desc->lock); unlock_iosapic_lock: spin_unlock_irqrestore(&iosapic_lock, flags); return irq; @@ -798,7 +798,6 @@ iosapic_unregister_intr (unsigned int gsi) { unsigned long flags; int irq, index; - struct irq_desc *idesc; u32 low32; unsigned long trigger, polarity; unsigned int dest; @@ -828,7 +827,6 @@ iosapic_unregister_intr (unsigned int gsi) if (--rte->refcnt > 0) goto out; - idesc = irq_desc + irq; rte->refcnt = NO_REF_RTE; /* Mask the interrupt */ @@ -852,7 +850,7 @@ iosapic_unregister_intr (unsigned int gsi) if (iosapic_intr_info[irq].count == 0) { #ifdef CONFIG_SMP /* Clear affinity */ - cpumask_setall(idesc->affinity); + cpumask_setall(irq_get_irq_data(irq)->affinity); #endif /* Clear the interrupt information */ iosapic_intr_info[irq].dest = 0; -- cgit v0.10.2 From 41ef0203214644ad003e8dac0147a3e5b6381034 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:18:14 +0100 Subject: ia64: xen: Use irq accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/xen/irq_xen.c b/arch/ia64/xen/irq_xen.c index a3fb7cf..108bb85 100644 --- a/arch/ia64/xen/irq_xen.c +++ b/arch/ia64/xen/irq_xen.c @@ -138,7 +138,6 @@ static void __xen_register_percpu_irq(unsigned int cpu, unsigned int vec, struct irqaction *action, int save) { - struct irq_desc *desc; int irq = 0; if (xen_slab_ready) { @@ -223,8 +222,7 @@ __xen_register_percpu_irq(unsigned int cpu, unsigned int vec, * mark the interrupt for migrations and trigger it * on cpu hotplug. */ - desc = irq_desc + irq; - desc->status |= IRQ_PER_CPU; + irq_set_status_flags(irq, IRQ_PER_CPU); } } -- cgit v0.10.2 From a2178334e9e7bb0fc11c9706114b43dbdd612ce4 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 16:44:38 +0100 Subject: ia64: Use accessor functions all over the place Use the proper accessor functions instead of open coded irq_desc access. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index ba29817..3fbf4bf 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -103,7 +103,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 }; void set_irq_affinity_info (unsigned int irq, int hwid, int redir) { if (irq < NR_IRQS) { - cpumask_copy(irq_desc[irq].affinity, + cpumask_copy(irq_get_irq_data(irq)->affinity, cpumask_of(cpu_logical_id(hwid))); irq_redir[irq] = (char) (redir & 0xff); } diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c index 38c07b8..8adb08b 100644 --- a/arch/ia64/kernel/irq_ia64.c +++ b/arch/ia64/kernel/irq_ia64.c @@ -343,7 +343,7 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id) if (irq < 0) continue; - desc = irq_desc + irq; + desc = irq_to_desc(irq); cfg = irq_cfg + irq; raw_spin_lock(&desc->lock); if (!cfg->move_cleanup_count) @@ -626,13 +626,11 @@ static struct irqaction tlb_irqaction = { void ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action) { - struct irq_desc *desc; unsigned int irq; irq = vec; BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); - desc = irq_desc + irq; - desc->status |= IRQ_PER_CPU; + irq_set_status_flags(irq, IRQ_PER_CPU); set_irq_chip(irq, &irq_type_ia64_lsapic); if (action) setup_irq(irq, action); diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 80d50b8..84fb405 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c @@ -2125,7 +2125,6 @@ ia64_mca_late_init(void) cpe_poll_timer.function = ia64_mca_cpe_poll; { - struct irq_desc *desc; unsigned int irq; if (cpe_vector >= 0) { @@ -2133,8 +2132,7 @@ ia64_mca_late_init(void) irq = local_vector_to_irq(cpe_vector); if (irq > 0) { cpe_poll_enabled = 0; - desc = irq_desc + irq; - desc->status |= IRQ_PER_CPU; + irq_set_status_flags(irq, IRQ_PER_CPU); setup_irq(irq, &mca_cpe_irqaction); ia64_cpe_irq = irq; ia64_mca_register_cpev(cpe_vector); diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 79ef3d0..b2aa793 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -273,15 +273,13 @@ unsigned int sn_local_vector_to_irq(u8 vector) void sn_irq_init(void) { int i; - struct irq_desc *base_desc = irq_desc; ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR; ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; for (i = 0; i < NR_IRQS; i++) { - if (base_desc[i].chip == &no_irq_chip) { - base_desc[i].chip = &irq_type_sn; - } + if (irq_get_chip(i) == &no_irq_chip) + irq_set_chip(i, &irq_type_sn); } } -- cgit v0.10.2 From 459960d831d14924eb4bcccadeb03ec81a1f524c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:25:06 +0100 Subject: ia64: iosapic: Remove redundant mask from ack() The core code calls mask_ack() which calls irq_ack() and irq_mask() for the case where an interrupt is disabled and marked pending. That seems to be a leftover from the old __do_IRQ() mode. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 858a995..9209835 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -450,18 +450,9 @@ static void iosapic_ack_edge_irq (struct irq_data *data) { unsigned int irq = data->irq; - struct irq_desc *idesc = irq_desc + irq; irq_complete_move(irq); move_native_irq(irq); - /* - * Once we have recorded IRQ_PENDING already, we can mask the - * interrupt for real. This prevents IRQ storms from unhandled - * devices. - */ - if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) == - (IRQ_PENDING|IRQ_DISABLED)) - mask_irq(data); } #define iosapic_enable_edge_irq unmask_irq -- cgit v0.10.2 From 91ce72e08047190291777ec56598118225910203 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:30:53 +0100 Subject: ia64: iosapic: Use new irq_move_* functions The current functions are going away. Also use the accessor for pending setaffinity in irq_data instead of the open coded irq_desc access. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index 9209835..b0f9afe 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c @@ -398,7 +398,7 @@ iosapic_unmask_level_irq (struct irq_data *data) int do_unmask_irq = 0; irq_complete_move(irq); - if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) { + if (unlikely(irqd_is_setaffinity_pending(data))) { do_unmask_irq = 1; mask_irq(data); } else @@ -408,7 +408,7 @@ iosapic_unmask_level_irq (struct irq_data *data) iosapic_eoi(rte->iosapic->addr, vec); if (unlikely(do_unmask_irq)) { - move_masked_irq(irq); + irq_move_masked_irq(data); unmask_irq(data); } } @@ -449,10 +449,8 @@ iosapic_startup_edge_irq (struct irq_data *data) static void iosapic_ack_edge_irq (struct irq_data *data) { - unsigned int irq = data->irq; - - irq_complete_move(irq); - move_native_irq(irq); + irq_complete_move(data->irq); + irq_move_irq(data); } #define iosapic_enable_edge_irq unmask_irq -- cgit v0.10.2 From b5f0149626ebca4e5f8dd465d335d1b05f28608b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:35:17 +0100 Subject: ia64: sn: Use irq_move_irq() This replaces the old move_native_irq() function which is going away. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index b2aa793..69578cf 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -109,7 +109,7 @@ static void sn_ack_irq(struct irq_data *data) HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask); __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs); - move_native_irq(irq); + irq_move_irq(data); } static void sn_irq_info_free(struct rcu_head *head); diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c index 3234711..bedb9dd 100644 --- a/arch/ia64/sn/kernel/msi_sn.c +++ b/arch/ia64/sn/kernel/msi_sn.c @@ -214,7 +214,7 @@ static int sn_set_msi_irq_affinity(struct irq_data *data, static void sn_ack_msi_irq(struct irq_data *data) { - move_native_irq(data->irq); + irq_move_irq(data); ia64_eoi(); } -- cgit v0.10.2 From 97499b2ed7ce80cb03e9f513f9f552f833501fbe Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:36:55 +0100 Subject: ia64: msi: Use irq_move_irq() This replaces the old move_native_irq() function which is going away. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index b39702d..524d5cc 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c @@ -88,7 +88,7 @@ void ia64_teardown_msi_irq(unsigned int irq) static void ia64_ack_msi_irq(struct irq_data *data) { irq_complete_move(data->irq); - move_native_irq(data->irq); + irq_move_irq(data); ia64_eoi(); } -- cgit v0.10.2 From 33776b009a45c8e921c47ea2d8304104677ee778 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:43:34 +0100 Subject: ia64: sn: Use irqd_mark_affinity_set() helper irq_desc->status is going to be restricted. Provide a helper to set that information in irq_data, where it belongs. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index 69578cf..cbb4e54 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -353,7 +353,6 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info) int cpu = nasid_slice_to_cpuid(nasid, slice); #ifdef CONFIG_SMP int cpuphys; - struct irq_desc *desc; #endif pci_dev_get(pci_dev); @@ -370,12 +369,11 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info) #ifdef CONFIG_SMP cpuphys = cpu_physical_id(cpu); set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0); - desc = irq_to_desc(sn_irq_info->irq_irq); /* * Affinity was set by the PROM, prevent it from * being reset by the request_irq() path. */ - desc->status |= IRQ_AFFINITY_SET; + irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq)); #endif } -- cgit v0.10.2 From f5e5bf088bd3d30990efb7429aaf9f1e5134ffd6 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 20:50:49 +0100 Subject: ia64: Use irqd_irq_disabled() instead of desc->status access Remove the last open coded access to irq_desc. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index 3fbf4bf..ba2760d 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -137,7 +137,7 @@ static void migrate_irqs(void) struct irq_data *data = irq_desc_get_irq_data(desc); struct irq_chip *chip = irq_data_get_irq_chip(data); - if (desc->status == IRQ_DISABLED) + if (irqd_irq_disabled(data)) continue; /* diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index cbb4e54..7f399f9 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c @@ -412,7 +412,7 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info) pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; /* Don't force an interrupt if the irq has been disabled */ - if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) && + if (!irqd_irq_disabled(sn_irq_info->irq_irq) && pci_provider && pci_provider->force_interrupt) (*pci_provider->force_interrupt)(sn_irq_info); } -- cgit v0.10.2 From e3d781227808d12a5d5228028bf01de3e3824f69 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 21:04:38 +0100 Subject: ia64: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index fcf3b43..c4ea092 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -26,6 +26,7 @@ config IA64 select GENERIC_IRQ_PROBE select GENERIC_PENDING_IRQ if SMP select IRQ_PER_CPU + select GENERIC_IRQ_SHOW default y help The Itanium Processor Family is Intel's 64-bit successor to diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index ba2760d..ad69606 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -53,47 +53,9 @@ atomic_t irq_err_count; /* * /proc/interrupts printing: */ - -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - char cpuname[16]; - seq_printf(p, " "); - for_each_online_cpu(j) { - snprintf(cpuname, 10, "CPU%d", j); - seq_printf(p, "%10s ", cpuname); - } - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto skip; - seq_printf(p, "%3d: ",i); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(i)); -#else - for_each_online_cpu(j) { - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); - } -#endif - seq_printf(p, " %14s", irq_desc[i].chip->name); - seq_printf(p, " %s", action->name); - - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) - seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); + seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); return 0; } -- cgit v0.10.2 From 53c909c96ade613b5b485fadf7c3b833b3fd0bc7 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 21:06:09 +0100 Subject: ia64: Convert to the new irq_* function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index d7a3c46..4bd9a63 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c @@ -43,9 +43,9 @@ hpsim_irq_init (void) int i; for_each_active_irq(i) { - struct irq_chip *chip = get_irq_chip(i); + struct irq_chip *chip = irq_get_chip(i); if (chip == &no_irq_chip) - set_irq_chip(i, &irq_type_hp_sim); + irq_set_chip(i, &irq_type_hp_sim); } } diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c index 8adb08b..5b70474 100644 --- a/arch/ia64/kernel/irq_ia64.c +++ b/arch/ia64/kernel/irq_ia64.c @@ -631,10 +631,10 @@ ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action) irq = vec; BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); irq_set_status_flags(irq, IRQ_PER_CPU); - set_irq_chip(irq, &irq_type_ia64_lsapic); + irq_set_chip(irq, &irq_type_ia64_lsapic); if (action) setup_irq(irq, action); - set_irq_handler(irq, handle_percpu_irq); + irq_set_handler(irq, handle_percpu_irq); } void __init diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index 524d5cc..009df54 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c @@ -56,7 +56,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) if (irq < 0) return irq; - set_irq_msi(irq, desc); + irq_set_msi_desc(irq, desc); cpus_and(mask, irq_to_domain(irq), cpu_online_map); dest_phys_id = cpu_physical_id(first_cpu(mask)); vector = irq_to_vector(irq); @@ -75,7 +75,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) MSI_DATA_VECTOR(vector); write_msi_msg(irq, &msg); - set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); + irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); return 0; } @@ -206,8 +206,8 @@ int arch_setup_dmar_msi(unsigned int irq) if (ret < 0) return ret; dmar_msi_write(irq, &msg); - set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, - "edge"); + irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, + "edge"); return 0; } #endif /* CONFIG_DMAR */ diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c index bedb9dd..2b98b9e 100644 --- a/arch/ia64/sn/kernel/msi_sn.c +++ b/arch/ia64/sn/kernel/msi_sn.c @@ -144,9 +144,9 @@ int sn_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *entry) */ msg.data = 0x100 + irq; - set_irq_msi(irq, entry); + irq_set_msi_desc(irq, entry); write_msi_msg(irq, &msg); - set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq); + irq_set_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq); return 0; } -- cgit v0.10.2 From a749f8a547d4a18cf8d6c521832eb36e13114a70 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:50:08 +0200 Subject: ia64: Remove redundant declaration of irq_desc[] Signed-off-by: Thomas Gleixner diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h index bf2e374..a681d02 100644 --- a/arch/ia64/include/asm/hw_irq.h +++ b/arch/ia64/include/asm/hw_irq.h @@ -151,9 +151,6 @@ static inline void ia64_native_resend_irq(unsigned int vector) /* * Default implementations for the irq-descriptor API: */ - -extern struct irq_desc irq_desc[NR_IRQS]; - #ifndef CONFIG_IA64_GENERIC static inline ia64_vector __ia64_irq_to_vector(int irq) { -- cgit v0.10.2 From 4adc192ec7d977c74c750320f289af9d61c1caca Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 14:52:04 +0100 Subject: microblaze: Convert to new irq function names Namespace conversion scripted with coccinelle. Also retrieve the irq type from irq_data in intc_enable_or_unmask() Signed-off-by: Thomas Gleixner diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c index e466128..5ba7e16 100644 --- a/arch/microblaze/kernel/intc.c +++ b/arch/microblaze/kernel/intc.c @@ -50,7 +50,7 @@ static void intc_enable_or_unmask(struct irq_data *d) * ack function since the handle_level_irq function * acks the irq before calling the interrupt handler */ - if (irq_to_desc(d->irq)->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) out_be32(INTC_BASE + IAR, mask); } @@ -157,11 +157,11 @@ void __init init_IRQ(void) for (i = 0; i < nr_irq; ++i) { if (intr_type & (0x00000001 << i)) { - set_irq_chip_and_handler_name(i, &intc_dev, + irq_set_chip_and_handler_name(i, &intc_dev, handle_edge_irq, intc_dev.name); irq_clear_status_flags(i, IRQ_LEVEL); } else { - set_irq_chip_and_handler_name(i, &intc_dev, + irq_set_chip_and_handler_name(i, &intc_dev, handle_level_irq, intc_dev.name); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 1e01a12..5359906 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -237,7 +237,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev) virq = irq_create_mapping(NULL, line); if (virq != NO_IRQ) - set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); } else { pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n", oirq.size, oirq.specifier[0], oirq.specifier[1], -- cgit v0.10.2 From 9d61c18b25726306c9231428c17db42e3ff29ba7 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 14:55:52 +0100 Subject: microblaze: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 5f0cf0e..c49c326 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -18,6 +18,7 @@ config MICROBLAZE select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW config SWAP def_bool n diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c index 0988224..ce7ac84 100644 --- a/arch/microblaze/kernel/irq.c +++ b/arch/microblaze/kernel/irq.c @@ -47,48 +47,6 @@ next_irq: trace_hardirqs_on(); } -int show_interrupts(struct seq_file *p, void *v) -{ - int i = *(loff_t *) v, j; - struct irq_desc *desc; - struct irqaction *action; - unsigned long flags; - - if (i == 0) { - seq_printf(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%-8d", j); - seq_putc(p, '\n'); - } - - if (i < nr_irq) { - desc = irq_to_desc(i); - raw_spin_lock_irqsave(&desc->lock, flags); - action = desc->action; - if (!action) - goto skip; - seq_printf(p, "%3d: ", i); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(i)); -#else - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); -#endif - seq_printf(p, " %8s", desc->status & - IRQ_LEVEL ? "level" : "edge"); - seq_printf(p, " %8s", desc->irq_data.chip->name); - seq_printf(p, " %s", action->name); - - for (action = action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -skip: - raw_spin_unlock_irqrestore(&desc->lock, flags); - } - return 0; -} - /* MS: There is no any advance mapping mechanism. We are using simple 32bit intc without any cascades or any connection that's why mapping is 1:1 */ unsigned int irq_create_mapping(struct irq_host *host, irq_hw_number_t hwirq) -- cgit v0.10.2 From a458465641bf61a00f4ca54da7265202a911f975 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 27 Mar 2011 16:54:26 +0200 Subject: MIPS: Fix syncfs syscall copy and paste failure Signed-off-by: Thomas Gleixner diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index dae22c1..fa2e37e 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -1005,7 +1005,7 @@ #define __NR_name_to_handle_at (__NR_Linux + 303) #define __NR_open_by_handle_at (__NR_Linux + 304) #define __NR_clock_adjtime (__NR_Linux + 305) -#define __NR_clock_adjtime (__NR_Linux + 306) +#define __NR_syncfs (__NR_Linux + 306) /* * Offset of the last N32 flavoured syscall -- cgit v0.10.2 From 0c3263870f5f80cf7b6cb322bd8e708ce568d36b Mon Sep 17 00:00:00 2001 From: David Daney Date: Fri, 25 Mar 2011 12:38:51 -0700 Subject: MIPS: Octeon: Rewrite interrupt handling code. This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: David Daney Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: Thomas Gleixner diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index ce7500c..03c081d 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -3,10 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2004-2008, 2009, 2010 Cavium Networks + * Copyright (C) 2004-2008, 2009, 2010, 2011 Cavium Networks */ -#include + #include +#include +#include +#include #include #include @@ -14,6 +17,47 @@ static DEFINE_RAW_SPINLOCK(octeon_irq_ciu0_lock); static DEFINE_RAW_SPINLOCK(octeon_irq_ciu1_lock); +static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu0_en_mirror); +static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu1_en_mirror); + +static __read_mostly u8 octeon_irq_ciu_to_irq[8][64]; + +union octeon_ciu_chip_data { + void *p; + unsigned long l; + struct { + unsigned int line:6; + unsigned int bit:6; + } s; +}; + +struct octeon_core_chip_data { + struct mutex core_irq_mutex; + bool current_en; + bool desired_en; + u8 bit; +}; + +#define MIPS_CORE_IRQ_LINES 8 + +static struct octeon_core_chip_data octeon_irq_core_chip_data[MIPS_CORE_IRQ_LINES]; + +static void __init octeon_irq_set_ciu_mapping(int irq, int line, int bit, + struct irq_chip *chip, + irq_flow_handler_t handler) +{ + union octeon_ciu_chip_data cd; + + irq_set_chip_and_handler(irq, chip, handler); + + cd.l = 0; + cd.s.line = line; + cd.s.bit = bit; + + irq_set_chip_data(irq, cd.p); + octeon_irq_ciu_to_irq[line][bit] = irq; +} + static int octeon_coreid_for_cpu(int cpu) { #ifdef CONFIG_SMP @@ -23,9 +67,20 @@ static int octeon_coreid_for_cpu(int cpu) #endif } -static void octeon_irq_core_ack(unsigned int irq) +static int octeon_cpu_for_coreid(int coreid) +{ +#ifdef CONFIG_SMP + return cpu_number_map(coreid); +#else + return smp_processor_id(); +#endif +} + +static void octeon_irq_core_ack(struct irq_data *data) { - unsigned int bit = irq - OCTEON_IRQ_SW0; + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + unsigned int bit = cd->bit; + /* * We don't need to disable IRQs to make these atomic since * they are already disabled earlier in the low level @@ -37,131 +92,133 @@ static void octeon_irq_core_ack(unsigned int irq) clear_c0_cause(0x100 << bit); } -static void octeon_irq_core_eoi(unsigned int irq) +static void octeon_irq_core_eoi(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - unsigned int bit = irq - OCTEON_IRQ_SW0; - /* - * If an IRQ is being processed while we are disabling it the - * handler will attempt to unmask the interrupt after it has - * been disabled. - */ - if ((unlikely(desc->status & IRQ_DISABLED))) - return; + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + /* * We don't need to disable IRQs to make these atomic since * they are already disabled earlier in the low level * interrupt code. */ - set_c0_status(0x100 << bit); + set_c0_status(0x100 << cd->bit); } -static void octeon_irq_core_enable(unsigned int irq) +static void octeon_irq_core_set_enable_local(void *arg) { - unsigned long flags; - unsigned int bit = irq - OCTEON_IRQ_SW0; + struct irq_data *data = arg; + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + unsigned int mask = 0x100 << cd->bit; /* - * We need to disable interrupts to make sure our updates are - * atomic. + * Interrupts are already disabled, so these are atomic. */ - local_irq_save(flags); - set_c0_status(0x100 << bit); - local_irq_restore(flags); + if (cd->desired_en) + set_c0_status(mask); + else + clear_c0_status(mask); + } -static void octeon_irq_core_disable_local(unsigned int irq) +static void octeon_irq_core_disable(struct irq_data *data) { - unsigned long flags; - unsigned int bit = irq - OCTEON_IRQ_SW0; - /* - * We need to disable interrupts to make sure our updates are - * atomic. - */ - local_irq_save(flags); - clear_c0_status(0x100 << bit); - local_irq_restore(flags); + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + cd->desired_en = false; } -static void octeon_irq_core_disable(unsigned int irq) +static void octeon_irq_core_enable(struct irq_data *data) { -#ifdef CONFIG_SMP - on_each_cpu((void (*)(void *)) octeon_irq_core_disable_local, - (void *) (long) irq, 1); -#else - octeon_irq_core_disable_local(irq); -#endif + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + cd->desired_en = true; } -static struct irq_chip octeon_irq_chip_core = { - .name = "Core", - .enable = octeon_irq_core_enable, - .disable = octeon_irq_core_disable, - .ack = octeon_irq_core_ack, - .eoi = octeon_irq_core_eoi, -}; +static void octeon_irq_core_bus_lock(struct irq_data *data) +{ + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + mutex_lock(&cd->core_irq_mutex); +} -static void octeon_irq_ciu0_ack(unsigned int irq) +static void octeon_irq_core_bus_sync_unlock(struct irq_data *data) { - switch (irq) { - case OCTEON_IRQ_GMX_DRP0: - case OCTEON_IRQ_GMX_DRP1: - case OCTEON_IRQ_IPD_DRP: - case OCTEON_IRQ_KEY_ZERO: - case OCTEON_IRQ_TIMER0: - case OCTEON_IRQ_TIMER1: - case OCTEON_IRQ_TIMER2: - case OCTEON_IRQ_TIMER3: - { - int index = cvmx_get_core_num() * 2; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); - /* - * CIU timer type interrupts must be acknoleged by - * writing a '1' bit to their sum0 bit. - */ - cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask); - break; - } - default: - break; + struct octeon_core_chip_data *cd = irq_data_get_irq_chip_data(data); + + if (cd->desired_en != cd->current_en) { + on_each_cpu(octeon_irq_core_set_enable_local, data, 1); + + cd->current_en = cd->desired_en; } - /* - * In order to avoid any locking accessing the CIU, we - * acknowledge CIU interrupts by disabling all of them. This - * way we can use a per core register and avoid any out of - * core locking requirements. This has the side affect that - * CIU interrupts can't be processed recursively. - * - * We don't need to disable IRQs to make these atomic since - * they are already disabled earlier in the low level - * interrupt code. - */ - clear_c0_status(0x100 << 2); + mutex_unlock(&cd->core_irq_mutex); } -static void octeon_irq_ciu0_eoi(unsigned int irq) + +static void octeon_irq_core_cpu_online(struct irq_data *data) { - /* - * Enable all CIU interrupts again. We don't need to disable - * IRQs to make these atomic since they are already disabled - * earlier in the low level interrupt code. - */ - set_c0_status(0x100 << 2); + if (irqd_irq_disabled(data)) + octeon_irq_core_eoi(data); +} + +static void octeon_irq_core_cpu_offline(struct irq_data *data) +{ + if (irqd_irq_disabled(data)) + octeon_irq_core_ack(data); } -static int next_coreid_for_irq(struct irq_desc *desc) +static struct irq_chip octeon_irq_chip_core = { + .name = "Core", + .irq_enable = octeon_irq_core_enable, + .irq_disable = octeon_irq_core_disable, + .irq_ack = octeon_irq_core_ack, + .irq_eoi = octeon_irq_core_eoi, + .irq_bus_lock = octeon_irq_core_bus_lock, + .irq_bus_sync_unlock = octeon_irq_core_bus_sync_unlock, + + .irq_cpu_online = octeon_irq_core_cpu_online, + .irq_cpu_offline = octeon_irq_core_cpu_offline, +}; + +static void __init octeon_irq_init_core(void) +{ + int i; + int irq; + struct octeon_core_chip_data *cd; + + for (i = 0; i < MIPS_CORE_IRQ_LINES; i++) { + cd = &octeon_irq_core_chip_data[i]; + cd->current_en = false; + cd->desired_en = false; + cd->bit = i; + mutex_init(&cd->core_irq_mutex); + + irq = OCTEON_IRQ_SW0 + i; + switch (irq) { + case OCTEON_IRQ_TIMER: + case OCTEON_IRQ_SW0: + case OCTEON_IRQ_SW1: + case OCTEON_IRQ_5: + case OCTEON_IRQ_PERF: + irq_set_chip_data(irq, cd); + irq_set_chip_and_handler(irq, &octeon_irq_chip_core, + handle_percpu_irq); + break; + default: + break; + } + } +} + +static int next_cpu_for_irq(struct irq_data *data) { #ifdef CONFIG_SMP - int coreid; - int weight = cpumask_weight(desc->affinity); + int cpu; + int weight = cpumask_weight(data->affinity); if (weight > 1) { - int cpu = smp_processor_id(); + cpu = smp_processor_id(); for (;;) { - cpu = cpumask_next(cpu, desc->affinity); + cpu = cpumask_next(cpu, data->affinity); if (cpu >= nr_cpu_ids) { cpu = -1; continue; @@ -169,83 +226,175 @@ static int next_coreid_for_irq(struct irq_desc *desc) break; } } - coreid = octeon_coreid_for_cpu(cpu); } else if (weight == 1) { - coreid = octeon_coreid_for_cpu(cpumask_first(desc->affinity)); + cpu = cpumask_first(data->affinity); } else { - coreid = cvmx_get_core_num(); + cpu = smp_processor_id(); } - return coreid; + return cpu; #else - return cvmx_get_core_num(); + return smp_processor_id(); #endif } -static void octeon_irq_ciu0_enable(unsigned int irq) +static void octeon_irq_ciu_enable(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - int coreid = next_coreid_for_irq(desc); + int cpu = next_cpu_for_irq(data); + int coreid = octeon_coreid_for_cpu(cpu); + unsigned long *pen; unsigned long flags; - uint64_t en0; - int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); - raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); - en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - en0 |= 1ull << bit; - cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); - cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + } } -static void octeon_irq_ciu0_enable_mbox(unsigned int irq) +static void octeon_irq_ciu_enable_local(struct irq_data *data) +{ + unsigned long *pen; + unsigned long flags; + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); + + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + } +} + +static void octeon_irq_ciu_disable_local(struct irq_data *data) +{ + unsigned long *pen; + unsigned long flags; + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); + + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror); + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror); + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen); + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + } +} + +static void octeon_irq_ciu_disable_all(struct irq_data *data) { - int coreid = cvmx_get_core_num(); unsigned long flags; - uint64_t en0; - int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ + unsigned long *pen; + int cpu; + union octeon_ciu_chip_data cd; + + wmb(); /* Make sure flag changes arrive before register updates. */ - raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); - en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - en0 |= 1ull << bit; - cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); - cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + cd.p = irq_data_get_irq_chip_data(data); + + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); + } + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); + } + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + } } -static void octeon_irq_ciu0_disable(unsigned int irq) +static void octeon_irq_ciu_enable_all(struct irq_data *data) { - int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ unsigned long flags; - uint64_t en0; + unsigned long *pen; int cpu; - raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); - for_each_online_cpu(cpu) { - int coreid = octeon_coreid_for_cpu(cpu); - en0 = cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - en0 &= ~(1ull << bit); - cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); + + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); + } + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); + } + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); } - /* - * We need to do a read after the last update to make sure all - * of them are done. - */ - cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); } /* * Enable the irq on the next core in the affinity set for chips that * have the EN*_W1{S,C} registers. */ -static void octeon_irq_ciu0_enable_v2(unsigned int irq) +static void octeon_irq_ciu_enable_v2(struct irq_data *data) { - int index; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); - struct irq_desc *desc = irq_to_desc(irq); + u64 mask; + int cpu = next_cpu_for_irq(data); + union octeon_ciu_chip_data cd; - if ((desc->status & IRQ_DISABLED) == 0) { - index = next_coreid_for_irq(desc) * 2; + cd.p = irq_data_get_irq_chip_data(data); + mask = 1ull << (cd.s.bit); + + /* + * Called under the desc lock, so these should never get out + * of sync. + */ + if (cd.s.line == 0) { + int index = octeon_coreid_for_cpu(cpu) * 2; + set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + } else { + int index = octeon_coreid_for_cpu(cpu) * 2 + 1; + set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); } } @@ -253,83 +402,180 @@ static void octeon_irq_ciu0_enable_v2(unsigned int irq) * Enable the irq on the current CPU for chips that * have the EN*_W1{S,C} registers. */ -static void octeon_irq_ciu0_enable_mbox_v2(unsigned int irq) +static void octeon_irq_ciu_enable_local_v2(struct irq_data *data) { - int index; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); + u64 mask; + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); + mask = 1ull << (cd.s.bit); - index = cvmx_get_core_num() * 2; - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + if (cd.s.line == 0) { + int index = cvmx_get_core_num() * 2; + set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror)); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + } else { + int index = cvmx_get_core_num() * 2 + 1; + set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); + } +} + +static void octeon_irq_ciu_disable_local_v2(struct irq_data *data) +{ + u64 mask; + union octeon_ciu_chip_data cd; + + cd.p = irq_data_get_irq_chip_data(data); + mask = 1ull << (cd.s.bit); + + if (cd.s.line == 0) { + int index = cvmx_get_core_num() * 2; + clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror)); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); + } else { + int index = cvmx_get_core_num() * 2 + 1; + clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); + } } /* - * Disable the irq on the current core for chips that have the EN*_W1{S,C} - * registers. + * Write to the W1C bit in CVMX_CIU_INTX_SUM0 to clear the irq. */ -static void octeon_irq_ciu0_ack_v2(unsigned int irq) -{ - int index = cvmx_get_core_num() * 2; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); - - switch (irq) { - case OCTEON_IRQ_GMX_DRP0: - case OCTEON_IRQ_GMX_DRP1: - case OCTEON_IRQ_IPD_DRP: - case OCTEON_IRQ_KEY_ZERO: - case OCTEON_IRQ_TIMER0: - case OCTEON_IRQ_TIMER1: - case OCTEON_IRQ_TIMER2: - case OCTEON_IRQ_TIMER3: - /* - * CIU timer type interrupts must be acknoleged by - * writing a '1' bit to their sum0 bit. - */ +static void octeon_irq_ciu_ack(struct irq_data *data) +{ + u64 mask; + union octeon_ciu_chip_data cd; + + cd.p = data->chip_data; + mask = 1ull << (cd.s.bit); + + if (cd.s.line == 0) { + int index = cvmx_get_core_num() * 2; cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask); - break; - default: - break; + } else { + cvmx_write_csr(CVMX_CIU_INT_SUM1, mask); } - - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); } /* - * Enable the irq on the current core for chips that have the EN*_W1{S,C} + * Disable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu0_eoi_mbox_v2(unsigned int irq) +static void octeon_irq_ciu_disable_all_v2(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - int index = cvmx_get_core_num() * 2; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); + int cpu; + u64 mask; + union octeon_ciu_chip_data cd; - if (likely((desc->status & IRQ_DISABLED) == 0)) - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + wmb(); /* Make sure flag changes arrive before register updates. */ + + cd.p = data->chip_data; + mask = 1ull << (cd.s.bit); + + if (cd.s.line == 0) { + for_each_online_cpu(cpu) { + int index = octeon_coreid_for_cpu(cpu) * 2; + clear_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); + } + } else { + for_each_online_cpu(cpu) { + int index = octeon_coreid_for_cpu(cpu) * 2 + 1; + clear_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); + } + } } /* - * Disable the irq on the all cores for chips that have the EN*_W1{S,C} + * Enable the irq on the all cores for chips that have the EN*_W1{S,C} * registers. */ -static void octeon_irq_ciu0_disable_all_v2(unsigned int irq) +static void octeon_irq_ciu_enable_all_v2(struct irq_data *data) { - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); - int index; int cpu; - for_each_online_cpu(cpu) { - index = octeon_coreid_for_cpu(cpu) * 2; - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); + u64 mask; + union octeon_ciu_chip_data cd; + + cd.p = data->chip_data; + mask = 1ull << (cd.s.bit); + + if (cd.s.line == 0) { + for_each_online_cpu(cpu) { + int index = octeon_coreid_for_cpu(cpu) * 2; + set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + } + } else { + for_each_online_cpu(cpu) { + int index = octeon_coreid_for_cpu(cpu) * 2 + 1; + set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); + } } } +static void octeon_irq_cpu_online_mbox(struct irq_data *data) +{ + if (irqd_irq_disabled(data)) + octeon_irq_ciu_enable_local(data); +} + +static void octeon_irq_cpu_online_mbox_v2(struct irq_data *data) +{ + if (irqd_irq_disabled(data)) + octeon_irq_ciu_enable_local_v2(data); +} + +static void octeon_irq_cpu_offline_mbox(struct irq_data *data) +{ + if (irqd_irq_disabled(data)) + octeon_irq_ciu_disable_local(data); +} + +static void octeon_irq_cpu_offline_mbox_v2(struct irq_data *data) +{ + if (irqd_irq_disabled(data)) + octeon_irq_ciu_disable_local_v2(data); +} + #ifdef CONFIG_SMP -static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest) + +static void octeon_irq_cpu_offline_ciu(struct irq_data *data) +{ + int cpu = smp_processor_id(); + cpumask_t new_affinity; + + if (!cpumask_test_cpu(cpu, data->affinity)) + return; + + if (cpumask_weight(data->affinity) > 1) { + /* + * It has multi CPU affinity, just remove this CPU + * from the affinity set. + */ + cpumask_copy(&new_affinity, data->affinity); + cpumask_clear_cpu(cpu, &new_affinity); + } else { + /* Otherwise, put it on lowest numbered online CPU. */ + cpumask_clear(&new_affinity); + cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); + } + __irq_set_affinity_locked(data, &new_affinity); +} + +static int octeon_irq_ciu_set_affinity(struct irq_data *data, + const struct cpumask *dest, bool force) { int cpu; - struct irq_desc *desc = irq_to_desc(irq); + struct irq_desc *desc = irq_to_desc(data->irq); int enable_one = (desc->status & IRQ_DISABLED) == 0; unsigned long flags; - int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */ + union octeon_ciu_chip_data cd; + + cd.p = data->chip_data; /* * For non-v2 CIU, we will allow only single CPU affinity. @@ -339,26 +585,40 @@ static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask * if (cpumask_weight(dest) != 1) return -EINVAL; - raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); - for_each_online_cpu(cpu) { - int coreid = octeon_coreid_for_cpu(cpu); - uint64_t en0 = - cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)); - if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; - en0 |= 1ull << bit; - } else { - en0 &= ~(1ull << bit); + if (desc->status & IRQ_DISABLED) + return 0; + + if (cd.s.line == 0) { + raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); + + if (cpumask_test_cpu(cpu, dest) && enable_one) { + enable_one = 0; + set_bit(cd.s.bit, pen); + } else { + clear_bit(cd.s.bit, pen); + } + cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); + } + raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); + } else { + raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); + for_each_online_cpu(cpu) { + int coreid = octeon_coreid_for_cpu(cpu); + unsigned long *pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + + if (cpumask_test_cpu(cpu, dest) && enable_one) { + enable_one = 0; + set_bit(cd.s.bit, pen); + } else { + clear_bit(cd.s.bit, pen); + } + cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); } - cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), en0); + raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); } - /* - * We need to do a read after the last update to make sure all - * of them are done. - */ - cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags); - return 0; } @@ -366,22 +626,47 @@ static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask * * Set affinity for the irq for chips that have the EN*_W1{S,C} * registers. */ -static int octeon_irq_ciu0_set_affinity_v2(unsigned int irq, - const struct cpumask *dest) +static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data, + const struct cpumask *dest, + bool force) { int cpu; - int index; - struct irq_desc *desc = irq_to_desc(irq); + struct irq_desc *desc = irq_to_desc(data->irq); int enable_one = (desc->status & IRQ_DISABLED) == 0; - u64 mask = 1ull << (irq - OCTEON_IRQ_WORKQ0); - - for_each_online_cpu(cpu) { - index = octeon_coreid_for_cpu(cpu) * 2; - if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); - } else { - cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); + u64 mask; + union octeon_ciu_chip_data cd; + + if (desc->status & IRQ_DISABLED) + return 0; + + cd.p = data->chip_data; + mask = 1ull << cd.s.bit; + + if (cd.s.line == 0) { + for_each_online_cpu(cpu) { + unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); + int index = octeon_coreid_for_cpu(cpu) * 2; + if (cpumask_test_cpu(cpu, dest) && enable_one) { + enable_one = 0; + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); + } else { + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); + } + } + } else { + for_each_online_cpu(cpu) { + unsigned long *pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + int index = octeon_coreid_for_cpu(cpu) * 2 + 1; + if (cpumask_test_cpu(cpu, dest) && enable_one) { + enable_one = 0; + set_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); + } else { + clear_bit(cd.s.bit, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); + } } } return 0; @@ -389,80 +674,101 @@ static int octeon_irq_ciu0_set_affinity_v2(unsigned int irq, #endif /* + * The v1 CIU code already masks things, so supply a dummy version to + * the core chip code. + */ +static void octeon_irq_dummy_mask(struct irq_data *data) +{ + return; +} + +/* * Newer octeon chips have support for lockless CIU operation. */ -static struct irq_chip octeon_irq_chip_ciu0_v2 = { - .name = "CIU0", - .enable = octeon_irq_ciu0_enable_v2, - .disable = octeon_irq_ciu0_disable_all_v2, - .eoi = octeon_irq_ciu0_enable_v2, +static struct irq_chip octeon_irq_chip_ciu_v2 = { + .name = "CIU", + .irq_enable = octeon_irq_ciu_enable_v2, + .irq_disable = octeon_irq_ciu_disable_all_v2, + .irq_mask = octeon_irq_ciu_disable_local_v2, + .irq_unmask = octeon_irq_ciu_enable_v2, #ifdef CONFIG_SMP - .set_affinity = octeon_irq_ciu0_set_affinity_v2, + .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, #endif }; -static struct irq_chip octeon_irq_chip_ciu0 = { - .name = "CIU0", - .enable = octeon_irq_ciu0_enable, - .disable = octeon_irq_ciu0_disable, - .eoi = octeon_irq_ciu0_eoi, +static struct irq_chip octeon_irq_chip_ciu_edge_v2 = { + .name = "CIU-E", + .irq_enable = octeon_irq_ciu_enable_v2, + .irq_disable = octeon_irq_ciu_disable_all_v2, + .irq_ack = octeon_irq_ciu_ack, + .irq_mask = octeon_irq_ciu_disable_local_v2, + .irq_unmask = octeon_irq_ciu_enable_v2, #ifdef CONFIG_SMP - .set_affinity = octeon_irq_ciu0_set_affinity, + .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, #endif }; -/* The mbox versions don't do any affinity or round-robin. */ -static struct irq_chip octeon_irq_chip_ciu0_mbox_v2 = { - .name = "CIU0-M", - .enable = octeon_irq_ciu0_enable_mbox_v2, - .disable = octeon_irq_ciu0_disable, - .eoi = octeon_irq_ciu0_eoi_mbox_v2, +static struct irq_chip octeon_irq_chip_ciu = { + .name = "CIU", + .irq_enable = octeon_irq_ciu_enable, + .irq_disable = octeon_irq_ciu_disable_all, + .irq_mask = octeon_irq_dummy_mask, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, +#endif }; -static struct irq_chip octeon_irq_chip_ciu0_mbox = { - .name = "CIU0-M", - .enable = octeon_irq_ciu0_enable_mbox, - .disable = octeon_irq_ciu0_disable, - .eoi = octeon_irq_ciu0_eoi, +static struct irq_chip octeon_irq_chip_ciu_edge = { + .name = "CIU-E", + .irq_enable = octeon_irq_ciu_enable, + .irq_disable = octeon_irq_ciu_disable_all, + .irq_mask = octeon_irq_dummy_mask, + .irq_ack = octeon_irq_ciu_ack, +#ifdef CONFIG_SMP + .irq_set_affinity = octeon_irq_ciu_set_affinity, + .irq_cpu_offline = octeon_irq_cpu_offline_ciu, +#endif }; -static void octeon_irq_ciu1_ack(unsigned int irq) -{ - /* - * In order to avoid any locking accessing the CIU, we - * acknowledge CIU interrupts by disabling all of them. This - * way we can use a per core register and avoid any out of - * core locking requirements. This has the side affect that - * CIU interrupts can't be processed recursively. We don't - * need to disable IRQs to make these atomic since they are - * already disabled earlier in the low level interrupt code. - */ - clear_c0_status(0x100 << 3); -} +/* The mbox versions don't do any affinity or round-robin. */ +static struct irq_chip octeon_irq_chip_ciu_mbox_v2 = { + .name = "CIU-M", + .irq_enable = octeon_irq_ciu_enable_all_v2, + .irq_disable = octeon_irq_ciu_disable_all_v2, + .irq_ack = octeon_irq_ciu_disable_local_v2, + .irq_eoi = octeon_irq_ciu_enable_local_v2, + + .irq_cpu_online = octeon_irq_cpu_online_mbox_v2, + .irq_cpu_offline = octeon_irq_cpu_offline_mbox_v2, +}; -static void octeon_irq_ciu1_eoi(unsigned int irq) -{ - /* - * Enable all CIU interrupts again. We don't need to disable - * IRQs to make these atomic since they are already disabled - * earlier in the low level interrupt code. - */ - set_c0_status(0x100 << 3); -} +static struct irq_chip octeon_irq_chip_ciu_mbox = { + .name = "CIU-M", + .irq_enable = octeon_irq_ciu_enable_all, + .irq_disable = octeon_irq_ciu_disable_all, -static void octeon_irq_ciu1_enable(unsigned int irq) + .irq_cpu_online = octeon_irq_cpu_online_mbox, + .irq_cpu_offline = octeon_irq_cpu_offline_mbox, +}; + +/* + * Watchdog interrupts are special. They are associated with a single + * core, so we hardwire the affinity to that core. + */ +static void octeon_irq_ciu_wd_enable(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - int coreid = next_coreid_for_irq(desc); unsigned long flags; - uint64_t en1; - int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ + unsigned long *pen; + int coreid = data->irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ + int cpu = octeon_cpu_for_coreid(coreid); raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); - en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); - en1 |= 1ull << bit; - cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); - cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); + pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); + set_bit(coreid, pen); + cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); } @@ -470,286 +776,281 @@ static void octeon_irq_ciu1_enable(unsigned int irq) * Watchdog interrupts are special. They are associated with a single * core, so we hardwire the affinity to that core. */ -static void octeon_irq_ciu1_wd_enable(unsigned int irq) +static void octeon_irq_ciu1_wd_enable_v2(struct irq_data *data) { - unsigned long flags; - uint64_t en1; - int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ - int coreid = bit; + int coreid = data->irq - OCTEON_IRQ_WDOG0; + int cpu = octeon_cpu_for_coreid(coreid); - raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); - en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); - en1 |= 1ull << bit; - cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); - cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + set_bit(coreid, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); + cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(coreid * 2 + 1), 1ull << coreid); } -static void octeon_irq_ciu1_disable(unsigned int irq) + +static struct irq_chip octeon_irq_chip_ciu_wd_v2 = { + .name = "CIU-W", + .irq_enable = octeon_irq_ciu1_wd_enable_v2, + .irq_disable = octeon_irq_ciu_disable_all_v2, + .irq_mask = octeon_irq_ciu_disable_local_v2, + .irq_unmask = octeon_irq_ciu_enable_local_v2, +}; + +static struct irq_chip octeon_irq_chip_ciu_wd = { + .name = "CIU-W", + .irq_enable = octeon_irq_ciu_wd_enable, + .irq_disable = octeon_irq_ciu_disable_all, + .irq_mask = octeon_irq_dummy_mask, +}; + +static void octeon_irq_ip2_v1(void) { - int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ - unsigned long flags; - uint64_t en1; - int cpu; - raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); - for_each_online_cpu(cpu) { - int coreid = octeon_coreid_for_cpu(cpu); - en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); - en1 &= ~(1ull << bit); - cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); + const unsigned long core_id = cvmx_get_core_num(); + u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2)); + + ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror); + clear_c0_status(STATUSF_IP2); + if (likely(ciu_sum)) { + int bit = fls64(ciu_sum) - 1; + int irq = octeon_irq_ciu_to_irq[0][bit]; + if (likely(irq)) + do_IRQ(irq); + else + spurious_interrupt(); + } else { + spurious_interrupt(); } - /* - * We need to do a read after the last update to make sure all - * of them are done. - */ - cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); + set_c0_status(STATUSF_IP2); } -/* - * Enable the irq on the current core for chips that have the EN*_W1{S,C} - * registers. - */ -static void octeon_irq_ciu1_enable_v2(unsigned int irq) +static void octeon_irq_ip2_v2(void) { - int index; - u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); - struct irq_desc *desc = irq_to_desc(irq); - - if ((desc->status & IRQ_DISABLED) == 0) { - index = next_coreid_for_irq(desc) * 2 + 1; - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); + const unsigned long core_id = cvmx_get_core_num(); + u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2)); + + ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror); + if (likely(ciu_sum)) { + int bit = fls64(ciu_sum) - 1; + int irq = octeon_irq_ciu_to_irq[0][bit]; + if (likely(irq)) + do_IRQ(irq); + else + spurious_interrupt(); + } else { + spurious_interrupt(); } } - -/* - * Watchdog interrupts are special. They are associated with a single - * core, so we hardwire the affinity to that core. - */ -static void octeon_irq_ciu1_wd_enable_v2(unsigned int irq) +static void octeon_irq_ip3_v1(void) { - int index; - int coreid = irq - OCTEON_IRQ_WDOG0; - u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); - struct irq_desc *desc = irq_to_desc(irq); - - if ((desc->status & IRQ_DISABLED) == 0) { - index = coreid * 2 + 1; - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); + u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1); + + ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror); + clear_c0_status(STATUSF_IP3); + if (likely(ciu_sum)) { + int bit = fls64(ciu_sum) - 1; + int irq = octeon_irq_ciu_to_irq[1][bit]; + if (likely(irq)) + do_IRQ(irq); + else + spurious_interrupt(); + } else { + spurious_interrupt(); } + set_c0_status(STATUSF_IP3); } -/* - * Disable the irq on the current core for chips that have the EN*_W1{S,C} - * registers. - */ -static void octeon_irq_ciu1_ack_v2(unsigned int irq) +static void octeon_irq_ip3_v2(void) { - int index = cvmx_get_core_num() * 2 + 1; - u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); - - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); + u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1); + + ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror); + if (likely(ciu_sum)) { + int bit = fls64(ciu_sum) - 1; + int irq = octeon_irq_ciu_to_irq[1][bit]; + if (likely(irq)) + do_IRQ(irq); + else + spurious_interrupt(); + } else { + spurious_interrupt(); + } } -/* - * Disable the irq on the all cores for chips that have the EN*_W1{S,C} - * registers. - */ -static void octeon_irq_ciu1_disable_all_v2(unsigned int irq) +static void octeon_irq_ip4_mask(void) { - u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); - int index; - int cpu; - for_each_online_cpu(cpu) { - index = octeon_coreid_for_cpu(cpu) * 2 + 1; - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); - } + clear_c0_status(STATUSF_IP4); + spurious_interrupt(); } -#ifdef CONFIG_SMP -static int octeon_irq_ciu1_set_affinity(unsigned int irq, - const struct cpumask *dest) -{ - int cpu; - struct irq_desc *desc = irq_to_desc(irq); - int enable_one = (desc->status & IRQ_DISABLED) == 0; - unsigned long flags; - int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */ +static void (*octeon_irq_ip2)(void); +static void (*octeon_irq_ip3)(void); +static void (*octeon_irq_ip4)(void); - /* - * For non-v2 CIU, we will allow only single CPU affinity. - * This removes the need to do locking in the .ack/.eoi - * functions. - */ - if (cpumask_weight(dest) != 1) - return -EINVAL; +void __cpuinitdata (*octeon_irq_setup_secondary)(void); - raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags); - for_each_online_cpu(cpu) { - int coreid = octeon_coreid_for_cpu(cpu); - uint64_t en1 = - cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); - if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; - en1 |= 1ull << bit; - } else { - en1 &= ~(1ull << bit); - } - cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); - } +static void __cpuinit octeon_irq_percpu_enable(void) +{ + irq_cpu_online(); +} + +static void __cpuinit octeon_irq_init_ciu_percpu(void) +{ + int coreid = cvmx_get_core_num(); /* - * We need to do a read after the last update to make sure all - * of them are done. + * Disable All CIU Interrupts. The ones we need will be + * enabled later. Read the SUM register so we know the write + * completed. */ - cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); - raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags); - - return 0; + cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2)), 0); + cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2 + 1)), 0); + cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); + cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); + cvmx_read_csr(CVMX_CIU_INTX_SUM0((coreid * 2))); } -/* - * Set affinity for the irq for chips that have the EN*_W1{S,C} - * registers. - */ -static int octeon_irq_ciu1_set_affinity_v2(unsigned int irq, - const struct cpumask *dest) +static void __cpuinit octeon_irq_setup_secondary_ciu(void) { - int cpu; - int index; - struct irq_desc *desc = irq_to_desc(irq); - int enable_one = (desc->status & IRQ_DISABLED) == 0; - u64 mask = 1ull << (irq - OCTEON_IRQ_WDOG0); - for_each_online_cpu(cpu) { - index = octeon_coreid_for_cpu(cpu) * 2 + 1; - if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); - } else { - cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); - } - } - return 0; -} -#endif -/* - * Newer octeon chips have support for lockless CIU operation. - */ -static struct irq_chip octeon_irq_chip_ciu1_v2 = { - .name = "CIU1", - .enable = octeon_irq_ciu1_enable_v2, - .disable = octeon_irq_ciu1_disable_all_v2, - .eoi = octeon_irq_ciu1_enable_v2, -#ifdef CONFIG_SMP - .set_affinity = octeon_irq_ciu1_set_affinity_v2, -#endif -}; + __get_cpu_var(octeon_irq_ciu0_en_mirror) = 0; + __get_cpu_var(octeon_irq_ciu1_en_mirror) = 0; -static struct irq_chip octeon_irq_chip_ciu1 = { - .name = "CIU1", - .enable = octeon_irq_ciu1_enable, - .disable = octeon_irq_ciu1_disable, - .eoi = octeon_irq_ciu1_eoi, -#ifdef CONFIG_SMP - .set_affinity = octeon_irq_ciu1_set_affinity, -#endif -}; + octeon_irq_init_ciu_percpu(); + octeon_irq_percpu_enable(); -static struct irq_chip octeon_irq_chip_ciu1_wd_v2 = { - .name = "CIU1-W", - .enable = octeon_irq_ciu1_wd_enable_v2, - .disable = octeon_irq_ciu1_disable_all_v2, - .eoi = octeon_irq_ciu1_wd_enable_v2, -}; + /* Enable the CIU lines */ + set_c0_status(STATUSF_IP3 | STATUSF_IP2); + clear_c0_status(STATUSF_IP4); +} -static struct irq_chip octeon_irq_chip_ciu1_wd = { - .name = "CIU1-W", - .enable = octeon_irq_ciu1_wd_enable, - .disable = octeon_irq_ciu1_disable, - .eoi = octeon_irq_ciu1_eoi, -}; +static void __init octeon_irq_init_ciu(void) +{ + unsigned int i; + struct irq_chip *chip; + struct irq_chip *chip_edge; + struct irq_chip *chip_mbox; + struct irq_chip *chip_wd; + + octeon_irq_init_ciu_percpu(); + octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu; -static void (*octeon_ciu0_ack)(unsigned int); -static void (*octeon_ciu1_ack)(unsigned int); + if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) || + OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) || + OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X) || + OCTEON_IS_MODEL(OCTEON_CN6XXX)) { + octeon_irq_ip2 = octeon_irq_ip2_v2; + octeon_irq_ip3 = octeon_irq_ip3_v2; + chip = &octeon_irq_chip_ciu_v2; + chip_edge = &octeon_irq_chip_ciu_edge_v2; + chip_mbox = &octeon_irq_chip_ciu_mbox_v2; + chip_wd = &octeon_irq_chip_ciu_wd_v2; + } else { + octeon_irq_ip2 = octeon_irq_ip2_v1; + octeon_irq_ip3 = octeon_irq_ip3_v1; + chip = &octeon_irq_chip_ciu; + chip_edge = &octeon_irq_chip_ciu_edge; + chip_mbox = &octeon_irq_chip_ciu_mbox; + chip_wd = &octeon_irq_chip_ciu_wd; + } + octeon_irq_ip4 = octeon_irq_ip4_mask; + + /* Mips internal */ + octeon_irq_init_core(); + + /* CIU_0 */ + for (i = 0; i < 16; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq); + for (i = 0; i < 16; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GPIO0, 0, i + 16, chip, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART0, 0, 34, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART1, 0, 35, chip, handle_level_irq); + + for (i = 0; i < 4; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_INT0, 0, i + 36, chip, handle_level_irq); + for (i = 0; i < 4; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_MSI0, 0, i + 40, chip, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI, 0, 45, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_TRACE0, 0, 47, chip, handle_level_irq); + + for (i = 0; i < 2; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_GMX_DRP0, 0, i + 48, chip_edge, handle_edge_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_IPD_DRP, 0, 50, chip_edge, handle_edge_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_KEY_ZERO, 0, 51, chip_edge, handle_edge_irq); + + for (i = 0; i < 4; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip_edge, handle_edge_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PCM, 0, 57, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MPI, 0, 58, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI2, 0, 59, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_POWIQ, 0, 60, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_IPDPPTHR, 0, 61, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII0, 0, 62, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq); + + /* CIU_1 */ + for (i = 0; i < 16; i++) + octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_UART2, 1, 16, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MII1, 1, 18, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_NAND, 1, 19, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_MIO, 1, 20, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_IOB, 1, 21, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_FPA, 1, 22, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_POW, 1, 23, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_L2C, 1, 24, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_IPD, 1, 25, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PIP, 1, 26, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PKO, 1, 27, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_ZIP, 1, 28, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_TIM, 1, 29, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_RAD, 1, 30, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_KEY, 1, 31, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_DFA, 1, 32, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_USBCTL, 1, 33, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_SLI, 1, 34, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_DPI, 1, 35, chip, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_AGX0, 1, 36, chip, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_AGL, 1, 46, chip, handle_level_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PTP, 1, 47, chip_edge, handle_edge_irq); + + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PEM0, 1, 48, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_PEM1, 1, 49, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_SRIO0, 1, 50, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_SRIO1, 1, 51, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_LMC0, 1, 52, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_DFM, 1, 56, chip, handle_level_irq); + octeon_irq_set_ciu_mapping(OCTEON_IRQ_RST, 1, 63, chip, handle_level_irq); + + /* Enable the CIU lines */ + set_c0_status(STATUSF_IP3 | STATUSF_IP2); + clear_c0_status(STATUSF_IP4); +} void __init arch_init_irq(void) { - unsigned int irq; - struct irq_chip *chip0; - struct irq_chip *chip0_mbox; - struct irq_chip *chip1; - struct irq_chip *chip1_wd; - #ifdef CONFIG_SMP /* Set the default affinity to the boot cpu. */ cpumask_clear(irq_default_affinity); cpumask_set_cpu(smp_processor_id(), irq_default_affinity); #endif - - if (NR_IRQS < OCTEON_IRQ_LAST) - pr_err("octeon_irq_init: NR_IRQS is set too low\n"); - - if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) || - OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) || - OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X)) { - octeon_ciu0_ack = octeon_irq_ciu0_ack_v2; - octeon_ciu1_ack = octeon_irq_ciu1_ack_v2; - chip0 = &octeon_irq_chip_ciu0_v2; - chip0_mbox = &octeon_irq_chip_ciu0_mbox_v2; - chip1 = &octeon_irq_chip_ciu1_v2; - chip1_wd = &octeon_irq_chip_ciu1_wd_v2; - } else { - octeon_ciu0_ack = octeon_irq_ciu0_ack; - octeon_ciu1_ack = octeon_irq_ciu1_ack; - chip0 = &octeon_irq_chip_ciu0; - chip0_mbox = &octeon_irq_chip_ciu0_mbox; - chip1 = &octeon_irq_chip_ciu1; - chip1_wd = &octeon_irq_chip_ciu1_wd; - } - - /* 0 - 15 reserved for i8259 master and slave controller. */ - - /* 17 - 23 Mips internal */ - for (irq = OCTEON_IRQ_SW0; irq <= OCTEON_IRQ_TIMER; irq++) { - set_irq_chip_and_handler(irq, &octeon_irq_chip_core, - handle_percpu_irq); - } - - /* 24 - 87 CIU_INT_SUM0 */ - for (irq = OCTEON_IRQ_WORKQ0; irq <= OCTEON_IRQ_BOOTDMA; irq++) { - switch (irq) { - case OCTEON_IRQ_MBOX0: - case OCTEON_IRQ_MBOX1: - set_irq_chip_and_handler(irq, chip0_mbox, handle_percpu_irq); - break; - default: - set_irq_chip_and_handler(irq, chip0, handle_fasteoi_irq); - break; - } - } - - /* 88 - 151 CIU_INT_SUM1 */ - for (irq = OCTEON_IRQ_WDOG0; irq <= OCTEON_IRQ_WDOG15; irq++) - set_irq_chip_and_handler(irq, chip1_wd, handle_fasteoi_irq); - - for (irq = OCTEON_IRQ_UART2; irq <= OCTEON_IRQ_RESERVED151; irq++) - set_irq_chip_and_handler(irq, chip1, handle_fasteoi_irq); - - set_c0_status(0x300 << 2); + octeon_irq_init_ciu(); } asmlinkage void plat_irq_dispatch(void) { - const unsigned long core_id = cvmx_get_core_num(); - const uint64_t ciu_sum0_address = CVMX_CIU_INTX_SUM0(core_id * 2); - const uint64_t ciu_en0_address = CVMX_CIU_INTX_EN0(core_id * 2); - const uint64_t ciu_sum1_address = CVMX_CIU_INT_SUM1; - const uint64_t ciu_en1_address = CVMX_CIU_INTX_EN1(core_id * 2 + 1); unsigned long cop0_cause; unsigned long cop0_status; - uint64_t ciu_en; - uint64_t ciu_sum; - unsigned int irq; while (1) { cop0_cause = read_c0_cause(); @@ -757,33 +1058,16 @@ asmlinkage void plat_irq_dispatch(void) cop0_cause &= cop0_status; cop0_cause &= ST0_IM; - if (unlikely(cop0_cause & STATUSF_IP2)) { - ciu_sum = cvmx_read_csr(ciu_sum0_address); - ciu_en = cvmx_read_csr(ciu_en0_address); - ciu_sum &= ciu_en; - if (likely(ciu_sum)) { - irq = fls64(ciu_sum) + OCTEON_IRQ_WORKQ0 - 1; - octeon_ciu0_ack(irq); - do_IRQ(irq); - } else { - spurious_interrupt(); - } - } else if (unlikely(cop0_cause & STATUSF_IP3)) { - ciu_sum = cvmx_read_csr(ciu_sum1_address); - ciu_en = cvmx_read_csr(ciu_en1_address); - ciu_sum &= ciu_en; - if (likely(ciu_sum)) { - irq = fls64(ciu_sum) + OCTEON_IRQ_WDOG0 - 1; - octeon_ciu1_ack(irq); - do_IRQ(irq); - } else { - spurious_interrupt(); - } - } else if (likely(cop0_cause)) { + if (unlikely(cop0_cause & STATUSF_IP2)) + octeon_irq_ip2(); + else if (unlikely(cop0_cause & STATUSF_IP3)) + octeon_irq_ip3(); + else if (unlikely(cop0_cause & STATUSF_IP4)) + octeon_irq_ip4(); + else if (likely(cop0_cause)) do_IRQ(fls(cop0_cause) - 9 + MIPS_CPU_IRQ_BASE); - } else { + else break; - } } } @@ -791,83 +1075,7 @@ asmlinkage void plat_irq_dispatch(void) void fixup_irqs(void) { - int irq; - struct irq_desc *desc; - cpumask_t new_affinity; - unsigned long flags; - int do_set_affinity; - int cpu; - - cpu = smp_processor_id(); - - for (irq = OCTEON_IRQ_SW0; irq <= OCTEON_IRQ_TIMER; irq++) - octeon_irq_core_disable_local(irq); - - for (irq = OCTEON_IRQ_WORKQ0; irq < OCTEON_IRQ_LAST; irq++) { - desc = irq_to_desc(irq); - switch (irq) { - case OCTEON_IRQ_MBOX0: - case OCTEON_IRQ_MBOX1: - /* The eoi function will disable them on this CPU. */ - desc->chip->eoi(irq); - break; - case OCTEON_IRQ_WDOG0: - case OCTEON_IRQ_WDOG1: - case OCTEON_IRQ_WDOG2: - case OCTEON_IRQ_WDOG3: - case OCTEON_IRQ_WDOG4: - case OCTEON_IRQ_WDOG5: - case OCTEON_IRQ_WDOG6: - case OCTEON_IRQ_WDOG7: - case OCTEON_IRQ_WDOG8: - case OCTEON_IRQ_WDOG9: - case OCTEON_IRQ_WDOG10: - case OCTEON_IRQ_WDOG11: - case OCTEON_IRQ_WDOG12: - case OCTEON_IRQ_WDOG13: - case OCTEON_IRQ_WDOG14: - case OCTEON_IRQ_WDOG15: - /* - * These have special per CPU semantics and - * are handled in the watchdog driver. - */ - break; - default: - raw_spin_lock_irqsave(&desc->lock, flags); - /* - * If this irq has an action, it is in use and - * must be migrated if it has affinity to this - * cpu. - */ - if (desc->action && cpumask_test_cpu(cpu, desc->affinity)) { - if (cpumask_weight(desc->affinity) > 1) { - /* - * It has multi CPU affinity, - * just remove this CPU from - * the affinity set. - */ - cpumask_copy(&new_affinity, desc->affinity); - cpumask_clear_cpu(cpu, &new_affinity); - } else { - /* - * Otherwise, put it on lowest - * numbered online CPU. - */ - cpumask_clear(&new_affinity); - cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); - } - do_set_affinity = 1; - } else { - do_set_affinity = 0; - } - raw_spin_unlock_irqrestore(&desc->lock, flags); - - if (do_set_affinity) - irq_set_affinity(irq, &new_affinity); - - break; - } - } + irq_cpu_offline(); } #endif /* CONFIG_HOTPLUG_CPU */ diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index b0c3686..8b139bf 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -420,7 +420,6 @@ void octeon_user_io_init(void) void __init prom_init(void) { struct cvmx_sysinfo *sysinfo; - const int coreid = cvmx_get_core_num(); int i; int argc; #ifdef CONFIG_CAVIUM_RESERVE32 @@ -537,17 +536,6 @@ void __init prom_init(void) octeon_uart = octeon_get_boot_uart(); - /* - * Disable All CIU Interrupts. The ones we need will be - * enabled later. Read the SUM register so we know the write - * completed. - */ - cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2)), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2 + 1)), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); - cvmx_read_csr(CVMX_CIU_INTX_SUM0((coreid * 2))); - #ifdef CONFIG_SMP octeon_write_lcd("LinuxSMP"); #else diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 391cefe..ba78b21 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c @@ -171,41 +171,19 @@ static void octeon_boot_secondary(int cpu, struct task_struct *idle) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ -static void octeon_init_secondary(void) +static void __cpuinit octeon_init_secondary(void) { - const int coreid = cvmx_get_core_num(); - union cvmx_ciu_intx_sum0 interrupt_enable; unsigned int sr; -#ifdef CONFIG_HOTPLUG_CPU - struct linux_app_boot_info *labi; - - labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER); - - if (labi->labi_signature != LABI_SIGNATURE) - panic("The bootloader version on this board is incorrect."); -#endif - sr = set_c0_status(ST0_BEV); write_c0_ebase((u32)ebase); write_c0_status(sr); octeon_check_cpu_bist(); octeon_init_cvmcount(); - /* - pr_info("SMP: CPU%d (CoreId %lu) started\n", cpu, coreid); - */ - /* Enable Mailbox interrupts to this core. These are the only - interrupts allowed on line 3 */ - cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), 0xffffffff); - interrupt_enable.u64 = 0; - interrupt_enable.s.mbox = 0x3; - cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2)), interrupt_enable.u64); - cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2 + 1)), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); - /* Enable core interrupt processing for 2,3 and 7 */ - set_c0_status(0x8c01); + + octeon_irq_setup_secondary(); + raw_local_irq_enable(); } /** @@ -214,6 +192,15 @@ static void octeon_init_secondary(void) */ void octeon_prepare_cpus(unsigned int max_cpus) { +#ifdef CONFIG_HOTPLUG_CPU + struct linux_app_boot_info *labi; + + labi = (struct linux_app_boot_info *)PHYS_TO_XKSEG_CACHED(LABI_ADDR_IN_BOOTLOADER); + + if (labi->labi_signature != LABI_SIGNATURE) + panic("The bootloader version on this board is incorrect."); +#endif + cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff); if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED, "mailbox0", mailbox_interrupt)) { diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h index 6ddab8a..5b05f18 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/irq.h +++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h @@ -11,172 +11,91 @@ #define NR_IRQS OCTEON_IRQ_LAST #define MIPS_CPU_IRQ_BASE OCTEON_IRQ_SW0 -/* 0 - 7 represent the i8259 master */ -#define OCTEON_IRQ_I8259M0 0 -#define OCTEON_IRQ_I8259M1 1 -#define OCTEON_IRQ_I8259M2 2 -#define OCTEON_IRQ_I8259M3 3 -#define OCTEON_IRQ_I8259M4 4 -#define OCTEON_IRQ_I8259M5 5 -#define OCTEON_IRQ_I8259M6 6 -#define OCTEON_IRQ_I8259M7 7 -/* 8 - 15 represent the i8259 slave */ -#define OCTEON_IRQ_I8259S0 8 -#define OCTEON_IRQ_I8259S1 9 -#define OCTEON_IRQ_I8259S2 10 -#define OCTEON_IRQ_I8259S3 11 -#define OCTEON_IRQ_I8259S4 12 -#define OCTEON_IRQ_I8259S5 13 -#define OCTEON_IRQ_I8259S6 14 -#define OCTEON_IRQ_I8259S7 15 -/* 16 - 23 represent the 8 MIPS standard interrupt sources */ -#define OCTEON_IRQ_SW0 16 -#define OCTEON_IRQ_SW1 17 -#define OCTEON_IRQ_CIU0 18 -#define OCTEON_IRQ_CIU1 19 -#define OCTEON_IRQ_CIU4 20 -#define OCTEON_IRQ_5 21 -#define OCTEON_IRQ_PERF 22 -#define OCTEON_IRQ_TIMER 23 -/* 24 - 87 represent the sources in CIU_INTX_EN0 */ -#define OCTEON_IRQ_WORKQ0 24 -#define OCTEON_IRQ_WORKQ1 25 -#define OCTEON_IRQ_WORKQ2 26 -#define OCTEON_IRQ_WORKQ3 27 -#define OCTEON_IRQ_WORKQ4 28 -#define OCTEON_IRQ_WORKQ5 29 -#define OCTEON_IRQ_WORKQ6 30 -#define OCTEON_IRQ_WORKQ7 31 -#define OCTEON_IRQ_WORKQ8 32 -#define OCTEON_IRQ_WORKQ9 33 -#define OCTEON_IRQ_WORKQ10 34 -#define OCTEON_IRQ_WORKQ11 35 -#define OCTEON_IRQ_WORKQ12 36 -#define OCTEON_IRQ_WORKQ13 37 -#define OCTEON_IRQ_WORKQ14 38 -#define OCTEON_IRQ_WORKQ15 39 -#define OCTEON_IRQ_GPIO0 40 -#define OCTEON_IRQ_GPIO1 41 -#define OCTEON_IRQ_GPIO2 42 -#define OCTEON_IRQ_GPIO3 43 -#define OCTEON_IRQ_GPIO4 44 -#define OCTEON_IRQ_GPIO5 45 -#define OCTEON_IRQ_GPIO6 46 -#define OCTEON_IRQ_GPIO7 47 -#define OCTEON_IRQ_GPIO8 48 -#define OCTEON_IRQ_GPIO9 49 -#define OCTEON_IRQ_GPIO10 50 -#define OCTEON_IRQ_GPIO11 51 -#define OCTEON_IRQ_GPIO12 52 -#define OCTEON_IRQ_GPIO13 53 -#define OCTEON_IRQ_GPIO14 54 -#define OCTEON_IRQ_GPIO15 55 -#define OCTEON_IRQ_MBOX0 56 -#define OCTEON_IRQ_MBOX1 57 -#define OCTEON_IRQ_UART0 58 -#define OCTEON_IRQ_UART1 59 -#define OCTEON_IRQ_PCI_INT0 60 -#define OCTEON_IRQ_PCI_INT1 61 -#define OCTEON_IRQ_PCI_INT2 62 -#define OCTEON_IRQ_PCI_INT3 63 -#define OCTEON_IRQ_PCI_MSI0 64 -#define OCTEON_IRQ_PCI_MSI1 65 -#define OCTEON_IRQ_PCI_MSI2 66 -#define OCTEON_IRQ_PCI_MSI3 67 -#define OCTEON_IRQ_RESERVED68 68 /* Summary of CIU_INT_SUM1 */ -#define OCTEON_IRQ_TWSI 69 -#define OCTEON_IRQ_RML 70 -#define OCTEON_IRQ_TRACE 71 -#define OCTEON_IRQ_GMX_DRP0 72 -#define OCTEON_IRQ_GMX_DRP1 73 -#define OCTEON_IRQ_IPD_DRP 74 -#define OCTEON_IRQ_KEY_ZERO 75 -#define OCTEON_IRQ_TIMER0 76 -#define OCTEON_IRQ_TIMER1 77 -#define OCTEON_IRQ_TIMER2 78 -#define OCTEON_IRQ_TIMER3 79 -#define OCTEON_IRQ_USB0 80 -#define OCTEON_IRQ_PCM 81 -#define OCTEON_IRQ_MPI 82 -#define OCTEON_IRQ_TWSI2 83 -#define OCTEON_IRQ_POWIQ 84 -#define OCTEON_IRQ_IPDPPTHR 85 -#define OCTEON_IRQ_MII0 86 -#define OCTEON_IRQ_BOOTDMA 87 -/* 88 - 151 represent the sources in CIU_INTX_EN1 */ -#define OCTEON_IRQ_WDOG0 88 -#define OCTEON_IRQ_WDOG1 89 -#define OCTEON_IRQ_WDOG2 90 -#define OCTEON_IRQ_WDOG3 91 -#define OCTEON_IRQ_WDOG4 92 -#define OCTEON_IRQ_WDOG5 93 -#define OCTEON_IRQ_WDOG6 94 -#define OCTEON_IRQ_WDOG7 95 -#define OCTEON_IRQ_WDOG8 96 -#define OCTEON_IRQ_WDOG9 97 -#define OCTEON_IRQ_WDOG10 98 -#define OCTEON_IRQ_WDOG11 99 -#define OCTEON_IRQ_WDOG12 100 -#define OCTEON_IRQ_WDOG13 101 -#define OCTEON_IRQ_WDOG14 102 -#define OCTEON_IRQ_WDOG15 103 -#define OCTEON_IRQ_UART2 104 -#define OCTEON_IRQ_USB1 105 -#define OCTEON_IRQ_MII1 106 -#define OCTEON_IRQ_RESERVED107 107 -#define OCTEON_IRQ_RESERVED108 108 -#define OCTEON_IRQ_RESERVED109 109 -#define OCTEON_IRQ_RESERVED110 110 -#define OCTEON_IRQ_RESERVED111 111 -#define OCTEON_IRQ_RESERVED112 112 -#define OCTEON_IRQ_RESERVED113 113 -#define OCTEON_IRQ_RESERVED114 114 -#define OCTEON_IRQ_RESERVED115 115 -#define OCTEON_IRQ_RESERVED116 116 -#define OCTEON_IRQ_RESERVED117 117 -#define OCTEON_IRQ_RESERVED118 118 -#define OCTEON_IRQ_RESERVED119 119 -#define OCTEON_IRQ_RESERVED120 120 -#define OCTEON_IRQ_RESERVED121 121 -#define OCTEON_IRQ_RESERVED122 122 -#define OCTEON_IRQ_RESERVED123 123 -#define OCTEON_IRQ_RESERVED124 124 -#define OCTEON_IRQ_RESERVED125 125 -#define OCTEON_IRQ_RESERVED126 126 -#define OCTEON_IRQ_RESERVED127 127 -#define OCTEON_IRQ_RESERVED128 128 -#define OCTEON_IRQ_RESERVED129 129 -#define OCTEON_IRQ_RESERVED130 130 -#define OCTEON_IRQ_RESERVED131 131 -#define OCTEON_IRQ_RESERVED132 132 -#define OCTEON_IRQ_RESERVED133 133 -#define OCTEON_IRQ_RESERVED134 134 -#define OCTEON_IRQ_RESERVED135 135 -#define OCTEON_IRQ_RESERVED136 136 -#define OCTEON_IRQ_RESERVED137 137 -#define OCTEON_IRQ_RESERVED138 138 -#define OCTEON_IRQ_RESERVED139 139 -#define OCTEON_IRQ_RESERVED140 140 -#define OCTEON_IRQ_RESERVED141 141 -#define OCTEON_IRQ_RESERVED142 142 -#define OCTEON_IRQ_RESERVED143 143 -#define OCTEON_IRQ_RESERVED144 144 -#define OCTEON_IRQ_RESERVED145 145 -#define OCTEON_IRQ_RESERVED146 146 -#define OCTEON_IRQ_RESERVED147 147 -#define OCTEON_IRQ_RESERVED148 148 -#define OCTEON_IRQ_RESERVED149 149 -#define OCTEON_IRQ_RESERVED150 150 -#define OCTEON_IRQ_RESERVED151 151 +enum octeon_irq { +/* 1 - 8 represent the 8 MIPS standard interrupt sources */ + OCTEON_IRQ_SW0 = 1, + OCTEON_IRQ_SW1, +/* CIU0, CUI2, CIU4 are 3, 4, 5 */ + OCTEON_IRQ_5 = 6, + OCTEON_IRQ_PERF, + OCTEON_IRQ_TIMER, +/* sources in CIU_INTX_EN0 */ + OCTEON_IRQ_WORKQ0, + OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16, + OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16, + OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, + OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, + OCTEON_IRQ_MBOX1, + OCTEON_IRQ_UART0, + OCTEON_IRQ_UART1, + OCTEON_IRQ_UART2, + OCTEON_IRQ_PCI_INT0, + OCTEON_IRQ_PCI_INT1, + OCTEON_IRQ_PCI_INT2, + OCTEON_IRQ_PCI_INT3, + OCTEON_IRQ_PCI_MSI0, + OCTEON_IRQ_PCI_MSI1, + OCTEON_IRQ_PCI_MSI2, + OCTEON_IRQ_PCI_MSI3, + + OCTEON_IRQ_TWSI, + OCTEON_IRQ_TWSI2, + OCTEON_IRQ_RML, + OCTEON_IRQ_TRACE0, + OCTEON_IRQ_GMX_DRP0 = OCTEON_IRQ_TRACE0 + 4, + OCTEON_IRQ_IPD_DRP = OCTEON_IRQ_GMX_DRP0 + 5, + OCTEON_IRQ_KEY_ZERO, + OCTEON_IRQ_TIMER0, + OCTEON_IRQ_TIMER1, + OCTEON_IRQ_TIMER2, + OCTEON_IRQ_TIMER3, + OCTEON_IRQ_USB0, + OCTEON_IRQ_USB1, + OCTEON_IRQ_PCM, + OCTEON_IRQ_MPI, + OCTEON_IRQ_POWIQ, + OCTEON_IRQ_IPDPPTHR, + OCTEON_IRQ_MII0, + OCTEON_IRQ_MII1, + OCTEON_IRQ_BOOTDMA, + + OCTEON_IRQ_NAND, + OCTEON_IRQ_MIO, /* Summary of MIO_BOOT_ERR */ + OCTEON_IRQ_IOB, /* Summary of IOB_INT_SUM */ + OCTEON_IRQ_FPA, /* Summary of FPA_INT_SUM */ + OCTEON_IRQ_POW, /* Summary of POW_ECC_ERR */ + OCTEON_IRQ_L2C, /* Summary of L2C_INT_STAT */ + OCTEON_IRQ_IPD, /* Summary of IPD_INT_SUM */ + OCTEON_IRQ_PIP, /* Summary of PIP_INT_REG */ + OCTEON_IRQ_PKO, /* Summary of PKO_REG_ERROR */ + OCTEON_IRQ_ZIP, /* Summary of ZIP_ERROR */ + OCTEON_IRQ_TIM, /* Summary of TIM_REG_ERROR */ + OCTEON_IRQ_RAD, /* Summary of RAD_REG_ERROR */ + OCTEON_IRQ_KEY, /* Summary of KEY_INT_SUM */ + OCTEON_IRQ_DFA, /* Summary of DFA */ + OCTEON_IRQ_USBCTL, /* Summary of USBN0_INT_SUM */ + OCTEON_IRQ_SLI, /* Summary of SLI_INT_SUM */ + OCTEON_IRQ_DPI, /* Summary of DPI_INT_SUM */ + OCTEON_IRQ_AGX0, /* Summary of GMX0*+PCS0_INT*_REG */ + OCTEON_IRQ_AGL = OCTEON_IRQ_AGX0 + 5, + OCTEON_IRQ_PTP, + OCTEON_IRQ_PEM0, + OCTEON_IRQ_PEM1, + OCTEON_IRQ_SRIO0, + OCTEON_IRQ_SRIO1, + OCTEON_IRQ_LMC0, + OCTEON_IRQ_DFM = OCTEON_IRQ_LMC0 + 4, /* Summary of DFM */ + OCTEON_IRQ_RST, +}; #ifdef CONFIG_PCI_MSI -/* 152 - 215 represent the MSI interrupts 0-63 */ -#define OCTEON_IRQ_MSI_BIT0 152 -#define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) +/* 152 - 407 represent the MSI interrupts 0-255 */ +#define OCTEON_IRQ_MSI_BIT0 (OCTEON_IRQ_RST + 1) -#define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) +#define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) +#define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) #else -#define OCTEON_IRQ_LAST 152 +#define OCTEON_IRQ_LAST (OCTEON_IRQ_RST + 1) #endif #endif diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 6b34afd0..f72f768 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -257,4 +257,6 @@ extern struct cvmx_bootinfo *octeon_bootinfo; extern uint64_t octeon_bootloader_entry_addr; +extern void (*octeon_irq_setup_secondary)(void); + #endif /* __ASM_OCTEON_OCTEON_H */ diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index d808049..eebaf56 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -259,11 +259,11 @@ static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock); static u64 msi_rcv_reg[4]; static u64 mis_ena_reg[4]; -static void octeon_irq_msi_enable_pcie(unsigned int irq) +static void octeon_irq_msi_enable_pcie(struct irq_data *data) { u64 en; unsigned long flags; - int msi_number = irq - OCTEON_IRQ_MSI_BIT0; + int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0; int irq_index = msi_number >> 6; int irq_bit = msi_number & 0x3f; @@ -275,11 +275,11 @@ static void octeon_irq_msi_enable_pcie(unsigned int irq) raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); } -static void octeon_irq_msi_disable_pcie(unsigned int irq) +static void octeon_irq_msi_disable_pcie(struct irq_data *data) { u64 en; unsigned long flags; - int msi_number = irq - OCTEON_IRQ_MSI_BIT0; + int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0; int irq_index = msi_number >> 6; int irq_bit = msi_number & 0x3f; @@ -293,11 +293,11 @@ static void octeon_irq_msi_disable_pcie(unsigned int irq) static struct irq_chip octeon_irq_chip_msi_pcie = { .name = "MSI", - .enable = octeon_irq_msi_enable_pcie, - .disable = octeon_irq_msi_disable_pcie, + .irq_enable = octeon_irq_msi_enable_pcie, + .irq_disable = octeon_irq_msi_disable_pcie, }; -static void octeon_irq_msi_enable_pci(unsigned int irq) +static void octeon_irq_msi_enable_pci(struct irq_data *data) { /* * Octeon PCI doesn't have the ability to mask/unmask MSI @@ -308,15 +308,15 @@ static void octeon_irq_msi_enable_pci(unsigned int irq) */ } -static void octeon_irq_msi_disable_pci(unsigned int irq) +static void octeon_irq_msi_disable_pci(struct irq_data *data) { /* See comment in enable */ } static struct irq_chip octeon_irq_chip_msi_pci = { .name = "MSI", - .enable = octeon_irq_msi_enable_pci, - .disable = octeon_irq_msi_disable_pci, + .irq_enable = octeon_irq_msi_enable_pci, + .irq_disable = octeon_irq_msi_disable_pci, }; /* -- cgit v0.10.2 From 5b7cd6fd8278a754df6495fcc5cfa4dd3df42206 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 27 Mar 2011 16:04:30 +0200 Subject: MIPS: Octeon: Simplify irq_cpu_on/offline irq chip functions Make use of the IRQCHIP_ONOFFLINE_ENABLED flag and remove the wrappers. Use irqd_irq_disabled() instead of desc->status, which will go away. Signed-off-by: Thomas Gleixner Tested-by: David Daney diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 03c081d..ffd4ae6 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -152,19 +152,6 @@ static void octeon_irq_core_bus_sync_unlock(struct irq_data *data) mutex_unlock(&cd->core_irq_mutex); } - -static void octeon_irq_core_cpu_online(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_core_eoi(data); -} - -static void octeon_irq_core_cpu_offline(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_core_ack(data); -} - static struct irq_chip octeon_irq_chip_core = { .name = "Core", .irq_enable = octeon_irq_core_enable, @@ -174,8 +161,9 @@ static struct irq_chip octeon_irq_chip_core = { .irq_bus_lock = octeon_irq_core_bus_lock, .irq_bus_sync_unlock = octeon_irq_core_bus_sync_unlock, - .irq_cpu_online = octeon_irq_core_cpu_online, - .irq_cpu_offline = octeon_irq_core_cpu_offline, + .irq_cpu_online = octeon_irq_core_eoi, + .irq_cpu_offline = octeon_irq_core_ack, + .flags = IRQCHIP_ONOFFLINE_ENABLED, }; static void __init octeon_irq_init_core(void) @@ -517,30 +505,6 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data) } } -static void octeon_irq_cpu_online_mbox(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_ciu_enable_local(data); -} - -static void octeon_irq_cpu_online_mbox_v2(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_ciu_enable_local_v2(data); -} - -static void octeon_irq_cpu_offline_mbox(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_ciu_disable_local(data); -} - -static void octeon_irq_cpu_offline_mbox_v2(struct irq_data *data) -{ - if (irqd_irq_disabled(data)) - octeon_irq_ciu_disable_local_v2(data); -} - #ifdef CONFIG_SMP static void octeon_irq_cpu_offline_ciu(struct irq_data *data) @@ -570,8 +534,7 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data, const struct cpumask *dest, bool force) { int cpu; - struct irq_desc *desc = irq_to_desc(data->irq); - int enable_one = (desc->status & IRQ_DISABLED) == 0; + bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data); unsigned long flags; union octeon_ciu_chip_data cd; @@ -585,7 +548,7 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data, if (cpumask_weight(dest) != 1) return -EINVAL; - if (desc->status & IRQ_DISABLED) + if (!enable_one) return 0; if (cd.s.line == 0) { @@ -595,7 +558,7 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data, unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; + enable_one = false; set_bit(cd.s.bit, pen); } else { clear_bit(cd.s.bit, pen); @@ -610,7 +573,7 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data, unsigned long *pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; + enable_one = false; set_bit(cd.s.bit, pen); } else { clear_bit(cd.s.bit, pen); @@ -631,12 +594,11 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data, bool force) { int cpu; - struct irq_desc *desc = irq_to_desc(data->irq); - int enable_one = (desc->status & IRQ_DISABLED) == 0; + bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data); u64 mask; union octeon_ciu_chip_data cd; - if (desc->status & IRQ_DISABLED) + if (!enable_one) return 0; cd.p = data->chip_data; @@ -647,7 +609,7 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data, unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); int index = octeon_coreid_for_cpu(cpu) * 2; if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; + enable_one = false; set_bit(cd.s.bit, pen); cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); } else { @@ -660,7 +622,7 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data, unsigned long *pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); int index = octeon_coreid_for_cpu(cpu) * 2 + 1; if (cpumask_test_cpu(cpu, dest) && enable_one) { - enable_one = 0; + enable_one = false; set_bit(cd.s.bit, pen); cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); } else { @@ -679,7 +641,6 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data, */ static void octeon_irq_dummy_mask(struct irq_data *data) { - return; } /* @@ -741,8 +702,9 @@ static struct irq_chip octeon_irq_chip_ciu_mbox_v2 = { .irq_ack = octeon_irq_ciu_disable_local_v2, .irq_eoi = octeon_irq_ciu_enable_local_v2, - .irq_cpu_online = octeon_irq_cpu_online_mbox_v2, - .irq_cpu_offline = octeon_irq_cpu_offline_mbox_v2, + .irq_cpu_online = octeon_irq_ciu_enable_local_v2, + .irq_cpu_offline = octeon_irq_ciu_disable_local_v2, + .flags = IRQCHIP_ONOFFLINE_ENABLED, }; static struct irq_chip octeon_irq_chip_ciu_mbox = { @@ -750,8 +712,9 @@ static struct irq_chip octeon_irq_chip_ciu_mbox = { .irq_enable = octeon_irq_ciu_enable_all, .irq_disable = octeon_irq_ciu_disable_all, - .irq_cpu_online = octeon_irq_cpu_online_mbox, - .irq_cpu_offline = octeon_irq_cpu_offline_mbox, + .irq_cpu_online = octeon_irq_ciu_enable_local, + .irq_cpu_offline = octeon_irq_ciu_disable_local, + .flags = IRQCHIP_ONOFFLINE_ENABLED, }; /* -- cgit v0.10.2 From 9efbc3fba2cd7f703b55d72e5168ed4348930442 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 27 Mar 2011 15:11:13 +0200 Subject: MIPS: alchemy: Use proper irq accessors This really starts to be a sysiphean task. Signed-off-by: Thomas Gleixner diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c index 8876195..a4e0400 100644 --- a/arch/mips/alchemy/devboards/db1200/setup.c +++ b/arch/mips/alchemy/devboards/db1200/setup.c @@ -70,13 +70,12 @@ static int __init db1200_arch_init(void) * issues they must not be automatically enabled when initially * requested. */ - irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN; - irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN; - irq_to_desc(DB1200_PC0_INSERT_INT)->status |= IRQ_NOAUTOEN; - irq_to_desc(DB1200_PC0_EJECT_INT)->status |= IRQ_NOAUTOEN; - irq_to_desc(DB1200_PC1_INSERT_INT)->status |= IRQ_NOAUTOEN; - irq_to_desc(DB1200_PC1_EJECT_INT)->status |= IRQ_NOAUTOEN; - + irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN); + irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN); + irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN); + irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN); + irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN); + irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN); return 0; } arch_initcall(db1200_arch_init); -- cgit v0.10.2 From e4ec7989b4e55d9275ebac66230b7dac6dcb1fae Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 27 Mar 2011 15:19:28 +0200 Subject: MIPS: Convert the irq functions to the new names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index f91c43a..596ad00 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c @@ -142,8 +142,8 @@ void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq) bcsr_csc_base = csc_start; for (irq = csc_start; irq <= csc_end; irq++) - set_irq_chip_and_handler_name(irq, &bcsr_irq_type, - handle_level_irq, "level"); + irq_set_chip_and_handler_name(irq, &bcsr_irq_type, + handle_level_irq, "level"); - set_irq_chained_handler(hook_irq, bcsr_csc_handler); + irq_set_chained_handler(hook_irq, bcsr_csc_handler); } diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c index a4e0400..4a89800 100644 --- a/arch/mips/alchemy/devboards/db1200/setup.c +++ b/arch/mips/alchemy/devboards/db1200/setup.c @@ -63,7 +63,7 @@ void __init board_setup(void) static int __init db1200_arch_init(void) { /* GPIO7 is low-level triggered CPLD cascade */ - set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT); /* insert/eject pairs: one of both is always screaming. To avoid diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 9e45971..05f120f 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -215,35 +215,35 @@ void __init board_setup(void) static int __init db1x00_init_irq(void) { #if defined(CONFIG_MIPS_MIRAGE) - set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */ + irq_set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */ #elif defined(CONFIG_MIPS_DB1550) - set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1550_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1550_GPIO21_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1550_GPIO22_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ + irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */ + irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + irq_set_irq_type(AU1550_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + irq_set_irq_type(AU1550_GPIO21_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + irq_set_irq_type(AU1550_GPIO22_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ #elif defined(CONFIG_MIPS_DB1500) - set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ + irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ #elif defined(CONFIG_MIPS_DB1100) - set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ + irq_set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + irq_set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + irq_set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + irq_set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + irq_set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + irq_set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ #elif defined(CONFIG_MIPS_DB1000) - set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ + irq_set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + irq_set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + irq_set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + irq_set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + irq_set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + irq_set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ #endif return 0; } diff --git a/arch/mips/alchemy/devboards/pb1000/board_setup.c b/arch/mips/alchemy/devboards/pb1000/board_setup.c index f6540ec..2d85c4b 100644 --- a/arch/mips/alchemy/devboards/pb1000/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1000/board_setup.c @@ -197,7 +197,7 @@ void __init board_setup(void) static int __init pb1000_init_irq(void) { - set_irq_type(AU1000_GPIO15_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1000_GPIO15_INT, IRQF_TRIGGER_LOW); return 0; } arch_initcall(pb1000_init_irq); diff --git a/arch/mips/alchemy/devboards/pb1100/board_setup.c b/arch/mips/alchemy/devboards/pb1100/board_setup.c index 90dda5f..d108fd5 100644 --- a/arch/mips/alchemy/devboards/pb1100/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1100/board_setup.c @@ -117,10 +117,10 @@ void __init board_setup(void) static int __init pb1100_init_irq(void) { - set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */ - set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */ - set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */ - set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */ + irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */ + irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */ + irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */ + irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */ return 0; } diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c index 8b4466f..6d06b07 100644 --- a/arch/mips/alchemy/devboards/pb1200/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1200/board_setup.c @@ -142,7 +142,7 @@ static int __init pb1200_init_irq(void) panic("Game over. Your score is 0."); } - set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT); return 0; diff --git a/arch/mips/alchemy/devboards/pb1500/board_setup.c b/arch/mips/alchemy/devboards/pb1500/board_setup.c index 9cd9dfa..83f4621 100644 --- a/arch/mips/alchemy/devboards/pb1500/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1500/board_setup.c @@ -134,14 +134,14 @@ void __init board_setup(void) static int __init pb1500_init_irq(void) { - set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */ - set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); - set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */ + irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */ + irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); + irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); return 0; } diff --git a/arch/mips/alchemy/devboards/pb1550/board_setup.c b/arch/mips/alchemy/devboards/pb1550/board_setup.c index 9d7d6ed..b790213 100644 --- a/arch/mips/alchemy/devboards/pb1550/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1550/board_setup.c @@ -73,9 +73,9 @@ void __init board_setup(void) static int __init pb1550_init_irq(void) { - set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH); + irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH); /* enable both PCMCIA card irqs in the shared line */ alchemy_gpio2_enable_int(201); diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index 40b84b9..cf436ab 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c @@ -123,11 +123,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert) static int __init mtx1_init_irq(void) { - set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); - set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); + irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); return 0; } diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c index 80c521e..febfb0f 100644 --- a/arch/mips/alchemy/xxs1500/board_setup.c +++ b/arch/mips/alchemy/xxs1500/board_setup.c @@ -85,19 +85,19 @@ void __init board_setup(void) static int __init xxs1500_init_irq(void) { - set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); - set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH); + irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); - set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */ - set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); + irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */ + irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); return 0; } diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c index a6484b6..03db3da 100644 --- a/arch/mips/ar7/irq.c +++ b/arch/mips/ar7/irq.c @@ -119,11 +119,11 @@ static void __init ar7_irq_init(int base) for (i = 0; i < 40; i++) { writel(i, REG(CHNL_OFFSET(i))); /* Primary IRQ's */ - set_irq_chip_and_handler(base + i, &ar7_irq_type, + irq_set_chip_and_handler(base + i, &ar7_irq_type, handle_level_irq); /* Secondary IRQ's */ if (i < 32) - set_irq_chip_and_handler(base + i + 40, + irq_set_chip_and_handler(base + i + 40, &ar7_sec_irq_type, handle_level_irq); } diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 7c02bc9..ac610d5 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -124,11 +124,11 @@ static void __init ath79_misc_irq_init(void) for (i = ATH79_MISC_IRQ_BASE; i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) { - set_irq_chip_and_handler(i, &ath79_misc_irq_chip, + irq_set_chip_and_handler(i, &ath79_misc_irq_chip, handle_level_irq); } - set_irq_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler); + irq_set_chained_handler(ATH79_CPU_IRQ_MISC, ath79_misc_irq_handler); } asmlinkage void plat_irq_dispatch(void) diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 1691531..cea6021c 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -230,11 +230,11 @@ void __init arch_init_irq(void) mips_cpu_irq_init(); for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) - set_irq_chip_and_handler(i, &bcm63xx_internal_irq_chip, + irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, handle_level_irq); for (i = IRQ_EXT_BASE; i < IRQ_EXT_BASE + 4; ++i) - set_irq_chip_and_handler(i, &bcm63xx_external_irq_chip, + irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip, handle_edge_irq); setup_irq(IRQ_MIPS_BASE + 2, &cpu_ip2_cascade_action); diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 8d9a5fc..824e08c 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -68,10 +68,10 @@ void __init init_ioasic_irqs(int base) fast_iob(); for (i = base; i < base + IO_INR_DMA; i++) - set_irq_chip_and_handler(i, &ioasic_irq_type, + irq_set_chip_and_handler(i, &ioasic_irq_type, handle_level_irq); for (; i < base + IO_IRQ_LINES; i++) - set_irq_chip(i, &ioasic_dma_irq_type); + irq_set_chip(i, &ioasic_dma_irq_type); ioasic_irq_base = base; } diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index ef31d98..37199f7 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -73,7 +73,7 @@ void __init init_kn02_irqs(int base) iob(); for (i = base; i < base + KN02_IRQ_LINES; i++) - set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &kn02_irq_type, handle_level_irq); kn02_irq_base = base; } diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 9b1207a..3dbd7a5 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -69,7 +69,7 @@ void emma2rh_irq_init(void) u32 i; for (i = 0; i < NUM_EMMA2RH_IRQ; i++) - set_irq_chip_and_handler_name(EMMA2RH_IRQ_BASE + i, + irq_set_chip_and_handler_name(EMMA2RH_IRQ_BASE + i, &emma2rh_irq_controller, handle_level_irq, "level"); } @@ -105,7 +105,7 @@ void emma2rh_sw_irq_init(void) u32 i; for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++) - set_irq_chip_and_handler_name(EMMA2RH_SW_IRQ_BASE + i, + irq_set_chip_and_handler_name(EMMA2RH_SW_IRQ_BASE + i, &emma2rh_sw_irq_controller, handle_level_irq, "level"); } @@ -162,7 +162,7 @@ void emma2rh_gpio_irq_init(void) u32 i; for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++) - set_irq_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i, + irq_set_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i, &emma2rh_gpio_irq_controller, handle_edge_irq, "edge"); } diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index 40f7c6b..260df47 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -56,7 +56,7 @@ void __init init_r4030_ints(void) int i; for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++) - set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &r4030_irq_type, handle_level_irq); r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index bd2fc29..73031f7 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -306,7 +306,7 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) uint32_t flag; unsigned int gpio_irq; unsigned int gpio_bank; - struct jz_gpio_chip *chip = get_irq_desc_data(desc); + struct jz_gpio_chip *chip = irq_desc_get_handler_data(desc); gpio_bank = JZ4740_IRQ_GPIO0 - irq; @@ -416,7 +416,7 @@ static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on) chip->wakeup &= ~IRQ_TO_BIT(data->irq); spin_unlock(&chip->lock); - set_irq_wake(chip->irq, on); + irq_set_irq_wake(chip->irq, on); return 0; } @@ -510,14 +510,14 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) gpiochip_add(&chip->gpio_chip); chip->irq = JZ4740_IRQ_INTC_GPIO(id); - set_irq_data(chip->irq, chip); - set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler); + irq_set_handler_data(chip->irq, chip); + irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler); for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { irq_set_lockdep_class(irq, &gpio_lock_class); - set_irq_chip_data(irq, chip); - set_irq_chip_and_handler(irq, &jz_gpio_irq_chip, - handle_level_irq); + irq_set_chip_data(irq, chip); + irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, + handle_level_irq); } return 0; diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index dcc5593..d82c0c4 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -104,8 +104,8 @@ void __init arch_init_irq(void) writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK); for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { - set_irq_chip_data(i, (void *)IRQ_BIT(i)); - set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); + irq_set_chip_data(i, (void *)IRQ_BIT(i)); + irq_set_chip_and_handler(i, &intc_irq_type, handle_level_irq); } setup_irq(2, &jz4740_cascade_action); diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index e221662..c018696 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -110,7 +110,7 @@ int i8259A_irq_pending(unsigned int irq) void make_8259A_irq(unsigned int irq) { disable_irq_nosync(irq); - set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq); + irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq); enable_irq(irq); } @@ -336,8 +336,8 @@ void __init init_i8259_irqs(void) init_8259A(0); for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) { - set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); - set_irq_probe(i); + irq_set_chip_and_handler(i, &i8259A_chip, handle_level_irq); + irq_set_probe(i); } setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 43cd962..0c527f6 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c @@ -229,7 +229,7 @@ static void __init gic_basic_init(int numintrs, int numvpes, vpe_local_setup(numvpes); for (i = _irqbase; i < (_irqbase + numintrs); i++) - set_irq_chip(i, &gic_irq_controller); + irq_set_chip(i, &gic_irq_controller); } void __init gic_init(unsigned long gic_base_addr, diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c index 7fd176f..883fc6c 100644 --- a/arch/mips/kernel/irq-gt641xx.c +++ b/arch/mips/kernel/irq-gt641xx.c @@ -126,6 +126,6 @@ void __init gt641xx_irq_init(void) * bit31: logical or of bits[25:1]. */ for (i = 1; i < 30; i++) - set_irq_chip_and_handler(GT641XX_IRQ_BASE + i, - >641xx_irq_chip, handle_level_irq); + irq_set_chip_and_handler(GT641XX_IRQ_BASE + i, + >641xx_irq_chip, handle_level_irq); } diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index fc800cd..0c6afee 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -137,16 +137,20 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma switch (imp->im_type) { case MSC01_IRQ_EDGE: - set_irq_chip_and_handler_name(irqbase + n, - &msc_edgeirq_type, handle_edge_irq, "edge"); + irq_set_chip_and_handler_name(irqbase + n, + &msc_edgeirq_type, + handle_edge_irq, + "edge"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - set_irq_chip_and_handler_name(irqbase+n, - &msc_levelirq_type, handle_level_irq, "level"); + irq_set_chip_and_handler_name(irqbase + n, + &msc_levelirq_type, + handle_level_irq, + "level"); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index fd24fd9..a8a8977 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -45,6 +45,6 @@ void __init rm7k_cpu_irq_init(void) clear_c0_intcontrol(0x00000f00); /* Mask all */ for (i = base; i < base + 4; i++) - set_irq_chip_and_handler(i, &rm7k_irq_controller, + irq_set_chip_and_handler(i, &rm7k_irq_controller, handle_percpu_irq); } diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index ca463ec..38874a4 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -98,10 +98,10 @@ void __init rm9k_cpu_irq_init(void) clear_c0_intcontrol(0x0000f000); /* Mask all */ for (i = base; i < base + 4; i++) - set_irq_chip_and_handler(i, &rm9k_irq_controller, + irq_set_chip_and_handler(i, &rm9k_irq_controller, handle_level_irq); rm9000_perfcount_irq = base + 1; - set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, + irq_set_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, handle_percpu_irq); } diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 1b68ebe..9b734d7 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -102,7 +102,7 @@ void __init init_IRQ(void) #endif for (i = 0; i < NR_IRQS; i++) - set_irq_noprobe(i); + irq_set_noprobe(i); arch_init_irq(); diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index fd945c5..6e71b28 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -109,10 +109,10 @@ void __init mips_cpu_irq_init(void) */ if (cpu_has_mipsmt) for (i = irq_base; i < irq_base + 2; i++) - set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller, + irq_set_chip_and_handler(i, &mips_mt_cpu_irq_controller, handle_percpu_irq); for (i = irq_base + 2; i < irq_base + 8; i++) - set_irq_chip_and_handler(i, &mips_cpu_irq_controller, + irq_set_chip_and_handler(i, &mips_cpu_irq_controller, handle_percpu_irq); } diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c index 526e158..b0c55b5 100644 --- a/arch/mips/kernel/irq_txx9.c +++ b/arch/mips/kernel/irq_txx9.c @@ -154,8 +154,8 @@ void __init txx9_irq_init(unsigned long baseaddr) for (i = 0; i < TXx9_MAX_IR; i++) { txx9irq[i].level = 4; /* middle level */ txx9irq[i].mode = TXx9_IRCR_LOW; - set_irq_chip_and_handler(TXX9_IRQ_BASE + i, - &txx9_irq_chip, handle_level_irq); + irq_set_chip_and_handler(TXX9_IRQ_BASE + i, &txx9_irq_chip, + handle_level_irq); } /* mask all IRC interrupts */ diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index f7e2c78..5a88cc4 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -1146,7 +1146,7 @@ static void setup_cross_vpe_interrupts(unsigned int nvpe) setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ)); - set_irq_handler(cpu_ipi_irq, handle_percpu_irq); + irq_set_handler(cpu_ipi_irq, handle_percpu_irq); } /* diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 670e3e7..de4c165 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -128,7 +128,7 @@ void __init arch_init_irq(void) mips_cpu_irq_init(); for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++) - set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &lasat_irq_type, handle_level_irq); setup_irq(LASAT_CASCADE_IRQ, &cascade); } diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c index 1549361..f27d7cc 100644 --- a/arch/mips/loongson/common/bonito-irq.c +++ b/arch/mips/loongson/common/bonito-irq.c @@ -44,7 +44,8 @@ void bonito_irq_init(void) u32 i; for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) - set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &bonito_irq_type, + handle_level_irq); #ifdef CONFIG_CPU_LOONGSON2E setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index b79b24a..9027061 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -472,7 +472,7 @@ static void __init fill_ipi_map(void) void __init arch_init_ipiirq(int irq, struct irqaction *action) { setup_irq(irq, action); - set_irq_handler(irq, handle_percpu_irq); + irq_set_handler(irq, handle_percpu_irq); } void __init arch_init_irq(void) diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 3c6f190..1620b83 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c @@ -119,7 +119,7 @@ static void __init plat_perf_setup(void) set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; #ifdef CONFIG_SMP - set_irq_handler(mips_cpu_perf_irq, handle_percpu_irq); + irq_set_handler(mips_cpu_perf_irq, handle_percpu_irq); #endif } } diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index eebaf56..5d530f8 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -172,7 +172,7 @@ msi_irq_allocated: pci_write_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, control); - set_irq_msi(irq, desc); + irq_set_msi_desc(irq, desc); write_msi_msg(irq, &msg); return 0; } @@ -388,7 +388,7 @@ int __init octeon_msi_initialize(void) } for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++) - set_irq_chip_and_handler(irq, msi, handle_simple_irq); + irq_set_chip_and_handler(irq, msi, handle_simple_irq); if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0, diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c index 352f29d..c4fa2d7 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c @@ -182,7 +182,7 @@ void __init msp_cic_irq_init(void) /* initialize all the IRQ descriptors */ for (i = MSP_CIC_INTBASE ; i < MSP_CIC_INTBASE + 32 ; i++) { - set_irq_chip_and_handler(i, &msp_cic_irq_controller, + irq_set_chip_and_handler(i, &msp_cic_irq_controller, handle_level_irq); #ifdef CONFIG_MIPS_MT_SMTC /* Mask of CIC interrupt */ diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c index 8f51e4a..5bbcc47 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c @@ -77,7 +77,7 @@ void __init msp_slp_irq_init(void) /* initialize all the IRQ descriptors */ for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++) - set_irq_chip_and_handler(i, &msp_slp_irq_controller, + irq_set_chip_and_handler(i, &msp_slp_irq_controller, handle_level_irq); } diff --git a/arch/mips/pmc-sierra/msp71xx/msp_smp.c b/arch/mips/pmc-sierra/msp71xx/msp_smp.c index 43a9e26..bec1790 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_smp.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_smp.c @@ -64,7 +64,7 @@ static struct irqaction irq_call = { void __init arch_init_ipiirq(int irq, struct irqaction *action) { setup_irq(irq, action); - set_irq_handler(irq, handle_percpu_irq); + irq_set_handler(irq, handle_percpu_irq); } void __init msp_vsmp_int_init(void) diff --git a/arch/mips/pnx833x/common/interrupts.c b/arch/mips/pnx833x/common/interrupts.c index b226bcb..adc171c 100644 --- a/arch/mips/pnx833x/common/interrupts.c +++ b/arch/mips/pnx833x/common/interrupts.c @@ -259,11 +259,13 @@ void __init arch_init_irq(void) /* Set IRQ information in irq_desc */ for (irq = PNX833X_PIC_IRQ_BASE; irq < (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ); irq++) { pnx833x_hard_disable_pic_irq(irq); - set_irq_chip_and_handler(irq, &pnx833x_pic_irq_type, handle_simple_irq); + irq_set_chip_and_handler(irq, &pnx833x_pic_irq_type, + handle_simple_irq); } for (irq = PNX833X_GPIO_IRQ_BASE; irq < (PNX833X_GPIO_IRQ_BASE + PNX833X_GPIO_NUM_IRQ); irq++) - set_irq_chip_and_handler(irq, &pnx833x_gpio_irq_type, handle_simple_irq); + irq_set_chip_and_handler(irq, &pnx833x_gpio_irq_type, + handle_simple_irq); /* Set PIC priority limiter register to 0 */ PNX833X_PIC_INT_PRIORITY = 0; diff --git a/arch/mips/pnx8550/common/int.c b/arch/mips/pnx8550/common/int.c index dbdc35c..6b93c81 100644 --- a/arch/mips/pnx8550/common/int.c +++ b/arch/mips/pnx8550/common/int.c @@ -183,7 +183,7 @@ void __init arch_init_irq(void) int configPR; for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) - set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &level_irq_type, handle_level_irq); /* init of GIC/IPC interrupts */ /* should be done before cp0 since cp0 init enables the GIC int */ @@ -206,7 +206,7 @@ void __init arch_init_irq(void) /* mask/priority is still 0 so we will not get any * interrupts until it is unmasked */ - set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &level_irq_type, handle_level_irq); } /* Priority level 0 */ @@ -215,20 +215,20 @@ void __init arch_init_irq(void) /* Set int vector table address */ PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; - set_irq_chip_and_handler(MIPS_CPU_GIC_IRQ, &level_irq_type, + irq_set_chip_and_handler(MIPS_CPU_GIC_IRQ, &level_irq_type, handle_level_irq); setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); /* init of Timer interrupts */ for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) - set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &level_irq_type, handle_level_irq); /* Stop Timer 1-3 */ configPR = read_c0_config7(); configPR |= 0x00000038; write_c0_config7(configPR); - set_irq_chip_and_handler(MIPS_CPU_TIMER_IRQ, &level_irq_type, + irq_set_chip_and_handler(MIPS_CPU_TIMER_IRQ, &level_irq_type, handle_level_irq); setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); } diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c index 6f1c8ef..7fb97fb 100644 --- a/arch/mips/powertv/asic/irq_asic.c +++ b/arch/mips/powertv/asic/irq_asic.c @@ -112,5 +112,5 @@ void __init asic_irq_init(void) * Initialize interrupt handlers. */ for (i = 0; i < NR_IRQS; i++) - set_irq_chip_and_handler(i, &asic_irq_chip, handle_level_irq); + irq_set_chip_and_handler(i, &asic_irq_chip, handle_level_irq); } diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c index b32a768..7c6db74 100644 --- a/arch/mips/rb532/irq.c +++ b/arch/mips/rb532/irq.c @@ -207,8 +207,8 @@ void __init arch_init_irq(void) pr_info("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS); for (i = 0; i < RC32434_NR_IRQS; i++) - set_irq_chip_and_handler(i, &rc32434_irq_type, - handle_level_irq); + irq_set_chip_and_handler(i, &rc32434_irq_type, + handle_level_irq); } /* Main Interrupt dispatcher */ diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index e6e6475..476423a 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -312,7 +312,7 @@ void __init arch_init_irq(void) else handler = &ip22_local3_irq_type; - set_irq_chip_and_handler(i, handler, handle_level_irq); + irq_set_chip_and_handler(i, handler, handle_level_irq); } /* vector handler. this register the IRQ as non-sharable */ diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index f2d09d7..1148871 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -337,7 +337,7 @@ static struct irq_chip bridge_irq_type = { void __devinit register_bridge_irq(unsigned int irq) { - set_irq_chip_and_handler(irq, &bridge_irq_type, handle_level_irq); + irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq); } int __devinit request_bridge_irq(struct bridge_controller *bc) diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index c01f558..a152538 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c @@ -153,7 +153,7 @@ static void __init hub_rt_clock_event_global_init(void) panic("Allocation of irq number for timer failed"); } while (xchg(&rt_timer_irq, irq)); - set_irq_chip_and_handler(irq, &rt_irq_type, handle_percpu_irq); + irq_set_chip_and_handler(irq, &rt_irq_type, handle_percpu_irq); setup_irq(irq, &hub_rt_irqaction); } diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index e0a3ce4..c65ea76 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -451,43 +451,51 @@ void __init arch_init_irq(void) for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) { switch (irq) { case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ: - set_irq_chip_and_handler_name(irq,&ip32_mace_interrupt, - handle_level_irq, "level"); + irq_set_chip_and_handler_name(irq, + &ip32_mace_interrupt, + handle_level_irq, + "level"); break; case MACEPCI_SCSI0_IRQ ... MACEPCI_SHARED2_IRQ: - set_irq_chip_and_handler_name(irq, - &ip32_macepci_interrupt, handle_level_irq, - "level"); + irq_set_chip_and_handler_name(irq, + &ip32_macepci_interrupt, + handle_level_irq, + "level"); break; case CRIME_CPUERR_IRQ: case CRIME_MEMERR_IRQ: - set_irq_chip_and_handler_name(irq, - &crime_level_interrupt, handle_level_irq, - "level"); + irq_set_chip_and_handler_name(irq, + &crime_level_interrupt, + handle_level_irq, + "level"); break; case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ: case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ: case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ: case CRIME_VICE_IRQ: - set_irq_chip_and_handler_name(irq, - &crime_edge_interrupt, handle_edge_irq, "edge"); + irq_set_chip_and_handler_name(irq, + &crime_edge_interrupt, + handle_edge_irq, + "edge"); break; case MACEISA_PARALLEL_IRQ: case MACEISA_SERIAL1_TDMAPR_IRQ: case MACEISA_SERIAL2_TDMAPR_IRQ: - set_irq_chip_and_handler_name(irq, - &ip32_maceisa_edge_interrupt, handle_edge_irq, - "edge"); + irq_set_chip_and_handler_name(irq, + &ip32_maceisa_edge_interrupt, + handle_edge_irq, + "edge"); break; default: - set_irq_chip_and_handler_name(irq, - &ip32_maceisa_level_interrupt, handle_level_irq, - "level"); + irq_set_chip_and_handler_name(irq, + &ip32_maceisa_level_interrupt, + handle_level_irq, + "level"); break; } } diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 89e8188..09740d6 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -216,7 +216,8 @@ void __init init_bcm1480_irqs(void) int i; for (i = 0; i < BCM1480_NR_IRQS; i++) { - set_irq_chip_and_handler(i, &bcm1480_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &bcm1480_irq_type, + handle_level_irq); bcm1480_irq_owner[i] = 0; } } diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index fd269ea..be4460a 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -190,7 +190,8 @@ void __init init_sb1250_irqs(void) int i; for (i = 0; i < SB1250_NR_IRQS; i++) { - set_irq_chip_and_handler(i, &sb1250_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &sb1250_irq_type, + handle_level_irq); sb1250_irq_owner[i] = 0; } } diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index 72b9415..c48194c 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c @@ -209,7 +209,7 @@ void __init sni_a20r_irq_init(void) int i; for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++) - set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq); sni_hwint = a20r_hwint; change_c0_status(ST0_IM, IE_IRQ0); setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index cfcc68a..ed3b3d317 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -296,7 +296,7 @@ void __init sni_pcimt_irq_init(void) mips_cpu_irq_init(); /* Actually we've got more interrupts to handle ... */ for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++) - set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &pcimt_irq_type, handle_level_irq); sni_hwint = sni_pcimt_hwint; change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3); } diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 0846e99..b524637 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -238,7 +238,7 @@ void __init sni_pcit_irq_init(void) mips_cpu_irq_init(); for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) - set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq); *(volatile u32 *)SNI_PCIT_INT_REG = 0; sni_hwint = sni_pcit_hwint; change_c0_status(ST0_IM, IE_IRQ1); @@ -251,7 +251,7 @@ void __init sni_pcit_cplus_irq_init(void) mips_cpu_irq_init(); for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) - set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &pcit_irq_type, handle_level_irq); *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; sni_hwint = sni_pcit_hwint_cplus; change_c0_status(ST0_IM, IE_IRQ0); diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index f05d8e5..a7e5a6d 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c @@ -413,7 +413,7 @@ void __init sni_rm200_i8259_irqs(void) sni_rm200_init_8259A(); for (i = RM200_I8259A_IRQ_BASE; i < RM200_I8259A_IRQ_BASE + 16; i++) - set_irq_chip_and_handler(i, &sni_rm200_i8259A_chip, + irq_set_chip_and_handler(i, &sni_rm200_i8259A_chip, handle_level_irq); setup_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, &sni_rm200_irq2); @@ -477,7 +477,7 @@ void __init sni_rm200_irq_init(void) mips_cpu_irq_init(); /* Actually we've got more interrupts to handle ... */ for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) - set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &rm200_irq_type, handle_level_irq); sni_hwint = sni_rm200_hwint; change_c0_status(ST0_IM, IE_IRQ0); setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c index e1828e8..7e3ac57 100644 --- a/arch/mips/txx9/generic/irq_tx4927.c +++ b/arch/mips/txx9/generic/irq_tx4927.c @@ -35,7 +35,7 @@ void __init tx4927_irq_init(void) mips_cpu_irq_init(); txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL); - set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, + irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, handle_simple_irq); /* raise priority for errors, timers, SIO */ txx9_irq_set_pri(TX4927_IR_ECCERR, 7); diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c index a6e6e80..aace856 100644 --- a/arch/mips/txx9/generic/irq_tx4938.c +++ b/arch/mips/txx9/generic/irq_tx4938.c @@ -23,7 +23,7 @@ void __init tx4938_irq_init(void) mips_cpu_irq_init(); txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); - set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, + irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, handle_simple_irq); /* raise priority for errors, timers, SIO */ txx9_irq_set_pri(TX4938_IR_ECCERR, 7); diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c index 93b6edb..6b067db 100644 --- a/arch/mips/txx9/generic/irq_tx4939.c +++ b/arch/mips/txx9/generic/irq_tx4939.c @@ -176,8 +176,8 @@ void __init tx4939_irq_init(void) for (i = 1; i < TX4939_NUM_IR; i++) { tx4939irq[i].level = 4; /* middle level */ tx4939irq[i].mode = TXx9_IRCR_LOW; - set_irq_chip_and_handler(TXX9_IRQ_BASE + i, - &tx4939_irq_chip, handle_level_irq); + irq_set_chip_and_handler(TXX9_IRQ_BASE + i, &tx4939_irq_chip, + handle_level_irq); } /* mask all IRC interrupts */ @@ -193,7 +193,7 @@ void __init tx4939_irq_init(void) __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r); __raw_writel(irc_elevel, &tx4939_ircptr->msk.r); - set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT, + irq_set_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT, handle_simple_irq); /* raise priority for errors, timers, sio */ diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index 92a5c1b..c22c859 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c @@ -120,8 +120,9 @@ void __init jmr3927_irq_setup(void) tx3927_irq_init(); for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); + irq_set_chip_and_handler(i, &jmr3927_irq_ioc, + handle_level_irq); /* setup IOC interrupt 1 (PCI, MODEM) */ - set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); + irq_set_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq); } diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 7c0a048..6c22c49 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -164,9 +164,9 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) for (i = RBTX4927_IRQ_IOC; i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, + irq_set_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, handle_level_irq); - set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); + irq_set_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); } static int rbtx4927_irq_dispatch(int pending) @@ -194,5 +194,5 @@ void __init rbtx4927_irq_setup(void) tx4927_irq_init(); toshiba_rbtx4927_irq_ioc_init(); /* Onboard 10M Ether: High Active */ - set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); + irq_set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH); } diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index 2ec4fe1..58cd7a9 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -132,10 +132,10 @@ static void __init toshiba_rbtx4938_irq_ioc_init(void) for (i = RBTX4938_IRQ_IOC; i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, + irq_set_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, handle_level_irq); - set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); + irq_set_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); } void __init rbtx4938_irq_setup(void) @@ -153,5 +153,5 @@ void __init rbtx4938_irq_setup(void) tx4938_irq_init(); toshiba_rbtx4938_irq_ioc_init(); /* Onboard 10M Ether: High Active */ - set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH); + irq_set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH); } diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c index 7007463..69a8061 100644 --- a/arch/mips/txx9/rbtx4939/irq.c +++ b/arch/mips/txx9/rbtx4939/irq.c @@ -88,8 +88,8 @@ void __init rbtx4939_irq_setup(void) tx4939_irq_init(); for (i = RBTX4939_IRQ_IOC; i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &rbtx4939_ioc_irq_chip, + irq_set_chip_and_handler(i, &rbtx4939_ioc_irq_chip, handle_level_irq); - set_irq_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq); + irq_set_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq); } diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index f53156b..a39ef32 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -710,11 +710,11 @@ static int __init vr41xx_icu_init(void) icu2_write(MGIUINTHREG, 0xffff); for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) - set_irq_chip_and_handler(i, &sysint1_irq_type, + irq_set_chip_and_handler(i, &sysint1_irq_type, handle_level_irq); for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) - set_irq_chip_and_handler(i, &sysint2_irq_type, + irq_set_chip_and_handler(i, &sysint2_irq_type, handle_level_irq); cascade_irq(INT0_IRQ, icu_get_irq); -- cgit v0.10.2 From 1d5f821c3f9f2344e1a854aa91a5ab3b25ee5c2a Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:59:54 +0200 Subject: mips: vr41xx: Use irdq_irq_disabled() Signed-off-by: Thomas Gleixner diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 9ff7f39..70a3b85 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -87,7 +87,7 @@ static void irq_dispatch(unsigned int irq) atomic_inc(&irq_err_count); else irq_dispatch(irq); - if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) + if (!irqd_irq_disabled(idata) && chip->irq_unmask) chip->irq_unmask(idata); } else do_IRQ(irq); -- cgit v0.10.2 From 337ce6811bfe474cc449de1f95d2c4f26641f5af Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:48:47 +0100 Subject: parisc: Convert the final irq bits 1) As promised in the comment, the core does not copy cpumask anymore when the arch code returns -EINVAL 2) Get the per cpu information from irq_data Signed-off-by: Thomas Gleixner Cc: Kyle McMartin Cc: linux-parisc@vger.kernel.org diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index cb450e1..34bc2af 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -113,13 +113,8 @@ int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest) int cpu_dest; /* timer and ipi have to always be received on all CPUs */ - if (CHECK_IRQ_PER_CPU(irq_to_desc(d->irq)->status)) { - /* Bad linux design decision. The mask has already - * been set; we must reset it. Will fix - tglx - */ - cpumask_setall(d->affinity); + if (irqd_is_per_cpu(d)) return -EINVAL; - } /* whatever mask they set, we just allow one CPU */ cpu_dest = first_cpu(*dest); @@ -357,7 +352,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) #ifdef CONFIG_SMP desc = irq_to_desc(irq); cpumask_copy(&dest, desc->irq_data.affinity); - if (CHECK_IRQ_PER_CPU(desc->status) && + if (irqd_is_per_cpu(&desc->irq_data) && !cpu_isset(smp_processor_id(), dest)) { int cpu = first_cpu(dest); -- cgit v0.10.2 From e2f571d294cc5f944539088bed46abae375b75f6 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:41:44 +0100 Subject: parisc: Convert irq namespace Convert to the new function names. Scripted with coccinelle. Signed-off-by: Thomas Gleixner Cc: Kyle McMartin Cc: linux-parisc@vger.kernel.org diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 34bc2af..3d59d52 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -235,13 +235,13 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) { if (irq_desc[irq].action) return -EBUSY; - if (get_irq_chip(irq) != &cpu_interrupt_type) + if (irq_get_chip(irq) != &cpu_interrupt_type) return -EBUSY; /* for iosapic interrupts */ if (type) { - set_irq_chip_and_handler(irq, type, handle_percpu_irq); - set_irq_chip_data(irq, data); + irq_set_chip_and_handler(irq, type, handle_percpu_irq); + irq_set_chip_data(irq, data); __cpu_unmask_irq(irq); } return 0; @@ -393,14 +393,14 @@ static void claim_cpu_irqs(void) { int i; for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { - set_irq_chip_and_handler(i, &cpu_interrupt_type, + irq_set_chip_and_handler(i, &cpu_interrupt_type, handle_percpu_irq); } - set_irq_handler(TIMER_IRQ, handle_percpu_irq); + irq_set_handler(TIMER_IRQ, handle_percpu_irq); setup_irq(TIMER_IRQ, &timer_action); #ifdef CONFIG_SMP - set_irq_handler(IPI_IRQ, handle_percpu_irq); + irq_set_handler(IPI_IRQ, handle_percpu_irq); setup_irq(IPI_IRQ, &ipi_action); #endif } diff --git a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c index deeec32..103095b 100644 --- a/drivers/parisc/eisa.c +++ b/drivers/parisc/eisa.c @@ -340,7 +340,7 @@ static int __init eisa_probe(struct parisc_device *dev) /* Reserve IRQ2 */ setup_irq(2, &irq2_action); for (i = 0; i < 16; i++) { - set_irq_chip_and_handler(i, &eisa_interrupt_type, + irq_set_chip_and_handler(i, &eisa_interrupt_type, handle_simple_irq); } diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c index ef31080..1bab5a2 100644 --- a/drivers/parisc/gsc.c +++ b/drivers/parisc/gsc.c @@ -152,8 +152,8 @@ int gsc_assign_irq(struct irq_chip *type, void *data) if (irq > GSC_IRQ_MAX) return NO_IRQ; - set_irq_chip_and_handler(irq, type, handle_simple_irq); - set_irq_chip_data(irq, data); + irq_set_chip_and_handler(irq, type, handle_simple_irq); + irq_set_chip_data(irq, data); return irq++; } diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c index a4d8ff6..e3b76d4 100644 --- a/drivers/parisc/superio.c +++ b/drivers/parisc/superio.c @@ -355,7 +355,8 @@ int superio_fixup_irq(struct pci_dev *pcidev) #endif for (i = 0; i < 16; i++) { - set_irq_chip_and_handler(i, &superio_interrupt_type, handle_simple_irq); + irq_set_chip_and_handler(i, &superio_interrupt_type, + handle_simple_irq); } /* -- cgit v0.10.2 From 68f20f43dae770bdb3d93cfb8fbe9679d3568c3b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:47:54 +0200 Subject: parisc: Use irq_to_desc() in show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 3d59d52..c0b1aff 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -169,10 +169,11 @@ int show_interrupts(struct seq_file *p, void *v) } if (i < NR_IRQS) { + struct irq_desc *desc = irq_to_desc(i); struct irqaction *action; - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; + raw_spin_lock_irqsave(&desc->lock, flags); + action = desc->action; if (!action) goto skip; seq_printf(p, "%3d: ", i); @@ -183,7 +184,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%10u ", kstat_irqs(i)); #endif - seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name); + seq_printf(p, " %14s", irq_desc_get_chip(desc)->name); #ifndef PARISC_IRQ_CR16_COUNTS seq_printf(p, " %s", action->name); @@ -215,7 +216,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_putc(p, '\n'); skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); + raw_spin_unlock_irqrestore(&desc->lock, flags); } return 0; @@ -233,7 +234,7 @@ int show_interrupts(struct seq_file *p, void *v) int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) { - if (irq_desc[irq].action) + if (irq_has_action(irq)) return -EBUSY; if (irq_get_chip(irq) != &cpu_interrupt_type) return -EBUSY; -- cgit v0.10.2 From 98488db9ff01849354bffb6a9675b1cc2ecf03fd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 15:43:57 +0100 Subject: powerpc: Use proper accessors for IRQ_* flags Use the proper accessors instead of open access to irq_desc. Converted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 0a557033..8f7da44 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -618,7 +618,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node, smp_wmb(); /* Clear norequest flags */ - irq_to_desc(i)->status &= ~IRQ_NOREQUEST; + irq_clear_status_flags(i, IRQ_NOREQUEST); /* Legacy flags are left to default at this point, * one can then use irq_create_mapping() to diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index bd1e1ff..2d65e9e 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c @@ -35,13 +35,13 @@ void machine_kexec_mask_interrupts(void) { if (!chip) continue; - if (chip->irq_eoi && desc->status & IRQ_INPROGRESS) + if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data)) chip->irq_eoi(&desc->irq_data); if (chip->irq_mask) chip->irq_mask(&desc->irq_data); - if (chip->irq_disable && !(desc->status & IRQ_DISABLED)) + if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data)) chip->irq_disable(&desc->irq_data); } } diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c index fde0ea5..529897c 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c @@ -132,7 +132,7 @@ static int cpld_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index 2bd1e6c..6cd041b 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c @@ -107,7 +107,7 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) /* Processing done; can reenable the cascade now */ raw_spin_lock(&desc->lock); chip->irq_ack(&desc->irq_data); - if (!(desc->status & IRQ_DISABLED)) + if (!irqd_irq_disabled(&desc->irq_data)) chip->irq_unmask(&desc->irq_data); raw_spin_unlock(&desc->lock); } diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c index 926dfda..45afeb0 100644 --- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c @@ -106,7 +106,7 @@ static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) static int pci_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_data(virq, h->host_data); set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); return 0; diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c index 79d85ac..ecb0495 100644 --- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c @@ -245,7 +245,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { /* All interrupts are LEVEL sensitive */ - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, handle_fasteoi_irq); diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c index 0adfe3b..9a85ac1 100644 --- a/arch/powerpc/platforms/86xx/gef_pic.c +++ b/arch/powerpc/platforms/86xx/gef_pic.c @@ -163,7 +163,7 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { /* All interrupts are LEVEL sensitive */ - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); return 0; diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c index 0b8f7d7..0280042 100644 --- a/arch/powerpc/platforms/cell/beat_interrupt.c +++ b/arch/powerpc/platforms/cell/beat_interrupt.c @@ -136,14 +136,13 @@ static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq) static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - struct irq_desc *desc = irq_to_desc(virq); int64_t err; err = beat_construct_and_connect_irq_plug(virq, hw); if (err < 0) return -EIO; - desc->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c index 0aca0e2..9d6c3ab 100644 --- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c +++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c @@ -102,7 +102,7 @@ static int flipper_pic_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { set_irq_chip_data(virq, h->host_data); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &flipper_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c index 35e448b..e6e6208 100644 --- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c @@ -95,7 +95,7 @@ static int hlwd_pic_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { set_irq_chip_data(virq, h->host_data); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &hlwd_pic, handle_level_irq); return 0; } @@ -145,7 +145,7 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq, raw_spin_lock(&desc->lock); chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */ - if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) + if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask) chip->irq_unmask(&desc->irq_data); raw_spin_unlock(&desc->lock); } diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index c55812b..22f45d7 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c @@ -289,7 +289,6 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node) static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - struct irq_desc *desc = irq_to_desc(virq); int level; if (hw >= max_irqs) @@ -300,7 +299,7 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, */ level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f))); if (level) - desc->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &pmac_pic, level ? handle_level_irq : handle_edge_irq); return 0; diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 01fea46..f4bf8a9 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c @@ -470,7 +470,7 @@ static int xics_host_map(struct irq_host *h, unsigned int virq, /* Insert the interrupt mapping into the radix tree for fast lookup */ irq_radix_revmap_insert(xics_host, virq, hw); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 0476bcc..6ee2af2 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -103,7 +103,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq, { pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 4730325..8ffe164 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -226,7 +226,7 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, { pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 58e09b2..71965c6 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -64,7 +64,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, struct fsl_msi *msi_data = h->host_data; struct irq_chip *chip = &fsl_msi_chip; - irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; + irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING); set_irq_chip_data(virq, msi_data); set_irq_chip_and_handler(virq, chip, handle_edge_irq); diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index aeda4c8..8012adc 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c @@ -175,12 +175,12 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq, /* We block the internal cascade */ if (hw == 2) - irq_to_desc(virq)->status |= IRQ_NOREQUEST; + irq_set_status_flags(virq, IRQ_NOREQUEST); /* We use the level handler only for now, we might want to * be more cautious here but that works for now */ - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c index bc61ebb..c43e9bc 100644 --- a/arch/powerpc/sysdev/mv64x60_pic.c +++ b/arch/powerpc/sysdev/mv64x60_pic.c @@ -213,7 +213,7 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq, { int level1; - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; BUG_ON(level1 > MV64x60_LEVEL1_GPP); diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 8c9ded8..6349a72 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -268,7 +268,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq, chip = &qe_ic->hc_irq; set_irq_chip_data(virq, qe_ic); - irq_to_desc(virq)->status |= IRQ_LEVEL; + irq_set_status_flags(virq, IRQ_LEVEL); set_irq_chip_and_handler(virq, chip, handle_level_irq); diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 02c91db..088413a 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c @@ -391,7 +391,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq, DBG("%s(%d, 0x%lx)\n", __func__, virq, hw); if ((virq >= 1) && (virq <= 4)){ irq = virq + IRQ_PCI_INTAD_BASE - 1; - irq_to_desc(irq)->status |= IRQ_LEVEL; + irq_set_status_flags(irq, IRQ_LEVEL); set_irq_chip(irq, &tsi108_pci_irq); } return 0; diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 835f795..a68469e 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -244,9 +244,9 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) uic_irq_ret: raw_spin_lock(&desc->lock); - if (desc->status & IRQ_LEVEL) + if (irqd_is_level_type(&desc->irq_data)) chip->irq_ack(&desc->irq_data); - if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) + if (!(irq_is_disabled(&desc->irq_data) && chip->irq_unmask) chip->irq_unmask(&desc->irq_data); raw_spin_unlock(&desc->lock); } -- cgit v0.10.2 From 212d786dabfee69c2ce5498821c2a0a679a1197b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 15:54:03 +0100 Subject: powerpc: media5200: Remove pointless set_irq_type() The irq chip has no irq_set_type() callback. So calling the call is pointless. Set IRQ_LEVEL via the proper accessor. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index 6cd041b..ef244f2 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c @@ -115,15 +115,10 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) static int media5200_irq_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - struct irq_desc *desc = irq_to_desc(virq); - pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); set_irq_chip_data(virq, &media5200_irq); set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq); - set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL; - + irq_set_status_flags(virq, IRQ_LEVEL); return 0; } -- cgit v0.10.2 From 8c99f561395f59ba9ec926c8940a4446fdfd8103 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:03:07 +0100 Subject: powerpc: mac: pic: Use irqd_is_level_type() No need for a redundant sparse irq lookup. irqdata provides the same information. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 22f45d7..4ce146f 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c @@ -157,7 +157,7 @@ static unsigned int pmac_startup_irq(struct irq_data *d) int i = src >> 5; raw_spin_lock_irqsave(&pmac_pic_lock, flags); - if ((irq_to_desc(d->irq)->status & IRQ_LEVEL) == 0) + if (!irqd_is_level_type(d)) out_le32(&pmac_irq_hw[i]->ack, bit); __set_bit(src, ppc_cached_irq_mask); __pmac_set_irq_mask(src, 0); -- cgit v0.10.2 From 00e70bad1abba1f96f7b9e6454b222f393e5281f Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:04:41 +0100 Subject: powerpc: cell: Fix the irq_desc access The core irq_set_type() function updates the flow type when the chip callback returns 0. It also updates irq_data, so this can be used in irq_ack() to check for the level bit. That avoids a redundant sparse irq lookup. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index b38cdfc..bc27de4 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c @@ -102,7 +102,7 @@ static void spider_ack_irq(struct irq_data *d) /* Reset edge detection logic if necessary */ - if (irq_to_desc(d->irq)->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) return; /* Only interrupts 47 to 50 can be set to edge */ @@ -119,7 +119,6 @@ static int spider_set_irq_type(struct irq_data *d, unsigned int type) struct spider_pic *pic = spider_virq_to_pic(d->irq); unsigned int hw = irq_map[d->irq].hwirq; void __iomem *cfg = spider_get_irq_config(pic, hw); - struct irq_desc *desc = irq_to_desc(d->irq); u32 old_mask; u32 ic; @@ -147,12 +146,6 @@ static int spider_set_irq_type(struct irq_data *d, unsigned int type) return -EINVAL; } - /* Update irq_desc */ - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= type & IRQ_TYPE_SENSE_MASK; - if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) - desc->status |= IRQ_LEVEL; - /* Configure the source. One gross hack that was there before and * that I've kept around is the priority to the BE which I set to * be the same as the interrupt source number. I don't know wether -- cgit v0.10.2 From a28ab38c440d0391d8a3673514e4cfb079445309 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:07:51 +0100 Subject: powerpc: cpm2_pic: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The new core code allows to update the type in irq_data and return IRQ_SET_MASK_OK_NOCOPY, so the core code will not touch it, except for setting the IRQ_LEVEL flag. Use the proper accessors for setting the irq handlers. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 8ffe164..bda0e5b 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -140,7 +140,6 @@ static void cpm2_end_irq(struct irq_data *d) static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) { unsigned int src = virq_to_hw(d->irq); - struct irq_desc *desc = irq_to_desc(d->irq); unsigned int vold, vnew, edibit; /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or @@ -162,13 +161,11 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) goto err_sense; } - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (flow_type & IRQ_TYPE_LEVEL_LOW) { - desc->status |= IRQ_LEVEL; - desc->handle_irq = handle_level_irq; - } else - desc->handle_irq = handle_edge_irq; + irqd_set_trigger_type(d, flow_type); + if (flow_type & IRQ_TYPE_LEVEL_LOW) + __set_irq_handler_unlocked(d->irq, handle_level_irq); + else + __set_irq_handler_unlocked(d->irq, handle_edge_irq); /* internal IRQ senses are LEVEL_LOW * EXT IRQ and Port C IRQ senses are programmable @@ -179,7 +176,8 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) edibit = (31 - (CPM2_IRQ_PORTC0 - src)); else - return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL; + return (flow_type & IRQ_TYPE_LEVEL_LOW) ? + IRQ_SET_MASK_OK_NOCOPY : -EINVAL; vold = in_be32(&cpm2_intctl->ic_siexr); @@ -190,7 +188,7 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) if (vold != vnew) out_be32(&cpm2_intctl->ic_siexr, vnew); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; err_sense: pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type); -- cgit v0.10.2 From 7bf811a8744d1eacff556bb7decc9c606b1537c2 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:13:38 +0100 Subject: powerpc: cpm2_pic: Use IRQCHIP_EOI_IF_HANDLED The core code provides the same functionality when the IRQCHIP_EOI_IF_HANDLED flag is set for the irq chip. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index bda0e5b..c5844e9 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -115,26 +115,20 @@ static void cpm2_ack(struct irq_data *d) static void cpm2_end_irq(struct irq_data *d) { - struct irq_desc *desc; int bit, word; unsigned int irq_nr = virq_to_hw(d->irq); - desc = irq_to_desc(irq_nr); - if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && desc->action) { - - bit = irq_to_siubit[irq_nr]; - word = irq_to_siureg[irq_nr]; + bit = irq_to_siubit[irq_nr]; + word = irq_to_siureg[irq_nr]; - ppc_cached_irq_mask[word] |= 1 << bit; - out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); + ppc_cached_irq_mask[word] |= 1 << bit; + out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); - /* - * Work around large numbers of spurious IRQs on PowerPC 82xx - * systems. - */ - mb(); - } + /* + * Work around large numbers of spurious IRQs on PowerPC 82xx + * systems. + */ + mb(); } static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) @@ -202,6 +196,7 @@ static struct irq_chip cpm2_pic = { .irq_ack = cpm2_ack, .irq_eoi = cpm2_end_irq, .irq_set_type = cpm2_set_irq_type, + .flags = IRQCHIP_EOI_IF_HANDLED, }; unsigned int cpm2_get_irq(void) -- cgit v0.10.2 From ecf4b1961583e2a56fc935061f56f782173d0749 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:16:30 +0100 Subject: powerpc: ipic: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The new core code allows to update the type in irq_data and return IRQ_SET_MASK_OK_NOCOPY, so the core code will not touch it, except for setting the IRQ_LEVEL flag. Use the proper accessors for setting the irq handlers. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 497047d..b094c40 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -605,7 +605,6 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) { struct ipic *ipic = ipic_from_irq(d->irq); unsigned int src = ipic_irq_to_hw(d->irq); - struct irq_desc *desc = irq_to_desc(d->irq); unsigned int vold, vnew, edibit; if (flow_type == IRQ_TYPE_NONE) @@ -623,17 +622,16 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) printk(KERN_ERR "ipic: edge sense not supported on internal " "interrupts\n"); return -EINVAL; + } - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; + irqd_set_trigger_type(d, flow_type); if (flow_type & IRQ_TYPE_LEVEL_LOW) { - desc->status |= IRQ_LEVEL; - desc->handle_irq = handle_level_irq; - desc->irq_data.chip = &ipic_level_irq_chip; + __irq_set_handler_locked(d->irq, handle_level_irq); + d->chip = &ipic_level_irq_chip; } else { - desc->handle_irq = handle_edge_irq; - desc->irq_data.chip = &ipic_edge_irq_chip; + __irq_set_handler_locked(d->irq, handle_edge_irq); + d->chip = &ipic_edge_irq_chip; } /* only EXT IRQ senses are programmable on ipic @@ -655,7 +653,7 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) } if (vold != vnew) ipic_write(ipic->regs, IPIC_SECNR, vnew); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; } /* level interrupts and edge interrupts have different ack operations */ -- cgit v0.10.2 From 5fed97a9fdc0bc76ea2e220cf3aac0e8c7cf4b2b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:18:32 +0100 Subject: powerpc: mpc8xx_pic: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The level flag is updated in the core as well. Use the proper accessors for setting the irq handlers. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 1a75a7f..7cd936c 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c @@ -72,13 +72,6 @@ static void mpc8xx_end_irq(struct irq_data *d) static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) { - struct irq_desc *desc = irq_to_desc(d->irq); - - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) - desc->status |= IRQ_LEVEL; - if (flow_type & IRQ_TYPE_EDGE_FALLING) { irq_hw_number_t hw = (unsigned int)irq_map[d->irq].hwirq; unsigned int siel = in_be32(&siu_reg->sc_siel); @@ -87,7 +80,7 @@ static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) if ((hw & 1) == 0) { siel |= (0x80000000 >> hw); out_be32(&siu_reg->sc_siel, siel); - desc->handle_irq = handle_edge_irq; + __set_irq_handler_unlocked(irq, handle_edge_irq); } } return 0; -- cgit v0.10.2 From 24a3f2e82bc8cf7ed05294008794f842cf170ea2 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:20:15 +0100 Subject: powerpc: mpic: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The new core code allows to update the type in irq_data and return IRQ_SET_MASK_OK_NOCOPY, so the core code will not touch it, except for setting the IRQ_LEVEL flag. Retrieve the IRQ_LEVEL information from irq_data which avoids a redundant sparse irq lookup as well. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 0f7c671..edf1f37 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -361,7 +361,7 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source) } static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, - unsigned int irqflags) + bool level) { struct mpic_irq_fixup *fixup = &mpic->fixups[source]; unsigned long flags; @@ -370,14 +370,14 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, if (fixup->base == NULL) return; - DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", - source, irqflags, fixup->index); + DBG("startup_ht_interrupt(0x%x) index: %d\n", + source, fixup->index); raw_spin_lock_irqsave(&mpic->fixup_lock, flags); /* Enable and configure */ writeb(0x10 + 2 * fixup->index, fixup->base + 2); tmp = readl(fixup->base + 4); tmp &= ~(0x23U); - if (irqflags & IRQ_LEVEL) + if (level) tmp |= 0x22; writel(tmp, fixup->base + 4); raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); @@ -389,8 +389,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, #endif } -static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, - unsigned int irqflags) +static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source) { struct mpic_irq_fixup *fixup = &mpic->fixups[source]; unsigned long flags; @@ -399,7 +398,7 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, if (fixup->base == NULL) return; - DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); + DBG("shutdown_ht_interrupt(0x%x)\n", source); /* Disable */ raw_spin_lock_irqsave(&mpic->fixup_lock, flags); @@ -738,7 +737,7 @@ static void mpic_unmask_ht_irq(struct irq_data *d) mpic_unmask_irq(d); - if (irq_to_desc(d->irq)->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) mpic_ht_end_irq(mpic, src); } @@ -748,7 +747,7 @@ static unsigned int mpic_startup_ht_irq(struct irq_data *d) unsigned int src = mpic_irq_to_hw(d->irq); mpic_unmask_irq(d); - mpic_startup_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status); + mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); return 0; } @@ -758,7 +757,7 @@ static void mpic_shutdown_ht_irq(struct irq_data *d) struct mpic *mpic = mpic_from_irq_data(d); unsigned int src = mpic_irq_to_hw(d->irq); - mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(d->irq)->status); + mpic_shutdown_ht_interrupt(mpic, src); mpic_mask_irq(d); } @@ -775,7 +774,7 @@ static void mpic_end_ht_irq(struct irq_data *d) * latched another edge interrupt coming in anyway */ - if (irq_to_desc(d->irq)->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) mpic_ht_end_irq(mpic, src); mpic_eoi(mpic); } @@ -864,7 +863,6 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) { struct mpic *mpic = mpic_from_irq_data(d); unsigned int src = mpic_irq_to_hw(d->irq); - struct irq_desc *desc = irq_to_desc(d->irq); unsigned int vecpri, vold, vnew; DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", @@ -879,10 +877,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) if (flow_type == IRQ_TYPE_NONE) flow_type = IRQ_TYPE_LEVEL_LOW; - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) - desc->status |= IRQ_LEVEL; + irqd_set_trigger_type(d, flow_type); if (mpic_is_ht_interrupt(mpic, src)) vecpri = MPIC_VECPRI_POLARITY_POSITIVE | @@ -897,7 +892,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) if (vold != vnew) mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew); - return 0; + return IRQ_SET_MASK_OK_NOCOPY;; } void mpic_set_vector(unsigned int virq, unsigned int vector) -- cgit v0.10.2 From 1ac06cdadf3f6e9c52cf87304238bffdf4c71566 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:23:57 +0100 Subject: powerpc: uic: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The core also updates IRQ_LEVEL. Use irq_data to get the level type information in the chip functions. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index a68469e..02dc40f 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -57,7 +57,6 @@ struct uic { static void uic_unmask_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); unsigned long flags; @@ -66,7 +65,7 @@ static void uic_unmask_irq(struct irq_data *d) sr = 1 << (31-src); spin_lock_irqsave(&uic->lock, flags); /* ack level-triggered interrupts here */ - if (desc->status & IRQ_LEVEL) + if (irqd_is_level_type(d)) mtdcr(uic->dcrbase + UIC_SR, sr); er = mfdcr(uic->dcrbase + UIC_ER); er |= sr; @@ -101,7 +100,6 @@ static void uic_ack_irq(struct irq_data *d) static void uic_mask_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(d->irq); struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); unsigned long flags; @@ -120,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d) * level interrupts are ack'ed after the actual * isr call in the uic_unmask_irq() */ - if (!(desc->status & IRQ_LEVEL)) + if (!irqd_is_level_type(d)) mtdcr(uic->dcrbase + UIC_SR, sr); spin_unlock_irqrestore(&uic->lock, flags); } @@ -129,7 +127,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) { struct uic *uic = irq_data_get_irq_chip_data(d); unsigned int src = uic_irq_to_hw(d->irq); - struct irq_desc *desc = irq_to_desc(d->irq); unsigned long flags; int trigger, polarity; u32 tr, pr, mask; @@ -166,11 +163,6 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) mtdcr(uic->dcrbase + UIC_PR, pr); mtdcr(uic->dcrbase + UIC_TR, tr); - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (!trigger) - desc->status |= IRQ_LEVEL; - spin_unlock_irqrestore(&uic->lock, flags); return 0; @@ -221,16 +213,17 @@ static struct irq_host_ops uic_host_ops = { void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) { struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_data *idata = irq_desc_get_irq_data(desc); struct uic *uic = get_irq_data(virq); u32 msr; int src; int subvirq; raw_spin_lock(&desc->lock); - if (desc->status & IRQ_LEVEL) - chip->irq_mask(&desc->irq_data); + if (irqd_is_level_type(idata)) + chip->irq_mask(idata); else - chip->irq_mask_ack(&desc->irq_data); + chip->irq_mask_ack(idata); raw_spin_unlock(&desc->lock); msr = mfdcr(uic->dcrbase + UIC_MSR); @@ -244,10 +237,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) uic_irq_ret: raw_spin_lock(&desc->lock); - if (irqd_is_level_type(&desc->irq_data)) - chip->irq_ack(&desc->irq_data); - if (!(irq_is_disabled(&desc->irq_data) && chip->irq_unmask) - chip->irq_unmask(&desc->irq_data); + if (irqd_is_level_type(idata)) + chip->irq_ack(idata); + if (!irqd_irq_disabled(idata) && chip->irq_unmask) + chip->irq_unmask(idata); raw_spin_unlock(&desc->lock); } -- cgit v0.10.2 From 773e20d5b7bf948ab0207e1ddb81e52ae7e7c6f3 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:26:01 +0100 Subject: powerpc: xilinx: Cleanup flow type handling The core irq_set_type() function updates the flow type when the chip callback returns 0. So setting the type is bogus. The core also updates the LEVEL flag. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index 7436f3e..c5bb444 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c @@ -79,12 +79,6 @@ static void xilinx_intc_mask(struct irq_data *d) static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type) { - struct irq_desc *desc = irq_to_desc(d->irq); - - desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); - desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; - if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) - desc->status |= IRQ_LEVEL; return 0; } -- cgit v0.10.2 From ddaedd1c4aa0762563ca0cfdb22bbd8ef3ef785a Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 16:46:02 +0200 Subject: powerpc-fsl-msi-use-irqd.patch Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 71965c6..11f7aac 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -183,7 +183,8 @@ out_free: static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct irq_data *idata = irq_desc_get_irq_data(desc); unsigned int cascade_irq; struct fsl_msi *msi_data; int msir_index = -1; @@ -198,14 +199,14 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) raw_spin_lock(&desc->lock); if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { if (chip->irq_mask_ack) - chip->irq_mask_ack(&desc->irq_data); + chip->irq_mask_ack(idata); else { - chip->irq_mask(&desc->irq_data); - chip->irq_ack(&desc->irq_data); + chip->irq_mask(idata); + chip->irq_ack(idata); } } - if (unlikely(desc->status & IRQ_INPROGRESS)) + if (unlikely(irqd_irq_inprogress(idata))) goto unlock; msir_index = cascade_data->index; @@ -213,7 +214,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) if (msir_index >= NR_MSI_REG) cascade_irq = NO_IRQ; - desc->status |= IRQ_INPROGRESS; + irqd_set_chained_irq_inprogress(idata); switch (msi_data->feature & FSL_PIC_IP_MASK) { case FSL_PIC_IP_MPIC: msir_value = fsl_msi_read(msi_data->msi_regs, @@ -235,15 +236,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) have_shift += intr_index + 1; msir_value = msir_value >> (intr_index + 1); } - desc->status &= ~IRQ_INPROGRESS; + irqd_clr_chained_irq_inprogress(idata); switch (msi_data->feature & FSL_PIC_IP_MASK) { case FSL_PIC_IP_MPIC: - chip->irq_eoi(&desc->irq_data); + chip->irq_eoi(idata); break; case FSL_PIC_IP_IPIC: - if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) - chip->irq_unmask(&desc->irq_data); + if (!irqd_irq_disabled(idata) && chip->irq_unmask) + chip->irq_unmask(idata); break; } unlock: -- cgit v0.10.2 From 7bfbc1f28311d680e45d7122ecd48dec57703750 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:36:35 +0100 Subject: powerpc: irq: Use irqdata based information We want to tighten the irq_desc access. So use the new accessors for the same information. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 8f7da44..58d4012 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -276,7 +276,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, " %-16s", chip->name); else seq_printf(p, " %-16s", "None"); - seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge"); + seq_printf(p, " %-8s", (irqd_is_level_type(&desc->irq_data) ? "Level" : "Edge"); if (action) { seq_printf(p, " %s", action->name); @@ -315,24 +315,26 @@ void fixup_irqs(const struct cpumask *map) alloc_cpumask_var(&mask, GFP_KERNEL); for_each_irq(irq) { + struct irq_data *data; struct irq_chip *chip; desc = irq_to_desc(irq); if (!desc) continue; - if (desc->status & IRQ_PER_CPU) + data = irq_desc_get_irq_data(desc); + if (irqd_is_per_cpu(data)) continue; - chip = get_irq_desc_chip(desc); + chip = irq_data_get_irq_chip(data); - cpumask_and(mask, desc->irq_data.affinity, map); + cpumask_and(mask, data->affinity, map); if (cpumask_any(mask) >= nr_cpu_ids) { printk("Breaking affinity for irq %i\n", irq); cpumask_copy(mask, map); } if (chip->irq_set_affinity) - chip->irq_set_affinity(&desc->irq_data, mask, true); + chip->irq_set_affinity(data, mask, true); else if (desc->action && !(warned++)) printk("Cannot set affinity for irq %i\n", irq); } @@ -827,7 +829,7 @@ unsigned int irq_create_of_mapping(struct device_node *controller, /* Set type if specified and different than the current one */ if (type != IRQ_TYPE_NONE && - type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK)) + type != (irqd_get_trigger_type(irq_get_irq_data(virq)))) set_irq_type(virq, type); return virq; } -- cgit v0.10.2 From ec775d0e70eb6b7116406b3441cb8501c2849dd2 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 16:45:20 +0100 Subject: powerpc: Convert to new irq_* function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 58d4012..a155dfd 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -830,7 +830,7 @@ unsigned int irq_create_of_mapping(struct device_node *controller, /* Set type if specified and different than the current one */ if (type != IRQ_TYPE_NONE && type != (irqd_get_trigger_type(irq_get_irq_data(virq)))) - set_irq_type(virq, type); + irq_set_irq_type(virq, type); return virq; } EXPORT_SYMBOL_GPL(irq_create_of_mapping); @@ -853,7 +853,7 @@ void irq_dispose_mapping(unsigned int virq) return; /* remove chip and handler */ - set_irq_chip_and_handler(virq, NULL, NULL); + irq_set_chip_and_handler(virq, NULL, NULL); /* Make sure it's completed */ synchronize_irq(virq); @@ -1158,7 +1158,7 @@ static int virq_debug_show(struct seq_file *m, void *private) seq_printf(m, "%5d ", i); seq_printf(m, "0x%05lx ", virq_to_hw(i)); - chip = get_irq_desc_chip(desc); + chip = irq_desc_get_chip(desc); if (chip && chip->name) p = chip->name; else diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index 2d65e9e..7ee50f0 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c @@ -31,7 +31,7 @@ void machine_kexec_mask_interrupts(void) { if (!desc) continue; - chip = get_irq_desc_chip(desc); + chip = irq_desc_get_chip(desc); if (!chip) continue; diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 3cd85fa..893af2a 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -261,7 +261,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev) virq = irq_create_mapping(NULL, line); if (virq != NO_IRQ) - set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); } else { pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n", oirq.size, oirq.specifier[0], oirq.specifier[1], diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c index 529897c..cfc4b20 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c @@ -133,7 +133,7 @@ cpld_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq); return 0; } @@ -198,7 +198,7 @@ mpc5121_ads_cpld_pic_init(void) goto end; } - set_irq_chained_handler(cascade_irq, cpld_pic_cascade); + irq_set_chained_handler(cascade_irq, cpld_pic_cascade); end: of_node_put(np); } diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index ef244f2..57a6a34 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c @@ -82,7 +82,7 @@ static struct irq_chip media5200_irq_chip = { void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int sub_virq, val; u32 status, enable; @@ -116,8 +116,8 @@ static int media5200_irq_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); - set_irq_chip_data(virq, &media5200_irq); - set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq); + irq_set_chip_data(virq, &media5200_irq); + irq_set_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq); irq_set_status_flags(virq, IRQ_LEVEL); return 0; } @@ -182,8 +182,8 @@ static void __init media5200_init_irq(void) media5200_irq.irqhost->host_data = &media5200_irq; - set_irq_data(cascade_virq, &media5200_irq); - set_irq_chained_handler(cascade_virq, media5200_irq_cascade); + irq_set_handler_data(cascade_virq, &media5200_irq); + irq_set_chained_handler(cascade_virq, media5200_irq_cascade); return; diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c index 6da44f0..6c39b9c 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c @@ -192,7 +192,7 @@ static struct irq_chip mpc52xx_gpt_irq_chip = { void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc) { - struct mpc52xx_gpt_priv *gpt = get_irq_data(virq); + struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq); int sub_virq; u32 status; @@ -209,8 +209,8 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq, struct mpc52xx_gpt_priv *gpt = h->host_data; dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq); - set_irq_chip_data(virq, gpt); - set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq); + irq_set_chip_data(virq, gpt); + irq_set_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq); return 0; } @@ -259,8 +259,8 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node) } gpt->irqhost->host_data = gpt; - set_irq_data(cascade_virq, gpt); - set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); + irq_set_handler_data(cascade_virq, gpt); + irq_set_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); /* If the GPT is currently disabled, then change it to be in Input * Capture mode. If the mode is non-zero, then the pin could be diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 9f3ed58..3ddea96 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c @@ -214,7 +214,7 @@ static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type) ctrl_reg |= (type << (22 - (l2irq * 2))); out_be32(&intr->ctrl, ctrl_reg); - __set_irq_handler_unlocked(d->irq, handler); + __irq_set_handler_locked(d->irq, handler); return 0; } @@ -414,7 +414,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, else hndlr = handle_level_irq; - set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr); + irq_set_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr); pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n", __func__, l2irq, virq, (int)irq, type); return 0; @@ -431,7 +431,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, return -EINVAL; } - set_irq_chip_and_handler(virq, irqchip, handle_level_irq); + irq_set_chip_and_handler(virq, irqchip, handle_level_irq); pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq); return 0; diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c index 45afeb0..4a4eb6f 100644 --- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c @@ -81,7 +81,7 @@ static struct irq_chip pq2ads_pci_ic = { static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) { - struct pq2ads_pci_pic *priv = get_irq_desc_data(desc); + struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc); u32 stat, mask, pend; int bit; @@ -107,16 +107,16 @@ static int pci_pic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_data(virq, h->host_data); - set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); + irq_set_chip_data(virq, h->host_data); + irq_set_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); return 0; } static void pci_host_unmap(struct irq_host *h, unsigned int virq) { /* remove chip and handler */ - set_irq_chip_data(virq, NULL); - set_irq_chip(virq, NULL); + irq_set_chip_data(virq, NULL); + irq_set_chip(virq, NULL); } static struct irq_host_ops pci_pic_host_ops = { @@ -175,8 +175,8 @@ int __init pq2ads_pci_init_irq(void) priv->host = host; host->host_data = priv; - set_irq_data(irq, priv); - set_irq_chained_handler(irq, pq2ads_pci_irq_demux); + irq_set_handler_data(irq, priv); + irq_set_chained_handler(irq, pq2ads_pci_irq_demux); of_node_put(np); return 0; diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c index 64447e4..c46f935 100644 --- a/arch/powerpc/platforms/85xx/ksi8560.c +++ b/arch/powerpc/platforms/85xx/ksi8560.c @@ -56,7 +56,7 @@ static void machine_restart(char *cmd) static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int cascade_irq; while ((cascade_irq = cpm2_get_irq()) >= 0) @@ -106,7 +106,7 @@ static void __init ksi8560_pic_init(void) cpm2_pic_init(np); of_node_put(np); - set_irq_chained_handler(irq, cpm2_cascade); + irq_set_chained_handler(irq, cpm2_cascade); #endif } diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 1352d11..3b2c9bb 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -50,7 +50,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose, static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int cascade_irq; while ((cascade_irq = cpm2_get_irq()) >= 0) @@ -101,7 +101,7 @@ static void __init mpc85xx_ads_pic_init(void) cpm2_pic_init(np); of_node_put(np); - set_irq_chained_handler(irq, cpm2_cascade); + irq_set_chained_handler(irq, cpm2_cascade); #endif } diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 458d91f..6299a2a 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -255,7 +255,7 @@ static int mpc85xx_cds_8259_attach(void) } /* Success. Connect our low-level cascade handler. */ - set_irq_handler(cascade_irq, mpc85xx_8259_cascade_handler); + irq_set_handler(cascade_irq, mpc85xx_8259_cascade_handler); return 0; } diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 793ead7..c7b97f7 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -47,7 +47,7 @@ #ifdef CONFIG_PPC_I8259 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) { @@ -122,7 +122,7 @@ void __init mpc85xx_ds_pic_init(void) i8259_init(cascade_node, 0); of_node_put(cascade_node); - set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade); + irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade); #endif /* CONFIG_PPC_I8259 */ } diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c index d7e28ec..d2dfd46 100644 --- a/arch/powerpc/platforms/85xx/sbc8560.c +++ b/arch/powerpc/platforms/85xx/sbc8560.c @@ -41,7 +41,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int cascade_irq; while ((cascade_irq = cpm2_get_irq()) >= 0) @@ -92,7 +92,7 @@ static void __init sbc8560_pic_init(void) cpm2_pic_init(np); of_node_put(np); - set_irq_chained_handler(irq, cpm2_cascade); + irq_set_chained_handler(irq, cpm2_cascade); #endif } diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c index ecb0495..db86462 100644 --- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c @@ -93,7 +93,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq) void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq; /* @@ -246,8 +246,8 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq, { /* All interrupts are LEVEL sensitive */ irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, - handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &socrates_fpga_pic_chip, + handle_fasteoi_irq); return 0; } @@ -308,8 +308,8 @@ void socrates_fpga_pic_init(struct device_node *pic) pr_warning("FPGA PIC: can't get irq%d.\n", i); continue; } - set_irq_chained_handler(socrates_fpga_irqs[i], - socrates_fpga_pic_cascade); + irq_set_chained_handler(socrates_fpga_irqs[i], + socrates_fpga_pic_cascade); } socrates_fpga_pic_iobase = of_iomap(pic, 0); diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index 2b62b06..5387e9f 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c @@ -46,7 +46,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int cascade_irq; while ((cascade_irq = cpm2_get_irq()) >= 0) @@ -102,7 +102,7 @@ static void __init stx_gp3_pic_init(void) cpm2_pic_init(np); of_node_put(np); - set_irq_chained_handler(irq, cpm2_cascade); + irq_set_chained_handler(irq, cpm2_cascade); #endif } diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 2265b68..325de77 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c @@ -44,7 +44,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int cascade_irq; while ((cascade_irq = cpm2_get_irq()) >= 0) @@ -100,7 +100,7 @@ static void __init tqm85xx_pic_init(void) cpm2_pic_init(np); of_node_put(np); - set_irq_chained_handler(irq, cpm2_cascade); + irq_set_chained_handler(irq, cpm2_cascade); #endif } diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c index 9a85ac1..0beec7d 100644 --- a/arch/powerpc/platforms/86xx/gef_pic.c +++ b/arch/powerpc/platforms/86xx/gef_pic.c @@ -95,7 +95,7 @@ static int gef_pic_cascade_irq; void gef_pic_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq; /* @@ -164,7 +164,7 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq, { /* All interrupts are LEVEL sensitive */ irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); + irq_set_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); return 0; } @@ -225,7 +225,7 @@ void __init gef_pic_init(struct device_node *np) return; /* Chain with parent controller */ - set_irq_chained_handler(gef_pic_cascade_irq, gef_pic_cascade); + irq_set_chained_handler(gef_pic_cascade_irq, gef_pic_cascade); } /* diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c index cbe3363..8ef8960 100644 --- a/arch/powerpc/platforms/86xx/pic.c +++ b/arch/powerpc/platforms/86xx/pic.c @@ -19,7 +19,7 @@ #ifdef CONFIG_PPC_I8259 static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) @@ -77,6 +77,6 @@ void __init mpc86xx_init_irq(void) i8259_init(cascade_node, 0); of_node_put(cascade_node); - set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); + irq_set_chained_handler(cascade_irq, mpc86xx_8259_cascade); #endif } diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c index fabb108..9ecce99 100644 --- a/arch/powerpc/platforms/8xx/m8xx_setup.c +++ b/arch/powerpc/platforms/8xx/m8xx_setup.c @@ -226,11 +226,11 @@ static void cpm_cascade(unsigned int irq, struct irq_desc *desc) generic_handle_irq(cascade_irq); - chip = get_irq_desc_chip(cdesc); + chip = irq_desc_get_chip(cdesc); chip->irq_eoi(&cdesc->irq_data); } - chip = get_irq_desc_chip(desc); + chip = irq_desc_get_chip(desc); chip->irq_eoi(&desc->irq_data); } @@ -251,5 +251,5 @@ void __init mpc8xx_pics_init(void) irq = cpm_pic_init(); if (irq != NO_IRQ) - set_irq_chained_handler(irq, cpm_cascade); + irq_set_chained_handler(irq, cpm_cascade); } diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index c48b66a..bb5ebf8 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c @@ -93,8 +93,8 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); - struct axon_msic *msic = get_irq_data(irq); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct axon_msic *msic = irq_get_handler_data(irq); u32 write_offset, msi; int idx; int retry = 0; @@ -287,7 +287,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) } dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq); - set_irq_msi(virq, entry); + irq_set_msi_desc(virq, entry); msg.data = virq; write_msi_msg(virq, &msg); } @@ -305,7 +305,7 @@ static void axon_msi_teardown_msi_irqs(struct pci_dev *dev) if (entry->irq == NO_IRQ) continue; - set_irq_msi(entry->irq, NULL); + irq_set_msi_desc(entry->irq, NULL); irq_dispose_mapping(entry->irq); } } @@ -320,7 +320,7 @@ static struct irq_chip msic_irq_chip = { static int msic_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - set_irq_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq); + irq_set_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq); return 0; } @@ -400,8 +400,8 @@ static int axon_msi_probe(struct platform_device *device) msic->irq_host->host_data = msic; - set_irq_data(virq, msic); - set_irq_chained_handler(virq, axon_msi_cascade); + irq_set_handler_data(virq, msic); + irq_set_chained_handler(virq, axon_msi_cascade); pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq); /* Enable the MSIC hardware */ diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c index 0280042..4cb9e14 100644 --- a/arch/powerpc/platforms/cell/beat_interrupt.c +++ b/arch/powerpc/platforms/cell/beat_interrupt.c @@ -143,7 +143,7 @@ static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, return -EIO; irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index ec9fc7d..a19bec0 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c @@ -101,9 +101,9 @@ static void iic_ioexc_eoi(struct irq_data *d) static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); struct cbe_iic_regs __iomem *node_iic = - (void __iomem *)get_irq_desc_data(desc); + (void __iomem *)irq_desc_get_handler_data(desc); unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC; unsigned long bits, ack; int cascade; @@ -240,14 +240,14 @@ static int iic_host_map(struct irq_host *h, unsigned int virq, { switch (hw & IIC_IRQ_TYPE_MASK) { case IIC_IRQ_TYPE_IPI: - set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq); + irq_set_chip_and_handler(virq, &iic_chip, handle_percpu_irq); break; case IIC_IRQ_TYPE_IOEXC: - set_irq_chip_and_handler(virq, &iic_ioexc_chip, + irq_set_chip_and_handler(virq, &iic_ioexc_chip, handle_iic_irq); break; default: - set_irq_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq); + irq_set_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq); } return 0; } @@ -364,8 +364,8 @@ static int __init setup_iic(void) * irq_data is a generic pointer that gets passed back * to us later, so the forced cast is fine. */ - set_irq_data(cascade, (void __force *)node_iic); - set_irq_chained_handler(cascade , iic_ioexc_cascade); + irq_set_handler_data(cascade, (void __force *)node_iic); + irq_set_chained_handler(cascade, iic_ioexc_cascade); out_be64(&node_iic->iic_ir, (1 << 12) /* priority */ | (node << 4) /* dest node */ | diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index 6a28d02..fd57bfe 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c @@ -187,8 +187,8 @@ machine_subsys_initcall(cell, cell_publish_devices); static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); - struct mpic *mpic = get_irq_desc_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct mpic *mpic = irq_desc_get_handler_data(desc); unsigned int virq; virq = mpic_get_one_irq(mpic); @@ -223,8 +223,8 @@ static void __init mpic_init_IRQ(void) printk(KERN_INFO "%s : hooking up to IRQ %d\n", dn->full_name, virq); - set_irq_data(virq, mpic); - set_irq_chained_handler(virq, cell_mpic_cascade); + irq_set_handler_data(virq, mpic); + irq_set_chained_handler(virq, cell_mpic_cascade); } } diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index bc27de4..c5cf50e 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c @@ -171,10 +171,10 @@ static struct irq_chip spider_pic = { static int spider_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &spider_pic, handle_level_irq); /* Set default irq type */ - set_irq_type(virq, IRQ_TYPE_NONE); + irq_set_irq_type(virq, IRQ_TYPE_NONE); return 0; } @@ -200,8 +200,8 @@ static struct irq_host_ops spider_host_ops = { static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); - struct spider_pic *pic = get_irq_desc_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct spider_pic *pic = irq_desc_get_handler_data(desc); unsigned int cs, virq; cs = in_be32(pic->regs + TIR_CS) >> 24; @@ -321,8 +321,8 @@ static void __init spider_init_one(struct device_node *of_node, int chip, virq = spider_find_cascade_and_node(pic); if (virq == NO_IRQ) return; - set_irq_data(virq, pic); - set_irq_chained_handler(virq, spider_irq_cascade); + irq_set_handler_data(virq, pic); + irq_set_chained_handler(virq, spider_irq_cascade); printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n", pic->node_id, addr, of_node->full_name); diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 4c12884..1227864 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c @@ -365,7 +365,7 @@ void __init chrp_setup_arch(void) static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) @@ -517,7 +517,7 @@ static void __init chrp_find_8259(void) if (cascade_irq == NO_IRQ) printk(KERN_ERR "i8259: failed to map cascade irq\n"); else - set_irq_chained_handler(cascade_irq, + irq_set_chained_handler(cascade_irq, chrp_8259_cascade); } } diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c index 9d6c3ab..12aa62b 100644 --- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c +++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c @@ -101,16 +101,16 @@ static struct irq_host *flipper_irq_host; static int flipper_pic_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { - set_irq_chip_data(virq, h->host_data); + irq_set_chip_data(virq, h->host_data); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &flipper_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq); return 0; } static void flipper_pic_unmap(struct irq_host *h, unsigned int irq) { - set_irq_chip_data(irq, NULL); - set_irq_chip(irq, NULL); + irq_set_chip_data(irq, NULL); + irq_set_chip(irq, NULL); } static int flipper_pic_match(struct irq_host *h, struct device_node *np) diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c index e6e6208..2bdddfc 100644 --- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c @@ -94,16 +94,16 @@ static struct irq_host *hlwd_irq_host; static int hlwd_pic_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hwirq) { - set_irq_chip_data(virq, h->host_data); + irq_set_chip_data(virq, h->host_data); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &hlwd_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &hlwd_pic, handle_level_irq); return 0; } static void hlwd_pic_unmap(struct irq_host *h, unsigned int irq) { - set_irq_chip_data(irq, NULL); - set_irq_chip(irq, NULL); + irq_set_chip_data(irq, NULL); + irq_set_chip(irq, NULL); } static struct irq_host_ops hlwd_irq_host_ops = { @@ -129,8 +129,8 @@ static unsigned int __hlwd_pic_get_irq(struct irq_host *h) static void hlwd_pic_irq_cascade(unsigned int cascade_virq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); - struct irq_host *irq_host = get_irq_data(cascade_virq); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct irq_host *irq_host = irq_get_handler_data(cascade_virq); unsigned int virq; raw_spin_lock(&desc->lock); @@ -218,8 +218,8 @@ void hlwd_pic_probe(void) host = hlwd_pic_init(np); BUG_ON(!host); cascade_virq = irq_of_parse_and_map(np, 0); - set_irq_data(cascade_virq, host); - set_irq_chained_handler(cascade_virq, + irq_set_handler_data(cascade_virq, host); + irq_set_chained_handler(cascade_virq, hlwd_pic_irq_cascade); hlwd_irq_host = host; break; diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c index b21fde5..487bda0 100644 --- a/arch/powerpc/platforms/embedded6xx/holly.c +++ b/arch/powerpc/platforms/embedded6xx/holly.c @@ -198,8 +198,8 @@ static void __init holly_init_IRQ(void) cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq); tsi108_pci_int_init(cascade_node); - set_irq_data(cascade_pci_irq, mpic); - set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); + irq_set_handler_data(cascade_pci_irq, mpic); + irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade); #endif /* Configure MPIC outputs to CPU0 */ tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index 7a2ba39..1cb907c 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c @@ -153,8 +153,8 @@ static void __init mpc7448_hpc2_init_IRQ(void) DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq); tsi108_pci_int_init(cascade_node); - set_irq_data(cascade_pci_irq, mpic); - set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); + irq_set_handler_data(cascade_pci_irq, mpic); + irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade); #endif /* Configure MPIC outputs to CPU0 */ tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 4fb96f0..52a6889 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c @@ -220,7 +220,7 @@ void __init iSeries_activate_IRQs() if (!desc) continue; - chip = get_irq_desc_chip(desc); + chip = irq_desc_get_chip(desc); if (chip && chip->irq_startup) { raw_spin_lock_irqsave(&desc->lock, flags); chip->irq_startup(&desc->irq_data); @@ -346,7 +346,7 @@ unsigned int iSeries_get_irq(void) static int iseries_irq_host_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw) { - set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index 04296ff..dd2e48b 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c @@ -498,7 +498,7 @@ void __devinit maple_pci_irq_fixup(struct pci_dev *dev) printk(KERN_DEBUG "Fixup U4 PCIe IRQ\n"); dev->irq = irq_create_mapping(NULL, 1); if (dev->irq != NO_IRQ) - set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); } /* Hide AMD8111 IDE interrupt when in legacy mode so diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index a6067b3..7c858e6 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c @@ -239,7 +239,7 @@ static __init void pas_init_IRQ(void) if (nmiprop) { nmi_virq = irq_create_mapping(NULL, *nmiprop); mpic_irq_set_priority(nmi_virq, 15); - set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING); mpic_unmask_irq(irq_get_irq_data(nmi_virq)); } diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 3bc075c..ab68989 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c @@ -988,7 +988,7 @@ void __devinit pmac_pci_irq_fixup(struct pci_dev *dev) dev->vendor == PCI_VENDOR_ID_DEC && dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) { dev->irq = irq_create_mapping(NULL, 60); - set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW); } #endif /* CONFIG_PPC32 */ } diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 4ce146f..023f240 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c @@ -300,8 +300,8 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f))); if (level) irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &pmac_pic, level ? - handle_level_irq : handle_edge_irq); + irq_set_chip_and_handler(virq, &pmac_pic, + level ? handle_level_irq : handle_edge_irq); return 0; } @@ -471,8 +471,8 @@ int of_irq_map_oldworld(struct device_node *device, int index, static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); - struct mpic *mpic = get_irq_desc_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + struct mpic *mpic = irq_desc_get_handler_data(desc); unsigned int cascade_irq = mpic_get_one_irq(mpic); if (cascade_irq != NO_IRQ) @@ -590,8 +590,8 @@ static int __init pmac_pic_probe_mpic(void) of_node_put(slave); return 0; } - set_irq_data(cascade, mpic2); - set_irq_chained_handler(cascade, pmac_u3_cascade); + irq_set_handler_data(cascade, mpic2); + irq_set_chained_handler(cascade, pmac_u3_cascade); of_node_put(slave); return 0; diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c index 3988c86..f2f6413 100644 --- a/arch/powerpc/platforms/ps3/interrupt.c +++ b/arch/powerpc/platforms/ps3/interrupt.c @@ -194,7 +194,7 @@ static int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet, pr_debug("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__, outlet, cpu, *virq); - result = set_irq_chip_data(*virq, pd); + result = irq_set_chip_data(*virq, pd); if (result) { pr_debug("%s:%d: set_irq_chip_data failed\n", @@ -221,12 +221,12 @@ fail_create: static int ps3_virq_destroy(unsigned int virq) { - const struct ps3_private *pd = get_irq_chip_data(virq); + const struct ps3_private *pd = irq_get_chip_data(virq); pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__, __LINE__, pd->ppe_id, pd->thread_id, virq); - set_irq_chip_data(virq, NULL); + irq_set_chip_data(virq, NULL); irq_dispose_mapping(virq); pr_debug("%s:%d <-\n", __func__, __LINE__); @@ -256,7 +256,7 @@ int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet, goto fail_setup; } - pd = get_irq_chip_data(*virq); + pd = irq_get_chip_data(*virq); /* Binds outlet to cpu + virq. */ @@ -291,7 +291,7 @@ EXPORT_SYMBOL_GPL(ps3_irq_plug_setup); int ps3_irq_plug_destroy(unsigned int virq) { int result; - const struct ps3_private *pd = get_irq_chip_data(virq); + const struct ps3_private *pd = irq_get_chip_data(virq); pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__, __LINE__, pd->ppe_id, pd->thread_id, virq); @@ -661,7 +661,7 @@ static void dump_bmp(struct ps3_private* pd) {}; static void ps3_host_unmap(struct irq_host *h, unsigned int virq) { - set_irq_chip_data(virq, NULL); + irq_set_chip_data(virq, NULL); } static int ps3_host_map(struct irq_host *h, unsigned int virq, @@ -670,7 +670,7 @@ static int ps3_host_map(struct irq_host *h, unsigned int virq, pr_debug("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq, virq); - set_irq_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c index 18ac801..38d24e7 100644 --- a/arch/powerpc/platforms/pseries/msi.c +++ b/arch/powerpc/platforms/pseries/msi.c @@ -137,7 +137,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev) if (entry->irq == NO_IRQ) continue; - set_irq_msi(entry->irq, NULL); + irq_set_msi_desc(entry->irq, NULL); irq_dispose_mapping(entry->irq); } @@ -437,7 +437,7 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) } dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq); - set_irq_msi(virq, entry); + irq_set_msi_desc(virq, entry); /* Read config space back so we can restore after reset */ read_msi_msg(virq, &msg); diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 2a0089a..c319d04 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -114,7 +114,7 @@ static void __init fwnmi_init(void) static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) @@ -169,7 +169,7 @@ static void __init pseries_setup_i8259_cascade(void) printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack); i8259_init(found, intack); of_node_put(found); - set_irq_chained_handler(cascade, pseries_8259_cascade); + irq_set_chained_handler(cascade, pseries_8259_cascade); } static void __init pseries_mpic_init_IRQ(void) diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index f4bf8a9..6c1e638 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c @@ -471,7 +471,7 @@ static int xics_host_map(struct irq_host *h, unsigned int virq, irq_radix_revmap_insert(xics_host, virq, hw); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); return 0; } @@ -600,7 +600,7 @@ static void xics_request_ipi(void) * IPIs are marked IRQF_DISABLED as they must run with irqs * disabled */ - set_irq_handler(ipi, handle_percpu_irq); + irq_set_handler(ipi, handle_percpu_irq); if (firmware_has_feature(FW_FEATURE_LPAR)) rc = request_irq(ipi, xics_ipi_action_lpar, IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL); @@ -912,7 +912,7 @@ void xics_migrate_irqs_away(void) if (desc == NULL || desc->action == NULL) continue; - chip = get_irq_desc_chip(desc); + chip = irq_desc_get_chip(desc); if (chip == NULL || chip->irq_set_affinity == NULL) continue; diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 6ee2af2..8b5aba2 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -104,7 +104,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq, pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); return 0; } diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index c5844e9..5495c1b 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -157,9 +157,9 @@ static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) irqd_set_trigger_type(d, flow_type); if (flow_type & IRQ_TYPE_LEVEL_LOW) - __set_irq_handler_unlocked(d->irq, handle_level_irq); + __irq_set_handler_locked(d->irq, handle_level_irq); else - __set_irq_handler_unlocked(d->irq, handle_edge_irq); + __irq_set_handler_locked(d->irq, handle_edge_irq); /* internal IRQ senses are LEVEL_LOW * EXT IRQ and Port C IRQ senses are programmable @@ -220,7 +220,7 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &cpm2_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 11f7aac..d5679dc 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -66,8 +66,8 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING); - set_irq_chip_data(virq, msi_data); - set_irq_chip_and_handler(virq, chip, handle_edge_irq); + irq_set_chip_data(virq, msi_data); + irq_set_chip_and_handler(virq, chip, handle_edge_irq); return 0; } @@ -110,8 +110,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev) list_for_each_entry(entry, &pdev->msi_list, list) { if (entry->irq == NO_IRQ) continue; - msi_data = get_irq_data(entry->irq); - set_irq_msi(entry->irq, NULL); + msi_data = irq_get_handler_data(entry->irq); + irq_set_msi_desc(entry->irq, NULL); msi_bitmap_free_hwirqs(&msi_data->bitmap, virq_to_hw(entry->irq), 1); irq_dispose_mapping(entry->irq); @@ -168,8 +168,8 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) rc = -ENOSPC; goto out_free; } - set_irq_data(virq, msi_data); - set_irq_msi(virq, entry); + irq_set_handler_data(virq, msi_data); + irq_set_msi_desc(virq, entry); fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data); write_msi_msg(virq, &msg); @@ -193,7 +193,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) u32 have_shift = 0; struct fsl_msi_cascade_data *cascade_data; - cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq); + cascade_data = (struct fsl_msi_cascade_data *)irq_get_handler_data(irq); msi_data = cascade_data->msi_data; raw_spin_lock(&desc->lock); @@ -262,7 +262,7 @@ static int fsl_of_msi_remove(struct platform_device *ofdev) for (i = 0; i < NR_MSI_REG; i++) { virq = msi->msi_virqs[i]; if (virq != NO_IRQ) { - cascade_data = get_irq_data(virq); + cascade_data = irq_get_handler_data(virq); kfree(cascade_data); irq_dispose_mapping(virq); } @@ -298,8 +298,8 @@ static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi, msi->msi_virqs[irq_index] = virt_msir; cascade_data->index = offset + irq_index; cascade_data->msi_data = msi; - set_irq_data(virt_msir, cascade_data); - set_irq_chained_handler(virt_msir, fsl_msi_cascade); + irq_set_handler_data(virt_msir, cascade_data); + irq_set_chained_handler(virt_msir, fsl_msi_cascade); return 0; } diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 8012adc..142770c 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c @@ -181,7 +181,7 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq, * be more cautious here but that works for now */ irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &i8259_pic, handle_level_irq); return 0; } @@ -191,7 +191,7 @@ static void i8259_host_unmap(struct irq_host *h, unsigned int virq) i8259_mask_irq(irq_get_irq_data(virq)); /* remove chip and handler */ - set_irq_chip_and_handler(virq, NULL, NULL); + irq_set_chip_and_handler(virq, NULL, NULL); /* Make sure it's completed */ synchronize_irq(virq); diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index b094c40..fa438be 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -685,11 +685,11 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq, { struct ipic *ipic = h->host_data; - set_irq_chip_data(virq, ipic); - set_irq_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq); + irq_set_chip_data(virq, ipic); + irq_set_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq); /* Set default irq type */ - set_irq_type(virq, IRQ_TYPE_NONE); + irq_set_irq_type(virq, IRQ_TYPE_NONE); return 0; } diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 7cd936c..f550e23 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c @@ -80,7 +80,7 @@ static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) if ((hw & 1) == 0) { siel |= (0x80000000 >> hw); out_be32(&siu_reg->sc_siel, siel); - __set_irq_handler_unlocked(irq, handle_edge_irq); + __irq_set_handler_locked(irq, handle_edge_irq); } } return 0; @@ -117,7 +117,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq, pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw); /* Set default irq handle */ - set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); + irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); return 0; } diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c index 232e701..0892a28 100644 --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c @@ -145,7 +145,7 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset) static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; unsigned int mask; @@ -278,9 +278,9 @@ static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq, if (mpc8xxx_gc->of_dev_id_data) mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data; - set_irq_chip_data(virq, h->host_data); - set_irq_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); - set_irq_type(virq, IRQ_TYPE_NONE); + irq_set_chip_data(virq, h->host_data); + irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); + irq_set_irq_type(virq, IRQ_TYPE_NONE); return 0; } @@ -369,8 +369,8 @@ static void __init mpc8xxx_add_controller(struct device_node *np) out_be32(mm_gc->regs + GPIO_IER, 0xffffffff); out_be32(mm_gc->regs + GPIO_IMR, 0); - set_irq_data(hwirq, mpc8xxx_gc); - set_irq_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade); + irq_set_handler_data(hwirq, mpc8xxx_gc); + irq_set_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade); skip_irq: return; diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index edf1f37..f91c065 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -615,7 +615,7 @@ static struct mpic *mpic_find(unsigned int irq) if (irq < NUM_ISA_INTERRUPTS) return NULL; - return get_irq_chip_data(irq); + return irq_get_chip_data(irq); } /* Determine if the linux irq is an IPI */ @@ -649,7 +649,7 @@ static inline struct mpic * mpic_from_ipi(struct irq_data *d) /* Get the mpic structure from the irq number */ static inline struct mpic * mpic_from_irq(unsigned int irq) { - return get_irq_chip_data(irq); + return irq_get_chip_data(irq); } /* Get the mpic structure from the irq data */ @@ -978,8 +978,8 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, WARN_ON(!(mpic->flags & MPIC_PRIMARY)); DBG("mpic: mapping as IPI\n"); - set_irq_chip_data(virq, mpic); - set_irq_chip_and_handler(virq, &mpic->hc_ipi, + irq_set_chip_data(virq, mpic); + irq_set_chip_and_handler(virq, &mpic->hc_ipi, handle_percpu_irq); return 0; } @@ -1001,11 +1001,11 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, DBG("mpic: mapping to irq chip @%p\n", chip); - set_irq_chip_data(virq, mpic); - set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq); + irq_set_chip_data(virq, mpic); + irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq); /* Set default irq type */ - set_irq_type(virq, IRQ_TYPE_NONE); + irq_set_irq_type(virq, IRQ_TYPE_NONE); /* If the MPIC was reset, then all vectors have already been * initialized. Otherwise, a per source lazy initialization diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 0b7794a..38e6238 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c @@ -81,7 +81,7 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev) if (entry->irq == NO_IRQ) continue; - set_irq_msi(entry->irq, NULL); + irq_set_msi_desc(entry->irq, NULL); msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, virq_to_hw(entry->irq), ALLOC_CHUNK); irq_dispose_mapping(entry->irq); @@ -131,9 +131,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) */ mpic_set_vector(virq, 0); - set_irq_msi(virq, entry); - set_irq_chip(virq, &mpic_pasemi_msi_chip); - set_irq_type(virq, IRQ_TYPE_EDGE_RISING); + irq_set_msi_desc(virq, entry); + irq_set_chip(virq, &mpic_pasemi_msi_chip); + irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING); pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \ "addr 0x%x\n", virq, hwirq, msg.address_lo); diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 71900ac..9a7aa0e 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c @@ -129,7 +129,7 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev) if (entry->irq == NO_IRQ) continue; - set_irq_msi(entry->irq, NULL); + irq_set_msi_desc(entry->irq, NULL); msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, virq_to_hw(entry->irq), 1); irq_dispose_mapping(entry->irq); @@ -166,9 +166,9 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) return -ENOSPC; } - set_irq_msi(virq, entry); - set_irq_chip(virq, &mpic_u3msi_chip); - set_irq_type(virq, IRQ_TYPE_EDGE_RISING); + irq_set_msi_desc(virq, entry); + irq_set_chip(virq, &mpic_u3msi_chip); + irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING); pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", virq, hwirq, (unsigned long)addr); diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c index c43e9bc..e9c633c 100644 --- a/arch/powerpc/sysdev/mv64x60_pic.c +++ b/arch/powerpc/sysdev/mv64x60_pic.c @@ -217,7 +217,8 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq, level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; BUG_ON(level1 > MV64x60_LEVEL1_GPP); - set_irq_chip_and_handler(virq, mv64x60_chips[level1], handle_level_irq); + irq_set_chip_and_handler(virq, mv64x60_chips[level1], + handle_level_irq); return 0; } diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 6349a72..832d692 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -189,7 +189,7 @@ static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg static inline struct qe_ic *qe_ic_from_irq(unsigned int virq) { - return get_irq_chip_data(virq); + return irq_get_chip_data(virq); } static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d) @@ -267,10 +267,10 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq, /* Default chip */ chip = &qe_ic->hc_irq; - set_irq_chip_data(virq, qe_ic); + irq_set_chip_data(virq, qe_ic); irq_set_status_flags(virq, IRQ_LEVEL); - set_irq_chip_and_handler(virq, chip, handle_level_irq); + irq_set_chip_and_handler(virq, chip, handle_level_irq); return 0; } @@ -386,13 +386,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, qe_ic_write(qe_ic->regs, QEIC_CICR, temp); - set_irq_data(qe_ic->virq_low, qe_ic); - set_irq_chained_handler(qe_ic->virq_low, low_handler); + irq_set_handler_data(qe_ic->virq_low, qe_ic); + irq_set_chained_handler(qe_ic->virq_low, low_handler); if (qe_ic->virq_high != NO_IRQ && qe_ic->virq_high != qe_ic->virq_low) { - set_irq_data(qe_ic->virq_high, qe_ic); - set_irq_chained_handler(qe_ic->virq_high, high_handler); + irq_set_handler_data(qe_ic->virq_high, qe_ic); + irq_set_chained_handler(qe_ic->virq_high, high_handler); } } diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 088413a..4d18658 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c @@ -392,7 +392,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq, if ((virq >= 1) && (virq <= 4)){ irq = virq + IRQ_PCI_INTAD_BASE - 1; irq_set_status_flags(irq, IRQ_LEVEL); - set_irq_chip(irq, &tsi108_pci_irq); + irq_set_chip(irq, &tsi108_pci_irq); } return 0; } @@ -431,7 +431,7 @@ void __init tsi108_pci_int_init(struct device_node *node) void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = get_pci_source(); if (cascade_irq != NO_IRQ) diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 02dc40f..5d91385 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -182,13 +182,13 @@ static int uic_host_map(struct irq_host *h, unsigned int virq, { struct uic *uic = h->host_data; - set_irq_chip_data(virq, uic); + irq_set_chip_data(virq, uic); /* Despite the name, handle_level_irq() works for both level * and edge irqs on UIC. FIXME: check this is correct */ - set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq); + irq_set_chip_and_handler(virq, &uic_irq_chip, handle_level_irq); /* Set default irq type */ - set_irq_type(virq, IRQ_TYPE_NONE); + irq_set_irq_type(virq, IRQ_TYPE_NONE); return 0; } @@ -212,9 +212,9 @@ static struct irq_host_ops uic_host_ops = { void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); struct irq_data *idata = irq_desc_get_irq_data(desc); - struct uic *uic = get_irq_data(virq); + struct uic *uic = irq_get_handler_data(virq); u32 msr; int src; int subvirq; @@ -329,8 +329,8 @@ void __init uic_init_tree(void) cascade_virq = irq_of_parse_and_map(np, 0); - set_irq_data(cascade_virq, uic); - set_irq_chained_handler(cascade_virq, uic_irq_cascade); + irq_set_handler_data(cascade_virq, uic); + irq_set_chained_handler(cascade_virq, uic_irq_cascade); /* FIXME: setup critical cascade?? */ } diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index c5bb444..0a13fc1 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c @@ -164,15 +164,15 @@ static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct, static int xilinx_intc_map(struct irq_host *h, unsigned int virq, irq_hw_number_t irq) { - set_irq_chip_data(virq, h->host_data); + irq_set_chip_data(virq, h->host_data); if (xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_HIGH || xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_LOW) { - set_irq_chip_and_handler(virq, &xilinx_intc_level_irqchip, - handle_level_irq); + irq_set_chip_and_handler(virq, &xilinx_intc_level_irqchip, + handle_level_irq); } else { - set_irq_chip_and_handler(virq, &xilinx_intc_edge_irqchip, - handle_edge_irq); + irq_set_chip_and_handler(virq, &xilinx_intc_edge_irqchip, + handle_edge_irq); } return 0; } @@ -223,7 +223,7 @@ int xilinx_intc_get_irq(void) */ static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc) { - struct irq_chip *chip = get_irq_desc_chip(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int cascade_irq = i8259_irq(); if (cascade_irq) @@ -250,7 +250,7 @@ static void __init xilinx_i8259_setup_cascade(void) } i8259_init(cascade_node, 0); - set_irq_chained_handler(cascade_irq, xilinx_i8259_cascade); + irq_set_chained_handler(cascade_irq, xilinx_i8259_cascade); /* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */ /* This looks like a dirty hack to me --gcl */ -- cgit v0.10.2 From 433c9c67c53cc42b2824532d3abb7ac62970d3fb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 17:04:59 +0100 Subject: powerpc: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3584e4d..d0e8a1d 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -139,6 +139,8 @@ config PPC select HAVE_SPARSE_IRQ select IRQ_PER_CPU select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW + select GENERIC_IRQ_SHOW_LEVEL config EARLY_PRINTK bool diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index a155dfd..63625e0 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -195,7 +195,7 @@ notrace void arch_local_irq_restore(unsigned long en) EXPORT_SYMBOL(arch_local_irq_restore); #endif /* CONFIG_PPC64 */ -static int show_other_interrupts(struct seq_file *p, int prec) +int arch_show_interrupts(struct seq_file *p, int prec) { int j; @@ -231,65 +231,6 @@ static int show_other_interrupts(struct seq_file *p, int prec) return 0; } -int show_interrupts(struct seq_file *p, void *v) -{ - unsigned long flags, any_count = 0; - int i = *(loff_t *) v, j, prec; - struct irqaction *action; - struct irq_desc *desc; - struct irq_chip *chip; - - if (i > nr_irqs) - return 0; - - for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) - j *= 10; - - if (i == nr_irqs) - return show_other_interrupts(p, prec); - - /* print header */ - if (i == 0) { - seq_printf(p, "%*s", prec + 8, ""); - for_each_online_cpu(j) - seq_printf(p, "CPU%-8d", j); - seq_putc(p, '\n'); - } - - desc = irq_to_desc(i); - if (!desc) - return 0; - - raw_spin_lock_irqsave(&desc->lock, flags); - for_each_online_cpu(j) - any_count |= kstat_irqs_cpu(i, j); - action = desc->action; - if (!action && !any_count) - goto out; - - seq_printf(p, "%*d: ", prec, i); - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); - - chip = get_irq_desc_chip(desc); - if (chip) - seq_printf(p, " %-16s", chip->name); - else - seq_printf(p, " %-16s", "None"); - seq_printf(p, " %-8s", (irqd_is_level_type(&desc->irq_data) ? "Level" : "Edge"); - - if (action) { - seq_printf(p, " %s", action->name); - while ((action = action->next) != NULL) - seq_printf(p, ", %s", action->name); - } - - seq_putc(p, '\n'); -out: - raw_spin_unlock_irqrestore(&desc->lock, flags); - return 0; -} - /* * /proc/stat helpers */ -- cgit v0.10.2 From a821b2793ea958038687c481c1ea7f74c8fcccfd Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 14:47:46 +0100 Subject: sh: Use the proper accessor functions Signed-off-by: Thomas Gleixner diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c index 9070d7e..3308816 100644 --- a/arch/sh/boards/mach-se/7206/irq.c +++ b/arch/sh/boards/mach-se/7206/irq.c @@ -92,9 +92,8 @@ static void eoi_se7206_irq(struct irq_data *data) { unsigned short sts0,sts1; unsigned int irq = data->irq; - struct irq_desc *desc = irq_to_desc(irq); - if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) + if (!irqd_irq_disabled(data) && !irqd_irq_inprogress(data)) enable_se7206_irq(data); /* FPGA isr clear */ sts0 = __raw_readw(INTSTS0); diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c index 5833afb..2578db5 100644 --- a/drivers/sh/intc/core.c +++ b/drivers/sh/intc/core.c @@ -387,19 +387,16 @@ static int intc_suspend(void) /* enable wakeup irqs belonging to this intc controller */ for_each_active_irq(irq) { struct irq_data *data; - struct irq_desc *desc; struct irq_chip *chip; data = irq_get_irq_data(irq); chip = irq_data_get_irq_chip(data); if (chip != &d->chip) continue; - desc = irq_to_desc(irq); - if ((desc->status & IRQ_WAKEUP)) + if (irqd_is_wakeup_set(data)) chip->irq_enable(data); } } - return 0; } @@ -412,7 +409,6 @@ static void intc_resume(void) for_each_active_irq(irq) { struct irq_data *data; - struct irq_desc *desc; struct irq_chip *chip; data = irq_get_irq_data(irq); @@ -423,8 +419,7 @@ static void intc_resume(void) */ if (chip != &d->chip) continue; - desc = irq_to_desc(irq); - if (desc->status & IRQ_DISABLED) + if (irqd_irq_disabled(data)) chip->irq_disable(data); else chip->irq_enable(data); -- cgit v0.10.2 From fcb8918fd242f39496090dbbd6789ab24098295b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 16:31:17 +0100 Subject: sh: Convert to new function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c index efba450..93f5039 100644 --- a/arch/sh/boards/board-magicpanelr2.c +++ b/arch/sh/boards/board-magicpanelr2.c @@ -388,12 +388,12 @@ static void __init init_mpr2_IRQ(void) { plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */ - set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ - set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ - set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ - set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ - set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ - set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ + irq_set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ + irq_set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ + irq_set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ + irq_set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ + irq_set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ + irq_set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ intc_set_priority(32, 13); /* IRQ0 CAN1 */ intc_set_priority(33, 13); /* IRQ0 CAN2 */ diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c index d7ac5af..311bceb 100644 --- a/arch/sh/boards/mach-cayman/irq.c +++ b/arch/sh/boards/mach-cayman/irq.c @@ -149,8 +149,8 @@ void init_cayman_irq(void) } for (i = 0; i < NR_EXT_IRQS; i++) { - set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type, - handle_level_irq); + irq_set_chip_and_handler(START_EXT_IRQS + i, + &cayman_irq_type, handle_level_irq); } /* Setup the SMSC interrupt */ diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c index 72e7ac9..78cf2ab 100644 --- a/arch/sh/boards/mach-dreamcast/irq.c +++ b/arch/sh/boards/mach-dreamcast/irq.c @@ -161,7 +161,6 @@ void systemasic_irq_init(void) return; } - set_irq_chip_and_handler(i, &systemasic_int, - handle_level_irq); + irq_set_chip_and_handler(i, &systemasic_int, handle_level_irq); } } diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index e44480c..3fbae0d 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -1102,7 +1102,7 @@ static int __init arch_setup(void) /* enable TouchScreen */ i2c_register_board_info(0, &ts_i2c_clients, 1); - set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); } /* enable CEU0 */ diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c index c35001f..4fb0036 100644 --- a/arch/sh/boards/mach-microdev/irq.c +++ b/arch/sh/boards/mach-microdev/irq.c @@ -117,7 +117,7 @@ static struct irq_chip microdev_irq_type = { static void __init make_microdev_irq(unsigned int irq) { disable_irq_nosync(irq); - set_irq_chip_and_handler(irq, µdev_irq_type, handle_level_irq); + irq_set_chip_and_handler(irq, µdev_irq_type, handle_level_irq); disable_microdev_irq(irq_get_irq_data(irq)); } diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c index 3308816..0db058e 100644 --- a/arch/sh/boards/mach-se/7206/irq.c +++ b/arch/sh/boards/mach-se/7206/irq.c @@ -125,7 +125,7 @@ static struct irq_chip se7206_irq_chip __read_mostly = { static void make_se7206_irq(unsigned int irq) { disable_irq_nosync(irq); - set_irq_chip_and_handler_name(irq, &se7206_irq_chip, + irq_set_chip_and_handler_name(irq, &se7206_irq_chip, handle_level_irq, "level"); disable_se7206_irq(irq_get_irq_data(irq)); } diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c index 76255a1..fd45ffc 100644 --- a/arch/sh/boards/mach-se/7343/irq.c +++ b/arch/sh/boards/mach-se/7343/irq.c @@ -67,19 +67,20 @@ void __init init_7343se_IRQ(void) return; se7343_fpga_irq[i] = irq; - set_irq_chip_and_handler_name(se7343_fpga_irq[i], + irq_set_chip_and_handler_name(se7343_fpga_irq[i], &se7343_irq_chip, - handle_level_irq, "level"); + handle_level_irq, + "level"); - set_irq_chip_data(se7343_fpga_irq[i], (void *)i); + irq_set_chip_data(se7343_fpga_irq[i], (void *)i); } - set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); - set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); - set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux); - set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux); - set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ0_IRQ, se7343_irq_demux); + irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ1_IRQ, se7343_irq_demux); + irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ4_IRQ, se7343_irq_demux); + irq_set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ5_IRQ, se7343_irq_demux); + irq_set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); } diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c index c013f95..aac92f2 100644 --- a/arch/sh/boards/mach-se/7722/irq.c +++ b/arch/sh/boards/mach-se/7722/irq.c @@ -67,16 +67,17 @@ void __init init_se7722_IRQ(void) return; se7722_fpga_irq[i] = irq; - set_irq_chip_and_handler_name(se7722_fpga_irq[i], + irq_set_chip_and_handler_name(se7722_fpga_irq[i], &se7722_irq_chip, - handle_level_irq, "level"); + handle_level_irq, + "level"); - set_irq_chip_data(se7722_fpga_irq[i], (void *)i); + irq_set_chip_data(se7722_fpga_irq[i], (void *)i); } - set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux); - set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ0_IRQ, se7722_irq_demux); + irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ1_IRQ, se7722_irq_demux); - set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ1_IRQ, se7722_irq_demux); + irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); } diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c index 5bd87c2..c6342ce 100644 --- a/arch/sh/boards/mach-se/7724/irq.c +++ b/arch/sh/boards/mach-se/7724/irq.c @@ -140,17 +140,16 @@ void __init init_se7724_IRQ(void) return; } - set_irq_chip_and_handler_name(irq, - &se7724_irq_chip, + irq_set_chip_and_handler_name(irq, &se7724_irq_chip, handle_level_irq, "level"); } - set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); - set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ0_IRQ, se7724_irq_demux); + irq_set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ1_IRQ, se7724_irq_demux); - set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ1_IRQ, se7724_irq_demux); + irq_set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); - set_irq_chained_handler(IRQ2_IRQ, se7724_irq_demux); - set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(IRQ2_IRQ, se7724_irq_demux); + irq_set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW); } diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c index 239e740..f33b2b5 100644 --- a/arch/sh/boards/mach-x3proto/gpio.c +++ b/arch/sh/boards/mach-x3proto/gpio.c @@ -102,8 +102,8 @@ int __init x3proto_gpio_setup(void) spin_lock_irqsave(&x3proto_gpio_lock, flags); x3proto_gpio_irq_map[i] = irq; - set_irq_chip_and_handler_name(irq, &dummy_irq_chip, - handle_simple_irq, "gpio"); + irq_set_chip_and_handler_name(irq, &dummy_irq_chip, + handle_simple_irq, "gpio"); spin_unlock_irqrestore(&x3proto_gpio_lock, flags); } @@ -113,8 +113,8 @@ int __init x3proto_gpio_setup(void) x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio, ilsel); - set_irq_chained_handler(ilsel, x3proto_gpio_irq_handler); - set_irq_wake(ilsel, 1); + irq_set_chained_handler(ilsel, x3proto_gpio_irq_handler); + irq_set_irq_wake(ilsel, 1); return 0; diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c index 177a10b..eb4ea4d 100644 --- a/arch/sh/cchips/hd6446x/hd64461.c +++ b/arch/sh/cchips/hd6446x/hd64461.c @@ -107,12 +107,12 @@ int __init setup_hd64461(void) return -EINVAL; } - set_irq_chip_and_handler(i, &hd64461_irq_chip, + irq_set_chip_and_handler(i, &hd64461_irq_chip, handle_level_irq); } - set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); - set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); + irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); + irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); #ifdef CONFIG_HD64461_ENABLER printk(KERN_INFO "HD64461: enabling PCMCIA devices\n"); diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c index 32c825c..39b6a24 100644 --- a/arch/sh/kernel/cpu/irq/imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c @@ -80,6 +80,6 @@ static struct irq_chip imask_irq_chip = { void make_imask_irq(unsigned int irq) { - set_irq_chip_and_handler_name(irq, &imask_irq_chip, - handle_level_irq, "level"); + irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq, + "level"); } diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c index 5af48f8..9e056a3 100644 --- a/arch/sh/kernel/cpu/irq/intc-sh5.c +++ b/arch/sh/kernel/cpu/irq/intc-sh5.c @@ -135,7 +135,7 @@ void __init plat_irq_setup(void) /* Set default: per-line enable/disable, priority driven ack/eoi */ for (i = 0; i < NR_INTC_IRQS; i++) - set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); + irq_set_chip_and_handler(i, &intc_irq_type, handle_level_irq); /* Disable all interrupts and set all priorities to 0 to avoid trouble */ diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index 7516c35..5de6dff 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c @@ -74,9 +74,9 @@ void register_ipr_controller(struct ipr_desc *desc) } disable_irq_nosync(p->irq); - set_irq_chip_and_handler_name(p->irq, &desc->chip, - handle_level_irq, "level"); - set_irq_chip_data(p->irq, p); + irq_set_chip_and_handler_name(p->irq, &desc->chip, + handle_level_irq, "level"); + irq_set_chip_data(p->irq, p); disable_ipr_irq(irq_get_irq_data(p->irq)); } } diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c index 2578db5..c6ca115 100644 --- a/drivers/sh/intc/core.c +++ b/drivers/sh/intc/core.c @@ -63,7 +63,7 @@ void intc_set_prio_level(unsigned int irq, unsigned int level) static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc) { - generic_handle_irq((unsigned int)get_irq_data(irq)); + generic_handle_irq((unsigned int)irq_get_handler_data(irq)); } static void __init intc_register_irq(struct intc_desc *desc, @@ -116,9 +116,9 @@ static void __init intc_register_irq(struct intc_desc *desc, irq_data = irq_get_irq_data(irq); disable_irq_nosync(irq); - set_irq_chip_and_handler_name(irq, &d->chip, - handle_level_irq, "level"); - set_irq_chip_data(irq, (void *)data[primary]); + irq_set_chip_and_handler_name(irq, &d->chip, handle_level_irq, + "level"); + irq_set_chip_data(irq, (void *)data[primary]); /* * set priority level @@ -340,9 +340,9 @@ int __init register_intc_controller(struct intc_desc *desc) vect2->enum_id = 0; /* redirect this interrupts to the first one */ - set_irq_chip(irq2, &dummy_irq_chip); - set_irq_chained_handler(irq2, intc_redirect_irq); - set_irq_data(irq2, (void *)irq); + irq_set_chip(irq2, &dummy_irq_chip); + irq_set_chained_handler(irq2, intc_redirect_irq); + irq_set_handler_data(irq2, (void *)irq); } } diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c index 4e0ff71..ce5f81d 100644 --- a/drivers/sh/intc/virq.c +++ b/drivers/sh/intc/virq.c @@ -110,7 +110,7 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) { struct irq_data *data = irq_get_irq_data(irq); struct irq_chip *chip = irq_data_get_irq_chip(data); - struct intc_virq_list *entry, *vlist = irq_data_get_irq_data(data); + struct intc_virq_list *entry, *vlist = irq_data_get_irq_handler_data(data); struct intc_desc_int *d = get_intc_desc(irq); chip->irq_mask_ack(data); @@ -118,7 +118,7 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) for_each_virq(entry, vlist) { unsigned long addr, handle; - handle = (unsigned long)get_irq_data(entry->irq); + handle = (unsigned long)irq_get_handler_data(entry->irq); addr = INTC_REG(d, _INTC_ADDR_E(handle), 0); if (intc_reg_fns[_INTC_FN(handle)](addr, handle, 0)) @@ -229,13 +229,13 @@ restart: intc_irq_xlate_set(irq, entry->enum_id, d); - set_irq_chip_and_handler_name(irq, get_irq_chip(entry->pirq), + irq_set_chip_and_handler_name(irq, irq_get_chip(entry->pirq), handle_simple_irq, "virq"); - set_irq_chip_data(irq, get_irq_chip_data(entry->pirq)); + irq_set_chip_data(irq, irq_get_chip_data(entry->pirq)); - set_irq_data(irq, (void *)entry->handle); + irq_set_handler_data(irq, (void *)entry->handle); - set_irq_chained_handler(entry->pirq, intc_virq_handler); + irq_set_chained_handler(entry->pirq, intc_virq_handler); add_virq_to_pirq(entry->pirq, irq); radix_tree_tag_clear(&d->tree, entry->enum_id, -- cgit v0.10.2 From fcd8d4f498698265fc0fba1dd376303caea71de4 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 09:03:45 +0100 Subject: sparc: Use the new genirq functionality Make use of the new features in genirq: 1) Set the chip flag IRCHIP_EOI_IF_HANDLED, which ensures in the core code that irq_eoi() is only called when the interrupt was handled. That removes the extra status check in the callback. 2) Use the preflow handler, which is called from the fasteoi core code before the device handler. That avoids another status check and the open coded handler redirection. Signed-off-by: Thomas Gleixner Cc: sparclinux@vger.kernel.org diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index f766e6b..9efd30f 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -52,6 +52,7 @@ config SPARC64 select PERF_USE_VMALLOC select HAVE_GENERIC_HARDIRQS select GENERIC_HARDIRQS_NO_DEPRECATED + select IRQ_PREFLOW_FASTEOI config ARCH_DEFCONFIG string diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index eb16e3b..3c8b266 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c @@ -344,10 +344,6 @@ static void sun4u_irq_disable(struct irq_data *data) static void sun4u_irq_eoi(struct irq_data *data) { struct irq_handler_data *handler_data = data->handler_data; - struct irq_desc *desc = irq_desc + data->irq; - - if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) - return; if (likely(handler_data)) upa_writeq(ICLR_IDLE, handler_data->iclr); @@ -402,12 +398,8 @@ static void sun4v_irq_disable(struct irq_data *data) static void sun4v_irq_eoi(struct irq_data *data) { unsigned int ino = irq_table[data->irq].dev_ino; - struct irq_desc *desc = irq_desc + data->irq; int err; - if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) - return; - err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE); if (err != HV_EOK) printk(KERN_ERR "sun4v_intr_setstate(%x): " @@ -481,13 +473,9 @@ static void sun4v_virq_disable(struct irq_data *data) static void sun4v_virq_eoi(struct irq_data *data) { - struct irq_desc *desc = irq_desc + data->irq; unsigned long dev_handle, dev_ino; int err; - if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) - return; - dev_handle = irq_table[data->irq].dev_handle; dev_ino = irq_table[data->irq].dev_ino; @@ -505,6 +493,7 @@ static struct irq_chip sun4u_irq = { .irq_disable = sun4u_irq_disable, .irq_eoi = sun4u_irq_eoi, .irq_set_affinity = sun4u_set_affinity, + .flags = IRQCHIP_EOI_IF_HANDLED, }; static struct irq_chip sun4v_irq = { @@ -513,6 +502,7 @@ static struct irq_chip sun4v_irq = { .irq_disable = sun4v_irq_disable, .irq_eoi = sun4v_irq_eoi, .irq_set_affinity = sun4v_set_affinity, + .flags = IRQCHIP_EOI_IF_HANDLED, }; static struct irq_chip sun4v_virq = { @@ -521,16 +511,15 @@ static struct irq_chip sun4v_virq = { .irq_disable = sun4v_virq_disable, .irq_eoi = sun4v_virq_eoi, .irq_set_affinity = sun4v_virt_set_affinity, + .flags = IRQCHIP_EOI_IF_HANDLED, }; -static void pre_flow_handler(unsigned int irq, struct irq_desc *desc) +static void pre_flow_handler(struct irq_data *d) { - struct irq_handler_data *handler_data = get_irq_data(irq); - unsigned int ino = irq_table[irq].dev_ino; + struct irq_handler_data *handler_data = irq_data_get_irq_handler_data(d); + unsigned int ino = irq_table[d->irq].dev_ino; handler_data->pre_handler(ino, handler_data->arg1, handler_data->arg2); - - handle_fasteoi_irq(irq, desc); } void irq_install_pre_handler(int irq, @@ -538,13 +527,12 @@ void irq_install_pre_handler(int irq, void *arg1, void *arg2) { struct irq_handler_data *handler_data = get_irq_data(irq); - struct irq_desc *desc = irq_desc + irq; handler_data->pre_handler = func; handler_data->arg1 = arg1; handler_data->arg2 = arg2; - desc->handle_irq = pre_flow_handler; + __irq_set_preflow_handler(irq, pre_flow_handler); } unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) @@ -734,7 +722,6 @@ void __irq_entry handler_irq(int pil, struct pt_regs *regs) orig_sp = set_hardirq_stack(); while (bucket_pa) { - struct irq_desc *desc; unsigned long next_pa; unsigned int irq; @@ -742,10 +729,7 @@ void __irq_entry handler_irq(int pil, struct pt_regs *regs) irq = bucket_get_irq(bucket_pa); bucket_clear_chain_pa(bucket_pa); - desc = irq_desc + irq; - - if (!(desc->status & IRQ_DISABLED)) - desc->handle_irq(irq, desc); + generic_handle_irq(irq); bucket_pa = next_pa; } -- cgit v0.10.2 From 16741ea0411ff8adb9b84934433638fa432c5292 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:57:12 +0100 Subject: sparc: Cleanup direct irq_desc access Use the proper wrapper functions. Signed-off-by: Thomas Gleixner Cc: sparclinux@vger.kernel.org diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index 3c8b266..0914438 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c @@ -627,7 +627,6 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) struct irq_handler_data *handler_data; unsigned long hv_err, cookie; struct ino_bucket *bucket; - struct irq_desc *desc; unsigned int irq; bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC); @@ -660,9 +659,7 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) * especially wrt. locking, we do not let request_irq() enable * the interrupt. */ - desc = irq_desc + irq; - desc->status |= IRQ_NOAUTOEN; - + irq_set_status_flags(irq, IRQ_NOAUTOEN); set_irq_data(irq, handler_data); /* Catch accidental accesses to these things. IMAP/ICLR handling @@ -772,19 +769,18 @@ void fixup_irqs(void) unsigned int irq; for (irq = 0; irq < NR_IRQS; irq++) { + struct irq_desc *desc = irq_to_desc(irq); + struct irq_data *data = irq_desc_get_irq_data(desc); unsigned long flags; - raw_spin_lock_irqsave(&irq_desc[irq].lock, flags); - if (irq_desc[irq].action && - !(irq_desc[irq].status & IRQ_PER_CPU)) { - struct irq_data *data = irq_get_irq_data(irq); - + raw_spin_lock_irqsave(&desc->lock, flags); + if (desc->action && !irqd_is_per_cpu(data)) { if (data->chip->irq_set_affinity) data->chip->irq_set_affinity(data, - data->affinity, - false); + data->affinity, + false); } - raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags); + raw_spin_unlock_irqrestore(&desc->lock, flags); } tick_ops->disable_irq(); @@ -1022,5 +1018,5 @@ void __init init_IRQ(void) : "i" (PSTATE_IE) : "g1"); - irq_desc[0].action = &timer_irq_action; + irq_to_desc(0)->action = &timer_irq_action; } diff --git a/arch/sparc/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c index 550e937..da4f4f4 100644 --- a/arch/sparc/kernel/pci_msi.c +++ b/arch/sparc/kernel/pci_msi.c @@ -30,13 +30,10 @@ static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie) err = ops->dequeue_msi(pbm, msiqid, &head, &msi); if (likely(err > 0)) { - struct irq_desc *desc; unsigned int irq; irq = pbm->msi_irq_table[msi - pbm->msi_first]; - desc = irq_desc + irq; - - desc->handle_irq(irq, desc); + generic_handle_irq(irq); } if (unlikely(err < 0)) -- cgit v0.10.2 From 394d441b91c146696ec2765a56be34855d375bd5 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:52:54 +0100 Subject: sparc: Convert to new irq function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner Cc: sparclinux@vger.kernel.org diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index 0914438..ba66821 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c @@ -526,7 +526,7 @@ void irq_install_pre_handler(int irq, void (*func)(unsigned int, void *, void *), void *arg1, void *arg2) { - struct irq_handler_data *handler_data = get_irq_data(irq); + struct irq_handler_data *handler_data = irq_get_handler_data(irq); handler_data->pre_handler = func; handler_data->arg1 = arg1; @@ -550,13 +550,11 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) if (!irq) { irq = irq_alloc(0, ino); bucket_set_irq(__pa(bucket), irq); - set_irq_chip_and_handler_name(irq, - &sun4u_irq, - handle_fasteoi_irq, - "IVEC"); + irq_set_chip_and_handler_name(irq, &sun4u_irq, + handle_fasteoi_irq, "IVEC"); } - handler_data = get_irq_data(irq); + handler_data = irq_get_handler_data(irq); if (unlikely(handler_data)) goto out; @@ -565,7 +563,7 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); prom_halt(); } - set_irq_data(irq, handler_data); + irq_set_handler_data(irq, handler_data); handler_data->imap = imap; handler_data->iclr = iclr; @@ -588,12 +586,11 @@ static unsigned int sun4v_build_common(unsigned long sysino, if (!irq) { irq = irq_alloc(0, sysino); bucket_set_irq(__pa(bucket), irq); - set_irq_chip_and_handler_name(irq, chip, - handle_fasteoi_irq, + irq_set_chip_and_handler_name(irq, chip, handle_fasteoi_irq, "IVEC"); } - handler_data = get_irq_data(irq); + handler_data = irq_get_handler_data(irq); if (unlikely(handler_data)) goto out; @@ -602,7 +599,7 @@ static unsigned int sun4v_build_common(unsigned long sysino, prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n"); prom_halt(); } - set_irq_data(irq, handler_data); + irq_set_handler_data(irq, handler_data); /* Catch accidental accesses to these things. IMAP/ICLR handling * is done by hypervisor calls on sun4v platforms, not by direct @@ -647,8 +644,7 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) irq = irq_alloc(devhandle, devino); bucket_set_irq(__pa(bucket), irq); - set_irq_chip_and_handler_name(irq, &sun4v_virq, - handle_fasteoi_irq, + irq_set_chip_and_handler_name(irq, &sun4v_virq, handle_fasteoi_irq, "IVEC"); handler_data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC); @@ -660,7 +656,7 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) * the interrupt. */ irq_set_status_flags(irq, IRQ_NOAUTOEN); - set_irq_data(irq, handler_data); + irq_set_handler_data(irq, handler_data); /* Catch accidental accesses to these things. IMAP/ICLR handling * is done by hypervisor calls on sun4v platforms, not by direct diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index 44f41e3..713dc91 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -1012,7 +1012,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) void arch_teardown_msi_irq(unsigned int irq) { - struct msi_desc *entry = get_irq_msi(irq); + struct msi_desc *entry = irq_get_msi_desc(irq); struct pci_dev *pdev = entry->dev; struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; diff --git a/arch/sparc/kernel/pci_msi.c b/arch/sparc/kernel/pci_msi.c index da4f4f4..30982e9 100644 --- a/arch/sparc/kernel/pci_msi.c +++ b/arch/sparc/kernel/pci_msi.c @@ -133,8 +133,8 @@ static int sparc64_setup_msi_irq(unsigned int *irq_p, if (!*irq_p) goto out_err; - set_irq_chip_and_handler_name(*irq_p, &msi_irq, - handle_simple_irq, "MSI"); + irq_set_chip_and_handler_name(*irq_p, &msi_irq, handle_simple_irq, + "MSI"); err = alloc_msi(pbm); if (unlikely(err < 0)) @@ -160,7 +160,7 @@ static int sparc64_setup_msi_irq(unsigned int *irq_p, } msg.data = msi; - set_irq_msi(*irq_p, entry); + irq_set_msi_desc(*irq_p, entry); write_msi_msg(*irq_p, &msg); return 0; @@ -169,7 +169,7 @@ out_msi_free: free_msi(pbm, msi); out_irq_free: - set_irq_chip(*irq_p, NULL); + irq_set_chip(*irq_p, NULL); irq_free(*irq_p); *irq_p = 0; @@ -208,7 +208,7 @@ static void sparc64_teardown_msi_irq(unsigned int irq, free_msi(pbm, msi_num); - set_irq_chip(irq, NULL); + irq_set_chip(irq, NULL); irq_free(irq); } -- cgit v0.10.2 From fa680c7c22ea8382847815c5fb91a30202a578a0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 18:03:13 +0100 Subject: sparc: Use generic show_interrupts() Signed-off-by: Thomas Gleixner Cc: sparclinux@vger.kernel.org diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 9efd30f..14b2346 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -52,6 +52,7 @@ config SPARC64 select PERF_USE_VMALLOC select HAVE_GENERIC_HARDIRQS select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW select IRQ_PREFLOW_FASTEOI config ARCH_DEFCONFIG diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c index ba66821..b1d275c 100644 --- a/arch/sparc/kernel/irq_64.c +++ b/arch/sparc/kernel/irq_64.c @@ -162,47 +162,14 @@ void irq_free(unsigned int irq) /* * /proc/interrupts printing: */ - -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - seq_printf(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%d ",j); - seq_putc(p, '\n'); - } + int j; - if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto skip; - seq_printf(p, "%3d: ",i); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(i)); -#else - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); -#endif - seq_printf(p, " %9s", irq_desc[i].irq_data.chip->name); - seq_printf(p, " %s", action->name); - - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { - seq_printf(p, "NMI: "); - for_each_online_cpu(j) - seq_printf(p, "%10u ", cpu_data(j).__nmi_count); - seq_printf(p, " Non-maskable interrupts\n"); - } + seq_printf(p, "NMI: "); + for_each_online_cpu(j) + seq_printf(p, "%10u ", cpu_data(j).__nmi_count); + seq_printf(p, " Non-maskable interrupts\n"); return 0; } -- cgit v0.10.2 From e1f5ce819c60a1020b43532333b0db291f2ce5c1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 18:26:16 +0100 Subject: unicore32: Convert to new irq function names Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c index b23624c..a6ee47f 100644 --- a/arch/unicore32/kernel/irq.c +++ b/arch/unicore32/kernel/irq.c @@ -321,24 +321,24 @@ void __init init_IRQ(void) writel(1, INTC_ICCR); for (irq = 0; irq < IRQ_GPIOHIGH; irq++) { - set_irq_chip(irq, &puv3_low_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &puv3_low_gpio_chip); + irq_set_handler(irq, handle_edge_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 0); } for (irq = IRQ_GPIOHIGH + 1; irq < IRQ_GPIO0; irq++) { - set_irq_chip(irq, &puv3_normal_chip); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &puv3_normal_chip); + irq_set_handler(irq, handle_level_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE); } for (irq = IRQ_GPIO0; irq <= IRQ_GPIO27; irq++) { - set_irq_chip(irq, &puv3_high_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &puv3_high_gpio_chip); + irq_set_handler(irq, handle_edge_irq); irq_modify_status(irq, IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 0); @@ -347,8 +347,8 @@ void __init init_IRQ(void) /* * Install handler for GPIO 0-27 edge detect interrupts */ - set_irq_chip(IRQ_GPIOHIGH, &puv3_normal_chip); - set_irq_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler); + irq_set_chip(IRQ_GPIOHIGH, &puv3_normal_chip); + irq_set_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler); #ifdef CONFIG_PUV3_GPIO puv3_init_gpio(); -- cgit v0.10.2 From 37daf3223e61685854798f755e4af9f073aaa26c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 18:26:42 +0100 Subject: unicore32: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig index 4a36db4..04e0249 100644 --- a/arch/unicore32/Kconfig +++ b/arch/unicore32/Kconfig @@ -11,6 +11,7 @@ config UNICORE32 select GENERIC_FIND_FIRST_BIT select GENERIC_IRQ_PROBE select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW select ARCH_WANT_FRAME_POINTERS help UniCore-32 is 32-bit Instruction Set Architecture, diff --git a/arch/unicore32/kernel/irq.c b/arch/unicore32/kernel/irq.c index a6ee47f..2aa30a3 100644 --- a/arch/unicore32/kernel/irq.c +++ b/arch/unicore32/kernel/irq.c @@ -355,48 +355,6 @@ void __init init_IRQ(void) #endif } -int show_interrupts(struct seq_file *p, void *v) -{ - int i = *(loff_t *) v, cpu; - struct irq_desc *desc; - struct irqaction *action; - unsigned long flags; - - if (i == 0) { - char cpuname[12]; - - seq_printf(p, " "); - for_each_present_cpu(cpu) { - sprintf(cpuname, "CPU%d", cpu); - seq_printf(p, " %10s", cpuname); - } - seq_putc(p, '\n'); - } - - if (i < nr_irqs) { - desc = irq_to_desc(i); - raw_spin_lock_irqsave(&desc->lock, flags); - action = desc->action; - if (!action) - goto unlock; - - seq_printf(p, "%3d: ", i); - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); - seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-"); - seq_printf(p, " %s", action->name); - for (action = action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -unlock: - raw_spin_unlock_irqrestore(&desc->lock, flags); - } else if (i == nr_irqs) { - seq_printf(p, "Error in interrupt!\n"); - } - return 0; -} - /* * do_IRQ handles all hardware IRQ's. Decoded IRQs should not * come via this function. Instead, they should provide their -- cgit v0.10.2 From c442b8068f7c53c40a73a82bbfd96d3f41f6778c Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 25 Mar 2011 10:58:06 +0100 Subject: xen: Cleanup genirq namespace Converted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 02b5a9c..0e7e394 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -122,7 +122,7 @@ static struct irq_chip xen_pirq_chip; /* Get info for IRQ */ static struct irq_info *info_for_irq(unsigned irq) { - return get_irq_data(irq); + return irq_get_handler_data(irq); } /* Constructors for packed IRQ information. */ @@ -403,7 +403,7 @@ static void xen_irq_init(unsigned irq) info->type = IRQT_UNBOUND; - set_irq_data(irq, info); + irq_set_handler_data(irq, info); list_add_tail(&info->list, &xen_irq_list_head); } @@ -458,11 +458,11 @@ static int __must_check xen_allocate_irq_gsi(unsigned gsi) static void xen_free_irq(unsigned irq) { - struct irq_info *info = get_irq_data(irq); + struct irq_info *info = irq_get_handler_data(irq); list_del(&info->list); - set_irq_data(irq, NULL); + irq_set_handler_data(irq, NULL); kfree(info); @@ -639,8 +639,8 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, if (irq < 0) goto out; - set_irq_chip_and_handler_name(irq, &xen_pirq_chip, - handle_level_irq, name); + irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_level_irq, + name); irq_op.irq = irq; irq_op.vector = 0; @@ -690,8 +690,8 @@ int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, if (irq == -1) goto out; - set_irq_chip_and_handler_name(irq, &xen_pirq_chip, - handle_level_irq, name); + irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_level_irq, + name); xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, 0); ret = irq_set_msi_desc(irq, msidesc); @@ -772,7 +772,7 @@ int bind_evtchn_to_irq(unsigned int evtchn) if (irq == -1) goto out; - set_irq_chip_and_handler_name(irq, &xen_dynamic_chip, + irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, handle_fasteoi_irq, "event"); xen_irq_info_evtchn_init(irq, evtchn); @@ -799,7 +799,7 @@ static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) if (irq < 0) goto out; - set_irq_chip_and_handler_name(irq, &xen_percpu_chip, + irq_set_chip_and_handler_name(irq, &xen_percpu_chip, handle_percpu_irq, "ipi"); bind_ipi.vcpu = cpu; @@ -848,7 +848,7 @@ int bind_virq_to_irq(unsigned int virq, unsigned int cpu) if (irq == -1) goto out; - set_irq_chip_and_handler_name(irq, &xen_percpu_chip, + irq_set_chip_and_handler_name(irq, &xen_percpu_chip, handle_percpu_irq, "virq"); bind_virq.virq = virq; -- cgit v0.10.2 From a3b975c49e3e21864268892760f630433d96e01a Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 21:31:25 +0100 Subject: xen: Use new irq_move functions These functions take irq_data as an argument and avoid a redundant lookup in the sparse irq case. Signed-off-by: Thomas Gleixner Cc: Ian Campbell Cc: Jeremy Fitzhardinge Cc: Konrad Rzeszutek Wilk diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 0e7e394..036343b 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -585,7 +585,7 @@ static void ack_pirq(struct irq_data *data) { int evtchn = evtchn_from_irq(data->irq); - move_native_irq(data->irq); + irq_move_irq(data); if (VALID_EVTCHN(evtchn)) { mask_evtchn(evtchn); @@ -1339,7 +1339,7 @@ static void ack_dynirq(struct irq_data *data) { int evtchn = evtchn_from_irq(data->irq); - move_masked_irq(data->irq); + irq_move_masked_irq(data); if (VALID_EVTCHN(evtchn)) unmask_evtchn(evtchn); -- cgit v0.10.2 From 0b98b1636cf2e112216a5661a629606cde7b1c07 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:31:17 +0200 Subject: m68k: Convert irq function namespace Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/m68k/kernel/irq.c b/arch/m68k/kernel/irq.c index c7dd48f..15dbc3e 100644 --- a/arch/m68k/kernel/irq.c +++ b/arch/m68k/kernel/irq.c @@ -44,7 +44,7 @@ int show_interrupts(struct seq_file *p, void *v) if (ap) { seq_printf(p, "%3d: ", irq); seq_printf(p, "%10u ", kstat_irqs(irq)); - seq_printf(p, "%14s ", get_irq_desc_chip(desc)->name); + seq_printf(p, "%14s ", irq_desc_get_chip(desc)->name); seq_printf(p, "%s", ap->name); for (ap = ap->next; ap; ap = ap->next) diff --git a/arch/m68k/platform/5249/intc2.c b/arch/m68k/platform/5249/intc2.c index 8f4b63e..f343bf7 100644 --- a/arch/m68k/platform/5249/intc2.c +++ b/arch/m68k/platform/5249/intc2.c @@ -51,8 +51,8 @@ static int __init mcf_intc2_init(void) /* GPIO interrupt sources */ for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { - set_irq_chip(irq, &intc2_irq_gpio_chip); - set_irq_handler(irq, handle_edge_irq); + irq_set_chip(irq, &intc2_irq_gpio_chip); + irq_set_handler(irq, handle_edge_irq); } return 0; diff --git a/arch/m68k/platform/5272/intc.c b/arch/m68k/platform/5272/intc.c index 969ff0a..43e6e96 100644 --- a/arch/m68k/platform/5272/intc.c +++ b/arch/m68k/platform/5272/intc.c @@ -145,7 +145,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) */ static void intc_external_irq(unsigned int irq, struct irq_desc *desc) { - get_irq_desc_chip(desc)->irq_ack(&desc->irq_data); + irq_desc_get_chip(desc)->irq_ack(&desc->irq_data); handle_simple_irq(irq, desc); } @@ -171,16 +171,16 @@ void __init init_IRQ(void) writel(0x88888888, MCF_MBAR + MCFSIM_ICR4); for (irq = 0; (irq < NR_IRQS); irq++) { - set_irq_chip(irq, &intc_irq_chip); + irq_set_chip(irq, &intc_irq_chip); edge = 0; if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) edge = intc_irqmap[irq - MCFINT_VECBASE].ack; if (edge) { - set_irq_type(irq, IRQ_TYPE_EDGE_RISING); - set_irq_handler(irq, intc_external_irq); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + irq_set_handler(irq, intc_external_irq); } else { - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); - set_irq_handler(irq, handle_level_irq); + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); + irq_set_handler(irq, handle_level_irq); } } } diff --git a/arch/m68k/platform/68328/ints.c b/arch/m68k/platform/68328/ints.c index e563183..a90288c 100644 --- a/arch/m68k/platform/68328/ints.c +++ b/arch/m68k/platform/68328/ints.c @@ -179,8 +179,8 @@ void __init init_IRQ(void) IMR = ~0; for (i = 0; (i < NR_IRQS); i++) { - set_irq_chip(i, &intc_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &intc_irq_chip); + irq_set_handler(i, handle_level_irq); } } diff --git a/arch/m68k/platform/68360/ints.c b/arch/m68k/platform/68360/ints.c index 8de3feb..4af0f4e 100644 --- a/arch/m68k/platform/68360/ints.c +++ b/arch/m68k/platform/68360/ints.c @@ -132,8 +132,8 @@ void init_IRQ(void) pquicc->intr_cimr = 0x00000000; for (i = 0; (i < NR_IRQS); i++) { - set_irq_chip(i, &intc_irq_chip); - set_irq_handler(i, handle_level_irq); + irq_set_chip(i, &intc_irq_chip); + irq_set_handler(i, handle_level_irq); } } diff --git a/arch/m68k/platform/coldfire/intc-2.c b/arch/m68k/platform/coldfire/intc-2.c index 2cbfbf0..74b55cf 100644 --- a/arch/m68k/platform/coldfire/intc-2.c +++ b/arch/m68k/platform/coldfire/intc-2.c @@ -164,7 +164,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) } if (tb) - set_irq_handler(irq, handle_edge_irq); + irq_set_handler(irq, handle_edge_irq); irq -= EINT0; pa = __raw_readw(MCFEPORT_EPPAR); @@ -204,11 +204,11 @@ void __init init_IRQ(void) for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) { if ((irq >= EINT1) && (irq <=EINT7)) - set_irq_chip(irq, &intc_irq_chip_edge_port); + irq_set_chip(irq, &intc_irq_chip_edge_port); else - set_irq_chip(irq, &intc_irq_chip); - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &intc_irq_chip); + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); + irq_set_handler(irq, handle_level_irq); } } diff --git a/arch/m68k/platform/coldfire/intc-simr.c b/arch/m68k/platform/coldfire/intc-simr.c index e642b24a..d6a4d9d 100644 --- a/arch/m68k/platform/coldfire/intc-simr.c +++ b/arch/m68k/platform/coldfire/intc-simr.c @@ -141,7 +141,7 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) } if (tb) - set_irq_handler(irq, handle_edge_irq); + irq_set_handler(irq, handle_edge_irq); ebit = irq2ebit(irq) * 2; pa = __raw_readw(MCFEPORT_EPPAR); @@ -181,11 +181,11 @@ void __init init_IRQ(void) eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0); for (irq = MCFINT_VECBASE; (irq < eirq); irq++) { if ((irq >= EINT1) && (irq <= EINT7)) - set_irq_chip(irq, &intc_irq_chip_edge_port); + irq_set_chip(irq, &intc_irq_chip_edge_port); else - set_irq_chip(irq, &intc_irq_chip); - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &intc_irq_chip); + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); + irq_set_handler(irq, handle_level_irq); } } diff --git a/arch/m68k/platform/coldfire/intc.c b/arch/m68k/platform/coldfire/intc.c index d648081..c28a6ed 100644 --- a/arch/m68k/platform/coldfire/intc.c +++ b/arch/m68k/platform/coldfire/intc.c @@ -143,9 +143,9 @@ void __init init_IRQ(void) mcf_maskimr(0xffffffff); for (irq = 0; (irq < NR_IRQS); irq++) { - set_irq_chip(irq, &intc_irq_chip); - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); - set_irq_handler(irq, handle_level_irq); + irq_set_chip(irq, &intc_irq_chip); + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); + irq_set_handler(irq, handle_level_irq); } } -- cgit v0.10.2 From db3b3602b90bcdc220b48f473010a4663310d95d Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:33 +0100 Subject: frv: Remove stale irq_chip.end irq_chip.end got obsolete with the removal of __do_IRQ(). irq-mb93093.c even lacks an implementation, but nobody noticed that it's broken since commit 88d6e1 in 2006. Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.011224503@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c index e452090..6451c2f 100644 --- a/arch/frv/kernel/irq-mb93093.c +++ b/arch/frv/kernel/irq-mb93093.c @@ -73,7 +73,6 @@ static struct irq_chip frv_fpga_pic = { .mask = frv_fpga_mask, .mask_ack = frv_fpga_mask_ack, .unmask = frv_fpga_unmask, - .end = frv_fpga_end, }; /* diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c index 6251366..d4ec2c6 100644 --- a/arch/frv/kernel/irq.c +++ b/arch/frv/kernel/irq.c @@ -118,18 +118,12 @@ static void frv_cpupic_unmask(unsigned int irqlevel) __clr_MASK(irqlevel); } -static void frv_cpupic_end(unsigned int irqlevel) -{ - __clr_MASK(irqlevel); -} - static struct irq_chip frv_cpu_pic = { .name = "cpu", .ack = frv_cpupic_ack, .mask = frv_cpupic_mask, .mask_ack = frv_cpupic_mask_ack, .unmask = frv_cpupic_unmask, - .end = frv_cpupic_end, }; /* -- cgit v0.10.2 From 0f421c9dc2c9760db5381a75ce81433e31472e0b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:34 +0100 Subject: frv: Fix typo from __do_IRQ overhaul Compiles way better. Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.109992056@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c index 6451c2f..cf5f5f8 100644 --- a/arch/frv/kernel/irq-mb93093.c +++ b/arch/frv/kernel/irq-mb93093.c @@ -93,7 +93,7 @@ static irqreturn_t fpga_interrupt(int irq, void *_mask) irq = 31 - irq; mask &= ~(1 << irq); - generic_irq_handle(IRQ_BASE_FPGA + irq); + generic_handle_irq(IRQ_BASE_FPGA + irq); } return IRQ_HANDLED; -- cgit v0.10.2 From ac3460554b8f8861c2857bb1a3692243e6327e79 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:35 +0100 Subject: frv: Convert mb93091 irq_chip to new functions Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.203431646@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c index 4dd9ada..7be23b4 100644 --- a/arch/frv/kernel/irq-mb93091.c +++ b/arch/frv/kernel/irq-mb93091.c @@ -36,45 +36,45 @@ /* * on-motherboard FPGA PIC operations */ -static void frv_fpga_mask(unsigned int irq) +static void frv_fpga_mask(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr |= 1 << (irq - IRQ_BASE_FPGA); + imr |= 1 << (d->irq - IRQ_BASE_FPGA); __set_IMR(imr); } -static void frv_fpga_ack(unsigned int irq) +static void frv_fpga_ack(struct irq_data *d) { __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); } -static void frv_fpga_mask_ack(unsigned int irq) +static void frv_fpga_mask_ack(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr |= 1 << (irq - IRQ_BASE_FPGA); + imr |= 1 << (d->irq - IRQ_BASE_FPGA); __set_IMR(imr); - __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); + __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); } -static void frv_fpga_unmask(unsigned int irq) +static void frv_fpga_unmask(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr &= ~(1 << (irq - IRQ_BASE_FPGA)); + imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); __set_IMR(imr); } static struct irq_chip frv_fpga_pic = { .name = "mb93091", - .ack = frv_fpga_ack, - .mask = frv_fpga_mask, - .mask_ack = frv_fpga_mask_ack, - .unmask = frv_fpga_unmask, + .irq_ack = frv_fpga_ack, + .irq_mask = frv_fpga_mask, + .irq_mask_ack = frv_fpga_mask_ack, + .irq_unmask = frv_fpga_unmask, }; /* -- cgit v0.10.2 From 9741f28688de348e74a43173e0229cbb569fb9b0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:36 +0100 Subject: frv: Convert mb93093 irq_chip to new function Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.300303769@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c index cf5f5f8..c7027fba 100644 --- a/arch/frv/kernel/irq-mb93093.c +++ b/arch/frv/kernel/irq-mb93093.c @@ -35,44 +35,44 @@ /* * off-CPU FPGA PIC operations */ -static void frv_fpga_mask(unsigned int irq) +static void frv_fpga_mask(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr |= 1 << (irq - IRQ_BASE_FPGA); + imr |= 1 << (d->irq - IRQ_BASE_FPGA); __set_IMR(imr); } -static void frv_fpga_ack(unsigned int irq) +static void frv_fpga_ack(struct irq_data *d) { - __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); + __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); } -static void frv_fpga_mask_ack(unsigned int irq) +static void frv_fpga_mask_ack(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr |= 1 << (irq - IRQ_BASE_FPGA); + imr |= 1 << (d->irq - IRQ_BASE_FPGA); __set_IMR(imr); - __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); + __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); } -static void frv_fpga_unmask(unsigned int irq) +static void frv_fpga_unmask(struct irq_data *d) { uint16_t imr = __get_IMR(); - imr &= ~(1 << (irq - IRQ_BASE_FPGA)); + imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); __set_IMR(imr); } static struct irq_chip frv_fpga_pic = { .name = "mb93093", - .ack = frv_fpga_ack, - .mask = frv_fpga_mask, - .mask_ack = frv_fpga_mask_ack, - .unmask = frv_fpga_unmask, + .irq_ack = frv_fpga_ack, + .irq_mask = frv_fpga_mask, + .irq_mask_ack = frv_fpga_mask_ack, + .irq_unmask = frv_fpga_unmask, }; /* -- cgit v0.10.2 From a55174f1ec5052d3eff5ba6cd25e3d58bdfb1713 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:37 +0100 Subject: frv: Convert mb93493 irq_chip to new functions Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.401266547@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c index ba55ecd..4800f24 100644 --- a/arch/frv/kernel/irq-mb93493.c +++ b/arch/frv/kernel/irq-mb93493.c @@ -45,46 +45,46 @@ * daughter board PIC operations * - there is no way to ACK interrupts in the MB93493 chip */ -static void frv_mb93493_mask(unsigned int irq) +static void frv_mb93493_mask(struct irq_data *d) { uint32_t iqsr; volatile void *piqsr; - if (IRQ_ROUTING & (1 << (irq - IRQ_BASE_MB93493))) + if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) piqsr = __addr_MB93493_IQSR(1); else piqsr = __addr_MB93493_IQSR(0); iqsr = readl(piqsr); - iqsr &= ~(1 << (irq - IRQ_BASE_MB93493 + 16)); + iqsr &= ~(1 << (d->irq - IRQ_BASE_MB93493 + 16)); writel(iqsr, piqsr); } -static void frv_mb93493_ack(unsigned int irq) +static void frv_mb93493_ack(struct irq_data *d) { } -static void frv_mb93493_unmask(unsigned int irq) +static void frv_mb93493_unmask(struct irq_data *d) { uint32_t iqsr; volatile void *piqsr; - if (IRQ_ROUTING & (1 << (irq - IRQ_BASE_MB93493))) + if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) piqsr = __addr_MB93493_IQSR(1); else piqsr = __addr_MB93493_IQSR(0); iqsr = readl(piqsr); - iqsr |= 1 << (irq - IRQ_BASE_MB93493 + 16); + iqsr |= 1 << (d->irq - IRQ_BASE_MB93493 + 16); writel(iqsr, piqsr); } static struct irq_chip frv_mb93493_pic = { .name = "mb93093", - .ack = frv_mb93493_ack, - .mask = frv_mb93493_mask, - .mask_ack = frv_mb93493_mask, - .unmask = frv_mb93493_unmask, + .irq_ack = frv_mb93493_ack, + .irq_mask = frv_mb93493_mask, + .irq_mask_ack = frv_mb93493_mask, + .irq_unmask = frv_mb93493_unmask, }; /* -- cgit v0.10.2 From 380e31119611b26ee593e4426115feae765be837 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:38 +0100 Subject: frv: Convert cpu irq_chip to new functions Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.501651128@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c index d4ec2c6..deaba56 100644 --- a/arch/frv/kernel/irq.c +++ b/arch/frv/kernel/irq.c @@ -95,35 +95,35 @@ int show_interrupts(struct seq_file *p, void *v) /* * on-CPU PIC operations */ -static void frv_cpupic_ack(unsigned int irqlevel) +static void frv_cpupic_ack(struct irq_data *d) { - __clr_RC(irqlevel); + __clr_RC(d->irq); __clr_IRL(); } -static void frv_cpupic_mask(unsigned int irqlevel) +static void frv_cpupic_mask(struct irq_data *d) { - __set_MASK(irqlevel); + __set_MASK(d->irq); } -static void frv_cpupic_mask_ack(unsigned int irqlevel) +static void frv_cpupic_mask_ack(struct irq_data *d) { - __set_MASK(irqlevel); - __clr_RC(irqlevel); + __set_MASK(d->irq); + __clr_RC(d->irq); __clr_IRL(); } -static void frv_cpupic_unmask(unsigned int irqlevel) +static void frv_cpupic_unmask(struct irq_data *d) { - __clr_MASK(irqlevel); + __clr_MASK(d->irq); } static struct irq_chip frv_cpu_pic = { .name = "cpu", - .ack = frv_cpupic_ack, - .mask = frv_cpupic_mask, - .mask_ack = frv_cpupic_mask_ack, - .unmask = frv_cpupic_unmask, + .irq_ack = frv_cpupic_ack, + .irq_mask = frv_cpupic_mask, + .irq_mask_ack = frv_cpupic_mask_ack, + .irq_unmask = frv_cpupic_unmask, }; /* -- cgit v0.10.2 From 808339b1dd76cc9c72bea16f40c335111b5451c1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Sun, 6 Feb 2011 20:20:39 +0100 Subject: frv: Select GENERIC_HARDIRQS_NO_DEPRECATED All chips converted Signed-off-by: Thomas Gleixner Cc: David Howells LKML-Reference: <20110206192106.601290592@linutronix.de> Signed-off-by: Thomas Gleixner diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index f6037b2..1872c42 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig @@ -6,6 +6,7 @@ config FRV select HAVE_IRQ_WORK select HAVE_PERF_EVENTS select HAVE_GENERIC_HARDIRQS + select GENERIC_HARDIRQS_NO_DEPRECATED config ZONE_DMA bool -- cgit v0.10.2 From de2e95a6630454d3657a3271152f4ef41b2a20eb Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 16:38:49 +0100 Subject: frv: Convert genirq namespace Convert to new function names. Converted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c index 7be23b4..372fe60 100644 --- a/arch/frv/kernel/irq-mb93091.c +++ b/arch/frv/kernel/irq-mb93091.c @@ -146,9 +146,9 @@ void __init fpga_init(void) __clr_IFR(0x0000); for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++) - set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq); + irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq); - set_irq_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq); + irq_set_chip_and_handler(IRQ_FPGA_NMI, &frv_fpga_pic, handle_edge_irq); /* the FPGA drives the first four external IRQ inputs on the CPU PIC */ setup_irq(IRQ_CPU_EXTERNAL0, &fpga_irq[0]); diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c index c7027fba..4d4ad09 100644 --- a/arch/frv/kernel/irq-mb93093.c +++ b/arch/frv/kernel/irq-mb93093.c @@ -124,7 +124,7 @@ void __init fpga_init(void) __clr_IFR(0x0000); for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++) - set_irq_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq); + irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq); /* the FPGA drives external IRQ input #2 on the CPU PIC */ setup_irq(IRQ_CPU_EXTERNAL2, &fpga_irq[0]); diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c index 4800f24..4d034c7 100644 --- a/arch/frv/kernel/irq-mb93493.c +++ b/arch/frv/kernel/irq-mb93493.c @@ -139,7 +139,8 @@ void __init mb93493_init(void) int irq; for (irq = IRQ_BASE_MB93493 + 0; irq <= IRQ_BASE_MB93493 + 10; irq++) - set_irq_chip_and_handler(irq, &frv_mb93493_pic, handle_edge_irq); + irq_set_chip_and_handler(irq, &frv_mb93493_pic, + handle_edge_irq); /* the MB93493 drives external IRQ inputs on the CPU PIC */ setup_irq(IRQ_CPU_MB93493_0, &mb93493_irq[0]); diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c index deaba56..3bbd2c6 100644 --- a/arch/frv/kernel/irq.c +++ b/arch/frv/kernel/irq.c @@ -155,10 +155,10 @@ void __init init_IRQ(void) int level; for (level = 1; level <= 14; level++) - set_irq_chip_and_handler(level, &frv_cpu_pic, + irq_set_chip_and_handler(level, &frv_cpu_pic, handle_level_irq); - set_irq_handler(IRQ_CPU_TIMER0, handle_edge_irq); + irq_set_handler(IRQ_CPU_TIMER0, handle_edge_irq); /* set the trigger levels for internal interrupt sources * - timers all falling-edge -- cgit v0.10.2 From a120017c501ec69d046f3f29a2a3550ef2697f1e Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 18:48:36 +0100 Subject: frv: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index 1872c42..e06e3c3 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig @@ -6,6 +6,7 @@ config FRV select HAVE_IRQ_WORK select HAVE_PERF_EVENTS select HAVE_GENERIC_HARDIRQS + select GENERIC_IRQ_SHOW select GENERIC_HARDIRQS_NO_DEPRECATED config ZONE_DMA diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c index 3bbd2c6..a5f624a 100644 --- a/arch/frv/kernel/irq.c +++ b/arch/frv/kernel/irq.c @@ -47,48 +47,10 @@ extern void __init mb93493_init(void); atomic_t irq_err_count; -/* - * Generic, controller-independent functions: - */ -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, cpu; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - char cpuname[12]; - - seq_printf(p, " "); - for_each_present_cpu(cpu) { - sprintf(cpuname, "CPU%d", cpu); - seq_printf(p, " %10s", cpuname); - } - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (action) { - seq_printf(p, "%3d: ", i); - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); - seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-"); - seq_printf(p, " %s", action->name); - for (action = action->next; - action; - action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); - } - - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { - seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count)); - } - + seq_printf(p, "%*s: ", prec, "ERR"); + seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); return 0; } -- cgit v0.10.2 From f4c547ebb4a3f11e0515433fa4472e34740c10c9 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:35:56 +0100 Subject: mn10300: Convert genirq namespace Convert to new function names. Converted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index 5f7fc3e..4755122 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -263,7 +263,7 @@ void set_intr_level(int irq, u16 level) */ void mn10300_set_lateack_irq_type(int irq) { - set_irq_chip_and_handler(irq, &mn10300_cpu_pic_level, + irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level, handle_level_irq); } @@ -275,12 +275,12 @@ void __init init_IRQ(void) int irq; for (irq = 0; irq < NR_IRQS; irq++) - if (get_irq_chip(irq) == &no_irq_chip) + if (irq_get_chip(irq) == &no_irq_chip) /* due to the PIC latching interrupt requests, even * when the IRQ is disabled, IRQ_PENDING is superfluous * and we can use handle_level_irq() for edge-triggered * interrupts */ - set_irq_chip_and_handler(irq, &mn10300_cpu_pic_edge, + irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge, handle_level_irq); unit_init_IRQ(); diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c index efca426..94901c5 100644 --- a/arch/mn10300/kernel/mn10300-serial.c +++ b/arch/mn10300/kernel/mn10300-serial.c @@ -933,7 +933,7 @@ static int mn10300_serial_startup(struct uart_port *_port) NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)); set_intr_level(port->tx_irq, NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL)); - set_irq_chip(port->tm_irq, &mn10300_serial_pic); + irq_set_chip(port->tm_irq, &mn10300_serial_pic); if (request_irq(port->rx_irq, mn10300_serial_interrupt, IRQF_DISABLED, port->rx_name, port) < 0) diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c index 51c02f9..226c826 100644 --- a/arch/mn10300/kernel/smp.c +++ b/arch/mn10300/kernel/smp.c @@ -156,15 +156,15 @@ static void init_ipi(void) u16 tmp16; /* set up the reschedule IPI */ - set_irq_chip_and_handler(RESCHEDULE_IPI, - &mn10300_ipi_type, handle_percpu_irq); + irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type, + handle_percpu_irq); setup_irq(RESCHEDULE_IPI, &reschedule_ipi); set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV); mn10300_ipi_enable(RESCHEDULE_IPI); /* set up the call function IPI */ - set_irq_chip_and_handler(CALL_FUNC_SINGLE_IPI, - &mn10300_ipi_type, handle_percpu_irq); + irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type, + handle_percpu_irq); setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi); set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV); mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI); @@ -172,8 +172,8 @@ static void init_ipi(void) /* set up the local timer IPI */ #if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \ defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) - set_irq_chip_and_handler(LOCAL_TIMER_IPI, - &mn10300_ipi_type, handle_percpu_irq); + irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type, + handle_percpu_irq); setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi); set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV); mn10300_ipi_enable(LOCAL_TIMER_IPI); diff --git a/arch/mn10300/unit-asb2364/irq-fpga.c b/arch/mn10300/unit-asb2364/irq-fpga.c index ee84e62..e16c216 100644 --- a/arch/mn10300/unit-asb2364/irq-fpga.c +++ b/arch/mn10300/unit-asb2364/irq-fpga.c @@ -100,7 +100,8 @@ void __init irq_fpga_init(void) SyncExBus(); for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++) - set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq); + irq_set_chip_and_handler(irq, &asb2364_fpga_pic, + handle_level_irq); /* the FPGA drives the XIRQ1 input on the CPU PIC */ setup_irq(XIRQ1, &fpga_irq[0]); -- cgit v0.10.2 From 232f1d8591dd1933a39fba5378763f5210dce138 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 17:36:37 +0100 Subject: mn10300: Cleanup irq_desc access The migration needs only access to irq_data. Signed-off-by: Thomas Gleixner diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index 4755122..8f9e272 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -403,23 +403,22 @@ int show_interrupts(struct seq_file *p, void *v) #ifdef CONFIG_HOTPLUG_CPU void migrate_irqs(void) { - irq_desc_t *desc; int irq; unsigned int self, new; unsigned long flags; self = smp_processor_id(); for (irq = 0; irq < NR_IRQS; irq++) { - desc = irq_desc + irq; + struct irq_data *data = irq_get_irq_data(irq); - if (desc->status == IRQ_PER_CPU) + if (irqd_is_per_cpu(data)) continue; - if (cpu_isset(self, irq_desc[irq].affinity) && + if (cpu_isset(self, data->affinity) && !cpus_intersects(irq_affinity[irq], cpu_online_map)) { int cpu_id; cpu_id = first_cpu(cpu_online_map); - cpu_set(cpu_id, irq_desc[irq].affinity); + cpu_set(cpu_id, data->affinity); } /* We need to operate irq_affinity_online atomically. */ arch_local_cli_save(flags); @@ -430,7 +429,7 @@ void migrate_irqs(void) GxICR(irq) = x & GxICR_LEVEL; tmp = GxICR(irq); - new = any_online_cpu(irq_desc[irq].affinity); + new = any_online_cpu(data->affinity); irq_affinity_online[irq] = new; CROSS_GxICR(irq, new) = -- cgit v0.10.2 From 2a8f55b1f577c205e71ddcb696564cbd05c50eb5 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 24 Mar 2011 18:54:24 +0100 Subject: mn10300: Use generic show_interrupts() Signed-off-by: Thomas Gleixner diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index d8ab97a..a523c94 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig @@ -3,6 +3,7 @@ config MN10300 select HAVE_OPROFILE select HAVE_GENERIC_HARDIRQS select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_KGDB diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index 8f9e272..86af0d7 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -335,68 +335,20 @@ asmlinkage void do_IRQ(void) /* * Display interrupt management information through /proc/interrupts */ -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, j, cpu; - struct irqaction *action; - unsigned long flags; - - switch (i) { - /* display column title bar naming CPUs */ - case 0: - seq_printf(p, " "); - for (j = 0; j < NR_CPUS; j++) - if (cpu_online(j)) - seq_printf(p, "CPU%d ", j); - seq_putc(p, '\n'); - break; - - /* display information rows, one per active CPU */ - case 1 ... NR_IRQS - 1: - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - - action = irq_desc[i].action; - if (action) { - seq_printf(p, "%3d: ", i); - for_each_present_cpu(cpu) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); - - if (i < NR_CPU_IRQS) - seq_printf(p, " %14s.%u", - irq_desc[i].irq_data.chip->name, - (GxICR(i) & GxICR_LEVEL) >> - GxICR_LEVEL_SHIFT); - else - seq_printf(p, " %14s", - irq_desc[i].irq_data.chip->name); - - seq_printf(p, " %s", action->name); - - for (action = action->next; - action; - action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); - } - - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - break; - - /* polish off with NMI and error counters */ - case NR_IRQS: #ifdef CONFIG_MN10300_WD_TIMER - seq_printf(p, "NMI: "); - for (j = 0; j < NR_CPUS; j++) - if (cpu_online(j)) - seq_printf(p, "%10u ", nmi_count(j)); - seq_putc(p, '\n'); -#endif + int j; - seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); - break; - } + seq_printf(p, "%*s: ", prec, "NMI"); + for (j = 0; j < NR_CPUS; j++) + if (cpu_online(j)) + seq_printf(p, "%10u ", nmi_count(j)); + seq_putc(p, '\n'); +#endif + seq_printf(p, "%*s: ", prec, "ERR"); + seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); return 0; } -- cgit v0.10.2 From dced35aeb0367dda2636ee9ee914bda14510dcc9 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 17:49:12 +0200 Subject: drivers: Final irq namespace conversion Scripted with coccinelle. Signed-off-by: Thomas Gleixner diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index 5253b27..f6b3f99 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -167,7 +167,7 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq) - set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); /* Setup expansion bus chip selects */ *data->cs0_cfg = data->cs0_bits; diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c index baeaf938..1b9d10d 100644 --- a/drivers/ata/pata_rb532_cf.c +++ b/drivers/ata/pata_rb532_cf.c @@ -60,10 +60,10 @@ static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance) struct rb532_cf_info *info = ah->private_data; if (gpio_get_value(info->gpio_line)) { - set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); ata_sff_interrupt(info->irq, dev_instance); } else { - set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); + irq_set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); } return IRQ_HANDLED; diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c index f141a1d..89aa9fb 100644 --- a/drivers/hwmon/gpio-fan.c +++ b/drivers/hwmon/gpio-fan.c @@ -116,7 +116,7 @@ static int fan_alarm_init(struct gpio_fan_data *fan_data, return 0; INIT_WORK(&fan_data->alarm_work, fan_alarm_notify); - set_irq_type(alarm_irq, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(alarm_irq, IRQ_TYPE_EDGE_BOTH); err = request_irq(alarm_irq, fan_alarm_irq_handler, IRQF_SHARED, "GPIO fan alarm", fan_data); if (err) diff --git a/drivers/input/keyboard/lm8323.c b/drivers/input/keyboard/lm8323.c index b732870..71f744a8 100644 --- a/drivers/input/keyboard/lm8323.c +++ b/drivers/input/keyboard/lm8323.c @@ -809,7 +809,7 @@ static int lm8323_suspend(struct device *dev) struct lm8323_chip *lm = i2c_get_clientdata(client); int i; - set_irq_wake(client->irq, 0); + irq_set_irq_wake(client->irq, 0); disable_irq(client->irq); mutex_lock(&lm->lock); @@ -838,7 +838,7 @@ static int lm8323_resume(struct device *dev) led_classdev_resume(&lm->pwm[i].cdev); enable_irq(client->irq); - set_irq_wake(client->irq, 1); + irq_set_irq_wake(client->irq, 1); return 0; } diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c index ebe9553..4b2a42f 100644 --- a/drivers/input/serio/ams_delta_serio.c +++ b/drivers/input/serio/ams_delta_serio.c @@ -149,7 +149,7 @@ static int __init ams_delta_serio_init(void) * at FIQ level, switch back from edge to simple interrupt handler * to avoid bad interaction. */ - set_irq_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), + irq_set_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), handle_simple_irq); serio_register_port(ams_delta_serio); diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c index b6b8b1c..3242e70 100644 --- a/drivers/input/touchscreen/mainstone-wm97xx.c +++ b/drivers/input/touchscreen/mainstone-wm97xx.c @@ -219,7 +219,7 @@ static int wm97xx_acc_startup(struct wm97xx *wm) } wm->pen_irq = gpio_to_irq(irq); - set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(wm->pen_irq, IRQ_TYPE_EDGE_BOTH); } else /* pen irq not supported */ pen_int = 0; diff --git a/drivers/input/touchscreen/zylonite-wm97xx.c b/drivers/input/touchscreen/zylonite-wm97xx.c index 0488498..5b0f15e 100644 --- a/drivers/input/touchscreen/zylonite-wm97xx.c +++ b/drivers/input/touchscreen/zylonite-wm97xx.c @@ -193,7 +193,7 @@ static int zylonite_wm97xx_probe(struct platform_device *pdev) gpio_touch_irq = mfp_to_gpio(MFP_PIN_GPIO26); wm->pen_irq = IRQ_GPIO(gpio_touch_irq); - set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(IRQ_GPIO(gpio_touch_irq), IRQ_TYPE_EDGE_BOTH); wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, WM97XX_GPIO_POL_HIGH, diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c index 28852df..20e4e93 100644 --- a/drivers/misc/sgi-gru/grufile.c +++ b/drivers/misc/sgi-gru/grufile.c @@ -373,7 +373,7 @@ static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name, if (gru_irq_count[chiplet] == 0) { gru_chip[chiplet].name = irq_name; - ret = set_irq_chip(irq, &gru_chip[chiplet]); + ret = irq_set_chip(irq, &gru_chip[chiplet]); if (ret) { printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n", GRU_DRIVER_ID_STR, -ret); diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index d70c54c..60a4c97 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c @@ -50,7 +50,7 @@ static irqreturn_t sdhci_gpio_irq(int irq, void *dev_id) /* val == 1 -> card removed, val == 0 -> card inserted */ /* if card removed - set irq for low level, else vice versa */ gpio_irq_type = val ? IRQF_TRIGGER_LOW : IRQF_TRIGGER_HIGH; - set_irq_type(irq, gpio_irq_type); + irq_set_irq_type(irq, gpio_irq_type); if (sdhci->data->card_power_gpio >= 0) { if (!sdhci->data->power_always_enb) { diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c index 3177081..b7af5ba 100644 --- a/drivers/net/dm9000.c +++ b/drivers/net/dm9000.c @@ -621,9 +621,9 @@ static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w) /* change in wol state, update IRQ state */ if (!dm->wake_state) - set_irq_wake(dm->irq_wake, 1); + irq_set_irq_wake(dm->irq_wake, 1); else if (dm->wake_state & !opts) - set_irq_wake(dm->irq_wake, 0); + irq_set_irq_wake(dm->irq_wake, 0); } dm->wake_state = opts; @@ -1424,13 +1424,13 @@ dm9000_probe(struct platform_device *pdev) } else { /* test to see if irq is really wakeup capable */ - ret = set_irq_wake(db->irq_wake, 1); + ret = irq_set_irq_wake(db->irq_wake, 1); if (ret) { dev_err(db->dev, "irq %d cannot set wakeup (%d)\n", db->irq_wake, ret); ret = 0; } else { - set_irq_wake(db->irq_wake, 0); + irq_set_irq_wake(db->irq_wake, 0); db->wake_supported = 1; } } diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c index 18d24b7..7ecc0bd 100644 --- a/drivers/net/wireless/p54/p54spi.c +++ b/drivers/net/wireless/p54/p54spi.c @@ -649,8 +649,7 @@ static int __devinit p54spi_probe(struct spi_device *spi) goto err_free_common; } - set_irq_type(gpio_to_irq(p54spi_gpio_irq), - IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(gpio_to_irq(p54spi_gpio_irq), IRQ_TYPE_EDGE_RISING); disable_irq(gpio_to_irq(p54spi_gpio_irq)); diff --git a/drivers/net/wireless/wl1251/sdio.c b/drivers/net/wireless/wl1251/sdio.c index d550b5e..f51a024 100644 --- a/drivers/net/wireless/wl1251/sdio.c +++ b/drivers/net/wireless/wl1251/sdio.c @@ -265,7 +265,7 @@ static int wl1251_sdio_probe(struct sdio_func *func, goto disable; } - set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); disable_irq(wl->irq); wl1251_sdio_ops.enable_irq = wl1251_enable_line_irq; diff --git a/drivers/net/wireless/wl1251/spi.c b/drivers/net/wireless/wl1251/spi.c index ac872b3..af6448c 100644 --- a/drivers/net/wireless/wl1251/spi.c +++ b/drivers/net/wireless/wl1251/spi.c @@ -286,7 +286,7 @@ static int __devinit wl1251_spi_probe(struct spi_device *spi) goto out_free; } - set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING); disable_irq(wl->irq); diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c index 09933eb..12e02bf 100644 --- a/drivers/pci/dmar.c +++ b/drivers/pci/dmar.c @@ -1226,7 +1226,7 @@ const char *dmar_get_fault_reason(u8 fault_reason, int *fault_type) void dmar_msi_unmask(struct irq_data *data) { - struct intel_iommu *iommu = irq_data_get_irq_data(data); + struct intel_iommu *iommu = irq_data_get_irq_handler_data(data); unsigned long flag; /* unmask it */ @@ -1240,7 +1240,7 @@ void dmar_msi_unmask(struct irq_data *data) void dmar_msi_mask(struct irq_data *data) { unsigned long flag; - struct intel_iommu *iommu = irq_data_get_irq_data(data); + struct intel_iommu *iommu = irq_data_get_irq_handler_data(data); /* mask it */ spin_lock_irqsave(&iommu->register_lock, flag); @@ -1252,7 +1252,7 @@ void dmar_msi_mask(struct irq_data *data) void dmar_msi_write(int irq, struct msi_msg *msg) { - struct intel_iommu *iommu = get_irq_data(irq); + struct intel_iommu *iommu = irq_get_handler_data(irq); unsigned long flag; spin_lock_irqsave(&iommu->register_lock, flag); @@ -1264,7 +1264,7 @@ void dmar_msi_write(int irq, struct msi_msg *msg) void dmar_msi_read(int irq, struct msi_msg *msg) { - struct intel_iommu *iommu = get_irq_data(irq); + struct intel_iommu *iommu = irq_get_handler_data(irq); unsigned long flag; spin_lock_irqsave(&iommu->register_lock, flag); @@ -1382,12 +1382,12 @@ int dmar_set_interrupt(struct intel_iommu *iommu) return -EINVAL; } - set_irq_data(irq, iommu); + irq_set_handler_data(irq, iommu); iommu->irq = irq; ret = arch_setup_dmar_msi(irq); if (ret) { - set_irq_data(irq, NULL); + irq_set_handler_data(irq, NULL); iommu->irq = 0; destroy_irq(irq); return ret; diff --git a/drivers/pci/htirq.c b/drivers/pci/htirq.c index 834842a..db057b6 100644 --- a/drivers/pci/htirq.c +++ b/drivers/pci/htirq.c @@ -34,7 +34,7 @@ struct ht_irq_cfg { void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) { - struct ht_irq_cfg *cfg = get_irq_data(irq); + struct ht_irq_cfg *cfg = irq_get_handler_data(irq); unsigned long flags; spin_lock_irqsave(&ht_irq_lock, flags); if (cfg->msg.address_lo != msg->address_lo) { @@ -53,13 +53,13 @@ void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) { - struct ht_irq_cfg *cfg = get_irq_data(irq); + struct ht_irq_cfg *cfg = irq_get_handler_data(irq); *msg = cfg->msg; } void mask_ht_irq(struct irq_data *data) { - struct ht_irq_cfg *cfg = irq_data_get_irq_data(data); + struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); struct ht_irq_msg msg = cfg->msg; msg.address_lo |= 1; @@ -68,7 +68,7 @@ void mask_ht_irq(struct irq_data *data) void unmask_ht_irq(struct irq_data *data) { - struct ht_irq_cfg *cfg = irq_data_get_irq_data(data); + struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data); struct ht_irq_msg msg = cfg->msg; msg.address_lo &= ~1; @@ -126,7 +126,7 @@ int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update) kfree(cfg); return -EBUSY; } - set_irq_data(irq, cfg); + irq_set_handler_data(irq, cfg); if (arch_setup_ht_irq(irq, dev) < 0) { ht_destroy_irq(irq); @@ -162,9 +162,9 @@ void ht_destroy_irq(unsigned int irq) { struct ht_irq_cfg *cfg; - cfg = get_irq_data(irq); - set_irq_chip(irq, NULL); - set_irq_data(irq, NULL); + cfg = irq_get_handler_data(irq); + irq_set_chip(irq, NULL); + irq_set_handler_data(irq, NULL); destroy_irq(irq); kfree(cfg); diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index a4115f1..7da3bef 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c @@ -1206,7 +1206,7 @@ void free_dmar_iommu(struct intel_iommu *iommu) iommu_disable_translation(iommu); if (iommu->irq) { - set_irq_data(iommu->irq, NULL); + irq_set_handler_data(iommu->irq, NULL); /* This will mask the irq */ free_irq(iommu->irq, iommu); destroy_irq(iommu->irq); diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c index ec87cd6..a22557b 100644 --- a/drivers/pci/intr_remapping.c +++ b/drivers/pci/intr_remapping.c @@ -50,7 +50,7 @@ static DEFINE_SPINLOCK(irq_2_ir_lock); static struct irq_2_iommu *irq_2_iommu(unsigned int irq) { - struct irq_cfg *cfg = get_irq_chip_data(irq); + struct irq_cfg *cfg = irq_get_chip_data(irq); return cfg ? &cfg->irq_2_iommu : NULL; } diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 44b0aee..2f10328 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -236,7 +236,7 @@ void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) void read_msi_msg(unsigned int irq, struct msi_msg *msg) { - struct msi_desc *entry = get_irq_msi(irq); + struct msi_desc *entry = irq_get_msi_desc(irq); __read_msi_msg(entry, msg); } @@ -253,7 +253,7 @@ void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { - struct msi_desc *entry = get_irq_msi(irq); + struct msi_desc *entry = irq_get_msi_desc(irq); __get_cached_msi_msg(entry, msg); } @@ -297,7 +297,7 @@ void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) void write_msi_msg(unsigned int irq, struct msi_msg *msg) { - struct msi_desc *entry = get_irq_msi(irq); + struct msi_desc *entry = irq_get_msi_desc(irq); __write_msi_msg(entry, msg); } @@ -354,7 +354,7 @@ static void __pci_restore_msi_state(struct pci_dev *dev) if (!dev->msi_enabled) return; - entry = get_irq_msi(dev->irq); + entry = irq_get_msi_desc(dev->irq); pos = entry->msi_attrib.pos; pci_intx_for_msi(dev, 0); @@ -519,7 +519,7 @@ static void msix_program_entries(struct pci_dev *dev, PCI_MSIX_ENTRY_VECTOR_CTRL; entries[i].vector = entry->irq; - set_irq_msi(entry->irq, entry); + irq_set_msi_desc(entry->irq, entry); entry->masked = readl(entry->mask_base + offset); msix_mask_irq(entry, 1); i++; diff --git a/drivers/pcmcia/bfin_cf_pcmcia.c b/drivers/pcmcia/bfin_cf_pcmcia.c index eae9cbe..4922139 100644 --- a/drivers/pcmcia/bfin_cf_pcmcia.c +++ b/drivers/pcmcia/bfin_cf_pcmcia.c @@ -235,7 +235,7 @@ static int __devinit bfin_cf_probe(struct platform_device *pdev) cf->irq = irq; cf->socket.pci_irq = irq; - set_irq_type(irq, IRQF_TRIGGER_LOW); + irq_set_irq_type(irq, IRQF_TRIGGER_LOW); io_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); attr_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); diff --git a/drivers/pcmcia/db1xxx_ss.c b/drivers/pcmcia/db1xxx_ss.c index 27575e63..01757f1 100644 --- a/drivers/pcmcia/db1xxx_ss.c +++ b/drivers/pcmcia/db1xxx_ss.c @@ -181,7 +181,7 @@ static int db1x_pcmcia_setup_irqs(struct db1x_pcmcia_sock *sock) /* all other (older) Db1x00 boards use a GPIO to show * card detection status: use both-edge triggers. */ - set_irq_type(sock->insert_irq, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(sock->insert_irq, IRQ_TYPE_EDGE_BOTH); ret = request_irq(sock->insert_irq, db1000_pcmcia_cdirq, 0, "pcmcia_carddetect", sock); diff --git a/drivers/pcmcia/sa1100_nanoengine.c b/drivers/pcmcia/sa1100_nanoengine.c index 3d2652e..93b9c9b 100644 --- a/drivers/pcmcia/sa1100_nanoengine.c +++ b/drivers/pcmcia/sa1100_nanoengine.c @@ -86,7 +86,7 @@ static int nanoengine_pcmcia_hw_init(struct soc_pcmcia_socket *skt) GPDR &= ~nano_skts[i].input_pins; GPDR |= nano_skts[i].output_pins; GPCR = nano_skts[i].clear_outputs; - set_irq_type(nano_skts[i].transition_pins, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(nano_skts[i].transition_pins, IRQ_TYPE_EDGE_BOTH); skt->socket.pci_irq = nano_skts[i].pci_irq; return soc_pcmcia_request_irqs(skt, diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c index 5a9a392..768f957 100644 --- a/drivers/pcmcia/soc_common.c +++ b/drivers/pcmcia/soc_common.c @@ -155,11 +155,11 @@ static int soc_common_pcmcia_config_skt( */ if (skt->irq_state != 1 && state->io_irq) { skt->irq_state = 1; - set_irq_type(skt->socket.pci_irq, - IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(skt->socket.pci_irq, + IRQ_TYPE_EDGE_FALLING); } else if (skt->irq_state == 1 && state->io_irq == 0) { skt->irq_state = 0; - set_irq_type(skt->socket.pci_irq, IRQ_TYPE_NONE); + irq_set_irq_type(skt->socket.pci_irq, IRQ_TYPE_NONE); } skt->cs_state = *state; @@ -537,7 +537,7 @@ int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, IRQF_DISABLED, irqs[i].str, skt); if (res) break; - set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); } if (res) { @@ -570,7 +570,7 @@ void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, for (i = 0; i < nr; i++) if (irqs[i].sock == skt->nr) - set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_NONE); } EXPORT_SYMBOL(soc_pcmcia_disable_irqs); @@ -581,8 +581,8 @@ void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, for (i = 0; i < nr; i++) if (irqs[i].sock == skt->nr) { - set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING); - set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(irqs[i].irq, IRQ_TYPE_EDGE_BOTH); } } EXPORT_SYMBOL(soc_pcmcia_enable_irqs); diff --git a/drivers/pcmcia/xxs1500_ss.c b/drivers/pcmcia/xxs1500_ss.c index 3b67a1b..379f421 100644 --- a/drivers/pcmcia/xxs1500_ss.c +++ b/drivers/pcmcia/xxs1500_ss.c @@ -274,7 +274,7 @@ static int __devinit xxs1500_pcmcia_probe(struct platform_device *pdev) * edge detector. */ irq = gpio_to_irq(GPIO_CDA); - set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); ret = request_irq(irq, cdirq, 0, "pcmcia_carddetect", sock); if (ret) { dev_err(&pdev->dev, "cannot setup cd irq\n"); diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 61433d4..d653104 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c @@ -257,9 +257,11 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) } for (i = 0; i < 8; i++) { - set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, - handle_simple_irq, "demux"); - set_irq_chip_data(i + pg->irq_base, pg); + irq_set_chip_and_handler_name(i + pg->irq_base, + &pmic_irqchip, + handle_simple_irq, + "demux"); + irq_set_chip_data(i + pg->irq_base, pg); } return 0; err: diff --git a/drivers/power/z2_battery.c b/drivers/power/z2_battery.c index 2a9ab89..e5ced3a 100644 --- a/drivers/power/z2_battery.c +++ b/drivers/power/z2_battery.c @@ -215,8 +215,8 @@ static int __devinit z2_batt_probe(struct i2c_client *client, if (ret) goto err2; - set_irq_type(gpio_to_irq(info->charge_gpio), - IRQ_TYPE_EDGE_BOTH); + irq_set_irq_type(gpio_to_irq(info->charge_gpio), + IRQ_TYPE_EDGE_BOTH); ret = request_irq(gpio_to_irq(info->charge_gpio), z2_charge_switch_irq, IRQF_DISABLED, "AC Detect", charger); diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c index e55dc1a..6ac55fd 100644 --- a/drivers/rtc/rtc-sh.c +++ b/drivers/rtc/rtc-sh.c @@ -782,11 +782,11 @@ static void sh_rtc_set_irq_wake(struct device *dev, int enabled) struct platform_device *pdev = to_platform_device(dev); struct sh_rtc *rtc = platform_get_drvdata(pdev); - set_irq_wake(rtc->periodic_irq, enabled); + irq_set_irq_wake(rtc->periodic_irq, enabled); if (rtc->carry_irq > 0) { - set_irq_wake(rtc->carry_irq, enabled); - set_irq_wake(rtc->alarm_irq, enabled); + irq_set_irq_wake(rtc->carry_irq, enabled); + irq_set_irq_wake(rtc->alarm_irq, enabled); } } diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c index e3556ff..ac5bbc8 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c @@ -341,7 +341,7 @@ int bcmsdh_register_oob_intr(void *dhdp) if (error) return -ENODEV; - set_irq_wake(sdhcinfo->oob_irq, 1); + irq_set_irq_wake(sdhcinfo->oob_irq, 1); sdhcinfo->oob_irq_registered = true; } @@ -352,7 +352,7 @@ void bcmsdh_unregister_oob_intr(void) { SDLX_MSG(("%s: Enter\n", __func__)); - set_irq_wake(sdhcinfo->oob_irq, 0); + irq_set_irq_wake(sdhcinfo->oob_irq, 0); disable_irq(sdhcinfo->oob_irq); /* just in case.. */ free_irq(sdhcinfo->oob_irq, NULL); sdhcinfo->oob_irq_registered = false; diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c index ea9b733..21cdb06 100644 --- a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c +++ b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c @@ -597,7 +597,7 @@ static int cy_as_hal_configure_interrupts(void *dev_p) int result; int irq_pin = AST_INT; - set_irq_type(OMAP_GPIO_IRQ(irq_pin), IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(OMAP_GPIO_IRQ(irq_pin), IRQ_TYPE_LEVEL_LOW); /* * for shared IRQS must provide non NULL device ptr diff --git a/drivers/tty/hvc/hvc_xen.c b/drivers/tty/hvc/hvc_xen.c index c35f1a7..52fdf60 100644 --- a/drivers/tty/hvc/hvc_xen.c +++ b/drivers/tty/hvc/hvc_xen.c @@ -178,7 +178,7 @@ static int __init xen_hvc_init(void) if (xencons_irq < 0) xencons_irq = 0; /* NO_IRQ */ else - set_irq_noprobe(xencons_irq); + irq_set_noprobe(xencons_irq); hp = hvc_alloc(HVC_COOKIE, xencons_irq, ops, 256); if (IS_ERR(hp)) diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c index 2e7fc9c..b906f11 100644 --- a/drivers/tty/serial/msm_serial_hs.c +++ b/drivers/tty/serial/msm_serial_hs.c @@ -1644,7 +1644,7 @@ static int __devinit msm_hs_probe(struct platform_device *pdev) if (unlikely(uport->irq < 0)) return -ENXIO; - if (unlikely(set_irq_wake(uport->irq, 1))) + if (unlikely(irq_set_irq_wake(uport->irq, 1))) return -ENXIO; if (pdata == NULL || pdata->rx_wakeup_irq < 0) @@ -1658,7 +1658,7 @@ static int __devinit msm_hs_probe(struct platform_device *pdev) if (unlikely(msm_uport->rx_wakeup.irq < 0)) return -ENXIO; - if (unlikely(set_irq_wake(msm_uport->rx_wakeup.irq, 1))) + if (unlikely(irq_set_irq_wake(msm_uport->rx_wakeup.irq, 1))) return -ENXIO; } diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c index 38193f4..44e4deb 100644 --- a/drivers/usb/host/oxu210hp-hcd.c +++ b/drivers/usb/host/oxu210hp-hcd.c @@ -3832,7 +3832,7 @@ static int oxu_drv_probe(struct platform_device *pdev) return -EBUSY; } - ret = set_irq_type(irq, IRQF_TRIGGER_FALLING); + ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING); if (ret) { dev_err(&pdev->dev, "error setting irq type\n"); ret = -EFAULT; diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c index 2ba3b07..c47aac4 100644 --- a/drivers/usb/musb/tusb6010.c +++ b/drivers/usb/musb/tusb6010.c @@ -943,7 +943,7 @@ static void tusb_musb_enable(struct musb *musb) musb_writel(tbase, TUSB_INT_CTRL_CONF, TUSB_INT_CTRL_CONF_INT_RELCYC(0)); - set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW); + irq_set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW); /* maybe force into the Default-A OTG state machine */ if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT) diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c index 95921b7..2f4fa02 100644 --- a/drivers/w1/masters/ds1wm.c +++ b/drivers/w1/masters/ds1wm.c @@ -368,9 +368,9 @@ static int ds1wm_probe(struct platform_device *pdev) ds1wm_data->active_high = plat->active_high; if (res->flags & IORESOURCE_IRQ_HIGHEDGE) - set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); + irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_RISING); if (res->flags & IORESOURCE_IRQ_LOWEDGE) - set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_FALLING); + irq_set_irq_type(ds1wm_data->irq, IRQ_TYPE_EDGE_FALLING); ret = request_irq(ds1wm_data->irq, ds1wm_isr, IRQF_DISABLED, "ds1wm", ds1wm_data); -- cgit v0.10.2 From 0c6f8a8b917ad361319c8ace3e9f28e69bfdb4c1 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Mon, 28 Mar 2011 13:32:20 +0200 Subject: genirq: Remove compat code Signed-off-by: Thomas Gleixner diff --git a/include/linux/irq.h b/include/linux/irq.h index b3741c8..7b3faace 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -92,18 +92,6 @@ enum { IRQ_NO_BALANCING = (1 << 13), IRQ_MOVE_PCNTXT = (1 << 14), IRQ_NESTED_THREAD = (1 << 15), - -#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT - IRQ_INPROGRESS = (1 << 16), - IRQ_REPLAY = (1 << 17), - IRQ_WAITING = (1 << 18), - IRQ_DISABLED = (1 << 19), - IRQ_PENDING = (1 << 20), - IRQ_MASKED = (1 << 21), - IRQ_MOVE_PENDING = (1 << 22), - IRQ_AFFINITY_SET = (1 << 23), - IRQ_WAKEUP = (1 << 24), -#endif }; #define IRQF_MODIFY_MASK \ @@ -321,28 +309,6 @@ static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d) */ struct irq_chip { const char *name; -#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED - unsigned int (*startup)(unsigned int irq); - void (*shutdown)(unsigned int irq); - void (*enable)(unsigned int irq); - void (*disable)(unsigned int irq); - - void (*ack)(unsigned int irq); - void (*mask)(unsigned int irq); - void (*mask_ack)(unsigned int irq); - void (*unmask)(unsigned int irq); - void (*eoi)(unsigned int irq); - - void (*end)(unsigned int irq); - int (*set_affinity)(unsigned int irq, - const struct cpumask *dest); - int (*retrigger)(unsigned int irq); - int (*set_type)(unsigned int irq, unsigned int flow_type); - int (*set_wake)(unsigned int irq, unsigned int on); - - void (*bus_lock)(unsigned int irq); - void (*bus_sync_unlock)(unsigned int irq); -#endif unsigned int (*irq_startup)(struct irq_data *data); void (*irq_shutdown)(struct irq_data *data); void (*irq_enable)(struct irq_data *data); @@ -589,89 +555,6 @@ static inline struct msi_desc *irq_data_get_msi(struct irq_data *d) return d->msi_desc; } -#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT -/* Please do not use: Use the replacement functions instead */ -static inline int set_irq_chip(unsigned int irq, struct irq_chip *chip) -{ - return irq_set_chip(irq, chip); -} -static inline int set_irq_data(unsigned int irq, void *data) -{ - return irq_set_handler_data(irq, data); -} -static inline int set_irq_chip_data(unsigned int irq, void *data) -{ - return irq_set_chip_data(irq, data); -} -static inline int set_irq_type(unsigned int irq, unsigned int type) -{ - return irq_set_irq_type(irq, type); -} -static inline int set_irq_msi(unsigned int irq, struct msi_desc *entry) -{ - return irq_set_msi_desc(irq, entry); -} -static inline struct irq_chip *get_irq_chip(unsigned int irq) -{ - return irq_get_chip(irq); -} -static inline void *get_irq_chip_data(unsigned int irq) -{ - return irq_get_chip_data(irq); -} -static inline void *get_irq_data(unsigned int irq) -{ - return irq_get_handler_data(irq); -} -static inline void *irq_data_get_irq_data(struct irq_data *d) -{ - return irq_data_get_irq_handler_data(d); -} -static inline struct msi_desc *get_irq_msi(unsigned int irq) -{ - return irq_get_msi_desc(irq); -} -static inline void set_irq_noprobe(unsigned int irq) -{ - irq_set_noprobe(irq); -} -static inline void set_irq_probe(unsigned int irq) -{ - irq_set_probe(irq); -} -static inline void set_irq_nested_thread(unsigned int irq, int nest) -{ - irq_set_nested_thread(irq, nest); -} -static inline void -set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, - irq_flow_handler_t handle, const char *name) -{ - irq_set_chip_and_handler_name(irq, chip, handle, name); -} -static inline void -set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, - irq_flow_handler_t handle) -{ - irq_set_chip_and_handler(irq, chip, handle); -} -static inline void -__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, - const char *name) -{ - __irq_set_handler(irq, handle, is_chained, name); -} -static inline void set_irq_handler(unsigned int irq, irq_flow_handler_t handle) -{ - irq_set_handler(irq, handle); -} -static inline void -set_irq_chained_handler(unsigned int irq, irq_flow_handler_t handle) -{ - irq_set_chained_handler(irq, handle); -} -#endif - int irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node); void irq_free_descs(unsigned int irq, unsigned int cnt); int irq_reserve_irqs(unsigned int from, unsigned int cnt); diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h index 15e6c39..a082905 100644 --- a/include/linux/irqdesc.h +++ b/include/linux/irqdesc.h @@ -35,32 +35,7 @@ struct timer_rand_state; * @name: flow handler name for /proc/interrupts output */ struct irq_desc { - -#ifdef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED struct irq_data irq_data; -#else - /* - * This union will go away, once we fixed the direct access to - * irq_desc all over the place. The direct fields are a 1:1 - * overlay of irq_data. - */ - union { - struct irq_data irq_data; - struct { - unsigned int irq; - unsigned int node; - unsigned int pad_do_not_even_think_about_it; - struct irq_chip *chip; - void *handler_data; - void *chip_data; - struct msi_desc *msi_desc; -#ifdef CONFIG_SMP - cpumask_var_t affinity; -#endif - }; - }; -#endif - struct timer_rand_state *timer_rand_state; unsigned int __percpu *kstat_irqs; irq_flow_handler_t handle_irq; @@ -68,11 +43,7 @@ struct irq_desc { irq_preflow_handler_t preflow_handler; #endif struct irqaction *action; /* IRQ action list */ -#ifdef CONFIG_GENERIC_HARDIRQS_NO_COMPAT unsigned int status_use_accessors; -#else - unsigned int status; /* IRQ status */ -#endif unsigned int core_internal_state__do_not_mess_with_it; unsigned int depth; /* nested irq disables */ unsigned int wake_depth; /* nested wake enables */ @@ -127,27 +98,6 @@ static inline struct msi_desc *irq_desc_get_msi_desc(struct irq_desc *desc) return desc->irq_data.msi_desc; } -#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT -static inline struct irq_chip *get_irq_desc_chip(struct irq_desc *desc) -{ - return irq_desc_get_chip(desc); -} -static inline void *get_irq_desc_data(struct irq_desc *desc) -{ - return irq_desc_get_handler_data(desc); -} - -static inline void *get_irq_desc_chip_data(struct irq_desc *desc) -{ - return irq_desc_get_chip_data(desc); -} - -static inline struct msi_desc *get_irq_desc_msi(struct irq_desc *desc) -{ - return irq_desc_get_msi_desc(desc); -} -#endif - /* * Architectures call this to let the generic IRQ layer * handle an interrupt. If the descriptor is attached to an @@ -194,21 +144,13 @@ __irq_set_chip_handler_name_locked(unsigned int irq, struct irq_chip *chip, desc->name = name; } -#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT -static inline void __set_irq_handler_unlocked(int irq, - irq_flow_handler_t handler) -{ - __irq_set_handler_locked(irq, handler); -} - static inline int irq_balancing_disabled(unsigned int irq) { struct irq_desc *desc; desc = irq_to_desc(irq); - return desc->status & IRQ_NO_BALANCING_MASK; + return desc->status_use_accessors & IRQ_NO_BALANCING_MASK; } -#endif static inline void irq_set_lockdep_class(unsigned int irq, struct lock_class_key *class) diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig index 72606ba..a69c333 100644 --- a/kernel/irq/Kconfig +++ b/kernel/irq/Kconfig @@ -10,10 +10,6 @@ menu "IRQ subsystem" config GENERIC_HARDIRQS def_bool y -# Select this to disable the deprecated stuff -config GENERIC_HARDIRQS_NO_DEPRECATED - bool - config GENERIC_HARDIRQS_NO_COMPAT bool diff --git a/kernel/irq/autoprobe.c b/kernel/irq/autoprobe.c index 394784c..342d8f4 100644 --- a/kernel/irq/autoprobe.c +++ b/kernel/irq/autoprobe.c @@ -70,10 +70,8 @@ unsigned long probe_irq_on(void) raw_spin_lock_irq(&desc->lock); if (!desc->action && irq_settings_can_probe(desc)) { desc->istate |= IRQS_AUTODETECT | IRQS_WAITING; - if (irq_startup(desc)) { - irq_compat_set_pending(desc); + if (irq_startup(desc)) desc->istate |= IRQS_PENDING; - } } raw_spin_unlock_irq(&desc->lock); } diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 03099d5..616ec1c 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -34,7 +34,6 @@ int irq_set_chip(unsigned int irq, struct irq_chip *chip) if (!chip) chip = &no_irq_chip; - irq_chip_set_defaults(chip); desc->irq_data.chip = chip; irq_put_desc_unlock(desc, flags); /* @@ -141,25 +140,21 @@ EXPORT_SYMBOL_GPL(irq_get_irq_data); static void irq_state_clr_disabled(struct irq_desc *desc) { irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED); - irq_compat_clr_disabled(desc); } static void irq_state_set_disabled(struct irq_desc *desc) { irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED); - irq_compat_set_disabled(desc); } static void irq_state_clr_masked(struct irq_desc *desc) { irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED); - irq_compat_clr_masked(desc); } static void irq_state_set_masked(struct irq_desc *desc) { irqd_set(&desc->irq_data, IRQD_IRQ_MASKED); - irq_compat_set_masked(desc); } int irq_startup(struct irq_desc *desc) @@ -209,126 +204,6 @@ void irq_disable(struct irq_desc *desc) } } -#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED -/* Temporary migration helpers */ -static void compat_irq_mask(struct irq_data *data) -{ - data->chip->mask(data->irq); -} - -static void compat_irq_unmask(struct irq_data *data) -{ - data->chip->unmask(data->irq); -} - -static void compat_irq_ack(struct irq_data *data) -{ - data->chip->ack(data->irq); -} - -static void compat_irq_mask_ack(struct irq_data *data) -{ - data->chip->mask_ack(data->irq); -} - -static void compat_irq_eoi(struct irq_data *data) -{ - data->chip->eoi(data->irq); -} - -static void compat_irq_enable(struct irq_data *data) -{ - data->chip->enable(data->irq); -} - -static void compat_irq_disable(struct irq_data *data) -{ - data->chip->disable(data->irq); -} - -static void compat_irq_shutdown(struct irq_data *data) -{ - data->chip->shutdown(data->irq); -} - -static unsigned int compat_irq_startup(struct irq_data *data) -{ - return data->chip->startup(data->irq); -} - -static int compat_irq_set_affinity(struct irq_data *data, - const struct cpumask *dest, bool force) -{ - return data->chip->set_affinity(data->irq, dest); -} - -static int compat_irq_set_type(struct irq_data *data, unsigned int type) -{ - return data->chip->set_type(data->irq, type); -} - -static int compat_irq_set_wake(struct irq_data *data, unsigned int on) -{ - return data->chip->set_wake(data->irq, on); -} - -static int compat_irq_retrigger(struct irq_data *data) -{ - return data->chip->retrigger(data->irq); -} - -static void compat_bus_lock(struct irq_data *data) -{ - data->chip->bus_lock(data->irq); -} - -static void compat_bus_sync_unlock(struct irq_data *data) -{ - data->chip->bus_sync_unlock(data->irq); -} -#endif - -/* - * Fixup enable/disable function pointers - */ -void irq_chip_set_defaults(struct irq_chip *chip) -{ -#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED - if (chip->enable) - chip->irq_enable = compat_irq_enable; - if (chip->disable) - chip->irq_disable = compat_irq_disable; - if (chip->shutdown) - chip->irq_shutdown = compat_irq_shutdown; - if (chip->startup) - chip->irq_startup = compat_irq_startup; - if (!chip->end) - chip->end = dummy_irq_chip.end; - if (chip->bus_lock) - chip->irq_bus_lock = compat_bus_lock; - if (chip->bus_sync_unlock) - chip->irq_bus_sync_unlock = compat_bus_sync_unlock; - if (chip->mask) - chip->irq_mask = compat_irq_mask; - if (chip->unmask) - chip->irq_unmask = compat_irq_unmask; - if (chip->ack) - chip->irq_ack = compat_irq_ack; - if (chip->mask_ack) - chip->irq_mask_ack = compat_irq_mask_ack; - if (chip->eoi) - chip->irq_eoi = compat_irq_eoi; - if (chip->set_affinity) - chip->irq_set_affinity = compat_irq_set_affinity; - if (chip->set_type) - chip->irq_set_type = compat_irq_set_type; - if (chip->set_wake) - chip->irq_set_wake = compat_irq_set_wake; - if (chip->retrigger) - chip->irq_retrigger = compat_irq_retrigger; -#endif -} - static inline void mask_ack_irq(struct irq_desc *desc) { if (desc->irq_data.chip->irq_mask_ack) @@ -381,7 +256,6 @@ void handle_nested_irq(unsigned int irq) if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) goto out_unlock; - irq_compat_set_progress(desc); irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS); raw_spin_unlock_irq(&desc->lock); @@ -391,7 +265,6 @@ void handle_nested_irq(unsigned int irq) raw_spin_lock_irq(&desc->lock); irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS); - irq_compat_clr_progress(desc); out_unlock: raw_spin_unlock_irq(&desc->lock); @@ -514,7 +387,6 @@ handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) * then mask it and get out of here: */ if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) { - irq_compat_set_pending(desc); desc->istate |= IRQS_PENDING; mask_irq(desc); goto out; @@ -567,7 +439,6 @@ handle_edge_irq(unsigned int irq, struct irq_desc *desc) if (unlikely(irqd_irq_disabled(&desc->irq_data) || irqd_irq_inprogress(&desc->irq_data) || !desc->action)) { if (!irq_check_poll(desc)) { - irq_compat_set_pending(desc); desc->istate |= IRQS_PENDING; mask_ack_irq(desc); goto out_unlock; diff --git a/kernel/irq/compat.h b/kernel/irq/compat.h deleted file mode 100644 index 6bbaf66..0000000 --- a/kernel/irq/compat.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Compat layer for transition period - */ -#ifndef CONFIG_GENERIC_HARDIRQS_NO_COMPAT -static inline void irq_compat_set_progress(struct irq_desc *desc) -{ - desc->status |= IRQ_INPROGRESS; -} - -static inline void irq_compat_clr_progress(struct irq_desc *desc) -{ - desc->status &= ~IRQ_INPROGRESS; -} -static inline void irq_compat_set_disabled(struct irq_desc *desc) -{ - desc->status |= IRQ_DISABLED; -} -static inline void irq_compat_clr_disabled(struct irq_desc *desc) -{ - desc->status &= ~IRQ_DISABLED; -} -static inline void irq_compat_set_pending(struct irq_desc *desc) -{ - desc->status |= IRQ_PENDING; -} - -static inline void irq_compat_clr_pending(struct irq_desc *desc) -{ - desc->status &= ~IRQ_PENDING; -} -static inline void irq_compat_set_masked(struct irq_desc *desc) -{ - desc->status |= IRQ_MASKED; -} - -static inline void irq_compat_clr_masked(struct irq_desc *desc) -{ - desc->status &= ~IRQ_MASKED; -} -static inline void irq_compat_set_move_pending(struct irq_desc *desc) -{ - desc->status |= IRQ_MOVE_PENDING; -} - -static inline void irq_compat_clr_move_pending(struct irq_desc *desc) -{ - desc->status &= ~IRQ_MOVE_PENDING; -} -static inline void irq_compat_set_affinity(struct irq_desc *desc) -{ - desc->status |= IRQ_AFFINITY_SET; -} - -static inline void irq_compat_clr_affinity(struct irq_desc *desc) -{ - desc->status &= ~IRQ_AFFINITY_SET; -} -#else -static inline void irq_compat_set_progress(struct irq_desc *desc) { } -static inline void irq_compat_clr_progress(struct irq_desc *desc) { } -static inline void irq_compat_set_disabled(struct irq_desc *desc) { } -static inline void irq_compat_clr_disabled(struct irq_desc *desc) { } -static inline void irq_compat_set_pending(struct irq_desc *desc) { } -static inline void irq_compat_clr_pending(struct irq_desc *desc) { } -static inline void irq_compat_set_masked(struct irq_desc *desc) { } -static inline void irq_compat_clr_masked(struct irq_desc *desc) { } -static inline void irq_compat_set_move_pending(struct irq_desc *desc) { } -static inline void irq_compat_clr_move_pending(struct irq_desc *desc) { } -static inline void irq_compat_set_affinity(struct irq_desc *desc) { } -static inline void irq_compat_clr_affinity(struct irq_desc *desc) { } -#endif - diff --git a/kernel/irq/debug.h b/kernel/irq/debug.h index a0bd875..306cba3 100644 --- a/kernel/irq/debug.h +++ b/kernel/irq/debug.h @@ -4,7 +4,7 @@ #include -#define P(f) if (desc->status & f) printk("%14s set\n", #f) +#define P(f) if (desc->status_use_accessors & f) printk("%14s set\n", #f) #define PS(f) if (desc->istate & f) printk("%14s set\n", #f) /* FIXME */ #define PD(f) do { } while (0) diff --git a/kernel/irq/dummychip.c b/kernel/irq/dummychip.c index 20dc547..b5fcd96 100644 --- a/kernel/irq/dummychip.c +++ b/kernel/irq/dummychip.c @@ -31,13 +31,6 @@ static unsigned int noop_ret(struct irq_data *data) return 0; } -#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED -static void compat_noop(unsigned int irq) { } -#define END_INIT .end = compat_noop -#else -#define END_INIT -#endif - /* * Generic no controller implementation */ @@ -48,7 +41,6 @@ struct irq_chip no_irq_chip = { .irq_enable = noop, .irq_disable = noop, .irq_ack = ack_bad, - END_INIT }; /* @@ -64,5 +56,4 @@ struct irq_chip dummy_irq_chip = { .irq_ack = noop, .irq_mask = noop, .irq_unmask = noop, - END_INIT }; diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c index 1a2fb77..90cb55f 100644 --- a/kernel/irq/handle.c +++ b/kernel/irq/handle.c @@ -175,9 +175,7 @@ irqreturn_t handle_irq_event(struct irq_desc *desc) struct irqaction *action = desc->action; irqreturn_t ret; - irq_compat_clr_pending(desc); desc->istate &= ~IRQS_PENDING; - irq_compat_set_progress(desc); irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS); raw_spin_unlock(&desc->lock); @@ -185,6 +183,5 @@ irqreturn_t handle_irq_event(struct irq_desc *desc) raw_spin_lock(&desc->lock); irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS); - irq_compat_clr_progress(desc); return ret; } diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h index 6b8b971..6546431 100644 --- a/kernel/irq/internals.h +++ b/kernel/irq/internals.h @@ -15,10 +15,6 @@ #define istate core_internal_state__do_not_mess_with_it -#ifdef CONFIG_GENERIC_HARDIRQS_NO_COMPAT -# define status status_use_accessors -#endif - extern int noirqdebug; /* @@ -61,15 +57,11 @@ enum { IRQS_SUSPENDED = 0x00000800, }; -#include "compat.h" #include "debug.h" #include "settings.h" #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) -/* Set default functions for irq_chip structures: */ -extern void irq_chip_set_defaults(struct irq_chip *chip); - extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, unsigned long flags); extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp); @@ -156,13 +148,11 @@ irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) static inline void irqd_set_move_pending(struct irq_data *d) { d->state_use_accessors |= IRQD_SETAFFINITY_PENDING; - irq_compat_set_move_pending(irq_data_to_desc(d)); } static inline void irqd_clr_move_pending(struct irq_data *d) { d->state_use_accessors &= ~IRQD_SETAFFINITY_PENDING; - irq_compat_clr_move_pending(irq_data_to_desc(d)); } static inline void irqd_clear(struct irq_data *d, unsigned int mask) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index b3bf54f..12a80fd 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -166,7 +166,6 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) kref_get(&desc->affinity_notify->kref); schedule_work(&desc->affinity_notify->work); } - irq_compat_set_affinity(desc); irqd_set(data, IRQD_AFFINITY_SET); return ret; @@ -297,10 +296,8 @@ setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) if (cpumask_intersects(desc->irq_data.affinity, cpu_online_mask)) set = desc->irq_data.affinity; - else { - irq_compat_clr_affinity(desc); + else irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); - } } cpumask_and(mask, cpu_online_mask, set); @@ -587,8 +584,6 @@ int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, irqd_set(&desc->irq_data, IRQD_LEVEL); } - if (chip != desc->irq_data.chip) - irq_chip_set_defaults(desc->irq_data.chip); ret = 0; break; default: @@ -785,7 +780,6 @@ static int irq_thread(void *data) * but AFAICT IRQS_PENDING should be fine as it * retriggers the interrupt itself --- tglx */ - irq_compat_set_pending(desc); desc->istate |= IRQS_PENDING; raw_spin_unlock_irq(&desc->lock); } else { @@ -981,8 +975,6 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) new->thread_mask = 1 << ffz(thread_mask); if (!shared) { - irq_chip_set_defaults(desc->irq_data.chip); - init_waitqueue_head(&desc->wait_for_threads); /* Setup the type (level, edge polarity) if configured: */ diff --git a/kernel/irq/resend.c b/kernel/irq/resend.c index ad683a9..14dd576 100644 --- a/kernel/irq/resend.c +++ b/kernel/irq/resend.c @@ -65,7 +65,6 @@ void check_irq_resend(struct irq_desc *desc, unsigned int irq) if (desc->istate & IRQS_REPLAY) return; if (desc->istate & IRQS_PENDING) { - irq_compat_clr_pending(desc); desc->istate &= ~IRQS_PENDING; desc->istate |= IRQS_REPLAY; diff --git a/kernel/irq/settings.h b/kernel/irq/settings.h index 0227ad3..0d91730 100644 --- a/kernel/irq/settings.h +++ b/kernel/irq/settings.h @@ -15,17 +15,8 @@ enum { _IRQF_MODIFY_MASK = IRQF_MODIFY_MASK, }; -#define IRQ_INPROGRESS GOT_YOU_MORON -#define IRQ_REPLAY GOT_YOU_MORON -#define IRQ_WAITING GOT_YOU_MORON -#define IRQ_DISABLED GOT_YOU_MORON -#define IRQ_PENDING GOT_YOU_MORON -#define IRQ_MASKED GOT_YOU_MORON -#define IRQ_WAKEUP GOT_YOU_MORON -#define IRQ_MOVE_PENDING GOT_YOU_MORON #define IRQ_PER_CPU GOT_YOU_MORON #define IRQ_NO_BALANCING GOT_YOU_MORON -#define IRQ_AFFINITY_SET GOT_YOU_MORON #define IRQ_LEVEL GOT_YOU_MORON #define IRQ_NOPROBE GOT_YOU_MORON #define IRQ_NOREQUEST GOT_YOU_MORON @@ -37,102 +28,98 @@ enum { static inline void irq_settings_clr_and_set(struct irq_desc *desc, u32 clr, u32 set) { - desc->status &= ~(clr & _IRQF_MODIFY_MASK); - desc->status |= (set & _IRQF_MODIFY_MASK); + desc->status_use_accessors &= ~(clr & _IRQF_MODIFY_MASK); + desc->status_use_accessors |= (set & _IRQF_MODIFY_MASK); } static inline bool irq_settings_is_per_cpu(struct irq_desc *desc) { - return desc->status & _IRQ_PER_CPU; + return desc->status_use_accessors & _IRQ_PER_CPU; } static inline void irq_settings_set_per_cpu(struct irq_desc *desc) { - desc->status |= _IRQ_PER_CPU; + desc->status_use_accessors |= _IRQ_PER_CPU; } static inline void irq_settings_set_no_balancing(struct irq_desc *desc) { - desc->status |= _IRQ_NO_BALANCING; + desc->status_use_accessors |= _IRQ_NO_BALANCING; } static inline bool irq_settings_has_no_balance_set(struct irq_desc *desc) { - return desc->status & _IRQ_NO_BALANCING; + return desc->status_use_accessors & _IRQ_NO_BALANCING; } static inline u32 irq_settings_get_trigger_mask(struct irq_desc *desc) { - return desc->status & IRQ_TYPE_SENSE_MASK; + return desc->status_use_accessors & IRQ_TYPE_SENSE_MASK; } static inline void irq_settings_set_trigger_mask(struct irq_desc *desc, u32 mask) { - desc->status &= ~IRQ_TYPE_SENSE_MASK; - desc->status |= mask & IRQ_TYPE_SENSE_MASK; + desc->status_use_accessors &= ~IRQ_TYPE_SENSE_MASK; + desc->status_use_accessors |= mask & IRQ_TYPE_SENSE_MASK; } static inline bool irq_settings_is_level(struct irq_desc *desc) { - return desc->status & _IRQ_LEVEL; + return desc->status_use_accessors & _IRQ_LEVEL; } static inline void irq_settings_clr_level(struct irq_desc *desc) { - desc->status &= ~_IRQ_LEVEL; + desc->status_use_accessors &= ~_IRQ_LEVEL; } static inline void irq_settings_set_level(struct irq_desc *desc) { - desc->status |= _IRQ_LEVEL; + desc->status_use_accessors |= _IRQ_LEVEL; } static inline bool irq_settings_can_request(struct irq_desc *desc) { - return !(desc->status & _IRQ_NOREQUEST); + return !(desc->status_use_accessors & _IRQ_NOREQUEST); } static inline void irq_settings_clr_norequest(struct irq_desc *desc) { - desc->status &= ~_IRQ_NOREQUEST; + desc->status_use_accessors &= ~_IRQ_NOREQUEST; } static inline void irq_settings_set_norequest(struct irq_desc *desc) { - desc->status |= _IRQ_NOREQUEST; + desc->status_use_accessors |= _IRQ_NOREQUEST; } static inline bool irq_settings_can_probe(struct irq_desc *desc) { - return !(desc->status & _IRQ_NOPROBE); + return !(desc->status_use_accessors & _IRQ_NOPROBE); } static inline void irq_settings_clr_noprobe(struct irq_desc *desc) { - desc->status &= ~_IRQ_NOPROBE; + desc->status_use_accessors &= ~_IRQ_NOPROBE; } static inline void irq_settings_set_noprobe(struct irq_desc *desc) { - desc->status |= _IRQ_NOPROBE; + desc->status_use_accessors |= _IRQ_NOPROBE; } static inline bool irq_settings_can_move_pcntxt(struct irq_desc *desc) { - return desc->status & _IRQ_MOVE_PCNTXT; + return desc->status_use_accessors & _IRQ_MOVE_PCNTXT; } static inline bool irq_settings_can_autoenable(struct irq_desc *desc) { - return !(desc->status & _IRQ_NOAUTOEN); + return !(desc->status_use_accessors & _IRQ_NOAUTOEN); } static inline bool irq_settings_is_nested_thread(struct irq_desc *desc) { - return desc->status & _IRQ_NESTED_THREAD; + return desc->status_use_accessors & _IRQ_NESTED_THREAD; } - -/* Nothing should touch desc->status from now on */ -#undef status -#define status USE_THE_PROPER_WRAPPERS_YOU_MORON diff --git a/kernel/irq/spurious.c b/kernel/irq/spurious.c index 83f4799..dfbd550 100644 --- a/kernel/irq/spurious.c +++ b/kernel/irq/spurious.c @@ -93,7 +93,6 @@ static int try_one_irq(int irq, struct irq_desc *desc, bool force) * Already running: If it is shared get the other * CPU to go looking for our mystery interrupt too */ - irq_compat_set_pending(desc); desc->istate |= IRQS_PENDING; goto out; } -- cgit v0.10.2 From 851d7cf647e0d31668eb5dc496f7698a2f6136b4 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 29 Mar 2011 02:51:13 +0200 Subject: genirq: Remove move_*irq leftovers All users converted to new interface. Signed-off-by: Thomas Gleixner diff --git a/include/linux/irq.h b/include/linux/irq.h index 7b3faace..2a375a7 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -386,13 +386,9 @@ extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumas #ifdef CONFIG_GENERIC_HARDIRQS #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ) -void move_native_irq(int irq); -void move_masked_irq(int irq); void irq_move_irq(struct irq_data *data); void irq_move_masked_irq(struct irq_data *data); #else -static inline void move_native_irq(int irq) { } -static inline void move_masked_irq(int irq) { } static inline void irq_move_irq(struct irq_data *data) { } static inline void irq_move_masked_irq(struct irq_data *data) { } #endif diff --git a/kernel/irq/migration.c b/kernel/irq/migration.c index e33d9c8..bc61946 100644 --- a/kernel/irq/migration.c +++ b/kernel/irq/migration.c @@ -53,11 +53,6 @@ void irq_move_masked_irq(struct irq_data *idata) cpumask_clear(desc->pending_mask); } -void move_masked_irq(int irq) -{ - irq_move_masked_irq(irq_get_irq_data(irq)); -} - void irq_move_irq(struct irq_data *idata) { bool masked; @@ -80,8 +75,3 @@ void irq_move_irq(struct irq_data *idata) if (!masked) idata->chip->irq_unmask(idata); } - -void move_native_irq(int irq) -{ - irq_move_irq(irq_get_irq_data(irq)); -} -- cgit v0.10.2 From 9ad198cba2a8177eea6a7f2f0202b910abdef96b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Tue, 29 Mar 2011 04:02:50 +0200 Subject: gpio: ab8500: Mark broken This driver is broken in several aspects. 1) old style irq_chip functions. Sigh 2) Abuse of the unlock callback. That's not supposed to be a state machine for evrything and some more. Signed-off-by: Thomas Gleixner diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d374320..d3b2953 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -416,7 +416,7 @@ config GPIO_JANZ_TTL config AB8500_GPIO bool "ST-Ericsson AB8500 Mixed Signal Circuit gpio functions" - depends on AB8500_CORE + depends on AB8500_CORE && BROKEN help Select this to enable the AB8500 IC GPIO driver endif -- cgit v0.10.2