/* * Copyright 2013-2014 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ /dts-v1/; #include "ls1021a.dtsi" / { model = "LS1021A QDS Board"; aliases { enet0_rgmii_phy = &rgmii_phy1; enet1_rgmii_phy = &rgmii_phy2; enet2_rgmii_phy = &rgmii_phy3; enet0_sgmii_phy = &sgmii_phy1c; enet1_sgmii_phy = &sgmii_phy1d; }; soc { leds { compatible = "pwm-leds"; led0 { label = "led0"; pwms = <&pwm3 0 150000 0>; max-brightness = <100>; }; led1 { label = "led1"; pwms = <&pwm3 1 150000 0>; max-brightness = <100>; }; led2 { label = "led2"; pwms = <&pwm3 2 150000 0>; max-brightness = <100>; }; led3 { label = "led3"; pwms = <&pwm3 3 150000 0>; max-brightness = <100>; }; led4 { label = "led4"; pwms = <&pwm3 4 150000 0>; max-brightness = <100>; }; led5 { label = "led5"; pwms = <&pwm3 5 150000 0>; max-brightness = <100>; }; led6 { label = "led6"; pwms = <&pwm3 6 150000 0>; max-brightness = <100>; }; led7 { label = "led7"; pwms = <&pwm3 7 150000 0>; max-brightness = <100>; }; }; }; }; &dspi0 { bus-num = <0>; status = "okay"; dspiflash: at45db021d@0 { compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash"; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <16000000>; spi-cpol; spi-cpha; reg = <0>; }; }; &duart0 { status = "okay"; }; &duart1 { status = "okay"; }; &enet0 { tbi-handle = <&tbi0>; phy-handle = <&sgmii_phy1c>; phy-connection-type = "sgmii"; status = "okay"; }; &enet1 { tbi-handle = <&tbi0>; phy-handle = <&sgmii_phy1d>; phy-connection-type = "sgmii"; status = "okay"; }; &enet2 { phy-handle = <&rgmii_phy3>; phy-connection-type = "rgmii-id"; status = "okay"; }; &i2c0 { status = "okay"; pca9547@77 { compatible = "philips,pca9547"; reg = <0x77>; #address-cells = <1>; #size-cells = <0>; i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0x0>; rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = ; }; }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <0x2>; ina220@40 { compatible = "ti,ina220"; reg = <0x40>; shunt-resistor = <1000>; }; ina220@41 { compatible = "ti,ina220"; reg = <0x41>; shunt-resistor = <1000>; }; }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <0x3>; eeprom@56 { compatible = "at24,24c512"; reg = <0x56>; }; eeprom@57 { compatible = "at24,24c512"; reg = <0x57>; }; adt7461a@4c { compatible = "adt7461a"; reg = <0x4c>; }; }; i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <0x4>; }; }; }; &ifc { status = "okay"; #address-cells = <2>; #size-cells = <1>; /* NOR, NAND Flashes and FPGA on board */ ranges = <0x0 0x0 0x0 0x60000000 0x08000000 0x2 0x0 0x0 0x7e800000 0x00010000 0x3 0x0 0x0 0x7fb00000 0x00000100>; nor@0,0 { compatible = "cfi-flash"; #address-cells = <1>; #size-cells = <1>; reg = <0x0 0x0 0x8000000>; bank-width = <2>; device-width = <1>; }; nand@2,0 { compatible = "fsl,ifc-nand"; #address-cells = <1>; #size-cells = <1>; reg = <0x2 0x0 0x10000>; partition@0 { /* This location must not be altered */ /* 1MB for u-boot Bootloader Image */ reg = <0x0 0x00100000>; label = "NAND U-Boot Image"; read-only; }; partition@100000 { /* 1MB for DTB Image */ reg = <0x00100000 0x00100000>; label = "NAND DTB Image"; }; partition@200000 { /* 10MB for Linux Kernel Image */ reg = <0x00200000 0x00a00000>; label = "NAND Linux Kernel Image"; }; partition@c00000 { /* 500MB for Root file System Image */ reg = <0x00c00000 0x1f400000>; label = "NAND Compressed RFS Image"; }; }; fpga: board-control@3,0 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x3 0x0 0x0000100>; bank-width = <1>; device-width = <1>; ranges = <0 3 0 0x100>; mdio-mux-emi1 { compatible = "mdio-mux-mmioreg"; mdio-parent-bus = <&mdio0>; #address-cells = <1>; #size-cells = <0>; reg = <0x54 1>; /* BRDCFG4 */ mux-mask = <0xe0>; /* EMI1[2:0] */ /* Onboard PHYs */ ls1021amdio0: mdio@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; rgmii_phy1: ethernet-phy@1 { reg = <0x1>; }; }; ls1021amdio1: mdio@20 { reg = <0x20>; #address-cells = <1>; #size-cells = <0>; rgmii_phy2: ethernet-phy@2 { reg = <0x2>; }; }; ls1021amdio2: mdio@40 { reg = <0x40>; #address-cells = <1>; #size-cells = <0>; rgmii_phy3: ethernet-phy@3 { reg = <0x3>; }; }; ls1021amdio3: mdio@60 { reg = <0x60>; #address-cells = <1>; #size-cells = <0>; sgmii_phy1c: ethernet-phy@1c { reg = <0x1c>; }; }; ls1021amdio4: mdio@80 { reg = <0x80>; #address-cells = <1>; #size-cells = <0>; sgmii_phy1d: ethernet-phy@1d { reg = <0x1d>; }; }; }; }; }; &lpuart0 { status = "okay"; }; &mdio0 { tbi0: tbi-phy@8 { reg = <0x8>; device_type = "tbi-phy"; }; }; &pwm3 { status = "okay"; }; &pwm7 { status = "okay"; }; &qspi { num-cs = <2>; bus-num = <0>; fsl,spi-num-chipselects = <2>; fsl,spi-flash-chipselects = <0>; status = "okay"; qflash0: s25fl128s@0 { compatible = "spansion,s25fl129p1"; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <20000000>; reg = <0>; partition@0 { label = "s25fl128s-0"; reg = <0x0 0x1000000>; }; }; qflash1: s25fl128s@1 { compatible = "spansion,s25fl129p1"; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <20000000>; reg = <1>; partition@0x0 { label = "s25fl128s-1"; reg = <0x0 0x1000000>; }; }; };