/*
 * B4860 Silicon/SoC Device Tree Source (post include)
 *
 * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/include/ "b4si-post.dtsi"
&bportals {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "simple-bus";
	bman-portal@0 {
		cell-index = <0x0>;
		compatible = "fsl,bman-portal";
		reg = <0x0 0x4000 0x1000000 0x1000>;
		interrupts = <105 2 0 0>;
	};
	bman-portal@4000 {
		cell-index = <0x1>;
		compatible = "fsl,bman-portal";
		reg = <0x4000 0x4000 0x1001000 0x1000>;
		interrupts = <107 2 0 0>;
	};
	bman-portal@8000 {
		cell-index = <2>;
		compatible = "fsl,bman-portal";
		reg = <0x8000 0x4000 0x1002000 0x1000>;
		interrupts = <109 2 0 0>;
	};
	bman-portal@c000 {
		cell-index = <0x3>;
		compatible = "fsl,bman-portal";
		reg = <0xc000 0x4000 0x1003000 0x1000>;
		interrupts = <111 2 0 0>;
	};
	bman-portal@10000 {
		cell-index = <0x4>;
		compatible = "fsl,bman-portal";
		reg = <0x10000 0x4000 0x1004000 0x1000>;
		interrupts = <113 2 0 0>;
	};
	bman-portal@14000 {
		cell-index = <0x5>;
		compatible = "fsl,bman-portal";
		reg = <0x14000 0x4000 0x1005000 0x1000>;
		interrupts = <115 2 0 0>;
	};
	bman-portal@18000 {
		cell-index = <0x6>;
		compatible = "fsl,bman-portal";
		reg = <0x18000 0x4000 0x1006000 0x1000>;
		interrupts = <117 2 0 0>;
	};
	bman-portal@1c000 {
		cell-index = <0x7>;
		compatible = "fsl,bman-portal";
		reg = <0x1c000 0x4000 0x1007000 0x1000>;
		interrupts = <119 2 0 0>;
	};
	bman-portal@20000 {
		cell-index = <0x8>;
		compatible = "fsl,bman-portal";
		reg = <0x20000 0x4000 0x1008000 0x1000>;
		interrupts = <121 2 0 0>;
	};
	bman-portal@24000 {
		cell-index = <0x9>;
		compatible = "fsl,bman-portal";
		reg = <0x24000 0x4000 0x1009000 0x1000>;
		interrupts = <123 2 0 0>;
	};
	bman-portal@28000 {
		cell-index = <0xa>;
		compatible = "fsl,bman-portal";
		reg = <0x28000 0x4000 0x100a000 0x1000>;
		interrupts = <125 2 0 0>;
	};
	bman-portal@2c000 {
		cell-index = <0xb>;
		compatible = "fsl,bman-portal";
		reg = <0x2c000 0x4000 0x100b000 0x1000>;
		interrupts = <127 2 0 0>;
	};
	bman-portal@30000 {
		cell-index = <0xc>;
		compatible = "fsl,bman-portal";
		reg = <0x30000 0x4000 0x100c000 0x1000>;
		interrupts = <129 2 0 0>;
	};
	bman-portal@34000 {
		cell-index = <0xd>;
		compatible = "fsl,bman-portal";
		reg = <0x34000 0x4000 0x100d000 0x1000>;
		interrupts = <131 2 0 0>;
	};
	bman-portal@38000 {
		cell-index = <0xe>;
		compatible = "fsl,bman-portal";
		reg = <0x38000 0x4000 0x100e000 0x1000>;
		interrupts = <133 2 0 0>;
	};
	bman-portal@3c000 {
		cell-index = <0xf>;
		compatible = "fsl,bman-portal";
		reg = <0x3c000 0x4000 0x100f000 0x1000>;
		interrupts = <135 2 0 0>;
	};
	bman-portal@40000 {
		cell-index = <0x10>;
		compatible = "fsl,bman-portal";
		reg = <0x40000 0x4000 0x1010000 0x1000>;
		interrupts = <137 2 0 0>;
	};
	bman-portal@44000 {
		cell-index = <0x11>;
		compatible = "fsl,bman-portal";
		reg = <0x44000 0x4000 0x1011000 0x1000>;
		interrupts = <139 2 0 0>;
	};
	bman-portal@48000 {
		cell-index = <0x12>;
		compatible = "fsl,bman-portal";
		reg = <0x48000 0x4000 0x1012000 0x1000>;
		interrupts = <141 2 0 0>;
	};
	bman-portal@4c000 {
		cell-index = <0x13>;
		compatible = "fsl,bman-portal";
		reg = <0x4c000 0x4000 0x1013000 0x1000>;
		interrupts = <143 2 0 0>;
	};
	bman-portal@50000 {
		cell-index = <0x14>;
		compatible = "fsl,bman-portal";
		reg = <0x50000 0x4000 0x1014000 0x1000>;
		interrupts = <145 2 0 0>;
	};
	bman-portal@54000 {
		cell-index = <0x15>;
		compatible = "fsl,bman-portal";
		reg = <0x54000 0x4000 0x1015000 0x1000>;
		interrupts = <147 2 0 0>;
	};
	bman-portal@58000 {
		cell-index = <0x16>;
		compatible = "fsl,bman-portal";
		reg = <0x58000 0x4000 0x1016000 0x1000>;
		interrupts = <149 2 0 0>;
	};
	bman-portal@5c000 {
		cell-index = <0x17>;
		compatible = "fsl,bman-portal";
		reg = <0x5c000 0x4000 0x1017000 0x1000>;
		interrupts = <151 2 0 0>;
	};
	bman-portal@60000 {
		cell-index = <0x18>;
		compatible = "fsl,bman-portal";
		reg = <0x60000 0x4000 0x1018000 0x1000>;
		interrupts = <153 2 0 0>;
	};
};

&qportals {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "simple-bus";
	qportal0: qman-portal@0 {
		cell-index = <0x0>;
		compatible = "fsl,qman-portal";
		reg = <0x0 0x4000 0x1000000 0x1000>;
		interrupts = <104 0x2 0 0>;
		fsl,qman-channel-id = <0x0>;
	};
	qportal1: qman-portal@4000 {
		cell-index = <0x1>;
		compatible = "fsl,qman-portal";
		reg = <0x4000 0x4000 0x1001000 0x1000>;
		interrupts = <106 0x2 0 0>;
		fsl,qman-channel-id = <0x1>;
	};
	qportal2: qman-portal@8000 {
		cell-index = <0x2>;
		compatible = "fsl,qman-portal";
		reg = <0x8000 0x4000 0x1002000 0x1000>;
		interrupts = <108 0x2 0 0>;
		fsl,qman-channel-id = <0x2>;
	};
	qportal3: qman-portal@c000 {
		cell-index = <0x3>;
		compatible = "fsl,qman-portal";
		reg = <0xc000 0x4000 0x1003000 0x1000>;
		interrupts = <110 0x2 0 0>;
		fsl,qman-channel-id = <0x3>;
	};
	qportal4: qman-portal@10000 {
		cell-index = <0x4>;
		compatible = "fsl,qman-portal";
		reg = <0x10000 0x4000 0x1004000 0x1000>;
		interrupts = <112 0x2 0 0>;
		fsl,qman-channel-id = <0x4>;
	};
	qportal5: qman-portal@14000 {
		cell-index = <0x5>;
		compatible = "fsl,qman-portal";
		reg = <0x14000 0x4000 0x1005000 0x1000>;
		interrupts = <114 0x2 0 0>;
		fsl,qman-channel-id = <0x5>;
	};
	qportal6: qman-portal@18000 {
		cell-index = <0x6>;
		compatible = "fsl,qman-portal";
		reg = <0x18000 0x4000 0x1006000 0x1000>;
		interrupts = <116 0x2 0 0>;
		fsl,qman-channel-id = <0x6>;
	};
	qportal7: qman-portal@1c000 {
		cell-index = <0x7>;
		compatible = "fsl,qman-portal";
		reg = <0x1c000 0x4000 0x1007000 0x1000>;
		interrupts = <118 0x2 0 0>;
		fsl,qman-channel-id = <0x7>;
	};
	qportal8: qman-portal@20000 {
		cell-index = <0x8>;
		compatible = "fsl,qman-portal";
		reg = <0x20000 0x4000 0x1008000 0x1000>;
		interrupts = <120 0x2 0 0>;
		fsl,qman-channel-id = <0x8>;
	};
	qportal9: qman-portal@24000 {
		cell-index = <0x9>;
		compatible = "fsl,qman-portal";
		reg = <0x24000 0x4000 0x1009000 0x1000>;
		interrupts = <122 0x2 0 0>;
		fsl,qman-channel-id = <0x9>;
	};
	qportal10: qman-portal@28000 {
		cell-index = <0xa>;
		compatible = "fsl,qman-portal";
		reg = <0x28000 0x4000 0x100a000 0x1000>;
		interrupts = <124 0x2 0 0>;
		fsl,qman-channel-id = <0xa>;
	};
	qportal11: qman-portal@2c000 {
		cell-index = <0xb>;
		compatible = "fsl,qman-portal";
		reg = <0x2c000 0x4000 0x100b000 0x1000>;
		interrupts = <126 0x2 0 0>;
		fsl,qman-channel-id = <0xb>;
	};
	qportal12: qman-portal@30000 {
		cell-index = <0xc>;
		compatible = "fsl,qman-portal";
		reg = <0x30000 0x4000 0x100c000 0x1000>;
		interrupts = <128 0x2 0 0>;
		fsl,qman-channel-id = <0xc>;
	};
	qportal13: qman-portal@34000 {
		cell-index = <0xd>;
		compatible = "fsl,qman-portal";
		reg = <0x34000 0x4000 0x100d000 0x1000>;
		interrupts = <130 0x2 0 0>;
		fsl,qman-channel-id = <0xd>;
	};
	qportal14: qman-portal@38000 {
		cell-index = <0xe>;
		compatible = "fsl,qman-portal";
		reg = <0x38000 0x4000 0x100e000 0x1000>;
		interrupts = <132 0x2 0 0>;
		fsl,qman-channel-id = <0xe>;
	};
	qportal15: qman-portal@3c000 {
		cell-index = <0xf>;
		compatible = "fsl,qman-portal";
		reg = <0x3c000 0x4000 0x100f000 0x1000>;
		interrupts = <134 0x2 0 0>;
		fsl,qman-channel-id = <0xf>;
	};
	qportal16: qman-portal@40000 {
		cell-index = <0x10>;
		compatible = "fsl,qman-portal";
		reg = <0x40000 0x4000 0x1010000 0x1000>;
		interrupts = <136 0x2 0 0>;
		fsl,qman-channel-id = <0x10>;
	};
	qportal17: qman-portal@44000 {
		cell-index = <0x11>;
		compatible = "fsl,qman-portal";
		reg = <0x44000 0x4000 0x1011000 0x1000>;
		interrupts = <138 0x2 0 0>;
		fsl,qman-channel-id = <0x11>;
	};
	qportal18: qman-portal@48000 {
		cell-index = <0x12>;
		compatible = "fsl,qman-portal";
		reg = <0x48000 0x4000 0x1012000 0x1000>;
		interrupts = <140 0x2 0 0>;
		fsl,qman-channel-id = <0x12>;
	};
	qportal19: qman-portal@4c000 {
		cell-index = <0x13>;
		compatible = "fsl,qman-portal";
		reg = <0x4c000 0x4000 0x1013000 0x1000>;
		interrupts = <142 0x2 0 0>;
		fsl,qman-channel-id = <0x13>;
	};
	qportal20: qman-portal@50000 {
		cell-index = <0x14>;
		compatible = "fsl,qman-portal";
		reg = <0x50000 0x4000 0x1014000 0x1000>;
		interrupts = <144 0x2 0 0>;
		fsl,qman-channel-id = <0x14>;
	};
	qportal21: qman-portal@54000 {
		cell-index = <0x15>;
		compatible = "fsl,qman-portal";
		reg = <0x54000 0x4000 0x1015000 0x1000>;
		interrupts = <146 0x2 0 0>;
		fsl,qman-channel-id = <0x15>;
	};
	qportal22: qman-portal@58000 {
		cell-index = <0x16>;
		compatible = "fsl,qman-portal";
		reg = <0x58000 0x4000 0x1016000 0x1000>;
		interrupts = <148 0x2 0 0>;
		fsl,qman-channel-id = <0x16>;
	};
	qportal23: qman-portal@5c000 {
		cell-index = <0x17>;
		compatible = "fsl,qman-portal";
		reg = <0x5c000 0x4000 0x1017000 0x1000>;
		interrupts = <150 0x2 0 0>;
		fsl,qman-channel-id = <0x17>;
	};
	qportal24: qman-portal@60000 {
		cell-index = <0x18>;
		compatible = "fsl,qman-portal";
		reg = <0x60000 0x4000 0x1018000 0x1000>;
		interrupts = <152 0x2 0 0>;
		fsl,qman-channel-id = <0x18>;
	};
};
/* controller at 0x200000 */
&pci0 {
	compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
};

&rio {
	compatible = "fsl,srio";
	interrupts = <16 2 1 20>;
	#address-cells = <2>;
	#size-cells = <2>;
	fsl,iommu-parent = <&pamu0>;
	ranges;

	port1 {
		#address-cells = <2>;
		#size-cells = <2>;
		cell-index = <1>;
	};

	port2 {
		#address-cells = <2>;
		#size-cells = <2>;
		cell-index = <2>;
	};
};

&dcsr {
	dcsr-epu@0 {
		compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
	};
	dcsr-npc {
		compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
	};
	dcsr-dpaa@9000 {
		compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
	};
	dcsr-ocn@11000 {
		compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
	};
	dcsr-ddr@13000 {
		compatible = "fsl,dcsr-ddr";
		dev-handle = <&ddr2>;
		reg = <0x13000 0x1000>;
	};
	dcsr-nal@18000 {
		compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
	};
	dcsr-rcpm@22000 {
		compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
	};
	dcsr-snpc@30000 {
		compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
	};
	dcsr-snpc@31000 {
		compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
	};
	dcsr-cpu-sb-proxy@108000 {
		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
		cpu-handle = <&cpu1>;
		reg = <0x108000 0x1000 0x109000 0x1000>;
	};
	dcsr-cpu-sb-proxy@110000 {
		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
		cpu-handle = <&cpu2>;
		reg = <0x110000 0x1000 0x111000 0x1000>;
	};
	dcsr-cpu-sb-proxy@118000 {
		compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
		cpu-handle = <&cpu3>;
		reg = <0x118000 0x1000 0x119000 0x1000>;
	};
};

&soc {
	ddr2: memory-controller@9000 {
		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
		reg = <0x9000 0x1000>;
		interrupts = <16 2 1 9>;
	};

	cpc: l3-cache-controller@10000 {
		compatible = "fsl,b4860-l3-cache-controller", "cache";
	};

	corenet-cf@18000 {
		compatible = "fsl,corenet2-cf";
	};

/include/ "qoriq-fman3-0-1g-4.dtsi"
/include/ "qoriq-fman3-0-1g-5.dtsi"
/include/ "qoriq-fman3-0-10g-0.dtsi"
/include/ "qoriq-fman3-0-10g-1.dtsi"
	fman0: fman@400000 {
		/* tx - 1g - 4 */
		port@ac000 {
			fsl,qman-channel-id = <0x806>;
		};
		/* tx - 1g - 5 */
		port@ad000 {
			fsl,qman-channel-id = <0x807>;
		};
	};

	guts: global-utilities@e0000 {
		compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
	};

	clockgen: global-utilities@e1000 {
		compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0",
				   "fixed-clock";
		clock-output-names = "sysclk";
		#clock-cells = <0>;

		#address-cells = <1>;
		#size-cells = <0>;
		pll0: pll0@800 {
			#clock-cells = <1>;
			reg = <0x800>;
			compatible = "fsl,core-pll-clock";
			clocks = <&clockgen>;
			clock-output-names = "pll0", "pll0-div2", "pll0-div4";
		};
		pll1: pll1@820 {
			#clock-cells = <1>;
			reg = <0x820>;
			compatible = "fsl,core-pll-clock";
			clocks = <&clockgen>;
			clock-output-names = "pll1", "pll1-div2", "pll1-div4";
		};
		mux0: mux0@0 {
			#clock-cells = <0>;
			reg = <0x0>;
			compatible = "fsl,core-mux-clock";
			clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
				 <&pll1 0>, <&pll1 1>, <&pll1 2>;
			clock-names = "pll0_0", "pll0_1", "pll0_2",
				"pll1_0", "pll1_1", "pll1_2";
			clock-output-names = "cmux0";
		};
	};

	rcpm: global-utilities@e2000 {
		compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
	};

	L2: l2-cache-controller@c20000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xc20000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_2: l2-cache-controller@c60000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xc60000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_3: l2-cache-controller@ca0000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xca0000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_4: l2-cache-controller@ce0000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xce0000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_2: l2-cache-controller@c60000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xc60000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_3: l2-cache-controller@ca0000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xca0000 0x1000>;
		next-level-cache = <&cpc>;
	};

	L2_4: l2-cache-controller@ce0000 {
		compatible = "fsl,b4860-l2-cache-controller";
		reg = <0xce0000 0x1000>;
		next-level-cache = <&cpc>;
	};

/include/ "qoriq-rman-0.dtsi"
	rman: rman@1e0000 {
		fsl,qman-channels-id = <0x820 0x821>;
		interrupts = <16 2 1 20>;
	};
};