/*
 * P1021 RDB Core1 Device Tree Source in CAMP mode.
 *
 * Copyright 2011 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
 * can be shared, all the other devices must be assigned to one core only.
 * This dts allows core1 to have l2, eth2, serial1, crypto.
 *
 * Please note to add "-b 1" for core1's dts compiling.
 */

/include/ "p1021rdb-pc_32b.dts"

/ {
	model = "fsl,P1021RDB";
	compatible = "fsl,P1021RDB-PC";

	aliases {
		ethernet0 = &enet2;
		serial0 = &serial1;
		};

	cpus {
		PowerPC,P1021@0 {
			status = "disabled";
		};
	};

	memory {
		device_type = "memory";
	};

	localbus@ffe05000 {
		status = "disabled";
	};

	soc@ffe00000 {
		ecm-law@0 {
			status = "disabled";
		};

		ecm@1000 {
			status = "disabled";
		};

		memory-controller@2000 {
			status = "disabled";
		};

		i2c@3000 {
			status = "disabled";
		};

		i2c@3100 {
			status = "disabled";
		};

		serial0: serial@4500 {
			status = "disabled";
		};

		spi@7000 {
			status = "disabled";
		};

		gpio: gpio-controller@f000 {
			status = "disabled";
		};

		dma@21300 {
			status = "disabled";
		};

		mdio@24000 {
			phy0: ethernet-phy@0 {
				status = "disabled";
			};

			tbi0: tbi-phy@11 {
				status = "disabled";
			};
		};

		mdio@25000 {
			status = "disabled";
		};

		mdio@26000 {
			status = "disabled";
		};

		enet0: ethernet@b0000 {
			status = "disabled";
		};

		enet1: ethernet@b1000 {
			status = "disabled";
		};

		usb@22000 {
			status = "disabled";
		};

		sdhci@2e000 {
			status = "disabled";
		};

		crypto@30000 {
                        status = "disabled";
                };

		mpic: pic@40000 {
			protected-sources = <
			16 		/* ecm, mem, L2, pci0, pci1 */
			43 42 59	/* i2c, serial0, spi */
			47 63 62 	/* gpio, tdm */
			20 21 22 23	/* dma */
			03 02 		/* mdio */
			29 30 34	/* enet0-queue-group0 */
			17 18 24	/* enet0-queue-group1 */
			35 36 40	/* enet1-queue-group0 */
			51 52 67	/* enet1-queue-group1 */
			28 72 45 58 	/* usb, sdhci, crypto */
			0xb0 0xb1 0xb2	/* message */
			0xb3 0xb4 0xb5
			0xb6 0xb7
			0xe0 0xe1 0xe2	/* msi */
			0xe3 0xe4 0xe5
			0xe6 0xe7		/* sdhci, crypto , pci */
			>;
			pic-no-reset;
		};

		msi@41600 {
			status = "disabled";
		};

		global-utilities@e0000 {	//global utilities block
			status = "disabled";
		};
	};

	pci0: pcie@ffe09000 {
		status = "disabled";
	};

	pci1: pcie@ffe0a000 {
		status = "disabled";
	};
};