/* * T2080/T2081 QDS Device Tree Source * * Copyright 2013 Freescale Semiconductor Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * Neither the name of Freescale Semiconductor nor the * names of its contributors may be used to endorse or promote products * derived from this software without specific prior written permission. * * * ALTERNATIVELY, this software may be distributed under the terms of the * GNU General Public License ("GPL") as published by the Free Software * Foundation, either version 2 of that License or (at your option) any * later version. * * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ / { model = "fsl,T2080QDS"; compatible = "fsl,T2080QDS"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; ifc: localbus@ffe124000 { reg = <0xf 0xfe124000 0 0x2000>; ranges = <0 0 0xf 0xe8000000 0x08000000 2 0 0xf 0xff800000 0x00010000 3 0 0xf 0xffdf0000 0x00008000>; nor@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; bank-width = <2>; device-width = <1>; }; nand@2,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,ifc-nand"; reg = <0x2 0x0 0x10000>; }; boardctrl: board-control@3,0 { #address-cells = <1>; #size-cells = <1>; compatible = "fsl,paragon-fpga", "fsl,fpga-qixis"; reg = <3 0 0x300>; ranges = <0 3 0 0x300>; }; }; memory { device_type = "memory"; }; dcsr: dcsr@f00000000 { ranges = <0x00000000 0xf 0x00000000 0x01072000>; }; bportals: bman-portals@ff4000000 { ranges = <0x0 0xf 0xf4000000 0x2000000>; }; qportals: qman-portals@ff6000000 { ranges = <0x0 0xf 0xf6000000 0x2000000>; }; soc: soc@ffe000000 { ranges = <0x00000000 0xf 0xfe000000 0x1000000>; reg = <0xf 0xfe000000 0 0x00001000>; spi@110000 { flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "micron,n25q128a11"; /* 16MB */ reg = <0>; spi-max-frequency = <40000000>; /* input clock */ }; flash@1 { #address-cells = <1>; #size-cells = <1>; compatible = "sst,sst25wf040"; /* 512KB */ reg = <1>; spi-max-frequency = <35000000>; /* input clock */ }; flash@2 { #address-cells = <1>; #size-cells = <1>; compatible = "eon,en25s64"; /* 8MB */ reg = <2>; spi-max-frequency = <35000000>; /* input clock */ }; }; i2c@118000 { pca9547@77 { compatible = "nxp,pca9547"; reg = <0x77>; #address-cells = <1>; #size-cells = <0>; i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0x0>; eeprom@50 { compatible = "at24,24c512"; reg = <0x50>; }; eeprom@51 { compatible = "at24,24c02"; reg = <0x51>; }; eeprom@57 { compatible = "at24,24c02"; reg = <0x57>; }; rtc@68 { compatible = "dallas,ds3232"; reg = <0x68>; interrupts = <0xb 0x1 0 0>; }; }; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <0x1>; eeprom@55 { compatible = "at24,24c02"; reg = <0x55>; }; }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <0x2>; ina220@40 { compatible = "ti,ina220"; reg = <0x40>; shunt-resistor = <1000>; }; ina220@41 { compatible = "ti,ina220"; reg = <0x41>; shunt-resistor = <1000>; }; }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <0x3>; adt7461@4c { compatible = "adi,adt7461"; reg = <0x4c>; }; }; }; }; sdhc@114000 { voltage-ranges = <1800 1800 3300 3300>; }; }; pci0: pcie@ffe240000 { reg = <0xf 0xfe240000 0 0x10000>; ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; pci1: pcie@ffe250000 { reg = <0xf 0xfe250000 0 0x10000>; ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; pci2: pcie@ffe260000 { reg = <0xf 0xfe260000 0 0x1000>; ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; pci3: pcie@ffe270000 { reg = <0xf 0xfe270000 0 0x10000>; ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x10000000 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; pcie@0 { ranges = <0x02000000 0 0xe0000000 0x02000000 0 0xe0000000 0 0x20000000 0x01000000 0 0x00000000 0x01000000 0 0x00000000 0 0x00010000>; }; }; fsl,dpaa { compatible = "fsl,t2080-dpaa", "fsl,dpaa"; ethernet@0 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac1>; }; ethernet@1 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac2>; }; ethernet@2 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac3>; }; ethernet@3 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac4>; }; ethernet@4 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac5>; }; ethernet@5 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac6>; }; ethernet@8 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac9>; }; ethernet@9 { compatible = "fsl,t2080-dpa-ethernet", "fsl,dpa-ethernet"; fsl,fman-mac = <&fm1mac10>; }; }; };