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authorJayachandran C <jayachandranc@netlogicmicro.com>2011-11-16 00:21:20 (GMT)
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 22:04:55 (GMT)
commita3d4fb2d2a4c52b22cde90049a78e323cde187e5 (patch)
treee5ed7235b8f8a0b29b9aad11b4d1f57ef2f59809 /arch/mips/mm
parent0be3d9bb1460a87170a1b78b9ab12cb0ac02c2dc (diff)
downloadlinux-a3d4fb2d2a4c52b22cde90049a78e323cde187e5.tar.xz
MIPS: Netlogic: XLP CPU support.
Add support for Netlogic's XLP MIPS SoC. This patch adds: * XLP processor ID in cpu_probe.c and asm/cpu.h * XLP case to asm/module.h * CPU_XLP case to mm/tlbex.c * minor change to r4k cache handling to ignore XLP secondary cache * XLP cpu overrides to mach-netlogic/cpu-feature-overrides.h Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2966/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/c-r4k.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index a79fe9a..4f9eb0b 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1235,6 +1235,9 @@ static void __cpuinit setup_scache(void)
loongson2_sc_init();
return;
#endif
+ case CPU_XLP:
+ /* don't need to worry about L2, fully coherent */
+ return;
default:
if (c->isa_level == MIPS_CPU_ISA_M32R1 ||