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author | Andre Przywara <andre.przywara@arm.com> | 2014-06-03 08:13:13 (GMT) |
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committer | Christoffer Dall <christoffer.dall@linaro.org> | 2015-01-20 17:25:32 (GMT) |
commit | 6d52f35af10cf24d59b43f3fd8c938ad23cab543 (patch) | |
tree | c20bda289d5090b4a4411a53b0a9a346ffa3df1b /include/kvm/arm_vgic.h | |
parent | 7e5802781c3e109558ddfd8b02155ad24d872ee7 (diff) | |
download | linux-6d52f35af10cf24d59b43f3fd8c938ad23cab543.tar.xz |
arm64: KVM: add SGI generation register emulation
While the generation of a (virtual) inter-processor interrupt (SGI)
on a GICv2 works by writing to a MMIO register, GICv3 uses the system
register ICC_SGI1R_EL1 to trigger them.
Add a trap handler function that calls the new SGI register handler
in the GICv3 code. As ICC_SRE_EL1.SRE at this point is still always 0,
this will not trap yet, but will only be used later when all the data
structures have been initialized properly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'include/kvm/arm_vgic.h')
-rw-r--r-- | include/kvm/arm_vgic.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 98c3016..b9b2e05 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -307,6 +307,7 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu); void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu); int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num, bool level); +void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg); int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu); bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run, struct kvm_exit_mmio *mmio); |