From 320167182dc3e351d2608cb7dccde12a47e3f51d Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Sun, 30 Dec 2007 12:45:40 +0100 Subject: [MIPS] Wrong CONFIG option prevents setup of DMA zone. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index ae76795..810535d 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -45,7 +45,7 @@ static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp) /* ignore region specifiers */ gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); -#ifdef CONFIG_ZONE_DMA32 +#ifdef CONFIG_ZONE_DMA if (dev == NULL) gfp |= __GFP_DMA; else if (dev->coherent_dma_mask < DMA_BIT_MASK(24)) -- cgit v0.10.2 From 1b1c5f0d96eb05cf6cd4702dabf4e003eded08c2 Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Thu, 10 Jan 2008 17:10:05 +0300 Subject: [MIPS] pnx8xxx: move to clocksource This patch converts PNX8XXX system timer to clocksource restoring PNX8550 support back to live. Signed-off-by: Vitaly Wool Signed-off-by: Ralf Baechle diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index e818fd0..6d494e0 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include @@ -41,11 +40,60 @@ static cycle_t hpt_read(void) return read_c0_count2(); } +static struct clocksource pnx_clocksource = { + .name = "pnx8xxx", + .rating = 200, + .read = hpt_read, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + static void timer_ack(void) { write_c0_compare(cpj); } +static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *c = dev_id; + + /* clear MATCH, signal the event */ + c->event_handler(c); + + return IRQ_HANDLED; +} + +static struct irqaction pnx8xxx_timer_irq = { + .handler = pnx8xxx_timer_interrupt, + .flags = IRQF_DISABLED | IRQF_PERCPU, + .name = "pnx8xxx_timer", +}; + +static irqreturn_t monotonic_interrupt(int irq, void *dev_id) +{ + /* Timer 2 clear interrupt */ + write_c0_compare2(-1); + return IRQ_HANDLED; +} + +static struct irqaction monotonic_irqaction = { + .handler = monotonic_interrupt, + .flags = IRQF_DISABLED, + .name = "Monotonic timer", +}; + +static int pnx8xxx_set_next_event(unsigned long delta, + struct clock_event_device *evt) +{ + write_c0_compare(delta); + return 0; +} + +static struct clock_event_device pnx8xxx_clockevent = { + .name = "pnx8xxx_clockevent", + .features = CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = pnx8xxx_set_next_event, +}; + /* * plat_time_init() - it does the following things: * @@ -58,11 +106,34 @@ static void timer_ack(void) __init void plat_time_init(void) { + unsigned int configPR; unsigned int n; unsigned int m; unsigned int p; unsigned int pow2p; + clockevents_register_device(&pnx8xxx_clockevent); + clocksource_register(&pnx_clocksource); + + setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq); + setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction); + + /* Timer 1 start */ + configPR = read_c0_config7(); + configPR &= ~0x00000008; + write_c0_config7(configPR); + + /* Timer 2 start */ + configPR = read_c0_config7(); + configPR &= ~0x00000010; + write_c0_config7(configPR); + + /* Timer 3 stop */ + configPR = read_c0_config7(); + configPR |= 0x00000020; + write_c0_config7(configPR); + + /* PLL0 sets MIPS clock (PLL1 <=> TM1, PLL6 <=> TM2, PLL5 <=> mem) */ /* (but only if CLK_MIPS_CTL select value [bits 3:1] is 1: FIXME) */ @@ -87,42 +158,6 @@ __init void plat_time_init(void) write_c0_count2(0); write_c0_compare2(0xffffffff); - clocksource_mips.read = hpt_read; - mips_timer_ack = timer_ack; -} - -static irqreturn_t monotonic_interrupt(int irq, void *dev_id) -{ - /* Timer 2 clear interrupt */ - write_c0_compare2(-1); - return IRQ_HANDLED; } -static struct irqaction monotonic_irqaction = { - .handler = monotonic_interrupt, - .flags = IRQF_DISABLED, - .name = "Monotonic timer", -}; -void __init plat_timer_setup(struct irqaction *irq) -{ - int configPR; - - setup_irq(PNX8550_INT_TIMER1, irq); - setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction); - - /* Timer 1 start */ - configPR = read_c0_config7(); - configPR &= ~0x00000008; - write_c0_config7(configPR); - - /* Timer 2 start */ - configPR = read_c0_config7(); - configPR &= ~0x00000010; - write_c0_config7(configPR); - - /* Timer 3 stop */ - configPR = read_c0_config7(); - configPR |= 0x00000020; - write_c0_config7(configPR); -} -- cgit v0.10.2 From 84c21e254205ecac98f75b01589996440c6a6db0 Mon Sep 17 00:00:00 2001 From: Dmitri Vorobiev Date: Tue, 8 Jan 2008 06:44:00 +0300 Subject: [MIPS] Malta: Fix software reset on big endian I noticed that the commit f197465384bf7ef1af184c2ed1a4e268911a91e3 (MIPS Tech: Get rid of volatile in core code) broke the software reset functionality for MIPS Malta boards in big-endian mode. According to the MIPS Malta board user's manual, writing the magic 32-bit GORESET value into the SOFTRES register initiates board soft reset. My experimentation has shown that the endianness of the GORESET integer should thereby be the same as the endianness, which has been set for the CPU itself. The writew() function used to write the magic value in the code introduced by the commit mentioned above, however, swaps bytes for big-endian kernels and transfers 16 bits instead of 32. The patch below replaces the writew() function by the __raw_writel() routine, which leaves the byte order intact and transfers the whole MIPS machine word. Trivial code cleanup (replacing spaces by a tab and cutting oversized lines to make checkpatch.pl happy) is also included. The patch was tested using a Malta evaluation board running in both BE and LE modes. For both modes, software reset was fully functional after the change. P.S. I suspect that the same commit broke the "standby" functionality for MIPS Atlas boards. However, I did not touch the Atlas code as I don't have such board at my disposal and also because the linux-mips.org Web site claims that Atlas support is scheduled for removal. Signed-off-by: Dmitri Vorobiev Signed-off-by: Ralf Baechle diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c index 7a1bb51..583d468 100644 --- a/arch/mips/mips-boards/generic/reset.c +++ b/arch/mips/mips-boards/generic/reset.c @@ -39,16 +39,18 @@ static void atlas_machine_power_off(void); static void mips_machine_restart(char *command) { - unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int)); + unsigned int __iomem *softres_reg = + ioremap(SOFTRES_REG, sizeof(unsigned int)); - writew(GORESET, softres_reg); + __raw_writel(GORESET, softres_reg); } static void mips_machine_halt(void) { - unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int)); + unsigned int __iomem *softres_reg = + ioremap(SOFTRES_REG, sizeof(unsigned int)); - writew(GORESET, softres_reg); + __raw_writel(GORESET, softres_reg); } #if defined(CONFIG_MIPS_ATLAS) -- cgit v0.10.2 From 778bc145feb68f365339d6b5c9e35af2a86fb233 Mon Sep 17 00:00:00 2001 From: WANG Cong Date: Wed, 2 Jan 2008 14:21:36 +0800 Subject: [MIPS] Lasat: Fix built in separate object directory. Signed-off-by: WANG Cong [Ralf: The LDSCRIPT script needed fixing, too] Signed-off-by: Ralf Baechle diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile index 5332449..460626b 100644 --- a/arch/mips/lasat/image/Makefile +++ b/arch/mips/lasat/image/Makefile @@ -12,11 +12,11 @@ endif MKLASATIMG = mklasatimg MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200 -KERNEL_IMAGE = $(TOPDIR)/vmlinux +KERNEL_IMAGE = vmlinux KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ ) KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ ) -LDSCRIPT= -L$(obj) -Tromscript.normal +LDSCRIPT= -L$(srctree)/$(src) -Tromscript.normal HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ -D_kernel_entry=0x$(KERNEL_ENTRY) \ @@ -24,7 +24,7 @@ HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \ -D TIMESTAMP=$(shell date +%s) $(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE) - $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $< + $(CC) -fno-pic $(HEAD_DEFINES) $(LINUXINCLUDE) -c -o $@ $< OBJECTS = head.o kImage.o -- cgit v0.10.2 From e452e94e21e8f4a3c2ff045b301ca21c1f6d03bf Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 8 Jan 2008 00:41:13 +0900 Subject: [MIPS] Replace 40c7869b693b18412491fdcff64682215b739f9e kludge Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 7f6ddcb..f8a535a 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -269,7 +269,7 @@ static void __init bootmem_init(void) static void __init bootmem_init(void) { - unsigned long init_begin, reserved_end; + unsigned long reserved_end; unsigned long mapstart = ~0UL; unsigned long bootmap_size; int i; @@ -344,7 +344,6 @@ static void __init bootmem_init(void) min_low_pfn, max_low_pfn); - init_begin = PFN_UP(__pa_symbol(&__init_begin)); for (i = 0; i < boot_mem_map.nr_map; i++) { unsigned long start, end; @@ -352,8 +351,8 @@ static void __init bootmem_init(void) end = PFN_DOWN(boot_mem_map.map[i].addr + boot_mem_map.map[i].size); - if (start <= init_begin) - start = init_begin; + if (start <= min_low_pfn) + start = min_low_pfn; if (start >= end) continue; diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index 2c5c27c8..dc272c1 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c @@ -169,7 +169,6 @@ void __init prom_meminit(void) void __init prom_free_prom_memory(void) { -#if 0 /* for now ... */ unsigned long addr; int i; @@ -181,5 +180,4 @@ void __init prom_free_prom_memory(void) free_init_pages("prom memory", addr, addr + boot_mem_map.map[i].size); } -#endif } -- cgit v0.10.2