From db91fb2cf4aeec274fdacef9a7ad48294baf6e7e Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Sat, 21 Jun 2014 21:50:14 +0900 Subject: ARM: dts: Enable audio support for exynos5800-peach-pi Peach-pi board has MAX98091 audio codec connected on HSI2C-7 bus. Signed-off-by: Tushar Behera Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index f3af207..ef94ab8 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -57,6 +57,13 @@ pinctrl-names = "default"; }; + sound { + compatible = "google,snow-audio-max98091"; + + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98091>; + }; + usb300_vbus_reg: regulator-usb300 { compatible = "regulator-fixed"; regulator-name = "P5.0V_USB3CON0"; @@ -81,6 +88,13 @@ }; &pinctrl_0 { + max98091_irq: max98091-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + tpm_irq: tpm-irq { samsung,pins = "gpx1-0"; samsung,pin-function = <0>; @@ -207,6 +221,19 @@ samsung,invert-vclk; }; +&hsi2c_7 { + status = "okay"; + + max98091: codec@10 { + compatible = "maxim,max98091"; + reg = <0x10>; + interrupts = <2 0>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98091_irq>; + }; +}; + &hsi2c_9 { status = "okay"; clock-frequency = <400000>; @@ -251,3 +278,7 @@ &watchdog { timeout-sec = <32>; }; + +&i2s0 { + status = "okay"; +}; -- cgit v0.10.2 From 522c8ff5c3204f566f10388b96d0c6e6c51e69fe Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Sat, 21 Jun 2014 21:50:17 +0900 Subject: ARM: dts: Sort nodes within Peach-pit/Peach-pi dts files Peach-pit and Peach-pi boards are almost similar, hence the DTS file is also very similar. Sorting nodes in both these files will allow us to figure out the difference easily. All the node aliases are sorted in alphabetically increasing order. There is no functional change with this patch. Signed-off-by: Tushar Behera Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 1c5b8f9..7649982 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -25,8 +25,13 @@ "google,pit", "google,peach","samsung,exynos5420", "samsung,exynos5"; - memory { - reg = <0x20000000 0x80000000>; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; }; fixed-rate-clocks { @@ -50,13 +55,8 @@ }; }; - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 1000000 0>; - brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; - default-brightness-level = <7>; - pinctrl-0 = <&pwm0_out>; - pinctrl-names = "default"; + memory { + reg = <0x20000000 0x80000000>; }; sound { @@ -89,64 +89,83 @@ }; }; -&pinctrl_0 { - max98090_irq: max98090-irq { - samsung,pins = "gpx0-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; +&dp { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x06>; + samsung,lane-count = <2>; + samsung,hpd-gpio = <&gpx2 6 0>; - tpm_irq: tpm-irq { - samsung,pins = "gpx1-0"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; + display-timings { + native-mode = <&timing1>; - power_key_irq: power-key-irq { - samsung,pins = "gpx1-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + timing1: timing@1 { + clock-frequency = <70589280>; + hactive = <1366>; + vactive = <768>; + hfront-porch = <40>; + hback-porch = <40>; + hsync-len = <32>; + vback-porch = <10>; + vfront-porch = <12>; + vsync-len = <6>; + }; }; +}; - hdmi_hpd_irq: hdmi-hpd-irq { - samsung,pins = "gpx3-7"; - samsung,pin-function = <0>; - samsung,pin-pud = <1>; - samsung,pin-drv = <0>; - }; +&fimd { + status = "okay"; + samsung,invert-vclk; +}; - dp_hpd_gpio: dp_hpd_gpio { - samsung,pins = "gpx2-6"; - samsung,pin-function = <0>; - samsung,pin-pud = <3>; - samsung,pin-drv = <0>; - }; +&hdmi { + status = "okay"; + hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; }; -&pinctrl_3 { - usb300_vbus_en: usb300-vbus-en { - samsung,pins = "gph0-0"; - samsung,pin-function = <1>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; +&hsi2c_7 { + status = "okay"; + + max98090: codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupts = <2 0>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98090_irq>; }; +}; - usb301_vbus_en: usb301-vbus-en { - samsung,pins = "gph0-1"; - samsung,pin-function = <1>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; +&hsi2c_9 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; }; }; -&rtc { +&i2c_2 { status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + samsung,i2c-slave-addr = <0x50>; }; -&uart_3 { +&i2s0 { status = "okay"; }; @@ -189,46 +208,66 @@ }; }; -&hsi2c_7 { - status = "okay"; - max98090: codec@10 { - compatible = "maxim,max98090"; - reg = <0x10>; - interrupts = <2 0>; - interrupt-parent = <&gpx0>; - pinctrl-names = "default"; - pinctrl-0 = <&max98090_irq>; +&pinctrl_0 { + max98090_irq: max98090-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; }; -}; -&hsi2c_9 { - status = "okay"; - clock-frequency = <400000>; + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; - tpm@20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; - /* Unused irq; but still need to configure the pins */ - pinctrl-names = "default"; - pinctrl-0 = <&tpm_irq>; + dp_hpd_gpio: dp_hpd_gpio { + samsung,pins = "gpx2-6"; + samsung,pin-function = <0>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; }; }; -&i2c_2 { +&pinctrl_3 { + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gph0-0"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gph0-1"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; +}; + +&rtc { status = "okay"; - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <66000>; - samsung,i2c-slave-addr = <0x50>; }; -&hdmi { +&uart_3 { status = "okay"; - hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_hpd_irq>; - ddc = <&i2c_2>; }; &usbdrd_phy0 { @@ -248,40 +287,3 @@ timeout-sec = <32>; }; -&i2s0 { - status = "okay"; -}; - -&fimd { - status = "okay"; - samsung,invert-vclk; -}; - -&dp { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dp_hpd_gpio>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - samsung,link-rate = <0x06>; - samsung,lane-count = <2>; - samsung,hpd-gpio = <&gpx2 6 0>; - - display-timings { - native-mode = <&timing1>; - - timing1: timing@1 { - clock-frequency = <70589280>; - hactive = <1366>; - vactive = <768>; - hfront-porch = <40>; - hback-porch = <40>; - hsync-len = <32>; - vback-porch = <10>; - vfront-porch = <12>; - vsync-len = <6>; - }; - }; -}; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index ef94ab8..2c2c137 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -23,8 +23,13 @@ "google,pi", "google,peach", "samsung,exynos5800", "samsung,exynos5"; - memory { - reg = <0x20000000 0x80000000>; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; }; fixed-rate-clocks { @@ -48,13 +53,8 @@ }; }; - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 1000000 0>; - brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; - default-brightness-level = <7>; - pinctrl-0 = <&pwm0_out>; - pinctrl-names = "default"; + memory { + reg = <0x20000000 0x80000000>; }; sound { @@ -87,64 +87,83 @@ }; }; -&pinctrl_0 { - max98091_irq: max98091-irq { - samsung,pins = "gpx0-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; +&dp { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <2>; + samsung,hpd-gpio = <&gpx2 6 0>; - tpm_irq: tpm-irq { - samsung,pins = "gpx1-0"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; + display-timings { + native-mode = <&timing1>; - power_key_irq: power-key-irq { - samsung,pins = "gpx1-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; + timing1: timing@1 { + clock-frequency = <150660000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <60>; + hback-porch = <172>; + hsync-len = <80>; + vback-porch = <25>; + vfront-porch = <10>; + vsync-len = <10>; + }; }; +}; - dp_hpd_gpio: dp_hpd_gpio { - samsung,pins = "gpx2-6"; - samsung,pin-function = <0>; - samsung,pin-pud = <3>; - samsung,pin-drv = <0>; - }; +&fimd { + status = "okay"; + samsung,invert-vclk; +}; - hdmi_hpd_irq: hdmi-hpd-irq { - samsung,pins = "gpx3-7"; - samsung,pin-function = <0>; - samsung,pin-pud = <1>; - samsung,pin-drv = <0>; - }; +&hdmi { + status = "okay"; + hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; }; -&pinctrl_3 { - usb300_vbus_en: usb300-vbus-en { - samsung,pins = "gph0-0"; - samsung,pin-function = <1>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; +&hsi2c_7 { + status = "okay"; + + max98091: codec@10 { + compatible = "maxim,max98091"; + reg = <0x10>; + interrupts = <2 0>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98091_irq>; }; +}; - usb301_vbus_en: usb301-vbus-en { - samsung,pins = "gph0-1"; - samsung,pin-function = <1>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; +&hsi2c_9 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; }; }; -&rtc { +&i2c_2 { status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + samsung,i2c-slave-addr = <0x50>; }; -&uart_3 { +&i2s0 { status = "okay"; }; @@ -187,79 +206,66 @@ }; }; -&dp { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&dp_hpd_gpio>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - samsung,link-rate = <0x0a>; - samsung,lane-count = <2>; - samsung,hpd-gpio = <&gpx2 6 0>; - display-timings { - native-mode = <&timing1>; +&pinctrl_0 { + max98091_irq: max98091-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; - timing1: timing@1 { - clock-frequency = <150660000>; - hactive = <1920>; - vactive = <1080>; - hfront-porch = <60>; - hback-porch = <172>; - hsync-len = <80>; - vback-porch = <25>; - vfront-porch = <10>; - vsync-len = <10>; - }; + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; }; -}; -&fimd { - status = "okay"; - samsung,invert-vclk; -}; + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; -&hsi2c_7 { - status = "okay"; + dp_hpd_gpio: dp_hpd_gpio { + samsung,pins = "gpx2-6"; + samsung,pin-function = <0>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; - max98091: codec@10 { - compatible = "maxim,max98091"; - reg = <0x10>; - interrupts = <2 0>; - interrupt-parent = <&gpx0>; - pinctrl-names = "default"; - pinctrl-0 = <&max98091_irq>; + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; }; }; -&hsi2c_9 { - status = "okay"; - clock-frequency = <400000>; +&pinctrl_3 { + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gph0-0"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; - tpm@20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; - /* Unused irq; but still need to configure the pins */ - pinctrl-names = "default"; - pinctrl-0 = <&tpm_irq>; + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gph0-1"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; }; }; -&i2c_2 { +&rtc { status = "okay"; - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <66000>; - samsung,i2c-slave-addr = <0x50>; }; -&hdmi { +&uart_3 { status = "okay"; - hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_hpd_irq>; - ddc = <&i2c_2>; }; &usbdrd_phy0 { @@ -279,6 +285,3 @@ timeout-sec = <32>; }; -&i2s0 { - status = "okay"; -}; -- cgit v0.10.2 From 22298d6a85cd7c5c037dd9f3b72e8234c3f09434 Mon Sep 17 00:00:00 2001 From: Andreas Faerber Date: Tue, 8 Jul 2014 08:17:14 +0900 Subject: ARM: dts: Fill in CPU clock-frequency for exynos5410 It's 1.6 GHz for the Cortex-A15. Avoids warnings like "/cpus/cpu@0 missing clock-frequency property". Signed-off-by: Andreas Faerber Reviewed-by: Tarek Dakhran Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 3839c26..9d0b8cc 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -28,24 +28,28 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clock-frequency = <1600000000>; }; CPU1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x1>; + clock-frequency = <1600000000>; }; CPU2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x2>; + clock-frequency = <1600000000>; }; CPU3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x3>; + clock-frequency = <1600000000>; }; }; -- cgit v0.10.2 From a8d80b6be83a45c80295cac6e9b9f4d6a279321f Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Tue, 8 Jul 2014 08:20:08 +0900 Subject: ARM: dts: Add sound-card name for Snow/Peach-Pit/Peach-Pi Add sound-card name property to Snow/Peach-Pit/Peach-Pi boards. Signed-off-by: Tushar Behera Acked-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 079fdf9..6c36d41 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -351,6 +351,7 @@ sound { compatible = "google,snow-audio-max98095"; + samsung,model = "Snow-I2S-MAX98095"; samsung,i2s-controller = <&i2s0>; samsung,audio-codec = <&max98095>; }; diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 7649982..6c7cab0 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -62,6 +62,7 @@ sound { compatible = "google,snow-audio-max98090"; + samsung,model = "Peach-Pit-I2S-MAX98090"; samsung,i2s-controller = <&i2s0>; samsung,audio-codec = <&max98090>; }; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 2c2c137..28f2a25 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -60,6 +60,7 @@ sound { compatible = "google,snow-audio-max98091"; + samsung,model = "Peach-Pi-I2S-MAX98091"; samsung,i2s-controller = <&i2s0>; samsung,audio-codec = <&max98091>; }; -- cgit v0.10.2 From ac5ce09e140c0238a8fb61d1c198ce9945e8be47 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Wed, 16 Jul 2014 02:38:39 +0900 Subject: ARM: dts: Add mask-tpm-reset node in exynos5420-peach-pit The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from being reset across sleep/wake. If we don't set it to anything then the TPM will be reset. U-Boot will detect this as invalid and will reset the system on resume time. This GPIO can always be low and not hurt anything. It will get pulled back high again during a normal warm reset when it will default back to an input. To properly preserve the TPM state across suspend/resume and to make the chrome U-Boot happy, properly set the GPIO to mask the reset to the TPM. Signed-off-by: Doug Anderson Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 6c7cab0..c7b2bba 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -211,6 +211,9 @@ &pinctrl_0 { + pinctrl-names = "default"; + pinctrl-0 = <&mask_tpm_reset>; + max98090_irq: max98090-irq { samsung,pins = "gpx0-2"; samsung,pin-function = <0>; @@ -218,6 +221,15 @@ samsung,pin-drv = <0>; }; + /* We need GPX0_6 to be low at sleep time; just keep it low always */ + mask_tpm_reset: mask-tpm-reset { + samsung,pins = "gpx0-6"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + samsung,pin-val = <0>; + }; + tpm_irq: tpm-irq { samsung,pins = "gpx1-0"; samsung,pin-function = <0>; -- cgit v0.10.2 From 73a9bb2e7a48bb47c092f407812a0100c79d5180 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 16 Jul 2014 02:38:44 +0900 Subject: ARM: dts: Add mask-tpm-reset node in exynos5800-peach-pi The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from being reset across sleep/wake. If we don't set it to anything then the TPM will be reset. U-Boot will detect this as invalid and will reset the system on resume time. This GPIO can always be low and not hurt anything. It will get pulled back high again during a normal warm reset when it will default back to an input. To properly preserve the TPM state across suspend/resume and to make the chrome U-Boot happy, properly set the GPIO to mask the reset to the TPM. Signed-off-by: Vikas Sajjan Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 28f2a25..0bc97d9 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -209,6 +209,9 @@ &pinctrl_0 { + pinctrl-names = "default"; + pinctrl-0 = <&mask_tpm_reset>; + max98091_irq: max98091-irq { samsung,pins = "gpx0-2"; samsung,pin-function = <0>; @@ -216,6 +219,15 @@ samsung,pin-drv = <0>; }; + /* We need GPX0_6 to be low at sleep time; just keep it low always */ + mask_tpm_reset: mask-tpm-reset { + samsung,pins = "gpx0-6"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + samsung,pin-val = <0>; + }; + tpm_irq: tpm-irq { samsung,pins = "gpx1-0"; samsung,pin-function = <0>; -- cgit v0.10.2 From 366126d5c6a5d9381a5f6a4e061ad0aba33e789e Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:06 +0900 Subject: ARM: dts: add port sub-nodes to exynos usb host modules for exynos4 This patch adds port sub-nodes to exynos4 ehci and ohci modules, which are required by recently merged new exynos4 usb2 phy support. Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index b8ece4b..c912844 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -322,6 +322,23 @@ clocks = <&clock CLK_USB_HOST>; clock-names = "usbhost"; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + phys = <&exynos_usbphy 1>; + status = "disabled"; + }; + port@1 { + reg = <1>; + phys = <&exynos_usbphy 2>; + status = "disabled"; + }; + port@2 { + reg = <2>; + phys = <&exynos_usbphy 3>; + status = "disabled"; + }; }; ohci@12590000 { @@ -331,6 +348,13 @@ clocks = <&clock CLK_USB_HOST>; clock-names = "usbhost"; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + phys = <&exynos_usbphy 1>; + status = "disabled"; + }; }; i2s1: i2s@13960000 { -- cgit v0.10.2 From 0c80244f25de719814ef010633ccf6d3b2f1192a Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:06 +0900 Subject: ARM: dts: enable common hardware blocks for exynos4412-odroidx This patch adds support for common hardware modules available on all Exynos4412-based Odroid boards, which already have complete support in mainline kernel. This includes secure firmware calls, watchdog, g2d and fimc (mem2mem) multimedia accelerators. Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 31db28a..fda9ac23 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -22,6 +22,11 @@ reg = <0x40000000 0x40000000>; }; + firmware@0204F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0204F000 0x1000>; + }; + leds { compatible = "gpio-leds"; led1 { @@ -68,10 +73,40 @@ regulator-boot-on; }; + watchdog@10060000 { + status = "okay"; + }; + rtc@10070000 { status = "okay"; }; + g2d@10800000 { + status = "okay"; + }; + + camera { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <>; + + fimc_0: fimc@11800000 { + status = "okay"; + }; + + fimc_1: fimc@11810000 { + status = "okay"; + }; + + fimc_2: fimc@11820000 { + status = "okay"; + }; + + fimc_3: fimc@11830000 { + status = "okay"; + }; + }; + sdhci@12530000 { bus-width = <4>; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; -- cgit v0.10.2 From 5eb3019355517c43d13ed989212346f1406dbb48 Mon Sep 17 00:00:00 2001 From: Kamil Debski Date: Wed, 16 Jul 2014 02:54:06 +0900 Subject: ARM: dts: add support for USB phy, host and device for exynos4412-odroidx This patch adds basic support for USB modules (host and device) on OdroidX board. Signed-off-by: Kamil Debski [removed incorrect port@2 node] Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index fda9ac23..4c853fb 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -148,6 +148,16 @@ pinctrl-names = "default"; status = "okay"; + usb3503@08 { + compatible = "smsc,usb3503"; + reg = <0x08>; + + intn-gpios = <&gpx3 0 0>; + connect-gpios = <&gpx3 4 0>; + reset-gpios = <&gpx3 5 0>; + initial-mode = <1>; + }; + max77686: pmic@09 { compatible = "maxim,max77686"; reg = <0x09>; @@ -338,4 +348,21 @@ }; }; }; + + exynos-usbphy@125B0000 { + status = "okay"; + }; + + hsotg@12480000 { + status = "okay"; + vusb_d-supply = <&ldo15_reg>; + vusb_a-supply = <&ldo12_reg>; + }; + + ehci@12580000 { + status = "okay"; + port@1 { + status = "okay"; + }; + }; }; -- cgit v0.10.2 From f9e45a69b7bb2d436741f79fc5a372c104f7b68b Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:06 +0900 Subject: ARM: dts: correct memory size for exynos4412-odroidx Last megabyte of RAM is used by secure firmware and should not be accessed by Linux kernel, so correct available memory size in DTS file. Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 4c853fb..bcf3315 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -19,7 +19,7 @@ compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4"; memory { - reg = <0x40000000 0x40000000>; + reg = <0x40000000 0x3FF00000>; }; firmware@0204F000 { -- cgit v0.10.2 From ec601ff3394af5045cbfbd02b2e0197a93b97723 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:07 +0900 Subject: ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3 This patch moves some parts of exynos4412-odroidx.dts to common exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz instead of 1.4GHz), while U2/U3 differs from X2 by different way of routing signals to host USB hub. It also lacks some hw modules not yet supported by those dts files (i.e. LCD & touch panel). Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 5986ff63..28b3549 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -66,7 +66,9 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ exynos4210-universal_c210.dtb \ + exynos4412-odroidu3.dtb \ exynos4412-odroidx.dtb \ + exynos4412-odroidx2.dtb \ exynos4412-origen.dtb \ exynos4412-smdk4412.dtb \ exynos4412-tiny4412.dtb \ diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi new file mode 100644 index 0000000..f793f3b --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -0,0 +1,319 @@ +/* + * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards + * device tree source + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412.dtsi" + +/ { + firmware@0204F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0204F000 0x1000>; + }; + + mmc@12550000 { + pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; + pinctrl-names = "default"; + vmmc-supply = <&ldo20_reg &buck8_reg>; + status = "okay"; + + num-slots = <1>; + supports-highspeed; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; + }; + + watchdog@10060000 { + status = "okay"; + }; + + rtc@10070000 { + status = "okay"; + }; + + g2d@10800000 { + status = "okay"; + }; + + camera { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <>; + + fimc_0: fimc@11800000 { + status = "okay"; + }; + + fimc_1: fimc@11810000 { + status = "okay"; + }; + + fimc_2: fimc@11820000 { + status = "okay"; + }; + + fimc_3: fimc@11830000 { + status = "okay"; + }; + }; + + sdhci@12530000 { + bus-width = <4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + pinctrl-names = "default"; + vmmc-supply = <&ldo4_reg &ldo21_reg>; + status = "okay"; + }; + + serial@13800000 { + status = "okay"; + }; + + serial@13810000 { + status = "okay"; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti"; + clock-frequency = <24000000>; + }; + }; + + i2c@13860000 { + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + status = "okay"; + + usb3503: usb3503@08 { + compatible = "smsc,usb3503"; + reg = <0x08>; + + intn-gpios = <&gpx3 0 0>; + connect-gpios = <&gpx3 4 0>; + reset-gpios = <&gpx3 5 0>; + initial-mode = <1>; + }; + + max77686: pmic@09 { + compatible = "maxim,max77686"; + reg = <0x09>; + #clock-cells = <1>; + + voltage-regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDDQ_M1_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "VDDQ_EXT_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDDQ_MMC2_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5_reg: LDO5 { + regulator-name = "VDDQ_MMC1_3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "VDD10_MPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD10_XPLL_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD18_ABB1_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "VDD33_USB_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "VDDQ_C2C_W_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo14_reg: LDO14 { + regulator-name = "VDD18_ABB0_2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "VDD10_HSIC_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "VDD18_HSIC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo20_reg: LDO20 { + regulator-name = "LDO20_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "LDO21_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo25_reg: LDO25 { + regulator-name = "VDDQ_LCD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-microvolt-offset = <50000>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDDQ_CKEM1_2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "BUCK6_1.35V"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "BUCK7_2.0V"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "BUCK8_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + }; + }; + }; + + exynos-usbphy@125B0000 { + status = "okay"; + }; + + hsotg@12480000 { + status = "okay"; + vusb_d-supply = <&ldo15_reg>; + vusb_a-supply = <&ldo12_reg>; + }; + + ehci: ehci@12580000 { + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts new file mode 100644 index 0000000..287aa0d --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -0,0 +1,49 @@ +/* + * Hardkernel's Exynos4412 based ODROID-U3 board device tree source + * + * Copyright (c) 2014 Marek Szyprowski + * + * Device tree source file for Hardkernel's ODROID-U3 board which is based + * on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos4412-odroid-common.dtsi" + +/ { + model = "Hardkernel ODROID-U3 board based on Exynos4412"; + compatible = "hardkernel,odroid-u3", "samsung,exynos4412", "samsung,exynos4"; + + memory { + reg = <0x40000000 0x7FF00000>; + }; + + leds { + compatible = "gpio-leds"; + led1 { + label = "led1:heart"; + gpios = <&gpc1 0 1>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&usb3503 { + clock-names = "refclk"; + clocks = <&pmu_system_controller 0>; + refclk-frequency = <24000000>; +}; + +&ehci { + port@1 { + status = "okay"; + }; + port@2 { + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index bcf3315..8b453a3 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -3,8 +3,8 @@ * * Copyright (c) 2012 Dongjin Kim * - * Device tree source file for Hardkernel's ODROID-X board which is based on - * Samsung's Exynos4412 SoC. + * Device tree source file for Hardkernel's ODROID-X board which is based + * on Samsung's Exynos4412 SoC. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -12,7 +12,7 @@ */ /dts-v1/; -#include "exynos4412.dtsi" +#include "exynos4412-odroid-common.dtsi" / { model = "Hardkernel ODROID-X board based on Exynos4412"; @@ -22,11 +22,6 @@ reg = <0x40000000 0x3FF00000>; }; - firmware@0204F000 { - compatible = "samsung,secure-firmware"; - reg = <0x0204F000 0x1000>; - }; - leds { compatible = "gpio-leds"; led1 { @@ -43,24 +38,12 @@ }; }; - mmc@12550000 { - pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; - pinctrl-names = "default"; - vmmc-supply = <&ldo20_reg &buck8_reg>; + serial@13820000 { status = "okay"; + }; - num-slots = <1>; - supports-highspeed; - broken-cd; - card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; - - slot@0 { - reg = <0>; - bus-width = <8>; - }; + serial@13830000 { + status = "okay"; }; regulator_p3v3 { @@ -70,299 +53,12 @@ regulator-max-microvolt = <3300000>; gpio = <&gpa1 1 1>; enable-active-high; - regulator-boot-on; - }; - - watchdog@10060000 { - status = "okay"; - }; - - rtc@10070000 { - status = "okay"; - }; - - g2d@10800000 { - status = "okay"; - }; - - camera { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <>; - - fimc_0: fimc@11800000 { - status = "okay"; - }; - - fimc_1: fimc@11810000 { - status = "okay"; - }; - - fimc_2: fimc@11820000 { - status = "okay"; - }; - - fimc_3: fimc@11830000 { - status = "okay"; - }; - }; - - sdhci@12530000 { - bus-width = <4>; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; - pinctrl-names = "default"; - vmmc-supply = <&ldo4_reg &ldo21_reg>; - status = "okay"; - }; - - serial@13800000 { - status = "okay"; - }; - - serial@13810000 { - status = "okay"; - }; - - serial@13820000 { - status = "okay"; - }; - - serial@13830000 { - status = "okay"; - }; - - fixed-rate-clocks { - xxti { - compatible = "samsung,clock-xxti"; - clock-frequency = <0>; - }; - - xusbxti { - compatible = "samsung,clock-xusbxti"; - clock-frequency = <24000000>; - }; - }; - - i2c@13860000 { - pinctrl-0 = <&i2c0_bus>; - pinctrl-names = "default"; - status = "okay"; - - usb3503@08 { - compatible = "smsc,usb3503"; - reg = <0x08>; - - intn-gpios = <&gpx3 0 0>; - connect-gpios = <&gpx3 4 0>; - reset-gpios = <&gpx3 5 0>; - initial-mode = <1>; - }; - - max77686: pmic@09 { - compatible = "maxim,max77686"; - reg = <0x09>; - #clock-cells = <1>; - - voltage-regulators { - ldo1_reg: LDO1 { - regulator-name = "VDD_ALIVE_1.0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo2_reg: LDO2 { - regulator-name = "VDDQ_M1_2_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo3_reg: LDO3 { - regulator-name = "VDDQ_EXT_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo4_reg: LDO4 { - regulator-name = "VDDQ_MMC2_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo5_reg: LDO5 { - regulator-name = "VDDQ_MMC1_3_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo6_reg: LDO6 { - regulator-name = "VDD10_MPLL_1.0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo7_reg: LDO7 { - regulator-name = "VDD10_XPLL_1.0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo11_reg: LDO11 { - regulator-name = "VDD18_ABB1_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo12_reg: LDO12 { - regulator-name = "VDD33_USB_3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo13_reg: LDO13 { - regulator-name = "VDDQ_C2C_W_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo14_reg: LDO14 { - regulator-name = "VDD18_ABB0_2_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo15_reg: LDO15 { - regulator-name = "VDD10_HSIC_1.0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo16_reg: LDO16 { - regulator-name = "VDD18_HSIC_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo20_reg: LDO20 { - regulator-name = "LDO20_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - ldo21_reg: LDO21 { - regulator-name = "LDO21_3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - ldo25_reg: LDO25 { - regulator-name = "VDDQ_LCD_1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - buck1_reg: BUCK1 { - regulator-name = "vdd_mif"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - buck2_reg: BUCK2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - }; - - buck3_reg: BUCK3 { - regulator-name = "vdd_int"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - buck4_reg: BUCK4 { - regulator-name = "vdd_g3d"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1100000>; - regulator-microvolt-offset = <50000>; - }; - - buck5_reg: BUCK5 { - regulator-name = "VDDQ_CKEM1_2_1.2V"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - buck6_reg: BUCK6 { - regulator-name = "BUCK6_1.35V"; - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - }; - - buck7_reg: BUCK7 { - regulator-name = "BUCK7_2.0V"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-always-on; - }; - - buck8_reg: BUCK8 { - regulator-name = "BUCK8_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - }; - }; - }; - - exynos-usbphy@125B0000 { - status = "okay"; - }; - - hsotg@12480000 { - status = "okay"; - vusb_d-supply = <&ldo15_reg>; - vusb_a-supply = <&ldo12_reg>; + regulator-always-on; }; +}; - ehci@12580000 { +&ehci { + port@1 { status = "okay"; - port@1 { - status = "okay"; - }; }; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts new file mode 100644 index 0000000..e9ae161 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts @@ -0,0 +1,23 @@ +/* + * Hardkernel's Exynos4412 based ODROID-X2 board device tree source + * + * Copyright (c) 2012 Dongjin Kim + * + * Device tree source file for Hardkernel's ODROID-X2 board which is based + * on Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include "exynos4412-odroidx.dts" + +/ { + model = "Hardkernel ODROID-X2 board based on Exynos4412"; + compatible = "hardkernel,odroid-x2", "samsung,exynos4412", "samsung,exynos4"; + + memory { + reg = <0x40000000 0x7FF00000>; + }; +}; -- cgit v0.10.2 From 13681526bb0451f526e8b1872e9ea3842d579d98 Mon Sep 17 00:00:00 2001 From: Kamil Debski Date: Wed, 16 Jul 2014 02:54:07 +0900 Subject: ARM: dts: disable 'always on' for BUCK8 regulator for exynos4412-odroid-common On Odroid U2/U3 BUCK8 is used for providing power to also to P3V3 source, which is also connected to LAN9730 chip's nRESET signal. To reset lan chip on system reboot, the BUCK8 output should not be used in 'always on' mode. This change has no impact on X/X2 boards. Signed-off-by: Kamil Debski Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index f793f3b..ad2cb32 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -297,7 +297,6 @@ regulator-name = "BUCK8_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-always-on; }; }; }; -- cgit v0.10.2 From 081a15e3fe926d88d3eb9f3a4161c1121a2a7d0b Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:07 +0900 Subject: ARM: dts: add support for GPIO buttons for exynos4412-odroid This patch adds support for simple GPIO-based button availabled on Exynos4 based Odroid boards. All supported boards have POWER button, which has been defined in exynos4412-odroid-common.dtsi. X/X2 boards also have additional user-configurable button which has been mapped to KEY_HOME. All defined keys have been marked as possible wakeup source. Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index ad2cb32..d1b33a8 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -7,6 +7,7 @@ * published by the Free Software Foundation. */ +#include #include "exynos4412.dtsi" / { @@ -15,6 +16,22 @@ reg = <0x0204F000 0x1000>; }; + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_power_key>; + + power_key { + interrupt-parent = <&gpx1>; + interrupts = <3 0>; + gpios = <&gpx1 3 1>; + linux,code = ; + label = "power key"; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + mmc@12550000 { pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; @@ -316,3 +333,10 @@ status = "okay"; }; }; + +&pinctrl_1 { + gpio_power_key: power_key { + samsung,pins = "gpx1-3"; + samsung,pin-pud = <0>; + }; +}; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 8b453a3..cb1cfe7 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -46,6 +46,20 @@ status = "okay"; }; + gpio_keys { + pinctrl-0 = <&gpio_power_key &gpio_home_key>; + + home_key { + interrupt-parent = <&gpx2>; + interrupts = <2 0>; + gpios = <&gpx2 2 0>; + linux,code = ; + label = "home key"; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + regulator_p3v3 { compatible = "regulator-fixed"; regulator-name = "p3v3_en"; @@ -62,3 +76,10 @@ status = "okay"; }; }; + +&pinctrl_1 { + gpio_home_key: home_key { + samsung,pins = "gpx2-2"; + samsung,pin-pud = <0>; + }; +}; -- cgit v0.10.2 From 78f54db13364b9622c8734c45f774d99536da819 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Jul 2014 02:54:07 +0900 Subject: ARM: dts: fix T-FLASH hotplug detection for exynos4412-odroid-common TFLASH (SDHCI2 controller) uses internal card detect line, but it looks that the driver fails to operate it properly. Use GPIO interrupt on SD_CDn line for detecting SD card state. Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index d1b33a8..0bc1a9b 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -91,6 +91,8 @@ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; pinctrl-names = "default"; vmmc-supply = <&ldo4_reg &ldo21_reg>; + cd-gpios = <&gpk2 2 0>; + cd-inverted; status = "okay"; }; -- cgit v0.10.2 From 5a852743a495b8628ad6c848a74254ec8fcc9c27 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 16 Jul 2014 03:16:44 +0900 Subject: ARM: dts: Add sound nodes for Odroid-X2/U3 boards Add MAX98090 audio codec, I2S interface and the sound complex nodes to enable audio on Odroid-X2/U3 boards. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 0bc1a9b..6d6d23c 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -32,6 +32,21 @@ }; }; + i2s0: i2s@03830000 { + pinctrl-0 = <&i2s0_bus>; + pinctrl-names = "default"; + status = "okay"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>; + clock-names = "iis", "i2s_opclk0"; + }; + + sound: sound { + compatible = "samsung,odroidx2-audio"; + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98090>; + }; + mmc@12550000 { pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; @@ -321,6 +336,18 @@ }; }; + i2c@13870000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_bus>; + status = "okay"; + max98090: max98090@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupt-parent = <&gpx0>; + interrupts = <0 0>; + }; + }; + exynos-usbphy@125B0000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 287aa0d..c8a64be 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -47,3 +47,15 @@ status = "okay"; }; }; + +&sound { + compatible = "samsung,odroidu3-audio"; + samsung,model = "Odroid-U3"; + samsung,audio-routing = + "Headphone Jack", "HPL", + "Headphone Jack", "HPR", + "Headphone Jack", "MICBIAS", + "IN1", "Headphone Jack", + "Speakers", "SPKL", + "Speakers", "SPKR"; +}; diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts index e9ae161..96b43f4 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx2.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts @@ -21,3 +21,12 @@ reg = <0x40000000 0x7FF00000>; }; }; + +&sound { + samsung,model = "Odroid-X2"; + samsung,audio-routing = + "Headphone Jack", "HPL", + "Headphone Jack", "HPR", + "IN1", "Mic Jack", + "Mic Jack", "MICBIAS"; +}; -- cgit v0.10.2 From d51cad7df87119ab625ad8ba15eb3e8f9ea44fc9 Mon Sep 17 00:00:00 2001 From: Rahul Sharma Date: Wed, 16 Jul 2014 08:37:00 +0900 Subject: ARM: dts: remove display power domain for exynos5420 Display domain is removed due to instability issues. Explaining the problem below: exynos_init_late triggers the pm_genpd_poweroff_unused which powers off the unused power domains. This call hits before the trigger to deferred probes. DRM DP Panel defers the probe due to supply get failure. By the time, deferred probe is scheduled again, Display Power Domain is powered off by pm_genpd_poweroff_unused. FIMD and DP drivers are accessing registers during Probe and Bind callbacks. If display domain is enabled/disabled around register accesses, display domain gets unstable and we are getting Power Domain Disable fail notification. Increasing the Timeout also didn't help. Signed-off-by: Rahul Sharma Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index e385322..3d528cf 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -262,11 +262,6 @@ reg = <0x10044060 0x20>; }; - disp_pd: power-domain@100440C0 { - compatible = "samsung,exynos4210-pd"; - reg = <0x100440C0 0x20>; - }; - msc_pd: power-domain@10044120 { compatible = "samsung,exynos4210-pd"; reg = <0x10044120 0x20>; @@ -518,7 +513,6 @@ }; fimd: fimd@14400000 { - samsung,power-domain = <&disp_pd>; clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clock-names = "sclk_fimd", "fimd"; }; -- cgit v0.10.2 From 6f4b82a3568ea6dc721dc611754053846dca5781 Mon Sep 17 00:00:00 2001 From: Chanho Park Date: Sat, 19 Jul 2014 03:11:48 +0900 Subject: ARM: dts: clean up arm-pmu node for exynos4 This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only two pmu interrupts. Thus, we can define two interrupts in the exynos4.dtsi and extends the interrupts only exynos4412.dtsi. Cc: Chanwoo Choi Cc: Tomasz Figa Signed-off-by: Chanho Park Tested-by: Tushar Behera Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c912844..ec78bea 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -123,6 +123,12 @@ reg = <0x10440000 0x1000>; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupt-parent = <&combiner>; + interrupts = <2 2>, <3 2>; + }; + sys_reg: syscon@10010000 { compatible = "samsung,exynos4-sysreg", "syscon"; reg = <0x10010000 0x400>; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index ee3001f..a4f28e8 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -93,12 +93,6 @@ #clock-cells = <1>; }; - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupt-parent = <&combiner>; - interrupts = <2 2>, <3 2>; - }; - pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index c42a3e1..d8bc059e 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -26,6 +26,10 @@ samsung,combiner-nr = <20>; }; + pmu { + interrupts = <2 2>, <3 2>, <18 2>, <19 2>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x4000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index c5a943d..95cdfb9 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -31,12 +31,6 @@ mshc0 = &mshc_0; }; - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupt-parent = <&combiner>; - interrupts = <2 2>, <3 2>, <18 2>, <19 2>; - }; - sysram@02020000 { compatible = "mmio-sram"; reg = <0x02020000 0x40000>; -- cgit v0.10.2 From 8060098bbb564d27a287057a93d4fe3bfd266290 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Sat, 19 Jul 2014 04:09:15 +0900 Subject: ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi, including: * The keyboard * The i2c tunnel * The tps65090 under the i2c tunnel * The battery under the i2c tunnel To add extra motivation, it should be noted that tps65090 is one of the things needed to get display-related FETs turned on for pit and pi. Signed-off-by: Doug Anderson Tested-by: Javier Martinez Canillas Tested-by: Tushar Behera Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index c7b2bba..228a6b1 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -25,6 +25,11 @@ "google,pit", "google,peach","samsung,exynos5420", "samsung,exynos5"; + aliases { + /* Assign 20 so we don't get confused w/ builtin ones */ + i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel"; + }; + backlight { compatible = "pwm-backlight"; pwms = <&pwm 0 1000000 0>; @@ -88,6 +93,13 @@ pinctrl-0 = <&usb301_vbus_en>; enable-active-high; }; + + vbat: fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + regulator-always-on; + }; }; &dp { @@ -244,6 +256,20 @@ samsung,pin-drv = <0>; }; + ec_irq: ec-irq { + samsung,pins = "gpx1-5"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-5"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + dp_hpd_gpio: dp_hpd_gpio { samsung,pins = "gpx2-6"; samsung,pin-function = <0>; @@ -260,6 +286,19 @@ }; &pinctrl_3 { + /* Drive SPI lines at x2 for better integrity */ + spi2-bus { + samsung,pin-drv = <2>; + }; + + /* Drive SPI chip select at x2 for better integrity */ + ec_spi_cs: ec-spi-cs { + samsung,pins = "gpb1-2"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + usb300_vbus_en: usb300-vbus-en { samsung,pins = "gph0-0"; samsung,pin-function = <1>; @@ -279,6 +318,111 @@ status = "okay"; }; +&spi_2 { + status = "okay"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + cs-gpios = <&gpb1 2 0>; + + cros_ec: cros-ec@0 { + compatible = "google,cros-ec-spi"; + interrupt-parent = <&gpx1>; + interrupts = <5 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_spi_cs &ec_irq>; + reg = <0>; + spi-max-frequency = <3125000>; + + controller-data { + samsung,spi-feedback-delay = <1>; + }; + + i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + #address-cells = <1>; + #size-cells = <0>; + google,remote-bus = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + sbs,i2c-retry-count = <2>; + }; + + power-regulator@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + + /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&vbat>; + infet3-supply = <&vbat>; + infet4-supply = <&vbat>; + infet5-supply = <&vbat>; + infet6-supply = <&vbat>; + infet7-supply = <&vbat>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + + regulators { + tps65090_dcdc1: dcdc1 { + ti,enable-ext-control; + }; + tps65090_dcdc2: dcdc2 { + ti,enable-ext-control; + }; + tps65090_dcdc3: dcdc3 { + ti,enable-ext-control; + }; + tps65090_fet1: fet1 { + regulator-name = "vcd_led"; + }; + tps65090_fet2: fet2 { + regulator-name = "video_mid"; + regulator-always-on; + }; + tps65090_fet3: fet3 { + regulator-name = "wwan_r"; + regulator-always-on; + }; + tps65090_fet4: fet4 { + regulator-name = "sdcard"; + regulator-always-on; + }; + tps65090_fet5: fet5 { + regulator-name = "camout"; + }; + tps65090_fet6: fet6 { + regulator-name = "lcd_vdd"; + }; + tps65090_fet7: fet7 { + regulator-name = "video_mid_1a"; + regulator-always-on; + }; + tps65090_ldo1: ldo1 { + }; + tps65090_ldo2: ldo2 { + }; + }; + + charger { + compatible = "ti,tps65090-charger"; + }; + }; + }; + }; +}; + &uart_3 { status = "okay"; }; @@ -300,3 +444,4 @@ timeout-sec = <32>; }; +#include "cros-ec-keyboard.dtsi" diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 0bc97d9..f3ee48b 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -23,6 +23,11 @@ "google,pi", "google,peach", "samsung,exynos5800", "samsung,exynos5"; + aliases { + /* Assign 20 so we don't get confused w/ builtin ones */ + i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel"; + }; + backlight { compatible = "pwm-backlight"; pwms = <&pwm 0 1000000 0>; @@ -86,6 +91,13 @@ pinctrl-0 = <&usb301_vbus_en>; enable-active-high; }; + + vbat: fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + regulator-always-on; + }; }; &dp { @@ -242,6 +254,20 @@ samsung,pin-drv = <0>; }; + ec_irq: ec-irq { + samsung,pins = "gpx1-5"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-5"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + dp_hpd_gpio: dp_hpd_gpio { samsung,pins = "gpx2-6"; samsung,pin-function = <0>; @@ -258,6 +284,19 @@ }; &pinctrl_3 { + /* Drive SPI lines at x2 for better integrity */ + spi2-bus { + samsung,pin-drv = <2>; + }; + + /* Drive SPI chip select at x2 for better integrity */ + ec_spi_cs: ec-spi-cs { + samsung,pins = "gpb1-2"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + usb300_vbus_en: usb300-vbus-en { samsung,pins = "gph0-0"; samsung,pin-function = <1>; @@ -277,6 +316,111 @@ status = "okay"; }; +&spi_2 { + status = "okay"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + cs-gpios = <&gpb1 2 0>; + + cros_ec: cros-ec@0 { + compatible = "google,cros-ec-spi"; + interrupt-parent = <&gpx1>; + interrupts = <5 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_spi_cs &ec_irq>; + reg = <0>; + spi-max-frequency = <3125000>; + + controller-data { + samsung,spi-feedback-delay = <1>; + }; + + i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + #address-cells = <1>; + #size-cells = <0>; + google,remote-bus = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + sbs,i2c-retry-count = <2>; + }; + + power-regulator@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + + /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&vbat>; + infet3-supply = <&vbat>; + infet4-supply = <&vbat>; + infet5-supply = <&vbat>; + infet6-supply = <&vbat>; + infet7-supply = <&vbat>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + + regulators { + tps65090_dcdc1: dcdc1 { + ti,enable-ext-control; + }; + tps65090_dcdc2: dcdc2 { + ti,enable-ext-control; + }; + tps65090_dcdc3: dcdc3 { + ti,enable-ext-control; + }; + tps65090_fet1: fet1 { + regulator-name = "vcd_led"; + }; + tps65090_fet2: fet2 { + regulator-name = "video_mid"; + regulator-always-on; + }; + tps65090_fet3: fet3 { + regulator-name = "wwan_r"; + regulator-always-on; + }; + tps65090_fet4: fet4 { + regulator-name = "sdcard"; + regulator-always-on; + }; + tps65090_fet5: fet5 { + regulator-name = "camout"; + }; + tps65090_fet6: fet6 { + regulator-name = "lcd_vdd"; + }; + tps65090_fet7: fet7 { + regulator-name = "video_mid_1a"; + regulator-always-on; + }; + tps65090_ldo1: ldo1 { + }; + tps65090_ldo2: ldo2 { + }; + }; + + charger { + compatible = "ti,tps65090-charger"; + }; + }; + }; + }; +}; + &uart_3 { status = "okay"; }; @@ -298,3 +442,4 @@ timeout-sec = <32>; }; +#include "cros-ec-keyboard.dtsi" -- cgit v0.10.2 From ccaba4527156da1619a23bafcb944e8e029d0573 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Sat, 19 Jul 2014 04:10:44 +0900 Subject: ARM: dts: Add I2S dt node for exynos3250 This patch add I2S (Inter-IC Sound) dt node which supports 1-port stereo (1 channels) IIS-bus for audio interface with DMA-based operation. Signed-off-by: Tomasz Figa Signed-off-by: Inha Song Tested-by: Inha Song Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 3e678fa..77a06df 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -425,6 +425,19 @@ status = "disabled"; }; + i2s2: i2s@13970000 { + compatible = "samsung,s3c6410-i2s"; + reg = <0x13970000 0x100>; + interrupts = <0 126 0>; + clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0"; + dmas = <&pdma0 14>, <&pdma0 13>; + dma-names = "tx", "rx"; + pinctrl-0 = <&i2s2_bus>; + pinctrl-names = "default"; + status = "disabled"; + }; + pwm: pwm@139D0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x139D0000 0x1000>; -- cgit v0.10.2