From 0b27c02a7f1c697694f2ad6d6517e7dbf9ecfa39 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 18 Mar 2016 12:34:59 -0700 Subject: drm: Add an encoder and connector type enum for DPI. Right now exynos is exposing DPI as a TMDS encoder and VGA connector, which seems rather misleading. This isn't just an internal detail, since xrandr actually exposes "VGA" as the output name. Define some new enums so that vc4's DPI can have a more informative name. I considered other names for the connector as well. For VC4, the Adafruit DPI kippah takes the 28 GPIO pins and routes them to a standard-ish 40-pin FPC connector, but "40-pin FPC" doesn't uniquely identify an ordering of pins (apparently some other orderings exist), doesn't explain things as well for the user (who, if anything, knows their product is a DPI kippah/panel combo), and actually doesn't have to exist (one could connect the 28 GPIOs directly to something else). Simply "DPI" seems like a good compromise name to distinguish from the HDMI, DSI, and TV connectors . Signed-off-by: Eric Anholt Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index e08f962..6bd8133 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -168,6 +168,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] = { { DRM_MODE_CONNECTOR_eDP, "eDP" }, { DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" }, { DRM_MODE_CONNECTOR_DSI, "DSI" }, + { DRM_MODE_CONNECTOR_DPI, "DPI" }, }; static const struct drm_prop_enum_list drm_encoder_enum_list[] = { @@ -179,6 +180,7 @@ static const struct drm_prop_enum_list drm_encoder_enum_list[] = { { DRM_MODE_ENCODER_VIRTUAL, "Virtual" }, { DRM_MODE_ENCODER_DSI, "DSI" }, { DRM_MODE_ENCODER_DPMST, "DP MST" }, + { DRM_MODE_ENCODER_DPI, "DPI" }, }; static const struct drm_prop_enum_list drm_subpixel_enum_list[] = { diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index c021743..c10ab61 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -202,6 +202,7 @@ struct drm_mode_get_plane_res { #define DRM_MODE_ENCODER_VIRTUAL 5 #define DRM_MODE_ENCODER_DSI 6 #define DRM_MODE_ENCODER_DPMST 7 +#define DRM_MODE_ENCODER_DPI 8 struct drm_mode_get_encoder { __u32 encoder_id; @@ -241,6 +242,7 @@ struct drm_mode_get_encoder { #define DRM_MODE_CONNECTOR_eDP 14 #define DRM_MODE_CONNECTOR_VIRTUAL 15 #define DRM_MODE_CONNECTOR_DSI 16 +#define DRM_MODE_CONNECTOR_DPI 17 struct drm_mode_get_connector { -- cgit v0.10.2 From 08302c35b59d306ff37b996e56fb2a488c1d2c2e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 10 Feb 2016 11:42:32 -0800 Subject: drm/vc4: Add DPI driver The DPI interface involves taking a ton of our GPIOs to be used as outputs, and routing display signals over them in parallel. v2: Use display_info.bus_formats[] to replace our custom DT properties. v3: Rebase on V3D documentation changes. v4: Fix rebase detritus from V3D documentation changes. Signed-off-by: Eric Anholt Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt index 9f97df4..a5ea451 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt @@ -35,12 +35,22 @@ Optional properties for HDMI: as an interrupt/status bit in the HDMI controller itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt +Required properties for DPI: +- compatible: Should be "brcm,bcm2835-dpi" +- reg: Physical base address and length of the registers +- clocks: a) core: The core clock the unit runs on + b) pixel: The pixel clock that feeds the pixelvalve +- port: Port node with a single endpoint connecting to the panel + device, as defined in [1] + Required properties for V3D: - compatible: Should be "brcm,bcm2835-v3d" - reg: Physical base address and length of the V3D's registers - interrupts: The interrupt number See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +[1] Documentation/devicetree/bindings/media/video-interfaces.txt + Example: pixelvalve@7e807000 { compatible = "brcm,bcm2835-pixelvalve2"; @@ -66,6 +76,22 @@ hdmi: hdmi@7e902000 { clock-names = "pixel", "hdmi"; }; +dpi: dpi@7e208000 { + compatible = "brcm,bcm2835-dpi"; + reg = <0x7e208000 0x8c>; + clocks = <&clocks BCM2835_CLOCK_VPU>, + <&clocks BCM2835_CLOCK_DPI>; + clock-names = "core", "pixel"; + #address-cells = <1>; + #size-cells = <0>; + + port { + dpi_out: endpoint@0 { + remote-endpoint = <&panel_in>; + }; + }; +}; + v3d: v3d@7ec00000 { compatible = "brcm,bcm2835-v3d"; reg = <0x7ec00000 0x1000>; @@ -75,3 +101,13 @@ v3d: v3d@7ec00000 { vc4: gpu { compatible = "brcm,bcm2835-vc4"; }; + +panel: panel { + compatible = "ontat,yx700wv03", "simple-panel"; + + port { + panel_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; +}; diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig index 5848104..e53df59 100644 --- a/drivers/gpu/drm/vc4/Kconfig +++ b/drivers/gpu/drm/vc4/Kconfig @@ -5,6 +5,7 @@ config DRM_VC4 select DRM_KMS_HELPER select DRM_KMS_CMA_HELPER select DRM_GEM_CMA_HELPER + select DRM_PANEL help Choose this option if you have a system that has a Broadcom VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835. diff --git a/drivers/gpu/drm/vc4/Makefile b/drivers/gpu/drm/vc4/Makefile index 4c6a99f..fb77db7 100644 --- a/drivers/gpu/drm/vc4/Makefile +++ b/drivers/gpu/drm/vc4/Makefile @@ -7,6 +7,7 @@ vc4-y := \ vc4_bo.o \ vc4_crtc.o \ vc4_drv.o \ + vc4_dpi.o \ vc4_kms.o \ vc4_gem.o \ vc4_hdmi.o \ diff --git a/drivers/gpu/drm/vc4/vc4_debugfs.c b/drivers/gpu/drm/vc4/vc4_debugfs.c index d76ad10..245115d 100644 --- a/drivers/gpu/drm/vc4/vc4_debugfs.c +++ b/drivers/gpu/drm/vc4/vc4_debugfs.c @@ -17,6 +17,7 @@ static const struct drm_info_list vc4_debugfs_list[] = { {"bo_stats", vc4_bo_stats_debugfs, 0}, + {"dpi_regs", vc4_dpi_debugfs_regs, 0}, {"hdmi_regs", vc4_hdmi_debugfs_regs, 0}, {"hvs_regs", vc4_hvs_debugfs_regs, 0}, {"crtc0_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)0}, diff --git a/drivers/gpu/drm/vc4/vc4_dpi.c b/drivers/gpu/drm/vc4/vc4_dpi.c new file mode 100644 index 0000000..9817dbf --- /dev/null +++ b/drivers/gpu/drm/vc4/vc4_dpi.c @@ -0,0 +1,520 @@ +/* + * Copyright (C) 2016 Broadcom Limited + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +/** + * DOC: VC4 DPI module + * + * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI + * signals, which are routed out to GPIO0-27 with the ALT2 function. + */ + +#include "drm_atomic_helper.h" +#include "drm_crtc_helper.h" +#include "drm_edid.h" +#include "drm_panel.h" +#include "linux/clk.h" +#include "linux/component.h" +#include "linux/of_graph.h" +#include "linux/of_platform.h" +#include "vc4_drv.h" +#include "vc4_regs.h" + +#define DPI_C 0x00 +# define DPI_OUTPUT_ENABLE_MODE BIT(16) + +/* The order field takes the incoming 24 bit RGB from the pixel valve + * and shuffles the 3 channels. + */ +# define DPI_ORDER_MASK VC4_MASK(15, 14) +# define DPI_ORDER_SHIFT 14 +# define DPI_ORDER_RGB 0 +# define DPI_ORDER_BGR 1 +# define DPI_ORDER_GRB 2 +# define DPI_ORDER_BRG 3 + +/* The format field takes the ORDER-shuffled pixel valve data and + * formats it onto the output lines. + */ +# define DPI_FORMAT_MASK VC4_MASK(13, 11) +# define DPI_FORMAT_SHIFT 11 +/* This define is named in the hardware, but actually just outputs 0. */ +# define DPI_FORMAT_9BIT_666_RGB 0 +/* Outputs 00000000rrrrrggggggbbbbb */ +# define DPI_FORMAT_16BIT_565_RGB_1 1 +/* Outputs 000rrrrr00gggggg000bbbbb */ +# define DPI_FORMAT_16BIT_565_RGB_2 2 +/* Outputs 00rrrrr000gggggg00bbbbb0 */ +# define DPI_FORMAT_16BIT_565_RGB_3 3 +/* Outputs 000000rrrrrrggggggbbbbbb */ +# define DPI_FORMAT_18BIT_666_RGB_1 4 +/* Outputs 00rrrrrr00gggggg00bbbbbb */ +# define DPI_FORMAT_18BIT_666_RGB_2 5 +/* Outputs rrrrrrrrggggggggbbbbbbbb */ +# define DPI_FORMAT_24BIT_888_RGB 6 + +/* Reverses the polarity of the corresponding signal */ +# define DPI_PIXEL_CLK_INVERT BIT(10) +# define DPI_HSYNC_INVERT BIT(9) +# define DPI_VSYNC_INVERT BIT(8) +# define DPI_OUTPUT_ENABLE_INVERT BIT(7) + +/* Outputs the signal the falling clock edge instead of rising. */ +# define DPI_HSYNC_NEGATE BIT(6) +# define DPI_VSYNC_NEGATE BIT(5) +# define DPI_OUTPUT_ENABLE_NEGATE BIT(4) + +/* Disables the signal */ +# define DPI_HSYNC_DISABLE BIT(3) +# define DPI_VSYNC_DISABLE BIT(2) +# define DPI_OUTPUT_ENABLE_DISABLE BIT(1) + +/* Power gate to the device, full reset at 0 -> 1 transition */ +# define DPI_ENABLE BIT(0) + +/* All other registers besides DPI_C return the ID */ +#define DPI_ID 0x04 +# define DPI_ID_VALUE 0x00647069 + +/* General DPI hardware state. */ +struct vc4_dpi { + struct platform_device *pdev; + + struct drm_encoder *encoder; + struct drm_connector *connector; + struct drm_panel *panel; + + void __iomem *regs; + + struct clk *pixel_clock; + struct clk *core_clock; +}; + +#define DPI_READ(offset) readl(dpi->regs + (offset)) +#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset)) + +/* VC4 DPI encoder KMS struct */ +struct vc4_dpi_encoder { + struct vc4_encoder base; + struct vc4_dpi *dpi; +}; + +static inline struct vc4_dpi_encoder * +to_vc4_dpi_encoder(struct drm_encoder *encoder) +{ + return container_of(encoder, struct vc4_dpi_encoder, base.base); +} + +/* VC4 DPI connector KMS struct */ +struct vc4_dpi_connector { + struct drm_connector base; + struct vc4_dpi *dpi; + + /* Since the connector is attached to just the one encoder, + * this is the reference to it so we can do the best_encoder() + * hook. + */ + struct drm_encoder *encoder; +}; + +static inline struct vc4_dpi_connector * +to_vc4_dpi_connector(struct drm_connector *connector) +{ + return container_of(connector, struct vc4_dpi_connector, base); +} + +#define DPI_REG(reg) { reg, #reg } +static const struct { + u32 reg; + const char *name; +} dpi_regs[] = { + DPI_REG(DPI_C), + DPI_REG(DPI_ID), +}; + +static void vc4_dpi_dump_regs(struct vc4_dpi *dpi) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) { + DRM_INFO("0x%04x (%s): 0x%08x\n", + dpi_regs[i].reg, dpi_regs[i].name, + DPI_READ(dpi_regs[i].reg)); + } +} + +#ifdef CONFIG_DEBUG_FS +int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused) +{ + struct drm_info_node *node = (struct drm_info_node *)m->private; + struct drm_device *dev = node->minor->dev; + struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_dpi *dpi = vc4->dpi; + int i; + + if (!dpi) + return 0; + + for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) { + seq_printf(m, "%s (0x%04x): 0x%08x\n", + dpi_regs[i].name, dpi_regs[i].reg, + DPI_READ(dpi_regs[i].reg)); + } + + return 0; +} +#endif + +static enum drm_connector_status +vc4_dpi_connector_detect(struct drm_connector *connector, bool force) +{ + struct vc4_dpi_connector *vc4_connector = + to_vc4_dpi_connector(connector); + struct vc4_dpi *dpi = vc4_connector->dpi; + + if (dpi->panel) + return connector_status_connected; + else + return connector_status_disconnected; +} + +static void vc4_dpi_connector_destroy(struct drm_connector *connector) +{ + drm_connector_unregister(connector); + drm_connector_cleanup(connector); +} + +static int vc4_dpi_connector_get_modes(struct drm_connector *connector) +{ + struct vc4_dpi_connector *vc4_connector = + to_vc4_dpi_connector(connector); + struct vc4_dpi *dpi = vc4_connector->dpi; + + if (dpi->panel) + return drm_panel_get_modes(dpi->panel); + + return 0; +} + +static struct drm_encoder * +vc4_dpi_connector_best_encoder(struct drm_connector *connector) +{ + struct vc4_dpi_connector *dpi_connector = + to_vc4_dpi_connector(connector); + return dpi_connector->encoder; +} + +static const struct drm_connector_funcs vc4_dpi_connector_funcs = { + .dpms = drm_atomic_helper_connector_dpms, + .detect = vc4_dpi_connector_detect, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = vc4_dpi_connector_destroy, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static const struct drm_connector_helper_funcs vc4_dpi_connector_helper_funcs = { + .get_modes = vc4_dpi_connector_get_modes, + .best_encoder = vc4_dpi_connector_best_encoder, +}; + +static struct drm_connector *vc4_dpi_connector_init(struct drm_device *dev, + struct vc4_dpi *dpi) +{ + struct drm_connector *connector = NULL; + struct vc4_dpi_connector *dpi_connector; + int ret = 0; + + dpi_connector = devm_kzalloc(dev->dev, sizeof(*dpi_connector), + GFP_KERNEL); + if (!dpi_connector) { + ret = -ENOMEM; + goto fail; + } + connector = &dpi_connector->base; + + dpi_connector->encoder = dpi->encoder; + dpi_connector->dpi = dpi; + + drm_connector_init(dev, connector, &vc4_dpi_connector_funcs, + DRM_MODE_CONNECTOR_DPI); + drm_connector_helper_add(connector, &vc4_dpi_connector_helper_funcs); + + connector->polled = 0; + connector->interlace_allowed = 0; + connector->doublescan_allowed = 0; + + drm_mode_connector_attach_encoder(connector, dpi->encoder); + + return connector; + + fail: + if (connector) + vc4_dpi_connector_destroy(connector); + + return ERR_PTR(ret); +} + +static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static void vc4_dpi_encoder_disable(struct drm_encoder *encoder) +{ + struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder); + struct vc4_dpi *dpi = vc4_encoder->dpi; + + drm_panel_disable(dpi->panel); + + clk_disable_unprepare(dpi->pixel_clock); + + drm_panel_unprepare(dpi->panel); +} + +static void vc4_dpi_encoder_enable(struct drm_encoder *encoder) +{ + struct drm_display_mode *mode = &encoder->crtc->mode; + struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder); + struct vc4_dpi *dpi = vc4_encoder->dpi; + u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE; + int ret; + + ret = drm_panel_prepare(dpi->panel); + if (ret) { + DRM_ERROR("Panel failed to prepare\n"); + return; + } + + if (dpi->connector->display_info.num_bus_formats) { + u32 bus_format = dpi->connector->display_info.bus_formats[0]; + + switch (bus_format) { + case MEDIA_BUS_FMT_RGB888_1X24: + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, + DPI_FORMAT); + break; + case MEDIA_BUS_FMT_BGR888_1X24: + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, + DPI_FORMAT); + dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); + break; + case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2, + DPI_FORMAT); + break; + case MEDIA_BUS_FMT_RGB666_1X18: + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, + DPI_FORMAT); + break; + case MEDIA_BUS_FMT_RGB565_1X16: + dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3, + DPI_FORMAT); + break; + default: + DRM_ERROR("Unknown media bus format %d\n", bus_format); + break; + } + } + + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + dpi_c |= DPI_HSYNC_INVERT; + else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) + dpi_c |= DPI_HSYNC_DISABLE; + + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + dpi_c |= DPI_VSYNC_INVERT; + else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) + dpi_c |= DPI_VSYNC_DISABLE; + + DPI_WRITE(DPI_C, dpi_c); + + ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000); + if (ret) + DRM_ERROR("Failed to set clock rate: %d\n", ret); + + ret = clk_prepare_enable(dpi->pixel_clock); + if (ret) + DRM_ERROR("Failed to set clock rate: %d\n", ret); + + ret = drm_panel_enable(dpi->panel); + if (ret) { + DRM_ERROR("Panel failed to enable\n"); + drm_panel_unprepare(dpi->panel); + return; + } +} + +static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = { + .disable = vc4_dpi_encoder_disable, + .enable = vc4_dpi_encoder_enable, +}; + +static const struct of_device_id vc4_dpi_dt_match[] = { + { .compatible = "brcm,bcm2835-dpi", .data = NULL }, + {} +}; + +/* Walks the OF graph to find the panel node and then asks DRM to look + * up the panel. + */ +static struct drm_panel *vc4_dpi_get_panel(struct device *dev) +{ + struct device_node *endpoint, *panel_node; + struct device_node *np = dev->of_node; + struct drm_panel *panel; + + endpoint = of_graph_get_next_endpoint(np, NULL); + if (!endpoint) { + dev_err(dev, "no endpoint to fetch DPI panel\n"); + return NULL; + } + + /* don't proceed if we have an endpoint but no panel_node tied to it */ + panel_node = of_graph_get_remote_port_parent(endpoint); + of_node_put(endpoint); + if (!panel_node) { + dev_err(dev, "no valid panel node\n"); + return NULL; + } + + panel = of_drm_find_panel(panel_node); + of_node_put(panel_node); + + return panel; +} + +static int vc4_dpi_bind(struct device *dev, struct device *master, void *data) +{ + struct platform_device *pdev = to_platform_device(dev); + struct drm_device *drm = dev_get_drvdata(master); + struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_dpi *dpi; + struct vc4_dpi_encoder *vc4_dpi_encoder; + int ret; + + dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL); + if (!dpi) + return -ENOMEM; + + vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder), + GFP_KERNEL); + if (!vc4_dpi_encoder) + return -ENOMEM; + vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI; + vc4_dpi_encoder->dpi = dpi; + dpi->encoder = &vc4_dpi_encoder->base.base; + + dpi->pdev = pdev; + dpi->regs = vc4_ioremap_regs(pdev, 0); + if (IS_ERR(dpi->regs)) + return PTR_ERR(dpi->regs); + + vc4_dpi_dump_regs(dpi); + + if (DPI_READ(DPI_ID) != DPI_ID_VALUE) { + dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", + DPI_READ(DPI_ID), DPI_ID_VALUE); + return -ENODEV; + } + + dpi->core_clock = devm_clk_get(dev, "core"); + if (IS_ERR(dpi->core_clock)) { + ret = PTR_ERR(dpi->core_clock); + if (ret != -EPROBE_DEFER) + DRM_ERROR("Failed to get core clock: %d\n", ret); + return ret; + } + dpi->pixel_clock = devm_clk_get(dev, "pixel"); + if (IS_ERR(dpi->pixel_clock)) { + ret = PTR_ERR(dpi->pixel_clock); + if (ret != -EPROBE_DEFER) + DRM_ERROR("Failed to get pixel clock: %d\n", ret); + return ret; + } + + ret = clk_prepare_enable(dpi->core_clock); + if (ret) + DRM_ERROR("Failed to turn on core clock: %d\n", ret); + + dpi->panel = vc4_dpi_get_panel(dev); + + drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs, + DRM_MODE_ENCODER_DPI, NULL); + drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs); + + dpi->connector = vc4_dpi_connector_init(drm, dpi); + if (IS_ERR(dpi->connector)) { + ret = PTR_ERR(dpi->connector); + goto err_destroy_encoder; + } + + if (dpi->panel) + drm_panel_attach(dpi->panel, dpi->connector); + + dev_set_drvdata(dev, dpi); + + vc4->dpi = dpi; + + return 0; + +err_destroy_encoder: + drm_encoder_cleanup(dpi->encoder); + clk_disable_unprepare(dpi->core_clock); + return ret; +} + +static void vc4_dpi_unbind(struct device *dev, struct device *master, + void *data) +{ + struct drm_device *drm = dev_get_drvdata(master); + struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_dpi *dpi = dev_get_drvdata(dev); + + if (dpi->panel) + drm_panel_detach(dpi->panel); + + vc4_dpi_connector_destroy(dpi->connector); + drm_encoder_cleanup(dpi->encoder); + + clk_disable_unprepare(dpi->core_clock); + + vc4->dpi = NULL; +} + +static const struct component_ops vc4_dpi_ops = { + .bind = vc4_dpi_bind, + .unbind = vc4_dpi_unbind, +}; + +static int vc4_dpi_dev_probe(struct platform_device *pdev) +{ + return component_add(&pdev->dev, &vc4_dpi_ops); +} + +static int vc4_dpi_dev_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &vc4_dpi_ops); + return 0; +} + +struct platform_driver vc4_dpi_driver = { + .probe = vc4_dpi_dev_probe, + .remove = vc4_dpi_dev_remove, + .driver = { + .name = "vc4_dpi", + .of_match_table = vc4_dpi_dt_match, + }, +}; diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index b7d2ff0..54f9f52 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -237,6 +237,7 @@ static const struct component_master_ops vc4_drm_ops = { static struct platform_driver *const component_drivers[] = { &vc4_hdmi_driver, + &vc4_dpi_driver, &vc4_crtc_driver, &vc4_hvs_driver, &vc4_v3d_driver, diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index fa2ad15..37cac59 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -16,6 +16,7 @@ struct vc4_dev { struct vc4_hvs *hvs; struct vc4_crtc *crtc[3]; struct vc4_v3d *v3d; + struct vc4_dpi *dpi; struct drm_fbdev_cma *fbdev; @@ -422,6 +423,10 @@ void vc4_debugfs_cleanup(struct drm_minor *minor); /* vc4_drv.c */ void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index); +/* vc4_dpi.c */ +extern struct platform_driver vc4_dpi_driver; +int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused); + /* vc4_gem.c */ void vc4_gem_init(struct drm_device *dev); void vc4_gem_destroy(struct drm_device *dev); -- cgit v0.10.2 From 5883980313af70aec0ceebaef6ef0709726e5e63 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 4 Apr 2016 14:25:59 -0700 Subject: drm/vc4: Fix NULL deref in HDMI init error path If you make it here other than through err_destroy_encoder, vc4->hdmi is still NULL. Signed-off-by: Eric Anholt diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index d8b8649..fd2644d 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -573,7 +573,7 @@ err_unprepare_hsm: err_unprepare_pix: clk_disable_unprepare(hdmi->pixel_clock); err_put_i2c: - put_device(&vc4->hdmi->ddc->dev); + put_device(&hdmi->ddc->dev); return ret; } -- cgit v0.10.2 From e582b6c7e7f9d0b1e30e8017e4082d3a9ede3310 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 31 Mar 2016 18:38:20 -0700 Subject: drm/vc4: Add support for gamma ramps. We could possibly save a bit of power by not requesting gamma conversion when the ramp happens to be 1:1, but at least if all the CRTCs are off the SRAM will be disabled. This should fix brightness sliders in a lot of fullscreen games. Signed-off-by: Eric Anholt diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 355ee4b..231356f 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -49,6 +49,10 @@ struct vc4_crtc { /* Which HVS channel we're using for our CRTC. */ int channel; + u8 lut_r[256]; + u8 lut_g[256]; + u8 lut_b[256]; + struct drm_pending_vblank_event *event; }; @@ -147,6 +151,46 @@ static void vc4_crtc_destroy(struct drm_crtc *crtc) drm_crtc_cleanup(crtc); } +static void +vc4_crtc_lut_load(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + u32 i; + + /* The LUT memory is laid out with each HVS channel in order, + * each of which takes 256 writes for R, 256 for G, then 256 + * for B. + */ + HVS_WRITE(SCALER_GAMADDR, + SCALER_GAMADDR_AUTOINC | + (vc4_crtc->channel * 3 * crtc->gamma_size)); + + for (i = 0; i < crtc->gamma_size; i++) + HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_r[i]); + for (i = 0; i < crtc->gamma_size; i++) + HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_g[i]); + for (i = 0; i < crtc->gamma_size; i++) + HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]); +} + +static void +vc4_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, + uint32_t start, uint32_t size) +{ + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + u32 i; + + for (i = start; i < start + size; i++) { + vc4_crtc->lut_r[i] = r[i] >> 8; + vc4_crtc->lut_g[i] = g[i] >> 8; + vc4_crtc->lut_b[i] = b[i] >> 8; + } + + vc4_crtc_lut_load(crtc); +} + static u32 vc4_get_fifo_full_level(u32 format) { static const u32 fifo_len_bytes = 64; @@ -260,8 +304,14 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), SCALER_DISPBKGND_AUTOHS | + SCALER_DISPBKGND_GAMMA | (interlace ? SCALER_DISPBKGND_INTERLACE : 0)); + /* Reload the LUT, since the SRAMs would have been disabled if + * all CRTCs had SCALER_DISPBKGND_GAMMA unset at once. + */ + vc4_crtc_lut_load(crtc); + if (debug_dump_regs) { DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc)); vc4_crtc_dump_regs(vc4_crtc); @@ -613,6 +663,7 @@ static const struct drm_crtc_funcs vc4_crtc_funcs = { .reset = drm_atomic_helper_crtc_reset, .atomic_duplicate_state = vc4_crtc_duplicate_state, .atomic_destroy_state = vc4_crtc_destroy_state, + .gamma_set = vc4_crtc_gamma_set, }; static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { @@ -711,6 +762,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data) primary_plane->crtc = crtc; vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc; vc4_crtc->channel = vc4_crtc->data->hvs_channel; + drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r)); /* Set up some arbitrary number of planes. We're not limited * by a set number of physical registers, just the space in @@ -751,6 +803,12 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data) vc4_set_crtc_possible_masks(drm, crtc); + for (i = 0; i < crtc->gamma_size; i++) { + vc4_crtc->lut_r[i] = i; + vc4_crtc->lut_g[i] = i; + vc4_crtc->lut_b[i] = i; + } + platform_set_drvdata(pdev, vc4_crtc); return 0; diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index bf42a8e..6163b95 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -390,6 +390,12 @@ #define SCALER_DISPBASE2 0x0000006c #define SCALER_DISPALPHA2 0x00000070 #define SCALER_GAMADDR 0x00000078 +# define SCALER_GAMADDR_AUTOINC BIT(31) +/* Enables all gamma ramp SRAMs, not just those of CRTCs with gamma + * enabled. + */ +# define SCALER_GAMADDR_SRAMENB BIT(30) + #define SCALER_GAMDATA 0x000000e0 #define SCALER_DLIST_START 0x00002000 #define SCALER_DLIST_SIZE 0x00004000 -- cgit v0.10.2 From 0cd3e27476620176c19e346f82576c6e139b85a9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 14 Apr 2016 23:16:05 -0700 Subject: drm/vc4: Add missing render node support There shouldn't be any other driver support necessary, since none of the driver-specific ioctls ever required auth, and none of them deal with modesetting. Signed-off-by: Eric Anholt Reviewed-by: Daniel Vetter diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index 54f9f52..143dd98 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -81,6 +81,7 @@ static struct drm_driver vc4_drm_driver = { DRIVER_ATOMIC | DRIVER_GEM | DRIVER_HAVE_IRQ | + DRIVER_RENDER | DRIVER_PRIME), .lastclose = vc4_lastclose, .irq_handler = vc4_irq, -- cgit v0.10.2