From d40f3149494c2c23a6e3cf6d68961916fa239592 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 24 Jul 2013 10:55:16 +0900 Subject: ARM: dts: Hook up IRQ for PMIC on Arndale The out of tree code configures a pullup on the line indicating that it is an active low interrupt. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index abc7272..dab40ae 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "exynos5250.dtsi" +#include / { model = "Insignal Arndale evaluation board based on EXYNOS5250"; @@ -37,6 +38,8 @@ s5m8767_pmic@66 { compatible = "samsung,s5m8767-pmic"; reg = <0x66>; + interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; s5m8767,pmic-buck2-dvs-voltage = <1300000>; s5m8767,pmic-buck3-dvs-voltage = <1100000>; -- cgit v0.10.2 From aa3edb65feae6734e1202ea8224c0cc5d25dea49 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 24 Jul 2013 10:55:16 +0900 Subject: ARM: dts: Put Arndale fixed voltage regulators on a simple-bus Fixed voltage regulators (and other similar free standing things) are supposed to go on a simple-bus for DT correctness reasons. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index dab40ae..fa5969a 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -432,18 +432,24 @@ vdd-supply = <&ldo8_reg>; }; - mmc_reg: voltage-regulator { - compatible = "regulator-fixed"; - regulator-name = "VDD_33ON_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpx1 1 1>; - enable-active-high; - }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + mmc_reg: voltage-regulator { + compatible = "regulator-fixed"; + regulator-name = "VDD_33ON_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpx1 1 1>; + enable-active-high; + }; - reg_hdmi_en: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "hdmi-en"; + reg_hdmi_en: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "hdmi-en"; + }; }; fixed-rate-clocks { -- cgit v0.10.2 From c1f2d53fc8b70588c52cc802965a4948dcda9af4 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 24 Jul 2013 10:55:16 +0900 Subject: ARM: dts: Hook up supplies for Arndale S5M8767 As part of this add nodes for the main wall supply as well as bucks 7 and 8 which are used to drop that down for several of the LDOs. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index fa5969a..69a8651 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -41,6 +41,26 @@ interrupt-parent = <&gpx3>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + vinb1-supply = <&main_dc_reg>; + vinb2-supply = <&main_dc_reg>; + vinb3-supply = <&main_dc_reg>; + vinb4-supply = <&main_dc_reg>; + vinb5-supply = <&main_dc_reg>; + vinb6-supply = <&main_dc_reg>; + vinb7-supply = <&main_dc_reg>; + vinb8-supply = <&main_dc_reg>; + vinb9-supply = <&main_dc_reg>; + + vinl1-supply = <&buck7_reg>; + vinl2-supply = <&buck7_reg>; + vinl3-supply = <&buck7_reg>; + vinl4-supply = <&main_dc_reg>; + vinl5-supply = <&main_dc_reg>; + vinl6-supply = <&main_dc_reg>; + vinl7-supply = <&main_dc_reg>; + vinl8-supply = <&buck8_reg>; + vinl9-supply = <&buck8_reg>; + s5m8767,pmic-buck2-dvs-voltage = <1300000>; s5m8767,pmic-buck3-dvs-voltage = <1100000>; s5m8767,pmic-buck4-dvs-voltage = <1200000>; @@ -279,6 +299,16 @@ op_mode = <1>; }; + buck7_reg: BUCK7 { + regulator-name = "PVDD_BUCK7"; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "PVDD_BUCK8"; + regulator-always-on; + }; + buck9_reg: BUCK9 { regulator-name = "VDD_33_OFF_EXT1"; regulator-min-microvolt = <750000>; @@ -437,6 +467,11 @@ #address-cells = <1>; #size-cells = <0>; + main_dc_reg: fixedregulator@1 { + compatible = "regulator-fixed"; + regulator-name = "MAIN_DC"; + }; + mmc_reg: voltage-regulator { compatible = "regulator-fixed"; regulator-name = "VDD_33ON_2.8V"; -- cgit v0.10.2 From 21274841d056c219041fb18bba1ba511d1fcddd2 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 24 Jul 2013 10:55:16 +0900 Subject: ARM: dts: Add WM1811A audio CODEC to Arndale bindings The default audio module for the Arndale has a WM1811A on it. Add this to the device tree bindings. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 69a8651..96d528d 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -328,7 +328,22 @@ }; i2c@12C90000 { - status = "disabled"; + wm1811a@1a { + compatible = "wlf,wm1811"; + reg = <0x1a>; + + AVDD2-supply = <&main_dc_reg>; + CPVDD-supply = <&main_dc_reg>; + DBVDD1-supply = <&main_dc_reg>; + DBVDD2-supply = <&main_dc_reg>; + DBVDD3-supply = <&main_dc_reg>; + LDO1VDD-supply = <&main_dc_reg>; + SPKVDD1-supply = <&main_dc_reg>; + SPKVDD2-supply = <&main_dc_reg>; + + wlf,ldo1ena = <&gpb0 0 0>; + wlf,ldo2ena = <&gpb0 1 0>; + }; }; i2c@12CA0000 { -- cgit v0.10.2 From a94f56abae464e5fb6cd327d52de005dc9b96ee2 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 24 Jul 2013 13:33:46 +0900 Subject: ARM: dts: re-ordering exynos dtbs in Makefile Re-ordering in alphabetical. Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 641b3c9..ad340e4 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -53,13 +53,13 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-trats.dtb \ exynos4210-universal_c210.dtb \ exynos4412-odroidx.dtb \ - exynos4412-smdk4412.dtb \ exynos4412-origen.dtb \ + exynos4412-smdk4412.dtb \ exynos5250-arndale.dtb \ - exynos5440-sd5v1.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ exynos5420-smdk5420.dtb \ + exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ ecx-2000.dtb -- cgit v0.10.2 From 15dfdfad2d4a7e99c005854090274d03f7bacd27 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Wed, 24 Jul 2013 13:41:45 +0900 Subject: ARM: dts: Add basic dts for Exynos4412-based Trats 2 board This patch introduces device tree sources for Samsung Trats 2 board based on Exynos4412 SoC. Currently support includes: - eMMC, - main PMIC (max77686), - serial ports, - GPIO keys, - touchscreen. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ad340e4..68701d9 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4412-odroidx.dtb \ exynos4412-origen.dtb \ exynos4412-smdk4412.dtb \ + exynos4412-trats2.dtb \ exynos5250-arndale.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts new file mode 100644 index 0000000..056b835 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -0,0 +1,456 @@ +/* + * Samsung's Exynos4412 based Trats 2 board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Device tree source file for Samsung's Trats 2 board which is based on + * Samsung's Exynos4412 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos4412.dtsi" + +/ { + model = "Samsung Trats 2 based on Exynos4412"; + compatible = "samsung,trats2", "samsung,exynos4412"; + + memory { + reg = <0x40000000 0x40000000>; + }; + + chosen { + bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; + }; + + firmware@0204F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0204F000 0x1000>; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti", "fixed-clock"; + clock-frequency = <0>; + }; + + xusbxti { + compatible = "samsung,clock-xusbxti", "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vemmc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpk0 2 0>; + enable-active-high; + }; + + /* More to come */ + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-down { + interrupt-parent = <&gpj1>; + interrupts = <2 0>; + gpios = <&gpj1 2 1>; + linux,code = <114>; + label = "volume down"; + debounce-interval = <10>; + }; + + key-up { + interrupt-parent = <&gpj1>; + interrupts = <1 0>; + gpios = <&gpj1 1 1>; + linux,code = <115>; + label = "volume up"; + debounce-interval = <10>; + }; + + key-power { + interrupt-parent = <&gpx2>; + interrupts = <7 0>; + gpios = <&gpx2 7 1>; + linux,code = <116>; + label = "power"; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + i2c@13890000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <400000>; + pinctrl-0 = <&i2c3_bus>; + pinctrl-names = "default"; + status = "okay"; + + mms114-touchscreen@48 { + compatible = "melfas,mms114"; + reg = <0x48>; + interrupt-parent = <&gpm2>; + interrupts = <3 2>; + x-size = <720>; + y-size = <1280>; + avdd-supply = <&ldo23_reg>; + vdd-supply = <&ldo24_reg>; + }; + }; + + i2c@138D0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + pinctrl-0 = <&i2c7_bus>; + pinctrl-names = "default"; + status = "okay"; + + max77686_pmic@09 { + compatible = "maxim,max77686"; + interrupt-parent = <&gpx0>; + interrupts = <7 0>; + reg = <0x09>; + + voltage-regulators { + ldo1_reg: ldo1 { + regulator-compatible = "LDO1"; + regulator-name = "VALIVE_1.0V_AP"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo2_reg: ldo2 { + regulator-compatible = "LDO2"; + regulator-name = "VM1M2_1.2V_AP"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo3_reg: ldo3 { + regulator-compatible = "LDO3"; + regulator-name = "VCC_1.8V_AP"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo4_reg: ldo4 { + regulator-compatible = "LDO4"; + regulator-name = "VCC_2.8V_AP"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo5_reg: ldo5 { + regulator-compatible = "LDO5"; + regulator-name = "VCC_1.8V_IO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo6_reg: ldo6 { + regulator-compatible = "LDO6"; + regulator-name = "VMPLL_1.0V_AP"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo7_reg: ldo7 { + regulator-compatible = "LDO7"; + regulator-name = "VPLL_1.0V_AP"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-mem-on; + }; + + ldo8_reg: ldo8 { + regulator-compatible = "LDO8"; + regulator-name = "VMIPI_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-mem-off; + }; + + ldo9_reg: ldo9 { + regulator-compatible = "LDO9"; + regulator-name = "CAM_ISP_MIPI_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-mem-idle; + }; + + ldo10_reg: ldo10 { + regulator-compatible = "LDO10"; + regulator-name = "VMIPI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-off; + }; + + ldo11_reg: ldo11 { + regulator-compatible = "LDO11"; + regulator-name = "VABB1_1.95V"; + regulator-min-microvolt = <1950000>; + regulator-max-microvolt = <1950000>; + regulator-always-on; + regulator-mem-off; + }; + + ldo12_reg: ldo12 { + regulator-compatible = "LDO12"; + regulator-name = "VUOTG_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-mem-off; + }; + + ldo13_reg: ldo13 { + regulator-compatible = "LDO13"; + regulator-name = "NFC_AVDD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-idle; + }; + + ldo14_reg: ldo14 { + regulator-compatible = "LDO14"; + regulator-name = "VABB2_1.95V"; + regulator-min-microvolt = <1950000>; + regulator-max-microvolt = <1950000>; + regulator-always-on; + regulator-mem-off; + }; + + ldo15_reg: ldo15 { + regulator-compatible = "LDO15"; + regulator-name = "VHSIC_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-mem-off; + }; + + ldo16_reg: ldo16 { + regulator-compatible = "LDO16"; + regulator-name = "VHSIC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-off; + }; + + ldo17_reg: ldo17 { + regulator-compatible = "LDO17"; + regulator-name = "CAM_SENSOR_CORE_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-mem-idle; + }; + + ldo18_reg: ldo18 { + regulator-compatible = "LDO18"; + regulator-name = "CAM_ISP_SEN_IO_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-idle; + }; + + ldo19_reg: ldo19 { + regulator-compatible = "LDO19"; + regulator-name = "VT_CAM_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-idle; + }; + + ldo20_reg: ldo20 { + regulator-compatible = "LDO20"; + regulator-name = "VDDQ_PRE_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-idle; + }; + + ldo21_reg: ldo21 { + regulator-compatible = "LDO21"; + regulator-name = "VTF_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-mem-idle; + }; + + ldo22_reg: ldo22 { + regulator-compatible = "LDO22"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-mem-off; + }; + + ldo23_reg: ldo23 { + regulator-compatible = "LDO23"; + regulator-name = "TSP_AVDD_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-mem-idle; + }; + + ldo24_reg: ldo24 { + regulator-compatible = "LDO24"; + regulator-name = "TSP_VDD_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-mem-idle; + }; + + ldo25_reg: ldo25 { + regulator-compatible = "LDO25"; + regulator-name = "LCD_VCC_3.3V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-mem-idle; + }; + + ldo26_reg: ldo26 { + regulator-compatible = "LDO26"; + regulator-name = "MOTOR_VCC_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-mem-idle; + }; + + buck1_reg: buck1 { + regulator-compatible = "BUCK1"; + regulator-name = "vdd_mif"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + regulator-mem-off; + }; + + buck2_reg: buck2 { + regulator-compatible = "BUCK2"; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-mem-off; + }; + + buck3_reg: buck3 { + regulator-compatible = "BUCK3"; + regulator-name = "vdd_int"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1150000>; + regulator-always-on; + regulator-boot-on; + regulator-mem-off; + }; + + buck4_reg: buck4 { + regulator-compatible = "BUCK4"; + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-mem-off; + }; + + buck5_reg: buck5 { + regulator-compatible = "BUCK5"; + regulator-name = "VMEM_1.2V_AP"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck6_reg: buck6 { + regulator-compatible = "BUCK6"; + regulator-name = "VCC_SUB_1.35V"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck7_reg: buck7 { + regulator-compatible = "BUCK7"; + regulator-name = "VCC_SUB_2.0V"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + buck8_reg: buck8 { + regulator-compatible = "BUCK8"; + regulator-name = "VMEM_VDDF_3.0V"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-mem-off; + }; + + buck9_reg: buck9 { + regulator-compatible = "BUCK9"; + regulator-name = "CAM_ISP_CORE_1.2V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + regulator-mem-off; + }; + }; + }; + }; + + sdhci@12510000 { + bus-width = <8>; + non-removable; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; + pinctrl-names = "default"; + vmmc-supply = <&vemmc_reg>; + status = "okay"; + }; + + serial@13800000 { + status = "okay"; + }; + + serial@13810000 { + status = "okay"; + }; + + serial@13820000 { + status = "okay"; + }; + + serial@13830000 { + status = "okay"; + }; +}; -- cgit v0.10.2 From 5c7311b5dee933f2ae95d59de013c0385fd30433 Mon Sep 17 00:00:00 2001 From: Amit Daniel Kachhap Date: Wed, 24 Jul 2013 14:27:16 +0900 Subject: ARM: dts: Add device tree node for exynos5440 TMU controller This patch adds device node for TMU controller. There are 3 instances of the controllers so 3 nodes are created. Acked-by: Jonghwa Lee Reviewed-by: Eduardo Valentin Signed-off-by: Amit Daniel Kachhap Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index ff7f5d8..606da5f 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -18,6 +18,9 @@ aliases { spi0 = &spi_0; + tmuctrl0 = &tmuctrl_0; + tmuctrl1 = &tmuctrl_1; + tmuctrl2 = &tmuctrl_2; }; clock: clock-controller@0x160000 { @@ -207,6 +210,30 @@ clock-names = "rtc"; }; + tmuctrl_0: tmuctrl@160118 { + compatible = "samsung,exynos5440-tmu"; + reg = <0x160118 0x230>, <0x160368 0x10>; + interrupts = <0 58 0>; + clocks = <&clock 21>; + clock-names = "tmu_apbif"; + }; + + tmuctrl_1: tmuctrl@16011C { + compatible = "samsung,exynos5440-tmu"; + reg = <0x16011C 0x230>, <0x160368 0x10>; + interrupts = <0 58 0>; + clocks = <&clock 21>; + clock-names = "tmu_apbif"; + }; + + tmuctrl_2: tmuctrl@160120 { + compatible = "samsung,exynos5440-tmu"; + reg = <0x160120 0x230>, <0x160368 0x10>; + interrupts = <0 58 0>; + clocks = <&clock 21>; + clock-names = "tmu_apbif"; + }; + sata@210000 { compatible = "snps,exynos5440-ahci"; reg = <0x210000 0x10000>; -- cgit v0.10.2 From 21aa521727a004ce4a4c46e9a5cb7e34619b4d16 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 31 Jul 2013 21:07:53 +0900 Subject: ARM: dts: Add G2D support to exynos5250 Adds G2D node to exynos5250 DT file. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index ef57277..6f356ce 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -163,6 +163,14 @@ clock-names = "watchdog"; }; + g2d@10850000 { + compatible = "samsung,exynos5250-g2d"; + reg = <0x10850000 0x1000>; + interrupts = <0 91 0>; + clocks = <&clock 345>; + clock-names = "fimg2d"; + }; + codec@11000000 { compatible = "samsung,mfc-v6"; reg = <0x11000000 0x10000>; -- cgit v0.10.2 From 0209c578cac949bd0ca262f00dd235c52f23921f Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:43 +0900 Subject: ARM: dts: Correct camera pinctrl nodes for Exynos4x12 SoCs Add separate nodes for the CAMCLK pin and turn off pull-up on camera ports A, B. The video bus pins and the clock output (CAMCLK) pin need separate nodes since full camera port is not used in some configurations, e.g. for MIPI CSI-2 bus only CAMCLK is required and data/clock signal use separate dedicated pins. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 704290f..55ff73b 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -401,13 +401,26 @@ samsung,pin-drv = <0>; }; - cam_port_a: cam-port-a { + cam_port_a_io: cam-port-a-io { samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", - "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3", - "gpj1-4"; + "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; samsung,pin-function = <2>; - samsung,pin-pud = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_a_clk_active: cam-port-a-clk-active { + samsung,pins = "gpj1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + cam_port_a_clk_idle: cam-port-a-clk-idle { + samsung,pins = "gpj1-3"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; samsung,pin-drv = <0>; }; }; @@ -778,16 +791,29 @@ samsung,pin-drv = <3>; }; - cam_port_b: cam-port-b { + cam_port_b_io: cam-port-b-io { samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3", "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7", - "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1", - "gpm2-2"; + "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1"; samsung,pin-function = <3>; samsung,pin-pud = <3>; samsung,pin-drv = <0>; }; + cam_port_b_clk_active: cam-port-b-clk-active { + samsung,pins = "gpm2-2"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + cam_port_b_clk_idle: cam-port-b-clk-idle { + samsung,pins = "gpm2-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + eint0: ext-int0 { samsung,pins = "gpx0-0"; samsung,pin-function = <0xf>; -- cgit v0.10.2 From 91b20618f7b2436a914ddf8aed360aab5af26e1a Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:43 +0900 Subject: ARM: dts: Add pinctrl entries for Exynos4x12 FIMC-IS peripherals Add pinctrl nodes for the ISP I2C0, ISP I2C1 and ISP UART devices. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index 55ff73b..99b26df 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -848,6 +848,27 @@ samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; + + fimc_is_i2c0: fimc-is-i2c0 { + samsung,pins = "gpm4-0", "gpm4-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + fimc_is_i2c1: fimc-is-i2c1 { + samsung,pins = "gpm4-2", "gpm4-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + fimc_is_uart: fimc-is-uart { + samsung,pins = "gpm3-5", "gpm3-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; }; pinctrl@03860000 { -- cgit v0.10.2 From 2ab9f3c04bc1935c12bc6d9fbd7a1d1e72695d0b Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Add ISP power domain node for Exynos4x12 The ISP power domain is a common power domain for FIMC-LITE and FIMC-IS (camera ISP) devices. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 01da194..0e24d85 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -28,6 +28,11 @@ pinctrl3 = &pinctrl_3; }; + pd_isp: isp-power-domain@10023CA0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023CA0 0x20>; + }; + clock: clock-controller@0x10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>; -- cgit v0.10.2 From 48b3af1e9c6e856228e5fff7d7b62a2122a5804f Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Use generic DMA bindings for Exynos4 SPI devices The Exynos4 SPI controller has migrated to the generic DMA bindings since commit b5be04d35dbb("spi: s3c64xx: Modify SPI driver to use generic DMA DT support"). Use the generic bindings to specify the corresponding DMA to make the SPI usable again on Exynos4x12 SoCs. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 3f94fe8..bce2254 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -297,8 +297,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; interrupts = <0 66 0>; - tx-dma-channel = <&pdma0 7>; /* preliminary */ - rx-dma-channel = <&pdma0 6>; /* preliminary */ + dmas = <&pdma0 7>, <&pdma0 6>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 327>, <&clock 159>; @@ -312,8 +312,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13930000 0x100>; interrupts = <0 67 0>; - tx-dma-channel = <&pdma1 7>; /* preliminary */ - rx-dma-channel = <&pdma1 6>; /* preliminary */ + dmas = <&pdma1 7>, <&pdma1 6>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 328>, <&clock 160>; @@ -327,8 +327,8 @@ compatible = "samsung,exynos4210-spi"; reg = <0x13940000 0x100>; interrupts = <0 68 0>; - tx-dma-channel = <&pdma0 9>; /* preliminary */ - rx-dma-channel = <&pdma0 8>; /* preliminary */ + dmas = <&pdma0 9>, <&pdma0 8>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clock 329>, <&clock 161>; -- cgit v0.10.2 From d1b8a41d316ba2e5de18a8bb29796f2b09e56d31 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Add camera subsystem device nodes to exynos4.dtsi This patch adds common Exynos4 SoC series FIMC and MIPI CSIS device nodes. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index bce2254..597cfcf 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -36,6 +36,12 @@ i2c5 = &i2c_5; i2c6 = &i2c_6; i2c7 = &i2c_7; + csis0 = &csis_0; + csis1 = &csis_1; + fimc0 = &fimc_0; + fimc1 = &fimc_1; + fimc2 = &fimc_2; + fimc3 = &fimc_3; }; chipid@10000000 { @@ -92,6 +98,88 @@ reg = <0x10010000 0x400>; }; + camera { + compatible = "samsung,fimc", "simple-bus"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + clock_cam: clock-controller { + #clock-cells = <1>; + }; + + fimc_0: fimc@11800000 { + compatible = "samsung,exynos4210-fimc"; + reg = <0x11800000 0x1000>; + interrupts = <0 84 0>; + clocks = <&clock 256>, <&clock 128>; + clock-names = "fimc", "sclk_fimc"; + samsung,power-domain = <&pd_cam>; + samsung,sysreg = <&sys_reg>; + status = "disabled"; + }; + + fimc_1: fimc@11810000 { + compatible = "samsung,exynos4210-fimc"; + reg = <0x11810000 0x1000>; + interrupts = <0 85 0>; + clocks = <&clock 257>, <&clock 129>; + clock-names = "fimc", "sclk_fimc"; + samsung,power-domain = <&pd_cam>; + samsung,sysreg = <&sys_reg>; + status = "disabled"; + }; + + fimc_2: fimc@11820000 { + compatible = "samsung,exynos4210-fimc"; + reg = <0x11820000 0x1000>; + interrupts = <0 86 0>; + clocks = <&clock 258>, <&clock 130>; + clock-names = "fimc", "sclk_fimc"; + samsung,power-domain = <&pd_cam>; + samsung,sysreg = <&sys_reg>; + status = "disabled"; + }; + + fimc_3: fimc@11830000 { + compatible = "samsung,exynos4210-fimc"; + reg = <0x11830000 0x1000>; + interrupts = <0 87 0>; + clocks = <&clock 259>, <&clock 131>; + clock-names = "fimc", "sclk_fimc"; + samsung,power-domain = <&pd_cam>; + samsung,sysreg = <&sys_reg>; + status = "disabled"; + }; + + csis_0: csis@11880000 { + compatible = "samsung,exynos4210-csis"; + reg = <0x11880000 0x4000>; + interrupts = <0 78 0>; + clocks = <&clock 260>, <&clock 134>; + clock-names = "csis", "sclk_csis"; + bus-width = <4>; + samsung,power-domain = <&pd_cam>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + csis_1: csis@11890000 { + compatible = "samsung,exynos4210-csis"; + reg = <0x11890000 0x4000>; + interrupts = <0 80 0>; + clocks = <&clock 261>, <&clock 135>; + clock-names = "csis", "sclk_csis"; + bus-width = <2>; + samsung,power-domain = <&pd_cam>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + watchdog@10060000 { compatible = "samsung,s3c2410-wdt"; reg = <0x10060000 0x100>; -- cgit v0.10.2 From 582435b339dc3175008ddf59db7d0c93e9f093d9 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Add camera subsystem nodes to exynos4x12.dtsi Add common camera node and Exynos4212/4412 specific nodes for FIMC, MIPI-CSIS, FIMC-LITE and FIMC-IS devices. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 0e24d85..954628c 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -26,6 +26,8 @@ pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; + fimc-lite0 = &fimc_lite_0; + fimc-lite1 = &fimc_lite_1; }; pd_isp: isp-power-domain@10023CA0 { @@ -78,4 +80,100 @@ clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; + + camera { + clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; + clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; + + fimc_0: fimc@11800000 { + compatible = "samsung,exynos4212-fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,isp-wb; + samsung,cam-if; + }; + + fimc_1: fimc@11810000 { + compatible = "samsung,exynos4212-fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,isp-wb; + samsung,cam-if; + }; + + fimc_2: fimc@11820000 { + compatible = "samsung,exynos4212-fimc"; + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,isp-wb; + samsung,lcd-wb; + samsung,cam-if; + }; + + fimc_3: fimc@11830000 { + compatible = "samsung,exynos4212-fimc"; + samsung,pix-limits = <1920 8192 1366 1920>; + samsung,rotators = <0>; + samsung,mainscaler-ext; + samsung,isp-wb; + samsung,lcd-wb; + }; + + fimc_lite_0: fimc-lite@12390000 { + compatible = "samsung,exynos4212-fimc-lite"; + reg = <0x12390000 0x1000>; + interrupts = <0 105 0>; + samsung,power-domain = <&pd_isp>; + clocks = <&clock 353>; + clock-names = "flite"; + status = "disabled"; + }; + + fimc_lite_1: fimc-lite@123A0000 { + compatible = "samsung,exynos4212-fimc-lite"; + reg = <0x123A0000 0x1000>; + interrupts = <0 106 0>; + samsung,power-domain = <&pd_isp>; + clocks = <&clock 354>; + clock-names = "flite"; + status = "disabled"; + }; + + fimc_is: fimc-is@12000000 { + compatible = "samsung,exynos4212-fimc-is", "simple-bus"; + reg = <0x12000000 0x260000>; + interrupts = <0 90 0>, <0 95 0>; + samsung,power-domain = <&pd_isp>; + clocks = <&clock 353>, <&clock 354>, <&clock 355>, + <&clock 356>, <&clock 17>, <&clock 357>, + <&clock 358>, <&clock 359>, <&clock 360>, + <&clock 450>,<&clock 451>, <&clock 452>, + <&clock 453>, <&clock 176>, <&clock 13>, + <&clock 454>, <&clock 395>, <&clock 455>; + clock-names = "lite0", "lite1", "ppmuispx", + "ppmuispmx", "mpll", "isp", + "drc", "fd", "mcuisp", + "ispdiv0", "ispdiv1", "mcuispdiv0", + "mcuispdiv1", "uart", "aclk200", + "div_aclk200", "aclk400mcuisp", + "div_aclk400mcuisp"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + pmu { + reg = <0x10020000 0x3000>; + }; + + i2c1_isp: i2c-isp@12140000 { + compatible = "samsung,exynos4212-i2c-isp"; + reg = <0x12140000 0x100>; + clocks = <&clock 370>; + clock-names = "i2c_isp"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; -- cgit v0.10.2 From 9f1eaef2fc861f375821da57dbec4987c5073b3a Mon Sep 17 00:00:00 2001 From: Jacek Anaszewski Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Add AK8975 device node for Exynos4412 TRATS2 board This patch adds AK8975 magnetometer node and corresponding i2c-gpio bus node for TRATS2 board. Signed-off-by: Jacek Anaszewski Signed-off-by: Kyungmin Park Signed-off-by: Sylwester Nawrocki Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 056b835..cab4c0e 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -19,6 +19,10 @@ model = "Samsung Trats 2 based on Exynos4412"; compatible = "samsung,trats2", "samsung,exynos4412"; + aliases { + i2c8 = &i2c_ak8975; + }; + memory { reg = <0x40000000 0x40000000>; }; @@ -453,4 +457,19 @@ serial@13830000 { status = "okay"; }; + + i2c_ak8975: i2c-gpio-0 { + compatible = "i2c-gpio"; + gpios = <&gpy2 4 0>, <&gpy2 5 0>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + ak8975@0c { + compatible = "ak,ak8975"; + reg = <0x0c>; + gpios = <&gpj0 7 0>; + }; + }; }; -- cgit v0.10.2 From b4fec64758ab46ab80f177ebfea47f331ac01ed0 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:44 +0900 Subject: ARM: dts: Add camera device nodes for Exynos4412 TRATS2 board This patch enables the front camera using the internal camera ISP (FIMC-IS). Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index cab4c0e..5558e5a 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -62,6 +62,15 @@ enable-active-high; }; + cam_io_reg: voltage-regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "CAM_SENSOR_A"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpm0 2 0>; + enable-active-high; + }; + /* More to come */ }; @@ -472,4 +481,83 @@ gpios = <&gpj0 7 0>; }; }; + + camera { + pinctrl-0 = <&cam_port_b_clk_active>; + pinctrl-names = "default"; + status = "okay"; + + fimc_0: fimc@11800000 { + status = "okay"; + }; + + fimc_1: fimc@11810000 { + status = "okay"; + }; + + fimc_2: fimc@11820000 { + status = "okay"; + }; + + fimc_3: fimc@11830000 { + status = "okay"; + }; + + csis_1: csis@11890000 { + vddcore-supply = <&ldo8_reg>; + vddio-supply = <&ldo10_reg>; + clock-frequency = <160000000>; + status = "okay"; + + /* Camera D (4) MIPI CSI-2 (CSIS1) */ + port@4 { + reg = <4>; + csis1_ep: endpoint { + remote-endpoint = <&is_s5k6a3_ep>; + data-lanes = <1>; + samsung,csis-hs-settle = <18>; + samsung,csis-wclk; + }; + }; + }; + + fimc_lite_0: fimc-lite@12390000 { + status = "okay"; + }; + + fimc_lite_1: fimc-lite@123A0000 { + status = "okay"; + }; + + fimc-is@12000000 { + pinctrl-0 = <&fimc_is_uart>; + pinctrl-names = "default"; + status = "okay"; + + i2c1_isp: i2c-isp@12140000 { + pinctrl-0 = <&fimc_is_i2c1>; + pinctrl-names = "default"; + + s5k6a3@10 { + compatible = "samsung,s5k6a3"; + reg = <0x10>; + svdda-supply = <&cam_io_reg>; + svddio-supply = <&ldo19_reg>; + clock-frequency = <24000000>; + /* CAM_B_CLKOUT */ + clocks = <&clock_cam 1>; + clock-names = "mclk"; + samsung,camclk-out = <1>; + gpios = <&gpm1 6 0>; + + port { + is_s5k6a3_ep: endpoint { + remote-endpoint = <&csis1_ep>; + data-lanes = <1>; + }; + }; + }; + }; + }; + }; }; -- cgit v0.10.2 From 201f12674da1df7d8878f71799df540ee932a254 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Tue, 6 Aug 2013 02:49:45 +0900 Subject: ARM: dts: Add SPI1 controller and s5c73m3 sensor node for TRATS2 This patch add dts entries required for the SPI bus used for firware upload by the S5C73M3 camera. Signed-off-by: Andrzej Hajda Signed-off-by: Kyungmin Park Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 5558e5a..fb7b9ae 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -482,6 +482,22 @@ }; }; + spi_1: spi@13930000 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + status = "okay"; + + s5c73m3_spi: s5c73m3 { + compatible = "samsung,s5c73m3"; + spi-max-frequency = <50000000>; + reg = <0>; + controller-data { + cs-gpio = <&gpb 5 0>; + samsung,spi-feedback-delay = <2>; + }; + }; + }; + camera { pinctrl-0 = <&cam_port_b_clk_active>; pinctrl-names = "default"; -- cgit v0.10.2 From 54a8896a6d9fc10b6503f79f5e31fd23ab19d6a4 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:45 +0900 Subject: ARM: dts: Add camera device nodes for Exynos4210 SoCs Add common camera node and detailed properties for the Exynos4210 FIMC devices. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index b7f358a..ef8c2a5 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -125,4 +125,34 @@ clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; + + camera { + clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; + clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; + + fimc_0: fimc@11800000 { + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,cam-if; + }; + + fimc_1: fimc@11810000 { + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,cam-if; + }; + + fimc_2: fimc@11820000 { + samsung,pix-limits = <4224 8192 1920 4224>; + samsung,mainscaler-ext; + samsung,lcd-wb; + }; + + fimc_3: fimc@11830000 { + samsung,pix-limits = <1920 8192 1366 1920>; + samsung,rotators = <0>; + samsung,mainscaler-ext; + samsung,lcd-wb; + }; + }; }; -- cgit v0.10.2 From 39a11311a797cc9f9ff55889f8b0982c8bc72177 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Tue, 6 Aug 2013 02:49:45 +0900 Subject: ARM: dts: Add FIMC nodes for Exynos4210 Trats board Enable FIMC devices on the Trats board. This allows using the device in memory-to-memory mode only. The camera port pinctrl property is now empty and will be updated while support for the camera sensors is added. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 94eebff..199ff1e 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -301,4 +301,26 @@ clock-frequency = <24000000>; }; }; + + camera { + pinctrl-names = "default"; + pinctrl-0 = <>; + status = "okay"; + + fimc_0: fimc@11800000 { + status = "okay"; + }; + + fimc_1: fimc@11810000 { + status = "okay"; + }; + + fimc_2: fimc@11820000 { + status = "okay"; + }; + + fimc_3: fimc@11830000 { + status = "okay"; + }; + }; }; -- cgit v0.10.2 From 645da318cf5c7d40e90af98a350456337c598745 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Tue, 6 Aug 2013 02:49:45 +0900 Subject: ARM: dts: Add Exynos4210 SoC camera port pinctrl nodes Add pinctrl nodes for the camera parallel port CAM_A data bus and the CAM_A_CLKOUT clock output pin. Signed-off-by: Andrzej Hajda Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 553bcea..a7c2128 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -797,6 +797,29 @@ samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; + + cam_port_a_io: cam-port-a-io { + samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3", + "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7", + "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + cam_port_a_clk_active: cam-port-a-clk-active { + samsung,pins = "gpj1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + cam_port_a_clk_idle: cam-port-a-clk-idle { + samsung,pins = "gpj1-3"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; }; pinctrl@03860000 { -- cgit v0.10.2 From b75e2e3d2824803f1e8b620e99cf5f228c58a200 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Tue, 6 Aug 2013 02:49:45 +0900 Subject: ARM: dts: Add S5K5BA sensor regulator definitions for Trats board Add MAX8998 LDO12 and fixed voltage regulator nodes. While at it, all fixed voltage regulator nodes are grouped in a 'regulators' node. Signed-off-by: Andrzej Hajda Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 199ff1e..1c164f2 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -30,13 +30,62 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5"; }; - vemmc_reg: voltage-regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "VMEM_VDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpk0 2 0>; - enable-active-high; + regulators { + compatible = "simple-bus"; + + vemmc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "VMEM_VDD_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpk0 2 0>; + enable-active-high; + }; + + tsp_reg: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "TSP_FIXED_VOLTAGES"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpl0 3 0>; + enable-active-high; + }; + + cam_af_28v_reg: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "8M_AF_2.8V_EN"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpk1 1 0>; + enable-active-high; + }; + + cam_io_en_reg: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "CAM_IO_EN"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpe2 1 0>; + enable-active-high; + }; + + cam_io_12v_reg: regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "8M_1.2V_EN"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&gpe2 5 0>; + enable-active-high; + }; + + vt_core_15v_reg: regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "VT_CORE_1.5V"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + gpio = <&gpe2 2 0>; + enable-active-high; + }; }; sdhci_emmc: sdhci@12510000 { @@ -97,15 +146,6 @@ }; }; - tsp_reg: voltage-regulator { - compatible = "regulator-fixed"; - regulator-name = "TSP_FIXED_VOLTAGES"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpl0 3 0>; - enable-active-high; - }; - i2c@13890000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; @@ -218,6 +258,12 @@ regulator-always-on; }; + vtcam_reg: LDO12 { + regulator-name = "VT_CAM_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + vcclcd_reg: LDO13 { regulator-name = "VCC_3.3V_LCD"; regulator-min-microvolt = <3300000>; -- cgit v0.10.2 From d1bf2abe3a17a9f7ce5e1e04d439cdfc34fb98d0 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:08:32 +0900 Subject: ARM: dts: Move display-timing information inside FIMD DT node for exynos5250 As the display-timing information is parsed by FIMD driver, it makes sense to move the display-timing DT node inside FIMD DT node for exynos5250 Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 49f18c2..d176dbb 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -262,19 +262,22 @@ pinctrl-0 = <&dp_hpd>; }; - display-timings { - native-mode = <&timing0>; - timing0: timing@0 { - /* 1280x800 */ - clock-frequency = <50000>; - hactive = <1280>; - vactive = <800>; - hfront-porch = <4>; - hback-porch = <4>; - hsync-len = <4>; - vback-porch = <4>; - vfront-porch = <4>; - vsync-len = <4>; + fimd@14400000 { + status = "okay"; + display-timings { + native-mode = <&timing0>; + timing0: timing@0 { + /* 1280x800 */ + clock-frequency = <50000>; + hactive = <1280>; + vactive = <800>; + hfront-porch = <4>; + hback-porch = <4>; + hsync-len = <4>; + vback-porch = <4>; + vfront-porch = <4>; + vsync-len = <4>; + }; }; }; -- cgit v0.10.2 From 9ee35a5b7f408f6cb634f4883338e22232cbb078 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:08:32 +0900 Subject: ARM: dts: Update FIMD DT node for Exynos5 SoCs Moves the properties of FIMD DT node which are common across Exynos5 based SoCs like Exynos5250 and Exynos5420 to exynos5.dtsi Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index f65e124..185aba8 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -108,4 +108,13 @@ interrupts = <0 42 0>; status = "disabled"; }; + + fimd@14400000 { + compatible = "samsung,exynos5250-fimd"; + interrupt-parent = <&combiner>; + reg = <0x14400000 0x40000>; + interrupt-names = "fifo", "vsync", "lcd_sys"; + interrupts = <18 4>, <18 5>, <18 6>; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 96d528d..76825ef 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -519,6 +519,7 @@ }; fimd: fimd@14400000 { + status = "okay"; display-timings { native-mode = <&timing0>; timing0: timing@0 { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 6f356ce..c6bc2ba 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -638,12 +638,7 @@ }; }; - fimd { - compatible = "samsung,exynos5250-fimd"; - interrupt-parent = <&combiner>; - reg = <0x14400000 0x40000>; - interrupt-names = "fifo", "vsync", "lcd_sys"; - interrupts = <18 4>, <18 5>, <18 6>; + fimd@14400000 { clocks = <&clock 133>, <&clock 339>; clock-names = "sclk_fimd", "fimd"; }; -- cgit v0.10.2 From dcfca2ccc64f824c229d9938b1b9f72aaf78094e Mon Sep 17 00:00:00 2001 From: Yadwinder Singh Brar Date: Wed, 14 Aug 2013 17:08:32 +0900 Subject: ARM: dts: Add basic PM domains for EXYNOS5420 Add DT nodes for gsc, isp, mfc, disp, mau, g2d and msc PM domains. Signed-off-by: Yadwinder Singh Brar Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8c54c4b..884d8f4 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -90,6 +90,41 @@ }; }; + gsc_pd: power-domain@10044000 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044000 0x20>; + }; + + isp_pd: power-domain@10044020 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044020 0x20>; + }; + + mfc_pd: power-domain@10044060 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044060 0x20>; + }; + + disp_pd: power-domain@100440C0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440C0 0x20>; + }; + + mau_pd: power-domain@100440E0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440E0 0x20>; + }; + + g2d_pd: power-domain@10044100 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044100 0x20>; + }; + + msc_pd: power-domain@10044120 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044120 0x20>; + }; + pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13400000 0x1000>; -- cgit v0.10.2 From ee3381d4621fe99ea76ac084e4f5109f27719333 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:08:33 +0900 Subject: ARM: dts: Add FIMD DT node to exynos5420 DTS files Adds FIMD DT node to exynos5420 based SMDK. Also adds display-timimg information node. Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 08607df..0c0249c 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -30,4 +30,23 @@ clock-frequency = <24000000>; }; }; + + fimd@14400000 { + status = "okay"; + display-timings { + native-mode = <&timing0>; + timing0: timing@0 { + clock-frequency = <50000>; + hactive = <2560>; + vactive = <1600>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + vback-porch = <16>; + vfront-porch = <8>; + vsync-len = <6>; + }; + }; + }; + }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 884d8f4..2f98c89 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -180,4 +180,11 @@ clocks = <&clock 260>, <&clock 131>; clock-names = "uart", "clk_uart_baud0"; }; + + fimd@14400000 { + samsung,power-domain = <&disp_pd>; + clocks = <&clock 147>, <&clock 421>; + clock-names = "sclk_fimd", "fimd"; + }; + }; -- cgit v0.10.2 From 77899d5320eacbccaf2ff0dff2b9f02cde2e0e32 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:15:00 +0900 Subject: ARM: dts: Update DP controller DT Node for Exynos5 based SoCs Moves the properties of DP controller to exynos5.dtsi which are common across exynos5 SoCs like Exynos5250 and Exynos5420. The PHY DP Node is based on Jingoo Han's patch at https://patchwork.linuxtv.org/patch/19189/ Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 185aba8..6afa57d 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -117,4 +117,14 @@ interrupts = <18 4>, <18 5>, <18 6>; status = "disabled"; }; + + dp-controller@145B0000 { + compatible = "samsung,exynos5-dp"; + reg = <0x145B0000 0x1000>; + interrupts = <10 3>; + interrupt-parent = <&combiner>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 76825ef..ca43020 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -509,13 +509,14 @@ }; }; - dp-controller { + dp-controller@145B0000 { samsung,color-space = <0>; samsung,dynamic-range = <0>; samsung,ycbcr-coeff = <0>; samsung,color-depth = <1>; samsung,link-rate = <0x0a>; samsung,lane-count = <4>; + status = "okay"; }; fimd: fimd@14400000 { diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index d176dbb..2538b32 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -250,7 +250,7 @@ samsung,vbus-gpio = <&gpx2 6 0>; }; - dp-controller { + dp-controller@145B0000 { samsung,color-space = <0>; samsung,dynamic-range = <0>; samsung,ycbcr-coeff = <0>; @@ -260,6 +260,7 @@ pinctrl-names = "default"; pinctrl-0 = <&dp_hpd>; + status = "okay"; }; fimd@14400000 { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index c6bc2ba..f46b06a 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -622,20 +622,17 @@ interrupts = <0 94 0>; }; - dp-controller { - compatible = "samsung,exynos5-dp"; - reg = <0x145b0000 0x1000>; - interrupts = <10 3>; - interrupt-parent = <&combiner>; + dp_phy: video-phy@10040720 { + compatible = "samsung,exynos5250-dp-video-phy"; + reg = <0x10040720 4>; + #phy-cells = <0>; + }; + + dp-controller@145B0000 { clocks = <&clock 342>; clock-names = "dp"; - #address-cells = <1>; - #size-cells = <0>; - - dptx-phy { - reg = <0x10040720>; - samsung,enable-mask = <1>; - }; + phys = <&dp_phy>; + phy-names = "dp"; }; fimd@14400000 { -- cgit v0.10.2 From 1339d33ab1b4b7c64f3a786c3c1714f24a6fbd42 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:15:06 +0900 Subject: ARM: dts: Add DP controller DT node to exynos5420 SoC Adds DP controller DT node to exynos5420 SoC Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 0c0249c..ce7bb64 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -31,6 +31,16 @@ }; }; + dp-controller@145B0000 { + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + status = "okay"; + }; + fimd@14400000 { status = "okay"; display-timings { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 2f98c89..b1a7037 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -181,10 +181,22 @@ clock-names = "uart", "clk_uart_baud0"; }; + dp_phy: video-phy@10040728 { + compatible = "samsung,exynos5250-dp-video-phy"; + reg = <0x10040728 4>; + #phy-cells = <0>; + }; + + dp-controller@145B0000 { + clocks = <&clock 412>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; + }; + fimd@14400000 { samsung,power-domain = <&disp_pd>; clocks = <&clock 147>, <&clock 421>; clock-names = "sclk_fimd", "fimd"; }; - }; -- cgit v0.10.2 From 4e780892740d8d65dccf3bc4a1258ab1130440fd Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Wed, 14 Aug 2013 17:15:10 +0900 Subject: ARM: dts: Add pin state information for DP HPD support to Exynos5420 Add pin state information for DP HPD support that requires pin configuration support using pinctrl interface. Signed-off-by: Vikas Sajjan Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 5848c42..e695aba 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -59,6 +59,13 @@ interrupt-controller; #interrupt-cells = <2>; }; + + dp_hpd: dp_hpd { + samsung,pins = "gpx0-7"; + samsung,pin-function = <3>; + samsung,pin-pud = <0>; + samaung,pin-drv = <0>; + }; }; pinctrl@13410000 { diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index ce7bb64..bafba25 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -32,6 +32,8 @@ }; dp-controller@145B0000 { + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; samsung,color-space = <0>; samsung,dynamic-range = <0>; samsung,ycbcr-coeff = <0>; -- cgit v0.10.2 From e3e03f99a17ce6e923e7b121fc23448683bfbebb Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Mon, 19 Aug 2013 04:30:16 +0900 Subject: ARM: dts: Add secure-firmware boot support for OrigenQaud board OrigenQuad board boots with secure firmware support. Enable support for reading smc commands. The binding has been updated as per the documentation provided in Documentation/devicetree/bindings/arm/samsung-boards.txt. Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 7993641..8768b03 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -27,6 +27,11 @@ bootargs ="console=ttySAC2,115200"; }; + firmware@0203F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0203F000 0x1000>; + }; + mmc_reg: voltage-regulator { compatible = "regulator-fixed"; regulator-name = "VMEM_VDD_2.8V"; -- cgit v0.10.2 From 7c1b0ec52969e6e2fb5676dfc74eb2770bc4c7b2 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 19 Aug 2013 04:33:22 +0900 Subject: ARM: dts: Enable USB hub on Arndale The Arndale has a SMSC USB3503 connected in hardware only mode like a PHY, support it using the usb-nop-xceiv binding. Note that due to a regrettable decision to use a regulator to represent the reset signal this uses a fixed voltage regulator to do that, there is a plan to use the reset controller binding once that is merged so it does not seem worthwhile to fix the usb-nop-xceiv driver at this point. Signed-off-by: Mark Brown Tested-by: Tushar Behera Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index ca43020..3e4589b 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -541,4 +541,18 @@ rtc { status = "okay"; }; + + usb_hub_bus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + // SMSC USB3503 connected in hardware only mode as a PHY + usb_hub: usb_hub { + compatible = "smsc,usb3503a"; + + reset-gpios = <&gpx3 5 1>; + connect-gpios = <&gpd1 7 1>; + }; + }; }; -- cgit v0.10.2 From 15ac869375030824ac344038a9dce59fe93a8b9c Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 19 Aug 2013 04:33:28 +0900 Subject: ARM: dts: Hook up internal PHY on Arndale While the Linux driver stack is capable of figuring this out for itself document the fact that we really do use the internal PHY even with the directly wired hub on the board to save anyone else having to work this out for themselves. Signed-off-by: Mark Brown Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 3e4589b..452d0b0 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -555,4 +555,8 @@ connect-gpios = <&gpd1 7 1>; }; }; + + usb@12110000 { + usb-phy = <&usb2_phy>; + }; }; -- cgit v0.10.2 From 77634289286aaef9c9eb9b2b6a66d688509ee335 Mon Sep 17 00:00:00 2001 From: Arun Kumar K Date: Mon, 19 Aug 2013 04:43:00 +0900 Subject: ARM: dts: Update clocks entry in MFC binding documentation MFC driver is updated to use only one clock instead of two. Correcting this in the binding documentation. Signed-off-by: Arun Kumar K Signed-off-by: Kukjin Kim diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index df37b02..d75c3e5 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -15,9 +15,9 @@ Required properties: mapped region. - interrupts : MFC interrupt number to the CPU. - - clocks : from common clock binding: handle to mfc clocks. - - clock-names : from common clock binding: must contain "sclk_mfc" and "mfc", - corresponding to entries in the clocks property. + - clocks : from common clock binding: handle to mfc clock. + - clock-names : from common clock binding: must contain "mfc", + corresponding to entry in the clocks property. - samsung,mfc-r : Base address of the first memory bank used by MFC for DMA contiguous memory allocation and its size. @@ -37,8 +37,8 @@ mfc: codec@13400000 { reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; - clocks = <&clock 170>, <&clock 273>; - clock-names = "sclk_mfc", "mfc"; + clocks = <&clock 273>; + clock-names = "mfc"; }; Board specific DT entry: -- cgit v0.10.2 From 3a0ef8dcdc31036892589a49be8e175de46d1e6c Mon Sep 17 00:00:00 2001 From: Arun Kumar K Date: Mon, 19 Aug 2013 04:43:00 +0900 Subject: ARM: dts: Remove unsused MFC clock from exynos4 Removes the unused sclk_mfc from exynos4 dtsi file. Signed-off-by: Arun Kumar K Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 597cfcf..42aa0c9 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -248,8 +248,8 @@ reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; - clocks = <&clock 170>, <&clock 273>; - clock-names = "sclk_mfc", "mfc"; + clocks = <&clock 273>; + clock-names = "mfc"; status = "disabled"; }; -- cgit v0.10.2 From 8b6bea33b445f0c96930180a0b9004613f72c6f0 Mon Sep 17 00:00:00 2001 From: Arun Kumar K Date: Mon, 19 Aug 2013 04:43:01 +0900 Subject: ARM: dts: Update 5250 MFC node The patch adds the MFC clock entry for the 5250 SoC. Signed-off-by: Arun Kumar K Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index f46b06a..63ef124 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -176,6 +176,8 @@ reg = <0x11000000 0x10000>; interrupts = <0 96 0>; samsung,power-domain = <&pd_mfc>; + clocks = <&clock 266>; + clock-names = "mfc"; }; rtc { -- cgit v0.10.2 From f09d062fd48fb0eb4dfed229abcd772008d4f451 Mon Sep 17 00:00:00 2001 From: Arun Kumar K Date: Mon, 19 Aug 2013 04:43:01 +0900 Subject: ARM: dts: Add MFC node for exynos 5420 The patch adds MFC nodes for exynos 5420. Signed-off-by: Arun Kumar K Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index b1a7037..0883870 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -65,6 +65,14 @@ #clock-cells = <1>; }; + codec@11000000 { + compatible = "samsung,mfc-v7"; + reg = <0x11000000 0x10000>; + interrupts = <0 96 0>; + clocks = <&clock 401>; + clock-names = "mfc"; + }; + mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; -- cgit v0.10.2 From 0bd03f6ff628148329e9efed07f146a9532061ec Mon Sep 17 00:00:00 2001 From: Padmavathi Venna Date: Mon, 19 Aug 2013 04:56:33 +0900 Subject: ARM: dts: Correct the /include entry on exynos5420 dtsi file This patch corrects the /include to #include on exynos5420 Signed-off-by: Padmavathi Venna Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 0883870..fef1b2e 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -14,7 +14,7 @@ */ #include "exynos5.dtsi" -/include/ "exynos5420-pinctrl.dtsi" +#include "exynos5420-pinctrl.dtsi" / { compatible = "samsung,exynos5420"; -- cgit v0.10.2 From 35e8277520861a8a4f1dfde8977ec9c9fab03564 Mon Sep 17 00:00:00 2001 From: Andrew Bresticker Date: Mon, 19 Aug 2013 04:58:38 +0900 Subject: ARM: dts: add audio clock controller for exynos5420 This adds device-tree bindings for the audio subsystem clock controller on Exynos 5420. Signed-off-by: Andrew Bresticker Reviewed-on: https://gerrit.chromium.org/gerrit/57712 Reviewed-by: Simon Glass Signed-off-by: Padmavathi Venna Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index fef1b2e..c950bad 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -15,6 +15,9 @@ #include "exynos5.dtsi" #include "exynos5420-pinctrl.dtsi" + +#include + / { compatible = "samsung,exynos5420"; @@ -65,6 +68,14 @@ #clock-cells = <1>; }; + clock_audss: audss-clock-controller@3810000 { + compatible = "samsung,exynos5420-audss-clock"; + reg = <0x03810000 0x0C>; + #clock-cells = <1>; + clocks = <&clock 148>; + clock-names = "sclk_audio"; + }; + codec@11000000 { compatible = "samsung,mfc-v7"; reg = <0x11000000 0x10000>; -- cgit v0.10.2 From 6f9d02a056fff8e965da0f940a09d4c39a4fe80a Mon Sep 17 00:00:00 2001 From: Dongjin Kim Date: Mon, 19 Aug 2013 05:07:17 +0900 Subject: ARM: dts: Add USB host node for Exynos4 This patch adds EHCI and OHCI host device nodes for Exynos4. Signed-off-by: Dongjin Kim Acked-by: Jingoo Han Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 42aa0c9..93c2501 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -243,6 +243,24 @@ status = "disabled"; }; + ehci@12580000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0x12580000 0x100>; + interrupts = <0 70 0>; + clocks = <&clock 304>; + clock-names = "usbhost"; + status = "disabled"; + }; + + ohci@12590000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0x12590000 0x100>; + interrupts = <0 70 0>; + clocks = <&clock 304>; + clock-names = "usbhost"; + status = "disabled"; + }; + mfc: codec@13400000 { compatible = "samsung,mfc-v5"; reg = <0x13400000 0x10000>; -- cgit v0.10.2 From 24b44d24dc823cc56060bbffd093b08c8f9139c8 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 26 Aug 2013 02:28:05 +0900 Subject: ARM: dts: Fix the RTC DT node name for Exynos5250 Fixes the RTC DT node name for Exynos5250 as per the DT node naming convention. Signed-off-by: Vikas Sajjan Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 6afa57d..074739d 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -95,7 +95,7 @@ interrupts = <0 54 0>; }; - rtc { + rtc@101E0000 { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; interrupts = <0 43 0>, <0 44 0>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 452d0b0..264913f 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -538,7 +538,7 @@ }; }; - rtc { + rtc@101E0000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index e79331d..24413a6 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -171,7 +171,7 @@ }; }; - rtc { + rtc@101E0000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 63ef124..320e82d 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -180,7 +180,7 @@ clock-names = "mfc"; }; - rtc { + rtc@101E0000 { clocks = <&clock 337>; clock-names = "rtc"; }; -- cgit v0.10.2 From 73784475febfc69945f4663fc0ba287cdf535460 Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 26 Aug 2013 02:28:05 +0900 Subject: ARM: dts: Update the "status" property of RTC DT node for Exynos5250 SoC Moves the RTC DT node's "status" property from exynos5250 board (arndale & snow) dts files to exynos5250.dtsi, since the bindings in exynos5250.dtsi depicts the RTC h/w completely. Signed-off-by: Vikas Sajjan Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 264913f..cee55fa 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -538,10 +538,6 @@ }; }; - rtc@101E0000 { - status = "okay"; - }; - usb_hub_bus { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 24413a6..fd711e2 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -171,10 +171,6 @@ }; }; - rtc@101E0000 { - status = "okay"; - }; - /* * On Snow we've got SIP WiFi and so can keep drive strengths low to * reduce EMI. diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 320e82d..b4740af 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -183,6 +183,7 @@ rtc@101E0000 { clocks = <&clock 337>; clock-names = "rtc"; + status = "okay"; }; tmu@10060000 { -- cgit v0.10.2 From a81951d965d2f110ca6f30cf514361d723ca981c Mon Sep 17 00:00:00 2001 From: Vikas Sajjan Date: Mon, 26 Aug 2013 02:28:05 +0900 Subject: ARM: dts: Add RTC DT node to Exynos5420 SoC Adds RTC DT node to Exynos5420 SoC Signed-off-by: Vikas Sajjan Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c950bad..a18f6b0 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -180,6 +180,12 @@ interrupts = <0 47 0>; }; + rtc@101E0000 { + clocks = <&clock 317>; + clock-names = "rtc"; + status = "okay"; + }; + serial@12C00000 { clocks = <&clock 257>, <&clock 128>; clock-names = "uart", "clk_uart_baud0"; -- cgit v0.10.2 From f408f9db7deb9ce24b4a8875fdf54483d5068627 Mon Sep 17 00:00:00 2001 From: Naveen Krishna Chatradhi Date: Mon, 26 Aug 2013 02:44:30 +0900 Subject: ARM: dts: add ADC device tree node for exynos5420/5250 Add ADC device tree node for exynos5420 and exynos5250 Signed-off-by: Naveen Krishna Chatradhi Signed-off-by: Doug Anderson Signed-off-by: Kukjin Kim diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index b4740af..b2841e6 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -642,4 +642,15 @@ clocks = <&clock 133>, <&clock 339>; clock-names = "sclk_fimd", "fimd"; }; + + adc: adc@12D10000 { + compatible = "samsung,exynos-adc-v1"; + reg = <0x12D10000 0x100>, <0x10040718 0x4>; + interrupts = <0 106 0>; + clocks = <&clock 303>; + clock-names = "adc"; + #io-channel-cells = <1>; + io-channel-ranges; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index a18f6b0..0646fa7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -224,4 +224,15 @@ clocks = <&clock 147>, <&clock 421>; clock-names = "sclk_fimd", "fimd"; }; + + adc: adc@12D10000 { + compatible = "samsung,exynos-adc-v2"; + reg = <0x12D10000 0x100>, <0x10040720 0x4>; + interrupts = <0 106 0>; + clocks = <&clock 270>; + clock-names = "adc"; + #io-channel-cells = <1>; + io-channel-ranges; + status = "disabled"; + }; }; -- cgit v0.10.2