From 0ace8217c242bb3b89263bb38d13ce52960d83d9 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 19 Nov 2015 22:22:27 +0100 Subject: ARM: dts: rockchip: add clock-cells for usb phy nodes Add the #clock-cells properties for the usbphy nodes as they provide the pll-clocks now. Signed-off-by: Heiko Stuebner Reviewed-by: Douglas Anderson Reviewed-by: Michael Turquette Signed-off-by: Heiko Stuebner diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 81cf60c..5692273 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -202,6 +202,7 @@ reg = <0x17c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -209,6 +210,7 @@ reg = <0x188>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 348d46b..9271833 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -171,6 +171,7 @@ reg = <0x10c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -178,6 +179,7 @@ reg = <0x11c>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index c5d7e61..6abbab6 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -968,6 +968,7 @@ reg = <0x320>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy1: usb-phy1 { @@ -975,6 +976,7 @@ reg = <0x334>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; usbphy2: usb-phy2 { @@ -982,6 +984,7 @@ reg = <0x348>; clocks = <&cru SCLK_OTGPHY2>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; -- cgit v0.10.2