From b9e23f321940d2db2c9def8ff723b8464fb86343 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Wed, 3 Jun 2015 17:21:20 +0530 Subject: ARM: OMAP2+: DRA7: clockdomain: change l4per2_7xx_clkdm to SW_WKUP Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence, program clock domain to SW_WKUP. Signed-off-by: Vignesh R Acked-by: Tero Kristo Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley Cc: diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c index 57d5df0..7581e03 100644 --- a/arch/arm/mach-omap2/clockdomains7xx_data.c +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c @@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = { .dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT, .wkdep_srcs = l4per2_wkup_sleep_deps, .sleepdep_srcs = l4per2_wkup_sleep_deps, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain mpu0_7xx_clkdm = { -- cgit v0.10.2 From aaf2c0fbbbb1ec56936e726eec6c253bc4bd469f Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Wed, 10 Jun 2015 14:56:24 +0530 Subject: ARM: OMAP2+: hwmod: add support for lock and unlock hooks Some IP blocks like RTC, needs an additional setting for writing to its registers. This is to prevent any spurious writes from changing the register values. This patch adds optional lock and unlock function pointers to the IP block's hwmod data. These unlock and lock function pointers are called by hwmod code before and after writing sysconfig registers. Signed-off-by: Lokesh Vutla [paul@pwsan.com: fixed indentation level to conform with the rest of the structure members] Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index d78c12e..2ceed31 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -299,7 +299,20 @@ static void _write_sysconfig(u32 v, struct omap_hwmod *oh) /* Module might have lost context, always update cache and register */ oh->_sysc_cache = v; + + /* + * Some IP blocks (such as RTC) require unlocking of IP before + * accessing its registers. If a function pointer is present + * to unlock, then call it before accessing sysconfig and + * call lock after writing sysconfig. + */ + if (oh->class->unlock) + oh->class->unlock(oh); + omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); + + if (oh->class->lock) + oh->class->lock(oh); } /** diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index b5d27ec..13f3902 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -576,6 +576,8 @@ struct omap_hwmod_omap4_prcm { * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown * @reset: ptr to fn to be executed in place of the standard hwmod reset fn * @enable_preprogram: ptr to fn to be executed during device enable + * @lock: ptr to fn to be executed to lock IP registers + * @unlock: ptr to fn to be executed to unlock IP registers * * Represent the class of a OMAP hardware "modules" (e.g. timer, * smartreflex, gpio, uart...) @@ -600,6 +602,8 @@ struct omap_hwmod_class { int (*pre_shutdown)(struct omap_hwmod *oh); int (*reset)(struct omap_hwmod *oh); int (*enable_preprogram)(struct omap_hwmod *oh); + void (*lock)(struct omap_hwmod *oh); + void (*unlock)(struct omap_hwmod *oh); }; /** -- cgit v0.10.2 From f734a9b3b19e01d598d03a336de32a59a52c1575 Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Sat, 11 Jul 2015 20:29:15 +0530 Subject: ARM: OMAP2+: sparse: add missing static declaration Add missing static declaration for file local variables. This fixes sparse warnings of type: arch/arm/mach-omap2/omap_hwmod_81xx_data.c:491:26: warning: symbol 'dm81xx_alwon_l3_slow__gpmc' was not declared. Should it be static? Signed-off-by: Sekhar Nori Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 79f49d9..65024af 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -105,7 +105,7 @@ static void dummy_cpu_resume(void) static void dummy_scu_prepare(unsigned int cpu_id, unsigned int cpu_state) {} -struct cpu_pm_ops omap_pm_ops = { +static struct cpu_pm_ops omap_pm_ops = { .finish_suspend = default_finish_suspend, .resume = dummy_cpu_resume, .scu_prepare = dummy_scu_prepare, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 6dcfd03..36bcd2e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -20,7 +20,7 @@ #include "prm-regbits-24xx.h" #include "wd_timer.h" -struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { +static struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .dma_req = -1, }, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 215d5ef..e97a894 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -480,7 +480,7 @@ static struct omap_hwmod am43xx_dss_core_hwmod = { /* dispc */ -struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = { +static struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = { .manager_count = 1, .has_framedonetv_irq = 0 }; diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index c924137..280789a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -488,7 +488,7 @@ static struct omap_hwmod dm81xx_gpmc_hwmod = { }, }; -struct omap_hwmod_ocp_if dm81xx_alwon_l3_slow__gpmc = { +static struct omap_hwmod_ocp_if dm81xx_alwon_l3_slow__gpmc = { .master = &dm816x_alwon_l3_slow_hwmod, .slave = &dm81xx_gpmc_hwmod, .user = OCP_USER_MPU, @@ -729,7 +729,7 @@ static struct omap_hwmod_class dm816x_mdio_hwmod_class = { .sysc = &dm816x_emac_sysc, }; -struct omap_hwmod dm816x_emac0_mdio_hwmod = { +static struct omap_hwmod dm816x_emac0_mdio_hwmod = { .name = "davinci_mdio", .class = &dm816x_mdio_hwmod_class, .clkdm_name = "alwon_ethernet_clkdm", @@ -747,7 +747,7 @@ struct omap_hwmod dm816x_emac0_mdio_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_emac0__mdio = { +static struct omap_hwmod_ocp_if dm816x_emac0__mdio = { .master = &dm816x_l4_hs_hwmod, .slave = &dm816x_emac0_mdio_hwmod, .user = OCP_USER_MPU, @@ -902,7 +902,7 @@ static struct omap_hwmod_class dm816x_tpcc_hwmod_class = { .name = "tpcc", }; -struct omap_hwmod dm816x_tpcc_hwmod = { +static struct omap_hwmod dm816x_tpcc_hwmod = { .name = "tpcc", .class = &dm816x_tpcc_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", @@ -915,7 +915,7 @@ struct omap_hwmod dm816x_tpcc_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tpcc = { +static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tpcc = { .master = &dm816x_alwon_l3_fast_hwmod, .slave = &dm816x_tpcc_hwmod, .clk = "sysclk4_ck", @@ -935,7 +935,7 @@ static struct omap_hwmod_class dm816x_tptc0_hwmod_class = { .name = "tptc0", }; -struct omap_hwmod dm816x_tptc0_hwmod = { +static struct omap_hwmod dm816x_tptc0_hwmod = { .name = "tptc0", .class = &dm816x_tptc0_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", @@ -948,7 +948,7 @@ struct omap_hwmod dm816x_tptc0_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = { +static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = { .master = &dm816x_alwon_l3_fast_hwmod, .slave = &dm816x_tptc0_hwmod, .clk = "sysclk4_ck", @@ -956,7 +956,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc0 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if dm816x_tptc0__alwon_l3_fast = { +static struct omap_hwmod_ocp_if dm816x_tptc0__alwon_l3_fast = { .master = &dm816x_tptc0_hwmod, .slave = &dm816x_alwon_l3_fast_hwmod, .clk = "sysclk4_ck", @@ -977,7 +977,7 @@ static struct omap_hwmod_class dm816x_tptc1_hwmod_class = { .name = "tptc1", }; -struct omap_hwmod dm816x_tptc1_hwmod = { +static struct omap_hwmod dm816x_tptc1_hwmod = { .name = "tptc1", .class = &dm816x_tptc1_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", @@ -990,7 +990,7 @@ struct omap_hwmod dm816x_tptc1_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = { +static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = { .master = &dm816x_alwon_l3_fast_hwmod, .slave = &dm816x_tptc1_hwmod, .clk = "sysclk4_ck", @@ -998,7 +998,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc1 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if dm816x_tptc1__alwon_l3_fast = { +static struct omap_hwmod_ocp_if dm816x_tptc1__alwon_l3_fast = { .master = &dm816x_tptc1_hwmod, .slave = &dm816x_alwon_l3_fast_hwmod, .clk = "sysclk4_ck", @@ -1019,7 +1019,7 @@ static struct omap_hwmod_class dm816x_tptc2_hwmod_class = { .name = "tptc2", }; -struct omap_hwmod dm816x_tptc2_hwmod = { +static struct omap_hwmod dm816x_tptc2_hwmod = { .name = "tptc2", .class = &dm816x_tptc2_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", @@ -1032,7 +1032,7 @@ struct omap_hwmod dm816x_tptc2_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = { +static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = { .master = &dm816x_alwon_l3_fast_hwmod, .slave = &dm816x_tptc2_hwmod, .clk = "sysclk4_ck", @@ -1040,7 +1040,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc2 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if dm816x_tptc2__alwon_l3_fast = { +static struct omap_hwmod_ocp_if dm816x_tptc2__alwon_l3_fast = { .master = &dm816x_tptc2_hwmod, .slave = &dm816x_alwon_l3_fast_hwmod, .clk = "sysclk4_ck", @@ -1061,7 +1061,7 @@ static struct omap_hwmod_class dm816x_tptc3_hwmod_class = { .name = "tptc3", }; -struct omap_hwmod dm816x_tptc3_hwmod = { +static struct omap_hwmod dm816x_tptc3_hwmod = { .name = "tptc3", .class = &dm816x_tptc3_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", @@ -1074,7 +1074,7 @@ struct omap_hwmod dm816x_tptc3_hwmod = { }, }; -struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = { +static struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = { .master = &dm816x_alwon_l3_fast_hwmod, .slave = &dm816x_tptc3_hwmod, .clk = "sysclk4_ck", @@ -1082,7 +1082,7 @@ struct omap_hwmod_ocp_if dm816x_alwon_l3_fast__tptc3 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if dm816x_tptc3__alwon_l3_fast = { +static struct omap_hwmod_ocp_if dm816x_tptc3__alwon_l3_fast = { .master = &dm816x_tptc3_hwmod, .slave = &dm816x_alwon_l3_fast_hwmod, .clk = "sysclk4_ck", diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 821171c..1a352f5 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -31,7 +31,7 @@ struct pdata_init { void (*fn)(void); }; -struct of_dev_auxdata omap_auxdata_lookup[]; +static struct of_dev_auxdata omap_auxdata_lookup[]; static struct twl4030_gpio_platform_data twl_gpio_auxdata; #ifdef CONFIG_MACH_NOKIA_N8X0 @@ -128,7 +128,7 @@ static void __init omap3_sbc_t3530_legacy_init(void) omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub"); } -struct ti_st_plat_data wilink_pdata = { +static struct ti_st_plat_data wilink_pdata = { .nshutdown_gpio = 137, .dev_name = "/dev/ttyO1", .flow_cntrl = 1, @@ -323,7 +323,7 @@ static struct pdata_init auxdata_quirks[] __initdata = { { /* sentinel */ }, }; -struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { +static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { #ifdef CONFIG_MACH_NOKIA_N8X0 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), -- cgit v0.10.2 From 9e5d46b0510e686550c486c410491291c67e8f0e Mon Sep 17 00:00:00 2001 From: Sekhar Nori Date: Sat, 11 Jul 2015 20:29:16 +0530 Subject: ARM: OMAP2+: sparse: add missing function declarations omap3xxx_restart() and omap44xx_restart() are global functions declared in common.h. Include this file in omap3-restart.c and omap4-restart.c to prevent sparse warnings of type: arch/arm/mach-omap2/omap4-restart.c:22:6: warning: symbol 'omap44xx_restart' was not declared. Should it be static? Signed-off-by: Sekhar Nori Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c index 103a49f..4bdd22e 100644 --- a/arch/arm/mach-omap2/omap3-restart.c +++ b/arch/arm/mach-omap2/omap3-restart.c @@ -14,6 +14,7 @@ #include #include +#include "common.h" #include "control.h" #include "prm.h" diff --git a/arch/arm/mach-omap2/omap4-restart.c b/arch/arm/mach-omap2/omap4-restart.c index a99e7f7..e17136a 100644 --- a/arch/arm/mach-omap2/omap4-restart.c +++ b/arch/arm/mach-omap2/omap4-restart.c @@ -9,6 +9,7 @@ #include #include +#include "common.h" #include "prm.h" /** -- cgit v0.10.2 From 9a0cb98589037c0ccb6210f5fd827445b3710c5e Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Tue, 30 Jun 2015 14:00:16 +0200 Subject: ARM: OMAP2: Delete an unnecessary check The of_node_put() function tests whether its argument is NULL and then returns immediately if so. Furthermore, the kerneldoc for of_node_put() explicitly supports passing in a NULL pointer as its argument. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring [paul@pwsan.com: dropped the omap_device.c and omap_hwmod.c changes for now, edited the commit message accordingly and to note the documented "contract"] Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index cac46d8..15448221 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -208,8 +208,7 @@ static void __init omap_dmtimer_init(void) /* If we are a secure device, remove any secure timer nodes */ if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); - if (np) - of_node_put(np); + of_node_put(np); } } -- cgit v0.10.2 From fac03f12f8d86f349a3b3992ae9d59a53bc250f6 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Thu, 16 Jul 2015 17:23:16 +0530 Subject: ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence remove hardcoding and use the value provided by the omap_prcm_irq_setup structure. This is done to support IO wakeup on am437x series. Signed-off-by: Keerthy Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 6ae0b3a..af0cee0 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -472,6 +472,7 @@ struct omap_prcm_irq { * struct omap_prcm_irq_setup - PRCM interrupt controller details * @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register * @mask: PRM register offset for the first PRM_IRQENABLE_MPU register + * @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register * @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers * @nr_irqs: number of entries in the @irqs array * @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs) @@ -494,6 +495,7 @@ struct omap_prcm_irq { struct omap_prcm_irq_setup { u16 ack; u16 mask; + u16 pm_ctrl; u8 nr_regs; u8 nr_irqs; const struct omap_prcm_irq *irqs; diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 4541700..8149e5a 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = { static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { .ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, .mask = OMAP4_PRM_IRQENABLE_MPU_OFFSET, + .pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET, .nr_regs = 2, .irqs = omap4_prcm_irqs, .nr_irqs = ARRAY_SIZE(omap4_prcm_irqs), @@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void) omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, OMAP4430_WUCLK_CTRL_MASK, inst, - OMAP4_PRM_IO_PMCTRL_OFFSET); + omap4_prcm_irq_setup.pm_ctrl); omap_test_timeout( (((omap4_prm_read_inst_reg(inst, - OMAP4_PRM_IO_PMCTRL_OFFSET) & + omap4_prcm_irq_setup.pm_ctrl) & OMAP4430_WUCLK_STATUS_MASK) >> OMAP4430_WUCLK_STATUS_SHIFT) == 1), MAX_IOPAD_LATCH_TIME, i); @@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void) /* Trigger WUCLKIN disable */ omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0, inst, - OMAP4_PRM_IO_PMCTRL_OFFSET); + omap4_prcm_irq_setup.pm_ctrl); omap_test_timeout( (((omap4_prm_read_inst_reg(inst, - OMAP4_PRM_IO_PMCTRL_OFFSET) & + omap4_prcm_irq_setup.pm_ctrl) & OMAP4430_WUCLK_STATUS_MASK) >> OMAP4430_WUCLK_STATUS_SHIFT) == 0), MAX_IOPAD_LATCH_TIME, i); @@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void) omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK, OMAP4430_GLOBAL_WUEN_MASK, inst, - OMAP4_PRM_IO_PMCTRL_OFFSET); + omap4_prcm_irq_setup.pm_ctrl); } /** -- cgit v0.10.2 From 39db67a5ff5b29f5e55f129e9da0d77dc17f24e2 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Wed, 8 Jul 2015 11:12:24 +0530 Subject: ARM: AM43xx: Add the PRM IRQ register offsets Add the PRM IRQ register offsets. This is needed to support PRM I/O wakeup on AM43xx. Signed-off-by: Keerthy [paul@pwsan.com: improved patch description, moved the PRM_IO_PMCTRL macro out of the CM section] Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index 7eebc27..7c34c44e 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -25,6 +25,13 @@ #define AM43XX_PRM_WKUP_INST 0x2000 #define AM43XX_PRM_DEVICE_INST 0x4000 +/* PRM_IRQ offsets */ +#define AM43XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004 +#define AM43XX_PRM_IRQENABLE_MPU_OFFSET 0x0008 + +/* Other PRM offsets */ +#define AM43XX_PRM_IO_PMCTRL_OFFSET 0x0024 + /* RM RSTCTRL offsets */ #define AM43XX_RM_PER_RSTCTRL_OFFSET 0x0010 #define AM43XX_RM_GFX_RSTCTRL_OFFSET 0x0010 -- cgit v0.10.2 From 6e487001c5b0939e6083327432565559d8aab6fc Mon Sep 17 00:00:00 2001 From: Keerthy Date: Mon, 22 Jun 2015 11:52:53 +0530 Subject: ARM: dts: AM4372: Add PRCM IRQ entry Add PRCM IRQ entry. This is needed for I/O wakeup support. Signed-off-by: Keerthy [paul@pwsan.com: added I/O wakeup note in commit description] Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index c80a3e2..637133b 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -86,6 +86,7 @@ prcm: prcm@1f0000 { compatible = "ti,am4-prcm"; reg = <0x1f0000 0x11000>; + interrupts = ; prcm_clocks: clocks { #address-cells = <1>; -- cgit v0.10.2 From 8d4be7d8bf04f93cfb1512a078bd276efc270793 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Wed, 8 Jul 2015 11:12:26 +0530 Subject: ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded. This makes it difficult to reuse the code for SoCs like AM437x that have a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers. Hence handling the case using offset of 4 to accommodate single set of IRQ* registers generically. Signed-off-by: Keerthy [paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl] Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 8149e5a..e6262d3 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -217,11 +217,11 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs) */ static void omap44xx_prm_read_pending_irqs(unsigned long *events) { - events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET, - OMAP4_PRM_IRQSTATUS_MPU_OFFSET); + int i; - events[1] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_2_OFFSET, - OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); + for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) + events[i] = _read_pending_irq_reg(omap4_prcm_irq_setup.mask + + i * 4, omap4_prcm_irq_setup.ack + i * 4); } /** @@ -251,17 +251,17 @@ static void omap44xx_prm_ocp_barrier(void) */ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) { - saved_mask[0] = - omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_OFFSET); - saved_mask[1] = - omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); + int i; + u16 reg; - omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_OFFSET); - omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); + for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) { + reg = omap4_prcm_irq_setup.mask + i * 4; + + saved_mask[i] = + omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + reg); + omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, reg); + } /* OCP barrier */ omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, @@ -280,10 +280,12 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) */ static void omap44xx_prm_restore_irqen(u32 *saved_mask) { - omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_OFFSET); - omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST, - OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); + int i; + + for (i = 0; i < omap4_prcm_irq_setup.nr_regs; i++) + omap4_prm_write_inst_reg(saved_mask[i], + OMAP4430_PRM_OCP_SOCKET_INST, + omap4_prcm_irq_setup.mask + i * 4); } /** -- cgit v0.10.2 From cc843711fdcf345fe46db6e2a9dbc0091f336746 Mon Sep 17 00:00:00 2001 From: Keerthy Date: Thu, 16 Jul 2015 17:23:18 +0530 Subject: ARM: OMAP4+: PRM: Add AM437x specific data The register offsets for some of the PRM Registers are different hence populating the differing fields. This is needed to support IO wake up feature for am437x family. Signed-off-by: Keerthy Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index e6262d3..3076800 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -18,13 +18,14 @@ #include #include #include - +#include #include "soc.h" #include "iomap.h" #include "common.h" #include "vp.h" #include "prm44xx.h" +#include "prcm43xx.h" #include "prm-regbits-44xx.h" #include "prcm44xx.h" #include "prminst44xx.h" @@ -722,6 +723,15 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) omap4_prminst_set_prm_dev_inst(data->device_inst_offset); + /* Add AM437X specific differences */ + if (of_device_is_compatible(data->np, "ti,am4-prcm")) { + omap4_prcm_irq_setup.nr_irqs = 1; + omap4_prcm_irq_setup.nr_regs = 1; + omap4_prcm_irq_setup.pm_ctrl = AM43XX_PRM_IO_PMCTRL_OFFSET; + omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET; + omap4_prcm_irq_setup.mask = AM43XX_PRM_IRQENABLE_MPU_OFFSET; + } + return prm_register(&omap44xx_prm_ll_data); } -- cgit v0.10.2 From 8740a1444ed3696c3418c2e90481e9528bad60fa Mon Sep 17 00:00:00 2001 From: Keerthy Date: Thu, 16 Jul 2015 17:23:19 +0530 Subject: ARM: PRM: AM437x: Enable IO wakeup feature Enable IO wakeup feature. This enables am437x pads to generate daisy chained wake ups(eventually generates aprcm Interrupt) especially when in low power modes. Signed-off-by: Keerthy Reviewed-by: Paul Walmsley Signed-off-by: Paul Walmsley diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 7add799..1730fc4 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -696,6 +696,7 @@ static struct omap_prcm_init_data am4_prm_data __initdata = { .index = TI_CLKM_PRM, .init = omap44xx_prm_init, .device_inst_offset = AM43XX_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP, }; #endif -- cgit v0.10.2