From 222e8500f5e75d578ce1cc38c0349f89646319c4 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 7 Jan 2013 09:06:16 +0100 Subject: mfd: prcmu: delete pin control helpers These static inlines are duplicating the task now done by the Nomadik pinctrl drivers, so delete them from the prcmu static inlines, also delete the register definitions as these should only be known by the pinctrl driver. Cc: Loic Pallardy Cc: Patrice Chotard Cc: Michel Jaouen Acked-by: Samuel Ortiz Signed-off-by: Linus Walleij diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h index 6ee4247..a65dedd 100644 --- a/include/linux/mfd/db8500-prcmu.h +++ b/include/linux/mfd/db8500-prcmu.h @@ -16,12 +16,6 @@ /* * Registers */ -#define DB8500_PRCM_GPIOCR 0x138 -#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0 BIT(0) -#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD BIT(9) -#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 BIT(11) -#define DB8500_PRCM_GPIOCR_SPI2_SELECT BIT(23) - #define DB8500_PRCM_LINE_VALUE 0x170 #define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3) diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index c202d6c..ac60147 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -626,85 +626,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits) prcmu_write_masked(reg, bits, 0); } -#if defined(CONFIG_UX500_SOC_DB8500) - -/** - * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1. - */ -static inline void prcmu_enable_spi2(void) -{ - if (cpu_is_u8500()) - prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT); -} - -/** - * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1. - */ -static inline void prcmu_disable_spi2(void) -{ - if (cpu_is_u8500()) - prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT); -} - -/** - * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD - * and UARTMOD on OtherAlternateC3. - */ -static inline void prcmu_enable_stm_mod_uart(void) -{ - if (cpu_is_u8500()) { - prcmu_set(DB8500_PRCM_GPIOCR, - (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 | - DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0)); - } -} - -/** - * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD - * and UARTMOD on OtherAlternateC3. - */ -static inline void prcmu_disable_stm_mod_uart(void) -{ - if (cpu_is_u8500()) { - prcmu_clear(DB8500_PRCM_GPIOCR, - (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 | - DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0)); - } -} - -/** - * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1. - */ -static inline void prcmu_enable_stm_ape(void) -{ - if (cpu_is_u8500()) { - prcmu_set(DB8500_PRCM_GPIOCR, - DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD); - } -} - -/** - * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1. - */ -static inline void prcmu_disable_stm_ape(void) -{ - if (cpu_is_u8500()) { - prcmu_clear(DB8500_PRCM_GPIOCR, - DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD); - } -} - -#else - -static inline void prcmu_enable_spi2(void) {} -static inline void prcmu_disable_spi2(void) {} -static inline void prcmu_enable_stm_mod_uart(void) {} -static inline void prcmu_disable_stm_mod_uart(void) {} -static inline void prcmu_enable_stm_ape(void) {} -static inline void prcmu_disable_stm_ape(void) {} - -#endif - /* PRCMU QoS APE OPP class */ #define PRCMU_QOS_APE_OPP 1 #define PRCMU_QOS_DDR_OPP 2 -- cgit v0.10.2 From b5bbd41784cb607dd4499e893a660a04873d830b Mon Sep 17 00:00:00 2001 From: Maxime Coquelin Date: Thu, 18 Oct 2012 14:55:41 +0200 Subject: ARM: ux500: Introduce cpu_is_u8580() Detect the subrevision v1 of U8540 and U8580. DB8580 is the FDSOI variant of DB8540. Some differences with DB8540 related to clocks will need to be checked with a cpu_is_u8580() function. Signed-off-by: Maxime Coquelin Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/include/mach/id.h index 9c42642..bcc58a8 100644 --- a/arch/arm/mach-ux500/include/mach/id.h +++ b/arch/arm/mach-ux500/include/mach/id.h @@ -61,9 +61,14 @@ static inline bool __attribute_const__ cpu_is_u8540(void) return dbx500_partnumber() == 0x8540; } +static inline bool __attribute_const__ cpu_is_u8580(void) +{ + return dbx500_partnumber() == 0x8580; +} + static inline bool cpu_is_ux540_family(void) { - return cpu_is_u9540() || cpu_is_u8540(); + return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580(); } /* @@ -115,6 +120,20 @@ static inline bool cpu_is_u8500v20_or_later(void) return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11()); } +/* + * 8540 revisions + */ + +static inline bool __attribute_const__ cpu_is_u8540v10(void) +{ + return cpu_is_u8540() && dbx500_revision() == 0xA0; +} + +static inline bool __attribute_const__ cpu_is_u8580v10(void) +{ + return cpu_is_u8580() && dbx500_revision() == 0xA0; +} + static inline bool ux500_is_svp(void) { return false; -- cgit v0.10.2 From 7a4f26097d389c16c9956bc03b81532698d97d64 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 19 Sep 2012 19:31:19 +0200 Subject: ARM: ux500: de-globalize This removes the file from the global kernel include scope, making it a pure mach-ux500 detail. All ASIC specifics needed by drivers shall henceforth be passed from either platform data or the device tree. Cc: Rafael J. Wysocki Acked-by: Samuel Ortiz Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c index 1f47d96..7037d36 100644 --- a/arch/arm/mach-ux500/board-mop500-uib.c +++ b/arch/arm/mach-ux500/board-mop500-uib.c @@ -13,6 +13,7 @@ #include #include "board-mop500.h" +#include "id.h" enum mop500_uib { STUIB, diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 75d5b51..1c1609d 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -10,7 +10,8 @@ #include #include #include -#include + +#include "id.h" static void __iomem *l2x0_base; diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index db0bb75..09c3fee 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -37,7 +37,9 @@ #include "devices-db8500.h" #include "ste-dma40-db8500.h" + #include "board-mop500.h" +#include "id.h" /* minimum static i/o mapping required to boot U8500 platforms */ static struct map_desc u8500_uart_io_desc[] __initdata = { diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 721e7b4..14b7d68 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -27,6 +27,7 @@ #include #include "board-mop500.h" +#include "id.h" void __iomem *_PRCMU_BASE; diff --git a/arch/arm/mach-ux500/id.c b/arch/arm/mach-ux500/id.c index d157992..9f95184 100644 --- a/arch/arm/mach-ux500/id.c +++ b/arch/arm/mach-ux500/id.c @@ -17,6 +17,8 @@ #include #include +#include "id.h" + struct dbx500_asic_id dbx500_id; static unsigned int ux500_read_asicid(phys_addr_t addr) diff --git a/arch/arm/mach-ux500/id.h b/arch/arm/mach-ux500/id.h new file mode 100644 index 0000000..bcc58a8 --- /dev/null +++ b/arch/arm/mach-ux500/id.h @@ -0,0 +1,144 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Author: Rabin Vincent for ST-Ericsson + * License terms: GNU General Public License (GPL) version 2 + */ + +#ifndef __MACH_UX500_ID +#define __MACH_UX500_ID + +/** + * struct dbx500_asic_id - fields of the ASIC ID + * @process: the manufacturing process, 0x40 is 40 nm 0x00 is "standard" + * @partnumber: hithereto 0x8500 for DB8500 + * @revision: version code in the series + */ +struct dbx500_asic_id { + u16 partnumber; + u8 revision; + u8 process; +}; + +extern struct dbx500_asic_id dbx500_id; + +static inline unsigned int __attribute_const__ dbx500_partnumber(void) +{ + return dbx500_id.partnumber; +} + +static inline unsigned int __attribute_const__ dbx500_revision(void) +{ + return dbx500_id.revision; +} + +/* + * SOCs + */ + +static inline bool __attribute_const__ cpu_is_u8500(void) +{ + return dbx500_partnumber() == 0x8500; +} + +static inline bool __attribute_const__ cpu_is_u8520(void) +{ + return dbx500_partnumber() == 0x8520; +} + +static inline bool cpu_is_u8500_family(void) +{ + return cpu_is_u8500() || cpu_is_u8520(); +} + +static inline bool __attribute_const__ cpu_is_u9540(void) +{ + return dbx500_partnumber() == 0x9540; +} + +static inline bool __attribute_const__ cpu_is_u8540(void) +{ + return dbx500_partnumber() == 0x8540; +} + +static inline bool __attribute_const__ cpu_is_u8580(void) +{ + return dbx500_partnumber() == 0x8580; +} + +static inline bool cpu_is_ux540_family(void) +{ + return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580(); +} + +/* + * 8500 revisions + */ + +static inline bool __attribute_const__ cpu_is_u8500ed(void) +{ + return cpu_is_u8500() && dbx500_revision() == 0x00; +} + +static inline bool __attribute_const__ cpu_is_u8500v1(void) +{ + return cpu_is_u8500() && (dbx500_revision() & 0xf0) == 0xA0; +} + +static inline bool __attribute_const__ cpu_is_u8500v10(void) +{ + return cpu_is_u8500() && dbx500_revision() == 0xA0; +} + +static inline bool __attribute_const__ cpu_is_u8500v11(void) +{ + return cpu_is_u8500() && dbx500_revision() == 0xA1; +} + +static inline bool __attribute_const__ cpu_is_u8500v2(void) +{ + return cpu_is_u8500() && ((dbx500_revision() & 0xf0) == 0xB0); +} + +static inline bool cpu_is_u8500v20(void) +{ + return cpu_is_u8500() && (dbx500_revision() == 0xB0); +} + +static inline bool cpu_is_u8500v21(void) +{ + return cpu_is_u8500() && (dbx500_revision() == 0xB1); +} + +static inline bool cpu_is_u8500v22(void) +{ + return cpu_is_u8500() && (dbx500_revision() == 0xB2); +} + +static inline bool cpu_is_u8500v20_or_later(void) +{ + return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11()); +} + +/* + * 8540 revisions + */ + +static inline bool __attribute_const__ cpu_is_u8540v10(void) +{ + return cpu_is_u8540() && dbx500_revision() == 0xA0; +} + +static inline bool __attribute_const__ cpu_is_u8580v10(void) +{ + return cpu_is_u8580() && dbx500_revision() == 0xA0; +} + +static inline bool ux500_is_svp(void) +{ + return false; +} + +#define ux500_unknown_soc() BUG() + +#endif diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index 28d16e7..5201dda 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h @@ -39,7 +39,6 @@ #ifndef __ASSEMBLY__ -#include extern void __iomem *_PRCMU_BASE; #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) diff --git a/arch/arm/mach-ux500/include/mach/id.h b/arch/arm/mach-ux500/include/mach/id.h deleted file mode 100644 index bcc58a8..0000000 --- a/arch/arm/mach-ux500/include/mach/id.h +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Rabin Vincent for ST-Ericsson - * License terms: GNU General Public License (GPL) version 2 - */ - -#ifndef __MACH_UX500_ID -#define __MACH_UX500_ID - -/** - * struct dbx500_asic_id - fields of the ASIC ID - * @process: the manufacturing process, 0x40 is 40 nm 0x00 is "standard" - * @partnumber: hithereto 0x8500 for DB8500 - * @revision: version code in the series - */ -struct dbx500_asic_id { - u16 partnumber; - u8 revision; - u8 process; -}; - -extern struct dbx500_asic_id dbx500_id; - -static inline unsigned int __attribute_const__ dbx500_partnumber(void) -{ - return dbx500_id.partnumber; -} - -static inline unsigned int __attribute_const__ dbx500_revision(void) -{ - return dbx500_id.revision; -} - -/* - * SOCs - */ - -static inline bool __attribute_const__ cpu_is_u8500(void) -{ - return dbx500_partnumber() == 0x8500; -} - -static inline bool __attribute_const__ cpu_is_u8520(void) -{ - return dbx500_partnumber() == 0x8520; -} - -static inline bool cpu_is_u8500_family(void) -{ - return cpu_is_u8500() || cpu_is_u8520(); -} - -static inline bool __attribute_const__ cpu_is_u9540(void) -{ - return dbx500_partnumber() == 0x9540; -} - -static inline bool __attribute_const__ cpu_is_u8540(void) -{ - return dbx500_partnumber() == 0x8540; -} - -static inline bool __attribute_const__ cpu_is_u8580(void) -{ - return dbx500_partnumber() == 0x8580; -} - -static inline bool cpu_is_ux540_family(void) -{ - return cpu_is_u9540() || cpu_is_u8540() || cpu_is_u8580(); -} - -/* - * 8500 revisions - */ - -static inline bool __attribute_const__ cpu_is_u8500ed(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0x00; -} - -static inline bool __attribute_const__ cpu_is_u8500v1(void) -{ - return cpu_is_u8500() && (dbx500_revision() & 0xf0) == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8500v10(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8500v11(void) -{ - return cpu_is_u8500() && dbx500_revision() == 0xA1; -} - -static inline bool __attribute_const__ cpu_is_u8500v2(void) -{ - return cpu_is_u8500() && ((dbx500_revision() & 0xf0) == 0xB0); -} - -static inline bool cpu_is_u8500v20(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB0); -} - -static inline bool cpu_is_u8500v21(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB1); -} - -static inline bool cpu_is_u8500v22(void) -{ - return cpu_is_u8500() && (dbx500_revision() == 0xB2); -} - -static inline bool cpu_is_u8500v20_or_later(void) -{ - return (cpu_is_u8500() && !cpu_is_u8500v10() && !cpu_is_u8500v11()); -} - -/* - * 8540 revisions - */ - -static inline bool __attribute_const__ cpu_is_u8540v10(void) -{ - return cpu_is_u8540() && dbx500_revision() == 0xA0; -} - -static inline bool __attribute_const__ cpu_is_u8580v10(void) -{ - return cpu_is_u8580() && dbx500_revision() == 0xA0; -} - -static inline bool ux500_is_svp(void) -{ - return false; -} - -#define ux500_unknown_soc() BUG() - -#endif diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 3db7782..1a92e07 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -21,9 +21,12 @@ #include #include #include + #include #include +#include "id.h" + /* This is called from headsmp.S to wakeup the secondary core */ extern void u8500_secondary_startup(void); diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index 875309a..c685ad1 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -17,6 +17,8 @@ #include #include +#include "id.h" + #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer, U8500_TWD_BASE, IRQ_LOCALTIMER); diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index 4f154bc..523c940 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c @@ -167,9 +167,6 @@ static struct platform_driver db8500_cpufreq_plat_driver = { static int __init db8500_cpufreq_register(void) { - if (!cpu_is_u8500_family()) - return -ENODEV; - pr_info("cpufreq for DB8500 started\n"); return platform_driver_register(&db8500_cpufreq_plat_driver); } diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index dc8826d..67d8b25 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -36,7 +36,6 @@ #include #include #include -#include #include "dbx500-prcmu-regs.h" /* Offset for the firmware version within the TCPM */ @@ -216,10 +215,8 @@ #define PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1) #define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2) #define PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3) -#define PRCMU_I2C_WRITE(slave) \ - (((slave) << 1) | (cpu_is_u8500v2() ? BIT(6) : 0)) -#define PRCMU_I2C_READ(slave) \ - (((slave) << 1) | BIT(0) | (cpu_is_u8500v2() ? BIT(6) : 0)) +#define PRCMU_I2C_WRITE(slave) (((slave) << 1) | BIT(6)) +#define PRCMU_I2C_READ(slave) (((slave) << 1) | BIT(0) | BIT(6)) #define PRCMU_I2C_STOP_EN BIT(3) /* Mailbox 5 ACKs */ @@ -1049,12 +1046,13 @@ int db8500_prcmu_get_ddr_opp(void) * * This function sets the operating point of the DDR. */ +static bool enable_set_ddr_opp; int db8500_prcmu_set_ddr_opp(u8 opp) { if (opp < DDR_100_OPP || opp > DDR_25_OPP) return -EINVAL; /* Changing the DDR OPP can hang the hardware pre-v21 */ - if (cpu_is_u8500v20_or_later() && !cpu_is_u8500v20()) + if (enable_set_ddr_opp) writeb(opp, PRCM_DDR_SUBSYS_APE_MINBW); return 0; @@ -2790,6 +2788,7 @@ void __init db8500_prcmu_early_init(void) pr_err("prcmu: Unsupported chip version\n"); BUG(); } + tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE); spin_lock_init(&mb0_transfer.lock); spin_lock_init(&mb0_transfer.dbb_irqs_lock); @@ -3104,9 +3103,6 @@ static int db8500_prcmu_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; int irq = 0, err = 0, i; - if (ux500_is_svp()) - return -ENODEV; - init_prcm_registers(); /* Clean up the mailbox interrupts after pre-kernel code. */ @@ -3135,8 +3131,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev) } } - if (cpu_is_u8500v20_or_later()) - prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); + prcmu_config_esram0_deep_sleep(ESRAM0_DEEP_SLEEP_STATE_RET); db8500_prcmu_update_cpufreq(); diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index ac60147..1552806 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -218,8 +218,6 @@ enum ddr_pwrst { #if defined(CONFIG_UX500_SOC_DB8500) -#include - static inline void __init prcmu_early_init(void) { return db8500_prcmu_early_init(); -- cgit v0.10.2