From effd8c363d2c76d1941402cc23835fc986a445d8 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-Koenig Date: Wed, 23 Jul 2014 08:40:05 +0900 Subject: ARM: EXYNOS: remove unused ARCH_EXYNOS doesn't select NEED_MACH_MEMORY_H, so doesn't include and so this file is not used and can go away. Signed-off-by: Uwe Kleine-Koenig Reviewed-by: Tomasz Figa [t.figa@samsung.com: boot tested on Exynos4412-based Trats2 board] Tested-by: Tomasz Figa Reviewed-by: Sachin Kamat [sachin.kamat: Tested on Arndale octa board (Exynos 5420)] Tested-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h deleted file mode 100644 index e19df1f..0000000 --- a/arch/arm/mach-exynos/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - Memory definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H __FILE__ - -#define PLAT_PHYS_OFFSET UL(0x40000000) - -#ifndef CONFIG_ARM_LPAE -/* Maximum of 256MiB in one bank */ -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 28 -#else -#define MAX_PHYSMEM_BITS 36 -#define SECTION_SIZE_BITS 31 -#endif - -#endif /* __ASM_ARCH_MEMORY_H */ -- cgit v0.10.2 From 9740bdd985277a7f71423738c34a2c88cd533f1c Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Aug 2014 03:22:04 +0900 Subject: ARM: S5PV210: move into mach-s5pv210/ This moves into mach-s5pv210 so no more include/mach/ under mach-s5pv210. Signed-off-by: Kukjin Kim Cc: Tomasz Figa diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h deleted file mode 100644 index b14ffcd..0000000 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ /dev/null @@ -1,202 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H __FILE__ - -#include - -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S5P_APLL_LOCK S5P_CLKREG(0x00) -#define S5P_MPLL_LOCK S5P_CLKREG(0x08) -#define S5P_EPLL_LOCK S5P_CLKREG(0x10) -#define S5P_VPLL_LOCK S5P_CLKREG(0x20) - -#define S5P_APLL_CON S5P_CLKREG(0x100) -#define S5P_MPLL_CON S5P_CLKREG(0x108) -#define S5P_EPLL_CON S5P_CLKREG(0x110) -#define S5P_EPLL_CON1 S5P_CLKREG(0x114) -#define S5P_VPLL_CON S5P_CLKREG(0x120) - -#define S5P_CLK_SRC0 S5P_CLKREG(0x200) -#define S5P_CLK_SRC1 S5P_CLKREG(0x204) -#define S5P_CLK_SRC2 S5P_CLKREG(0x208) -#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) -#define S5P_CLK_SRC4 S5P_CLKREG(0x210) -#define S5P_CLK_SRC5 S5P_CLKREG(0x214) -#define S5P_CLK_SRC6 S5P_CLKREG(0x218) - -#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) -#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) - -#define S5P_CLK_DIV0 S5P_CLKREG(0x300) -#define S5P_CLK_DIV1 S5P_CLKREG(0x304) -#define S5P_CLK_DIV2 S5P_CLKREG(0x308) -#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) -#define S5P_CLK_DIV4 S5P_CLKREG(0x310) -#define S5P_CLK_DIV5 S5P_CLKREG(0x314) -#define S5P_CLK_DIV6 S5P_CLKREG(0x318) -#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) - -#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) -#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) -#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) - -#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) -#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) - -#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) -#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) -#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) -#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) -#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) -#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) -#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) - -#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) -#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) -#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) -#define S5P_CLK_OUT S5P_CLKREG(0x500) - -/* DIV/MUX STATUS */ -#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000) -#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004) -#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100) -#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104) - -/* CLKSRC0 */ -#define S5P_CLKSRC0_MUX200_SHIFT (16) -#define S5P_CLKSRC0_MUX200_MASK (0x1 << S5P_CLKSRC0_MUX200_SHIFT) -#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) -#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) - -/* CLKSRC2 */ -#define S5P_CLKSRC2_G3D_SHIFT (0) -#define S5P_CLKSRC2_G3D_MASK (0x3 << S5P_CLKSRC2_G3D_SHIFT) -#define S5P_CLKSRC2_MFC_SHIFT (4) -#define S5P_CLKSRC2_MFC_MASK (0x3 << S5P_CLKSRC2_MFC_SHIFT) - -/* CLKSRC6*/ -#define S5P_CLKSRC6_ONEDRAM_SHIFT (24) -#define S5P_CLKSRC6_ONEDRAM_MASK (0x3 << S5P_CLKSRC6_ONEDRAM_SHIFT) - -/* CLKDIV0 */ -#define S5P_CLKDIV0_APLL_SHIFT (0) -#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) -#define S5P_CLKDIV0_A2M_SHIFT (4) -#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) -#define S5P_CLKDIV0_HCLK200_SHIFT (8) -#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) -#define S5P_CLKDIV0_PCLK100_SHIFT (12) -#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) -#define S5P_CLKDIV0_HCLK166_SHIFT (16) -#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) -#define S5P_CLKDIV0_PCLK83_SHIFT (20) -#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) -#define S5P_CLKDIV0_HCLK133_SHIFT (24) -#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) -#define S5P_CLKDIV0_PCLK66_SHIFT (28) -#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) - -/* CLKDIV2 */ -#define S5P_CLKDIV2_G3D_SHIFT (0) -#define S5P_CLKDIV2_G3D_MASK (0xF << S5P_CLKDIV2_G3D_SHIFT) -#define S5P_CLKDIV2_MFC_SHIFT (4) -#define S5P_CLKDIV2_MFC_MASK (0xF << S5P_CLKDIV2_MFC_SHIFT) - -/* CLKDIV6 */ -#define S5P_CLKDIV6_ONEDRAM_SHIFT (28) -#define S5P_CLKDIV6_ONEDRAM_MASK (0xF << S5P_CLKDIV6_ONEDRAM_SHIFT) - -#define S5P_SWRESET S5P_CLKREG(0x2000) - -#define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) - -/* Registers related to power management */ -#define S5P_PWR_CFG S5P_CLKREG(0xC000) -#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) -#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) -#define S5P_PWR_MODE S5P_CLKREG(0xC00C) -#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) -#define S5P_IDLE_CFG S5P_CLKREG(0xC020) -#define S5P_STOP_CFG S5P_CLKREG(0xC030) -#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) -#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) - -#define S5P_OSC_FREQ S5P_CLKREG(0xC100) -#define S5P_OSC_STABLE S5P_CLKREG(0xC104) -#define S5P_PWR_STABLE S5P_CLKREG(0xC108) -#define S5P_MTC_STABLE S5P_CLKREG(0xC110) -#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) - -#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) -#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) - -#define S5P_OTHERS S5P_CLKREG(0xE000) -#define S5P_OM_STAT S5P_CLKREG(0xE100) -#define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) -#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) -#define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) - -#define S5P_INFORM0 S5P_CLKREG(0xF000) -#define S5P_INFORM1 S5P_CLKREG(0xF004) -#define S5P_INFORM2 S5P_CLKREG(0xF008) -#define S5P_INFORM3 S5P_CLKREG(0xF00C) -#define S5P_INFORM4 S5P_CLKREG(0xF010) -#define S5P_INFORM5 S5P_CLKREG(0xF014) -#define S5P_INFORM6 S5P_CLKREG(0xF018) -#define S5P_INFORM7 S5P_CLKREG(0xF01C) - -#define S5P_RST_STAT S5P_CLKREG(0xA000) -#define S5P_OSC_CON S5P_CLKREG(0x8000) -#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) -#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) -#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) - -#define S5P_IDLE_CFG_TL_MASK (3 << 30) -#define S5P_IDLE_CFG_TM_MASK (3 << 28) -#define S5P_IDLE_CFG_TL_ON (2 << 30) -#define S5P_IDLE_CFG_TM_ON (2 << 28) -#define S5P_IDLE_CFG_DIDLE (1 << 0) - -#define S5P_CFG_WFI_CLEAN (~(3 << 8)) -#define S5P_CFG_WFI_IDLE (1 << 8) -#define S5P_CFG_WFI_STOP (2 << 8) -#define S5P_CFG_WFI_SLEEP (3 << 8) - -#define S5P_OTHER_SYS_INT 24 -#define S5P_OTHER_STA_TYPE 23 -#define S5P_OTHER_SYSC_INTOFF (1 << 0) -#define STA_TYPE_EXPON 0 -#define STA_TYPE_SFR 1 - -#define S5P_PWR_STA_EXP_SCALE 0 -#define S5P_PWR_STA_CNT 4 - -#define S5P_PWR_STABLE_COUNT 85500 - -#define S5P_SLEEP_CFG_OSC_EN (1 << 0) -#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) - -/* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) -#define S5P_OTHERS_USB_SIG_MASK (1 << 16) - -/* S5P_DAC_CONTROL */ -#define S5P_DAC_ENABLE (1) -#define S5P_DAC_DISABLE (0) - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 123163d..21b4b13 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -24,9 +24,8 @@ #include -#include - #include "common.h" +#include "regs-clock.h" static struct sleep_save s5pv210_core_save[] = { /* Clock ETC */ diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h new file mode 100644 index 0000000..4640f0f --- /dev/null +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x08) +#define S5P_EPLL_LOCK S5P_CLKREG(0x10) +#define S5P_VPLL_LOCK S5P_CLKREG(0x20) + +#define S5P_APLL_CON S5P_CLKREG(0x100) +#define S5P_MPLL_CON S5P_CLKREG(0x108) +#define S5P_EPLL_CON S5P_CLKREG(0x110) +#define S5P_EPLL_CON1 S5P_CLKREG(0x114) +#define S5P_VPLL_CON S5P_CLKREG(0x120) + +#define S5P_CLK_SRC0 S5P_CLKREG(0x200) +#define S5P_CLK_SRC1 S5P_CLKREG(0x204) +#define S5P_CLK_SRC2 S5P_CLKREG(0x208) +#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) +#define S5P_CLK_SRC4 S5P_CLKREG(0x210) +#define S5P_CLK_SRC5 S5P_CLKREG(0x214) +#define S5P_CLK_SRC6 S5P_CLKREG(0x218) + +#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) +#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) + +#define S5P_CLK_DIV0 S5P_CLKREG(0x300) +#define S5P_CLK_DIV1 S5P_CLKREG(0x304) +#define S5P_CLK_DIV2 S5P_CLKREG(0x308) +#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) +#define S5P_CLK_DIV4 S5P_CLKREG(0x310) +#define S5P_CLK_DIV5 S5P_CLKREG(0x314) +#define S5P_CLK_DIV6 S5P_CLKREG(0x318) +#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) + +#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) +#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) +#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) + +#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) +#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) + +#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) +#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) +#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) +#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) +#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) +#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) +#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) + +#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) +#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) +#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) +#define S5P_CLK_OUT S5P_CLKREG(0x500) + +/* DIV/MUX STATUS */ +#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000) +#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004) +#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100) +#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104) + +/* CLKSRC0 */ +#define S5P_CLKSRC0_MUX200_SHIFT (16) +#define S5P_CLKSRC0_MUX200_MASK (0x1 << S5P_CLKSRC0_MUX200_SHIFT) +#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) +#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) + +/* CLKSRC2 */ +#define S5P_CLKSRC2_G3D_SHIFT (0) +#define S5P_CLKSRC2_G3D_MASK (0x3 << S5P_CLKSRC2_G3D_SHIFT) +#define S5P_CLKSRC2_MFC_SHIFT (4) +#define S5P_CLKSRC2_MFC_MASK (0x3 << S5P_CLKSRC2_MFC_SHIFT) + +/* CLKSRC6*/ +#define S5P_CLKSRC6_ONEDRAM_SHIFT (24) +#define S5P_CLKSRC6_ONEDRAM_MASK (0x3 << S5P_CLKSRC6_ONEDRAM_SHIFT) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_APLL_SHIFT (0) +#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) +#define S5P_CLKDIV0_A2M_SHIFT (4) +#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) +#define S5P_CLKDIV0_HCLK200_SHIFT (8) +#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) +#define S5P_CLKDIV0_PCLK100_SHIFT (12) +#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) +#define S5P_CLKDIV0_HCLK166_SHIFT (16) +#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) +#define S5P_CLKDIV0_PCLK83_SHIFT (20) +#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) +#define S5P_CLKDIV0_HCLK133_SHIFT (24) +#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) +#define S5P_CLKDIV0_PCLK66_SHIFT (28) +#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) + +/* CLKDIV2 */ +#define S5P_CLKDIV2_G3D_SHIFT (0) +#define S5P_CLKDIV2_G3D_MASK (0xF << S5P_CLKDIV2_G3D_SHIFT) +#define S5P_CLKDIV2_MFC_SHIFT (4) +#define S5P_CLKDIV2_MFC_MASK (0xF << S5P_CLKDIV2_MFC_SHIFT) + +/* CLKDIV6 */ +#define S5P_CLKDIV6_ONEDRAM_SHIFT (28) +#define S5P_CLKDIV6_ONEDRAM_MASK (0xF << S5P_CLKDIV6_ONEDRAM_SHIFT) + +#define S5P_SWRESET S5P_CLKREG(0x2000) + +#define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) + +/* Registers related to power management */ +#define S5P_PWR_CFG S5P_CLKREG(0xC000) +#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) +#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) +#define S5P_PWR_MODE S5P_CLKREG(0xC00C) +#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) +#define S5P_IDLE_CFG S5P_CLKREG(0xC020) +#define S5P_STOP_CFG S5P_CLKREG(0xC030) +#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) +#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) + +#define S5P_OSC_FREQ S5P_CLKREG(0xC100) +#define S5P_OSC_STABLE S5P_CLKREG(0xC104) +#define S5P_PWR_STABLE S5P_CLKREG(0xC108) +#define S5P_MTC_STABLE S5P_CLKREG(0xC110) +#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) + +#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) +#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) + +#define S5P_OTHERS S5P_CLKREG(0xE000) +#define S5P_OM_STAT S5P_CLKREG(0xE100) +#define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) +#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) +#define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) + +#define S5P_INFORM0 S5P_CLKREG(0xF000) +#define S5P_INFORM1 S5P_CLKREG(0xF004) +#define S5P_INFORM2 S5P_CLKREG(0xF008) +#define S5P_INFORM3 S5P_CLKREG(0xF00C) +#define S5P_INFORM4 S5P_CLKREG(0xF010) +#define S5P_INFORM5 S5P_CLKREG(0xF014) +#define S5P_INFORM6 S5P_CLKREG(0xF018) +#define S5P_INFORM7 S5P_CLKREG(0xF01C) + +#define S5P_RST_STAT S5P_CLKREG(0xA000) +#define S5P_OSC_CON S5P_CLKREG(0x8000) +#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) +#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) +#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) + +#define S5P_IDLE_CFG_TL_MASK (3 << 30) +#define S5P_IDLE_CFG_TM_MASK (3 << 28) +#define S5P_IDLE_CFG_TL_ON (2 << 30) +#define S5P_IDLE_CFG_TM_ON (2 << 28) +#define S5P_IDLE_CFG_DIDLE (1 << 0) + +#define S5P_CFG_WFI_CLEAN (~(3 << 8)) +#define S5P_CFG_WFI_IDLE (1 << 8) +#define S5P_CFG_WFI_STOP (2 << 8) +#define S5P_CFG_WFI_SLEEP (3 << 8) + +#define S5P_OTHER_SYS_INT 24 +#define S5P_OTHER_STA_TYPE 23 +#define S5P_OTHER_SYSC_INTOFF (1 << 0) +#define STA_TYPE_EXPON 0 +#define STA_TYPE_SFR 1 + +#define S5P_PWR_STA_EXP_SCALE 0 +#define S5P_PWR_STA_CNT 4 + +#define S5P_PWR_STABLE_COUNT 85500 + +#define S5P_SLEEP_CFG_OSC_EN (1 << 0) +#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) + +/* OTHERS Resgister */ +#define S5P_OTHERS_RET_IO (1 << 31) +#define S5P_OTHERS_RET_CF (1 << 30) +#define S5P_OTHERS_RET_MMC (1 << 29) +#define S5P_OTHERS_RET_UART (1 << 28) +#define S5P_OTHERS_USB_SIG_MASK (1 << 16) + +/* S5P_DAC_CONTROL */ +#define S5P_DAC_ENABLE (1) +#define S5P_DAC_DISABLE (0) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c index 53feff3..43eb1ea 100644 --- a/arch/arm/mach-s5pv210/s5pv210.c +++ b/arch/arm/mach-s5pv210/s5pv210.c @@ -18,9 +18,9 @@ #include #include -#include #include "common.h" +#include "regs-clock.h" static int __init s5pv210_fdt_map_sys(unsigned long node, const char *uname, int depth, void *data) -- cgit v0.10.2 From 68ba947c1208504080397b9fc55a0ae9ba92936d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 14 Sep 2014 02:31:19 +0900 Subject: ARM: EXYNOS: Do not calculate boot address twice Commit b3205dea8fbf ("ARM: EXYNOS: Map SYSRAM through generic DT bindings") introduced local variable boot_reg where boot address from cpu_boot_reg() call is stored. Re-use it instead calling cpu_boot_reg() again. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index a9f1cf7..41ae28d 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -224,7 +224,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) ret = PTR_ERR(boot_reg); goto fail; } - __raw_writel(boot_addr, cpu_boot_reg(core_id)); + __raw_writel(boot_addr, boot_reg); } call_firmware_op(cpu_boot, core_id); @@ -313,7 +313,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) if (IS_ERR(boot_reg)) break; - __raw_writel(boot_addr, cpu_boot_reg(core_id)); + __raw_writel(boot_addr, boot_reg); } } } -- cgit v0.10.2 From f6361c6b3880063c2248d4e453331e3dc1efbf83 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sun, 14 Sep 2014 02:43:09 +0900 Subject: ARM: S3C24XX: remove separate restart code The restart-handler series from Guenter Roeck got accepted recently and implements among other things also the restart handler in the samsung watchdog driver and where applicable in the clock drivers. So there is no need for having the restart callbacks in s3c24xx boards anymore. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index ad5316a..9eb2229 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -32,7 +32,6 @@ config CPU_S3C2410 select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select S3C2410_PM if PM - select SAMSUNG_WDT_RESET help Support for S3C2410 and S3C2410A family from the S3C24XX line of Samsung Mobile CPUs. @@ -76,7 +75,6 @@ config CPU_S3C2442 config CPU_S3C244X def_bool y depends on CPU_S3C2440 || CPU_S3C2442 - select SAMSUNG_WDT_RESET config CPU_S3C2443 bool "SAMSUNG S3C2443" diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 44fa95d..bf50328 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -51,7 +51,6 @@ #include #include #include -#include #include "common.h" @@ -513,7 +512,6 @@ struct platform_device s3c2443_device_dma = { void __init s3c2410_init_clocks(int xtal) { s3c2410_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR); - samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG); } #endif @@ -535,7 +533,6 @@ void __init s3c2416_init_clocks(int xtal) void __init s3c2440_init_clocks(int xtal) { s3c2410_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR); - samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG); } #endif @@ -543,7 +540,6 @@ void __init s3c2440_init_clocks(int xtal) void __init s3c2442_init_clocks(int xtal) { s3c2410_common_clk_init(NULL, xtal, 2, S3C24XX_VA_CLKPWR); - samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG); } #endif diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h index ac3ff12..c7ac7e6 100644 --- a/arch/arm/mach-s3c24xx/common.h +++ b/arch/arm/mach-s3c24xx/common.h @@ -22,7 +22,6 @@ extern int s3c2410a_init(void); extern void s3c2410_map_io(void); extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2410_init_clocks(int xtal); -extern void s3c2410_restart(enum reboot_mode mode, const char *cmd); extern void s3c2410_init_irq(void); #else #define s3c2410_init_clocks NULL @@ -38,7 +37,6 @@ extern void s3c2412_map_io(void); extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2412_init_clocks(int xtal); extern int s3c2412_baseclk_add(void); -extern void s3c2412_restart(enum reboot_mode mode, const char *cmd); extern void s3c2412_init_irq(void); #else #define s3c2412_init_clocks NULL @@ -53,7 +51,6 @@ extern void s3c2416_map_io(void); extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2416_init_clocks(int xtal); extern int s3c2416_baseclk_add(void); -extern void s3c2416_restart(enum reboot_mode mode, const char *cmd); extern void s3c2416_init_irq(void); extern struct syscore_ops s3c2416_irq_syscore_ops; @@ -67,7 +64,6 @@ extern struct syscore_ops s3c2416_irq_syscore_ops; #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) extern void s3c244x_map_io(void); extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); -extern void s3c244x_restart(enum reboot_mode mode, const char *cmd); #else #define s3c244x_init_uarts NULL #endif @@ -98,7 +94,6 @@ extern void s3c2443_map_io(void); extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); extern void s3c2443_init_clocks(int xtal); extern int s3c2443_baseclk_add(void); -extern void s3c2443_restart(enum reboot_mode mode, const char *cmd); extern void s3c2443_init_irq(void); #else #define s3c2443_init_clocks NULL diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h index c3feff3..ffe37bd 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h @@ -42,8 +42,6 @@ #define S3C2443_URSTCON S3C2443_CLKREG(0x88) #define S3C2443_UCLKCON S3C2443_CLKREG(0x8C) -#define S3C2443_SWRST_RESET (0x533c2443) - #define S3C2443_PLLCON_OFF (1<<24) #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c index 5157e25..3e63777 100644 --- a/arch/arm/mach-s3c24xx/mach-amlm5900.c +++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c @@ -247,5 +247,4 @@ MACHINE_START(AML_M5900, "AML_M5900") .init_irq = s3c2410_init_irq, .init_machine = amlm5900_init, .init_time = amlm5900_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c index e053581..d03df0d 100644 --- a/arch/arm/mach-s3c24xx/mach-anubis.c +++ b/arch/arm/mach-s3c24xx/mach-anubis.c @@ -430,5 +430,4 @@ MACHINE_START(ANUBIS, "Simtec-Anubis") .init_machine = anubis_init, .init_irq = s3c2440_init_irq, .init_time = anubis_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c index 9db768f..9ae170f 100644 --- a/arch/arm/mach-s3c24xx/mach-at2440evb.c +++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c @@ -218,5 +218,4 @@ MACHINE_START(AT2440EVB, "AT2440EVB") .init_machine = at2440evb_init, .init_irq = s3c2440_init_irq, .init_time = at2440evb_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c index f9112b8..ed07cf3 100644 --- a/arch/arm/mach-s3c24xx/mach-bast.c +++ b/arch/arm/mach-s3c24xx/mach-bast.c @@ -591,5 +591,4 @@ MACHINE_START(BAST, "Simtec-BAST") .init_irq = s3c2410_init_irq, .init_machine = bast_init, .init_time = bast_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index fc3a08d..6d1e0b9 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c @@ -597,5 +597,4 @@ MACHINE_START(NEO1973_GTA02, "GTA02") .init_irq = s3c2442_init_irq, .init_machine = gta02_machine_init, .init_time = gta02_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index c9a99bb..d35ddc1 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c @@ -747,5 +747,4 @@ MACHINE_START(H1940, "IPAQ-H1940") .init_irq = s3c2410_init_irq, .init_machine = h1940_init, .init_time = h1940_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c index 7804d3c..7d99fe8 100644 --- a/arch/arm/mach-s3c24xx/mach-jive.c +++ b/arch/arm/mach-s3c24xx/mach-jive.c @@ -670,5 +670,4 @@ MACHINE_START(JIVE, "JIVE") .map_io = jive_map_io, .init_machine = jive_machine_init, .init_time = jive_init_time, - .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index 5cc40ec..a852168 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c @@ -695,5 +695,4 @@ MACHINE_START(MINI2440, "MINI2440") .init_machine = mini2440_init, .init_irq = s3c2440_init_irq, .init_time = mini2440_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c index 3ac2a54..171c1f1 100644 --- a/arch/arm/mach-s3c24xx/mach-n30.c +++ b/arch/arm/mach-s3c24xx/mach-n30.c @@ -599,7 +599,6 @@ MACHINE_START(N30, "Acer-N30") .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io, - .restart = s3c2410_restart, MACHINE_END MACHINE_START(N35, "Acer-N35") @@ -610,5 +609,4 @@ MACHINE_START(N35, "Acer-N35") .init_machine = n30_init, .init_irq = s3c2410_init_irq, .map_io = n30_map_io, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c index c82c281..2a61d13 100644 --- a/arch/arm/mach-s3c24xx/mach-nexcoder.c +++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c @@ -159,5 +159,4 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440") .init_machine = nexcoder_init, .init_irq = s3c2440_init_irq, .init_time = nexcoder_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c index 189147b..2f6fdc3 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris.c +++ b/arch/arm/mach-s3c24xx/mach-osiris.c @@ -412,5 +412,4 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS") .init_irq = s3c2440_init_irq, .init_machine = osiris_init, .init_time = osiris_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c index 4583300..345a484 100644 --- a/arch/arm/mach-s3c24xx/mach-otom.c +++ b/arch/arm/mach-s3c24xx/mach-otom.c @@ -122,5 +122,4 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1") .init_machine = otom11_init, .init_irq = s3c2410_init_irq, .init_time = otom11_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c index 228c909..984516e 100644 --- a/arch/arm/mach-s3c24xx/mach-qt2410.c +++ b/arch/arm/mach-s3c24xx/mach-qt2410.c @@ -352,5 +352,4 @@ MACHINE_START(QT2410, "QT2410") .init_irq = s3c2410_init_irq, .init_machine = qt2410_machine_init, .init_time = qt2410_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index e2c6541..c3f2682 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -812,5 +812,4 @@ MACHINE_START(RX1950, "HP iPAQ RX1950") .init_irq = s3c2442_init_irq, .init_machine = rx1950_init_machine, .init_time = rx1950_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c index 6e749ec..cf55196 100644 --- a/arch/arm/mach-s3c24xx/mach-rx3715.c +++ b/arch/arm/mach-s3c24xx/mach-rx3715.c @@ -215,5 +215,4 @@ MACHINE_START(RX3715, "IPAQ-RX3715") .init_irq = s3c2440_init_irq, .init_machine = rx3715_init_machine, .init_time = rx3715_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c index e4dcb9a..f886478 100644 --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c +++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c @@ -51,5 +51,4 @@ DT_MACHINE_START(S3C2416_DT, "Samsung S3C2416 (Flattened Device Tree)") .map_io = s3c2416_dt_map_io, .init_irq = irqchip_init, .init_machine = s3c2416_dt_machine_init, - .restart = s3c2416_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c index 419fadd..27dd660 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2410.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c @@ -124,5 +124,4 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc .init_irq = s3c2410_init_irq, .init_machine = smdk2410_init, .init_time = smdk2410_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c index 10726bf..586e4a3 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c @@ -138,7 +138,6 @@ MACHINE_START(S3C2413, "S3C2413") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .init_time = samsung_timer_init, - .restart = s3c2412_restart, MACHINE_END MACHINE_START(SMDK2412, "SMDK2412") @@ -150,7 +149,6 @@ MACHINE_START(SMDK2412, "SMDK2412") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .init_time = samsung_timer_init, - .restart = s3c2412_restart, MACHINE_END MACHINE_START(SMDK2413, "SMDK2413") @@ -162,5 +160,4 @@ MACHINE_START(SMDK2413, "SMDK2413") .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, .init_time = smdk2413_init_time, - .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c index 24189e8..86394f7 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c @@ -262,5 +262,4 @@ MACHINE_START(SMDK2416, "SMDK2416") .map_io = smdk2416_map_io, .init_machine = smdk2416_machine_init, .init_time = smdk2416_init_time, - .restart = s3c2416_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c index 5fb89c0a..9bb96bf 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2440.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c @@ -185,5 +185,4 @@ MACHINE_START(S3C2440, "SMDK2440") .map_io = smdk2440_map_io, .init_machine = smdk2440_machine_init, .init_time = smdk2440_init_time, - .restart = s3c244x_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c index 0ed7761..87fe5c5 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2443.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c @@ -150,5 +150,4 @@ MACHINE_START(SMDK2443, "SMDK2443") .map_io = smdk2443_map_io, .init_machine = smdk2443_machine_init, .init_time = smdk2443_init_time, - .restart = s3c2443_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c index c616ca2..2deb62f 100644 --- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c +++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c @@ -157,5 +157,4 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER") .init_irq = s3c2410_init_irq, .init_machine = tct_hammer_init, .init_time = tct_hammer_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index f88c584..89f32bd 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c @@ -340,5 +340,4 @@ MACHINE_START(VR1000, "Thorcom-VR1000") .init_machine = vr1000_init, .init_irq = s3c2410_init_irq, .init_time = vr1000_init_time, - .restart = s3c2410_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c index 9d4f647..b4460d5 100644 --- a/arch/arm/mach-s3c24xx/mach-vstms.c +++ b/arch/arm/mach-s3c24xx/mach-vstms.c @@ -165,5 +165,4 @@ MACHINE_START(VSTMS, "VSTMS") .init_machine = vstms_init, .map_io = vstms_map_io, .init_time = vstms_init_time, - .restart = s3c2412_restart, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index 5ffe828..2a6985a 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c @@ -42,7 +42,6 @@ #include #include #include -#include #include #include @@ -135,15 +134,3 @@ int __init s3c2410a_init(void) s3c2410_dev.bus = &s3c2410a_subsys; return s3c2410_init(); } - -void s3c2410_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode == REBOOT_SOFT) { - soft_restart(0); - } - - samsung_wdt_reset(); - - /* we'll take a jump through zero as a poor second */ - soft_restart(0); -} diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index 569f3f5..ecf2c77 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c @@ -48,9 +48,6 @@ #include "regs-dsc.h" #include "s3c2412-power.h" -#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) -#define S3C2412_SWRST_RESET (0x533C2412) - #ifndef CONFIG_CPU_S3C2412_ONLY void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; @@ -128,26 +125,6 @@ static void s3c2412_idle(void) cpu_do_idle(); } -void s3c2412_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode == REBOOT_SOFT) - soft_restart(0); - - /* errata "Watch-dog/Software Reset Problem" specifies that - * this reset must be done with the SYSCLK sourced from - * EXTCLK instead of FOUT to avoid a glitch in the reset - * mechanism. - * - * See the watchdog section of the S3C2412 manual for more - * information on this fix. - */ - - __raw_writel(0x00, S3C2412_CLKSRC); - __raw_writel(S3C2412_SWRST_RESET, S3C2412_SWRST); - - mdelay(1); -} - /* s3c2412_map_io * * register the standard cpu IO areas, and any passed in from the diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index 9fe260a..bfd4da8 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -81,14 +81,6 @@ static struct device s3c2416_dev = { .bus = &s3c2416_subsys, }; -void s3c2416_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode == REBOOT_SOFT) - soft_restart(0); - - __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); -} - int __init s3c2416_init(void) { printk(KERN_INFO "S3C2416: Initializing architecture\n"); diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index c7a804d..87b6b89 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c @@ -61,14 +61,6 @@ static struct device s3c2443_dev = { .bus = &s3c2443_subsys, }; -void s3c2443_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode == REBOOT_SOFT) - soft_restart(0); - - __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); -} - int __init s3c2443_init(void) { printk("S3C2443: Initialising architecture\n"); diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index d1c3e65..177f978 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c @@ -42,7 +42,6 @@ #include #include #include -#include #include "common.h" #include "regs-dsc.h" @@ -137,14 +136,3 @@ struct syscore_ops s3c244x_pm_syscore_ops = { .suspend = s3c244x_suspend, .resume = s3c244x_resume, }; - -void s3c244x_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode == REBOOT_SOFT) - soft_restart(0); - - samsung_wdt_reset(); - - /* we'll take a jump through zero as a poor second */ - soft_restart(0); -} -- cgit v0.10.2