From f69837977a9cb6477917bb9e42e80780d401044e Mon Sep 17 00:00:00 2001
From: Santan Kumar <santan.kumar@nxp.com>
Date: Mon, 19 Jun 2017 15:26:03 +0530
Subject: arm64: dts: ls2081ardb: Update nodes for QSPI, SATA, INA220

Update ls2081ardb.dts for below nodes:
 -As per updated board design, different QSPI flash is connected on
  boards, hence change QSPI flash node from n25q512a to s25fs512ss in
  device tree.
 -Enable dual flash support in QSPI node.
 -Add DTS node for INA220.
 -Enable SATA node.

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Tao Yang <b31903@freescale.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
index 26c55a8..c3375bf 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
@@ -87,6 +87,18 @@
 			};
 		};
 
+		i2c@2 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x02>;
+
+			ina220@40 {
+				compatible = "ti,ina220";
+				reg = <0x40>;
+				shunt-resistor = <500>;
+			};
+		};
+
 		i2c@3 {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -111,25 +123,35 @@
 	};
 };
 
-
 &qspi {
 	status = "okay";
-	flash0: n25q512a@0 {
+	fsl,qspi-has-second-chip;
+	flash0: s25fs512s@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "st,m25p80";
+		compatible = "spansion,m25p80";
+		m25p,fast-read;
 		spi-max-frequency = <20000000>;
 		reg = <0>;
 	};
-	flash1: n25q512a@1 {
+	flash1: s25fs512s@1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "st,m25p80";
+		compatible = "spansion,m25p80";
+		m25p,fast-read;
 		spi-max-frequency = <20000000>;
-		reg = <0>;
+		reg = <1>;
 	};
 };
 
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
 &usb0 {
 	status = "okay";
 };
-- 
cgit v0.10.2