From effd8c363d2c76d1941402cc23835fc986a445d8 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-Koenig Date: Wed, 23 Jul 2014 08:40:05 +0900 Subject: ARM: EXYNOS: remove unused ARCH_EXYNOS doesn't select NEED_MACH_MEMORY_H, so doesn't include and so this file is not used and can go away. Signed-off-by: Uwe Kleine-Koenig Reviewed-by: Tomasz Figa [t.figa@samsung.com: boot tested on Exynos4412-based Trats2 board] Tested-by: Tomasz Figa Reviewed-by: Sachin Kamat [sachin.kamat: Tested on Arndale octa board (Exynos 5420)] Tested-by: Sachin Kamat Signed-off-by: Kukjin Kim diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h deleted file mode 100644 index e19df1f..0000000 --- a/arch/arm/mach-exynos/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - Memory definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H __FILE__ - -#define PLAT_PHYS_OFFSET UL(0x40000000) - -#ifndef CONFIG_ARM_LPAE -/* Maximum of 256MiB in one bank */ -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS 28 -#else -#define MAX_PHYSMEM_BITS 36 -#define SECTION_SIZE_BITS 31 -#endif - -#endif /* __ASM_ARCH_MEMORY_H */ -- cgit v0.10.2 From 9740bdd985277a7f71423738c34a2c88cd533f1c Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Fri, 1 Aug 2014 03:22:04 +0900 Subject: ARM: S5PV210: move into mach-s5pv210/ This moves into mach-s5pv210 so no more include/mach/ under mach-s5pv210. Signed-off-by: Kukjin Kim Cc: Tomasz Figa diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h deleted file mode 100644 index b14ffcd..0000000 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ /dev/null @@ -1,202 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H __FILE__ - -#include - -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S5P_APLL_LOCK S5P_CLKREG(0x00) -#define S5P_MPLL_LOCK S5P_CLKREG(0x08) -#define S5P_EPLL_LOCK S5P_CLKREG(0x10) -#define S5P_VPLL_LOCK S5P_CLKREG(0x20) - -#define S5P_APLL_CON S5P_CLKREG(0x100) -#define S5P_MPLL_CON S5P_CLKREG(0x108) -#define S5P_EPLL_CON S5P_CLKREG(0x110) -#define S5P_EPLL_CON1 S5P_CLKREG(0x114) -#define S5P_VPLL_CON S5P_CLKREG(0x120) - -#define S5P_CLK_SRC0 S5P_CLKREG(0x200) -#define S5P_CLK_SRC1 S5P_CLKREG(0x204) -#define S5P_CLK_SRC2 S5P_CLKREG(0x208) -#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) -#define S5P_CLK_SRC4 S5P_CLKREG(0x210) -#define S5P_CLK_SRC5 S5P_CLKREG(0x214) -#define S5P_CLK_SRC6 S5P_CLKREG(0x218) - -#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) -#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) - -#define S5P_CLK_DIV0 S5P_CLKREG(0x300) -#define S5P_CLK_DIV1 S5P_CLKREG(0x304) -#define S5P_CLK_DIV2 S5P_CLKREG(0x308) -#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) -#define S5P_CLK_DIV4 S5P_CLKREG(0x310) -#define S5P_CLK_DIV5 S5P_CLKREG(0x314) -#define S5P_CLK_DIV6 S5P_CLKREG(0x318) -#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) - -#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) -#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) -#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) - -#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) -#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) - -#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) -#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) -#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) -#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) -#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) -#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) -#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) - -#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) -#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) -#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) -#define S5P_CLK_OUT S5P_CLKREG(0x500) - -/* DIV/MUX STATUS */ -#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000) -#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004) -#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100) -#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104) - -/* CLKSRC0 */ -#define S5P_CLKSRC0_MUX200_SHIFT (16) -#define S5P_CLKSRC0_MUX200_MASK (0x1 << S5P_CLKSRC0_MUX200_SHIFT) -#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) -#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) - -/* CLKSRC2 */ -#define S5P_CLKSRC2_G3D_SHIFT (0) -#define S5P_CLKSRC2_G3D_MASK (0x3 << S5P_CLKSRC2_G3D_SHIFT) -#define S5P_CLKSRC2_MFC_SHIFT (4) -#define S5P_CLKSRC2_MFC_MASK (0x3 << S5P_CLKSRC2_MFC_SHIFT) - -/* CLKSRC6*/ -#define S5P_CLKSRC6_ONEDRAM_SHIFT (24) -#define S5P_CLKSRC6_ONEDRAM_MASK (0x3 << S5P_CLKSRC6_ONEDRAM_SHIFT) - -/* CLKDIV0 */ -#define S5P_CLKDIV0_APLL_SHIFT (0) -#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) -#define S5P_CLKDIV0_A2M_SHIFT (4) -#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) -#define S5P_CLKDIV0_HCLK200_SHIFT (8) -#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) -#define S5P_CLKDIV0_PCLK100_SHIFT (12) -#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) -#define S5P_CLKDIV0_HCLK166_SHIFT (16) -#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) -#define S5P_CLKDIV0_PCLK83_SHIFT (20) -#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) -#define S5P_CLKDIV0_HCLK133_SHIFT (24) -#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) -#define S5P_CLKDIV0_PCLK66_SHIFT (28) -#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) - -/* CLKDIV2 */ -#define S5P_CLKDIV2_G3D_SHIFT (0) -#define S5P_CLKDIV2_G3D_MASK (0xF << S5P_CLKDIV2_G3D_SHIFT) -#define S5P_CLKDIV2_MFC_SHIFT (4) -#define S5P_CLKDIV2_MFC_MASK (0xF << S5P_CLKDIV2_MFC_SHIFT) - -/* CLKDIV6 */ -#define S5P_CLKDIV6_ONEDRAM_SHIFT (28) -#define S5P_CLKDIV6_ONEDRAM_MASK (0xF << S5P_CLKDIV6_ONEDRAM_SHIFT) - -#define S5P_SWRESET S5P_CLKREG(0x2000) - -#define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) - -/* Registers related to power management */ -#define S5P_PWR_CFG S5P_CLKREG(0xC000) -#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) -#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) -#define S5P_PWR_MODE S5P_CLKREG(0xC00C) -#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) -#define S5P_IDLE_CFG S5P_CLKREG(0xC020) -#define S5P_STOP_CFG S5P_CLKREG(0xC030) -#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) -#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) - -#define S5P_OSC_FREQ S5P_CLKREG(0xC100) -#define S5P_OSC_STABLE S5P_CLKREG(0xC104) -#define S5P_PWR_STABLE S5P_CLKREG(0xC108) -#define S5P_MTC_STABLE S5P_CLKREG(0xC110) -#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) - -#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) -#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) - -#define S5P_OTHERS S5P_CLKREG(0xE000) -#define S5P_OM_STAT S5P_CLKREG(0xE100) -#define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) -#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) -#define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) - -#define S5P_INFORM0 S5P_CLKREG(0xF000) -#define S5P_INFORM1 S5P_CLKREG(0xF004) -#define S5P_INFORM2 S5P_CLKREG(0xF008) -#define S5P_INFORM3 S5P_CLKREG(0xF00C) -#define S5P_INFORM4 S5P_CLKREG(0xF010) -#define S5P_INFORM5 S5P_CLKREG(0xF014) -#define S5P_INFORM6 S5P_CLKREG(0xF018) -#define S5P_INFORM7 S5P_CLKREG(0xF01C) - -#define S5P_RST_STAT S5P_CLKREG(0xA000) -#define S5P_OSC_CON S5P_CLKREG(0x8000) -#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) -#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) -#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) - -#define S5P_IDLE_CFG_TL_MASK (3 << 30) -#define S5P_IDLE_CFG_TM_MASK (3 << 28) -#define S5P_IDLE_CFG_TL_ON (2 << 30) -#define S5P_IDLE_CFG_TM_ON (2 << 28) -#define S5P_IDLE_CFG_DIDLE (1 << 0) - -#define S5P_CFG_WFI_CLEAN (~(3 << 8)) -#define S5P_CFG_WFI_IDLE (1 << 8) -#define S5P_CFG_WFI_STOP (2 << 8) -#define S5P_CFG_WFI_SLEEP (3 << 8) - -#define S5P_OTHER_SYS_INT 24 -#define S5P_OTHER_STA_TYPE 23 -#define S5P_OTHER_SYSC_INTOFF (1 << 0) -#define STA_TYPE_EXPON 0 -#define STA_TYPE_SFR 1 - -#define S5P_PWR_STA_EXP_SCALE 0 -#define S5P_PWR_STA_CNT 4 - -#define S5P_PWR_STABLE_COUNT 85500 - -#define S5P_SLEEP_CFG_OSC_EN (1 << 0) -#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) - -/* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) -#define S5P_OTHERS_USB_SIG_MASK (1 << 16) - -/* S5P_DAC_CONTROL */ -#define S5P_DAC_ENABLE (1) -#define S5P_DAC_DISABLE (0) - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index 123163d..21b4b13 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -24,9 +24,8 @@ #include -#include - #include "common.h" +#include "regs-clock.h" static struct sleep_save s5pv210_core_save[] = { /* Clock ETC */ diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h new file mode 100644 index 0000000..4640f0f --- /dev/null +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * S5PV210 - Clock register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_CLOCK_H +#define __ASM_ARCH_REGS_CLOCK_H __FILE__ + +#include + +#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) + +#define S5P_APLL_LOCK S5P_CLKREG(0x00) +#define S5P_MPLL_LOCK S5P_CLKREG(0x08) +#define S5P_EPLL_LOCK S5P_CLKREG(0x10) +#define S5P_VPLL_LOCK S5P_CLKREG(0x20) + +#define S5P_APLL_CON S5P_CLKREG(0x100) +#define S5P_MPLL_CON S5P_CLKREG(0x108) +#define S5P_EPLL_CON S5P_CLKREG(0x110) +#define S5P_EPLL_CON1 S5P_CLKREG(0x114) +#define S5P_VPLL_CON S5P_CLKREG(0x120) + +#define S5P_CLK_SRC0 S5P_CLKREG(0x200) +#define S5P_CLK_SRC1 S5P_CLKREG(0x204) +#define S5P_CLK_SRC2 S5P_CLKREG(0x208) +#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) +#define S5P_CLK_SRC4 S5P_CLKREG(0x210) +#define S5P_CLK_SRC5 S5P_CLKREG(0x214) +#define S5P_CLK_SRC6 S5P_CLKREG(0x218) + +#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) +#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) + +#define S5P_CLK_DIV0 S5P_CLKREG(0x300) +#define S5P_CLK_DIV1 S5P_CLKREG(0x304) +#define S5P_CLK_DIV2 S5P_CLKREG(0x308) +#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) +#define S5P_CLK_DIV4 S5P_CLKREG(0x310) +#define S5P_CLK_DIV5 S5P_CLKREG(0x314) +#define S5P_CLK_DIV6 S5P_CLKREG(0x318) +#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) + +#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) +#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) +#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) + +#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) +#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) + +#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) +#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) +#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) +#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) +#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) +#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) +#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) + +#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) +#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) +#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) +#define S5P_CLK_OUT S5P_CLKREG(0x500) + +/* DIV/MUX STATUS */ +#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000) +#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004) +#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100) +#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104) + +/* CLKSRC0 */ +#define S5P_CLKSRC0_MUX200_SHIFT (16) +#define S5P_CLKSRC0_MUX200_MASK (0x1 << S5P_CLKSRC0_MUX200_SHIFT) +#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) +#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) + +/* CLKSRC2 */ +#define S5P_CLKSRC2_G3D_SHIFT (0) +#define S5P_CLKSRC2_G3D_MASK (0x3 << S5P_CLKSRC2_G3D_SHIFT) +#define S5P_CLKSRC2_MFC_SHIFT (4) +#define S5P_CLKSRC2_MFC_MASK (0x3 << S5P_CLKSRC2_MFC_SHIFT) + +/* CLKSRC6*/ +#define S5P_CLKSRC6_ONEDRAM_SHIFT (24) +#define S5P_CLKSRC6_ONEDRAM_MASK (0x3 << S5P_CLKSRC6_ONEDRAM_SHIFT) + +/* CLKDIV0 */ +#define S5P_CLKDIV0_APLL_SHIFT (0) +#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) +#define S5P_CLKDIV0_A2M_SHIFT (4) +#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) +#define S5P_CLKDIV0_HCLK200_SHIFT (8) +#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) +#define S5P_CLKDIV0_PCLK100_SHIFT (12) +#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) +#define S5P_CLKDIV0_HCLK166_SHIFT (16) +#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) +#define S5P_CLKDIV0_PCLK83_SHIFT (20) +#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) +#define S5P_CLKDIV0_HCLK133_SHIFT (24) +#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) +#define S5P_CLKDIV0_PCLK66_SHIFT (28) +#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) + +/* CLKDIV2 */ +#define S5P_CLKDIV2_G3D_SHIFT (0) +#define S5P_CLKDIV2_G3D_MASK (0xF << S5P_CLKDIV2_G3D_SHIFT) +#define S5P_CLKDIV2_MFC_SHIFT (4) +#define S5P_CLKDIV2_MFC_MASK (0xF << S5P_CLKDIV2_MFC_SHIFT) + +/* CLKDIV6 */ +#define S5P_CLKDIV6_ONEDRAM_SHIFT (28) +#define S5P_CLKDIV6_ONEDRAM_MASK (0xF << S5P_CLKDIV6_ONEDRAM_SHIFT) + +#define S5P_SWRESET S5P_CLKREG(0x2000) + +#define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) + +/* Registers related to power management */ +#define S5P_PWR_CFG S5P_CLKREG(0xC000) +#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) +#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) +#define S5P_PWR_MODE S5P_CLKREG(0xC00C) +#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) +#define S5P_IDLE_CFG S5P_CLKREG(0xC020) +#define S5P_STOP_CFG S5P_CLKREG(0xC030) +#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) +#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) + +#define S5P_OSC_FREQ S5P_CLKREG(0xC100) +#define S5P_OSC_STABLE S5P_CLKREG(0xC104) +#define S5P_PWR_STABLE S5P_CLKREG(0xC108) +#define S5P_MTC_STABLE S5P_CLKREG(0xC110) +#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) + +#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) +#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) + +#define S5P_OTHERS S5P_CLKREG(0xE000) +#define S5P_OM_STAT S5P_CLKREG(0xE100) +#define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) +#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) +#define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) + +#define S5P_INFORM0 S5P_CLKREG(0xF000) +#define S5P_INFORM1 S5P_CLKREG(0xF004) +#define S5P_INFORM2 S5P_CLKREG(0xF008) +#define S5P_INFORM3 S5P_CLKREG(0xF00C) +#define S5P_INFORM4 S5P_CLKREG(0xF010) +#define S5P_INFORM5 S5P_CLKREG(0xF014) +#define S5P_INFORM6 S5P_CLKREG(0xF018) +#define S5P_INFORM7 S5P_CLKREG(0xF01C) + +#define S5P_RST_STAT S5P_CLKREG(0xA000) +#define S5P_OSC_CON S5P_CLKREG(0x8000) +#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) +#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) +#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) + +#define S5P_IDLE_CFG_TL_MASK (3 << 30) +#define S5P_IDLE_CFG_TM_MASK (3 << 28) +#define S5P_IDLE_CFG_TL_ON (2 << 30) +#define S5P_IDLE_CFG_TM_ON (2 << 28) +#define S5P_IDLE_CFG_DIDLE (1 << 0) + +#define S5P_CFG_WFI_CLEAN (~(3 << 8)) +#define S5P_CFG_WFI_IDLE (1 << 8) +#define S5P_CFG_WFI_STOP (2 << 8) +#define S5P_CFG_WFI_SLEEP (3 << 8) + +#define S5P_OTHER_SYS_INT 24 +#define S5P_OTHER_STA_TYPE 23 +#define S5P_OTHER_SYSC_INTOFF (1 << 0) +#define STA_TYPE_EXPON 0 +#define STA_TYPE_SFR 1 + +#define S5P_PWR_STA_EXP_SCALE 0 +#define S5P_PWR_STA_CNT 4 + +#define S5P_PWR_STABLE_COUNT 85500 + +#define S5P_SLEEP_CFG_OSC_EN (1 << 0) +#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) + +/* OTHERS Resgister */ +#define S5P_OTHERS_RET_IO (1 << 31) +#define S5P_OTHERS_RET_CF (1 << 30) +#define S5P_OTHERS_RET_MMC (1 << 29) +#define S5P_OTHERS_RET_UART (1 << 28) +#define S5P_OTHERS_USB_SIG_MASK (1 << 16) + +/* S5P_DAC_CONTROL */ +#define S5P_DAC_ENABLE (1) +#define S5P_DAC_DISABLE (0) + +#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c index 53feff3..43eb1ea 100644 --- a/arch/arm/mach-s5pv210/s5pv210.c +++ b/arch/arm/mach-s5pv210/s5pv210.c @@ -18,9 +18,9 @@ #include #include -#include #include "common.h" +#include "regs-clock.h" static int __init s5pv210_fdt_map_sys(unsigned long node, const char *uname, int depth, void *data) -- cgit v0.10.2 From 91a55d4f690066a249d5cdeca86f0c3164301861 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Thu, 10 Jul 2014 19:14:19 +0200 Subject: ARM: at91: introduce OLD_IRQ_AT91 Kconfig option Introduce the OLD_IRQ_AT91 Kconfig option to prepare migration to the new AIC driver. Select this option for all at91 SoCs and all available boards so that we can later move DT enabled boards to the new irq driver and keep the old implementation when legacy boards are selected. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 6cc6f7a..3dc3a69 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -28,6 +28,11 @@ config OLD_CLK_AT91 bool default AT91_PMC_UNIT && AT91_USE_OLD_CLK +config OLD_IRQ_AT91 + bool + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + config AT91_SAM9_ALT_RESET bool default !ARCH_AT91X40 @@ -47,16 +52,12 @@ config SOC_AT91SAM9 select AT91_SAM9_TIME select CPU_ARM926T select GENERIC_CLOCKEVENTS - select MULTI_IRQ_HANDLER - select SPARSE_IRQ config SOC_SAMA5 bool select AT91_SAM9_TIME select CPU_V7 select GENERIC_CLOCKEVENTS - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select USE_OF menu "Atmel AT91 System-on-Chip" @@ -70,8 +71,7 @@ config ARCH_AT91X40 depends on !MMU select CPU_ARM7TDMI select ARCH_USES_GETTIMEOFFSET - select MULTI_IRQ_HANDLER - select SPARSE_IRQ + select OLD_IRQ_AT91 help Select this if you are using one of Atmel's AT91X40 SoC. @@ -111,8 +111,6 @@ config SOC_AT91RM9200 select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select HAVE_AT91_USB_CLK config SOC_AT91SAM9260 @@ -195,6 +193,7 @@ comment "Generic Board Type" config MACH_AT91RM9200_DT bool "Atmel AT91RM9200 Evaluation Kits with device-tree support" depends on SOC_AT91RM9200 + select OLD_IRQ_AT91 select USE_OF help Select this if you want to experiment device-tree with @@ -203,6 +202,7 @@ config MACH_AT91RM9200_DT config MACH_AT91SAM9_DT bool "Atmel AT91SAM Evaluation Kits with device-tree support" depends on SOC_AT91SAM9 + select OLD_IRQ_AT91 select USE_OF help Select this if you want to experiment device-tree with @@ -211,6 +211,7 @@ config MACH_AT91SAM9_DT config MACH_SAMA5_DT bool "Atmel SAMA5 Evaluation Kits with device-tree support" depends on SOC_SAMA5 + select OLD_IRQ_AT91 select USE_OF select PHYLIB if NETDEVICES help diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt index 44ace32..b774c3d 100644 --- a/arch/arm/mach-at91/Kconfig.non_dt +++ b/arch/arm/mach-at91/Kconfig.non_dt @@ -14,31 +14,37 @@ config ARCH_AT91RM9200 bool "AT91RM9200" select SOC_AT91RM9200 select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 config ARCH_AT91SAM9260 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20" select SOC_AT91SAM9260 select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 config ARCH_AT91SAM9261 bool "AT91SAM9261 or AT91SAM9G10" select SOC_AT91SAM9261 select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 config ARCH_AT91SAM9263 bool "AT91SAM9263" select SOC_AT91SAM9263 select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 config ARCH_AT91SAM9RL bool "AT91SAM9RL" select SOC_AT91SAM9RL select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 config ARCH_AT91SAM9G45 bool "AT91SAM9G45" select SOC_AT91SAM9G45 select AT91_USE_OLD_CLK + select OLD_IRQ_AT91 endchoice diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 78e9cec..d972fd6 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,11 +2,12 @@ # Makefile for the linux kernel. # -obj-y := irq.o gpio.o setup.o sysirq_mask.o +obj-y := gpio.o setup.o sysirq_mask.o obj-m := obj-n := obj- := +obj-$(CONFIG_OLD_IRQ_AT91) += irq.o obj-$(CONFIG_OLD_CLK_AT91) += clock.o obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o -- cgit v0.10.2 From 071926041e5b38f84f2aaac2122c57e398e535b5 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Thu, 10 Jul 2014 19:14:20 +0200 Subject: ARM: at91: enclose at91_aic_xx calls in IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks Enclose at91_aic_xx calls in IS_ENABLED(CONFIG_OLD_IRQ_AT91) blocks in order to prepare migration to the new AIC driver. In the new AIC driver the suspend/resume functions are called by the generic irq framework and are no longer needed in the PM specific code. Moreover, the new AIC driver no longer exposes the at91_aic_base variable which is used by the at91_aic_read functions. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index e955545..5920373 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -206,16 +206,19 @@ static int at91_pm_enter(suspend_state_t state) at91_pinctrl_gpio_suspend(); else at91_gpio_suspend(); - at91_irq_suspend(); - pr_debug("AT91: PM - wake mask %08x, pm state %d\n", - /* remember all the always-wake irqs */ - (at91_pmc_read(AT91_PMC_PCSR) - | (1 << AT91_ID_FIQ) - | (1 << AT91_ID_SYS) - | (at91_get_extern_irq())) - & at91_aic_read(AT91_AIC_IMR), - state); + if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) { + at91_irq_suspend(); + + pr_debug("AT91: PM - wake mask %08x, pm state %d\n", + /* remember all the always-wake irqs */ + (at91_pmc_read(AT91_PMC_PCSR) + | (1 << AT91_ID_FIQ) + | (1 << AT91_ID_SYS) + | (at91_get_extern_irq())) + & at91_aic_read(AT91_AIC_IMR), + state); + } switch (state) { /* @@ -280,12 +283,17 @@ static int at91_pm_enter(suspend_state_t state) goto error; } - pr_debug("AT91: PM - wakeup %08x\n", - at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); + if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) + pr_debug("AT91: PM - wakeup %08x\n", + at91_aic_read(AT91_AIC_IPR) & + at91_aic_read(AT91_AIC_IMR)); error: target_state = PM_SUSPEND_ON; - at91_irq_resume(); + + if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) + at91_irq_resume(); + if (of_have_populated_dt()) at91_pinctrl_gpio_resume(); else diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index f7a07a5..0bf893a 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -49,7 +49,8 @@ void __init at91_init_irq_default(void) void __init at91_init_interrupts(unsigned int *priority) { /* Initialize the AIC interrupt controller */ - at91_aic_init(priority, at91_boot_soc.extern_irq); + if (IS_ENABLED(CONFIG_OLD_IRQ_AT91)) + at91_aic_init(priority, at91_boot_soc.extern_irq); /* Enable GPIO interrupts */ at91_gpio_irq_setup(); -- cgit v0.10.2 From 3b26f39b0ab1f390365701981e831aa128e3e4ac Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Thu, 10 Jul 2014 19:14:21 +0200 Subject: ARM: at91: make use of the new AIC driver for dt enabled boards Remove selection of OLD_IRQ_AT91 when selecting dt boards. Select ATMEL_AIC_IRQ for sama5 SoCs (a kernel compiled for this SoC will always use ATMEL_AIC_IRQ driver). Select ATMEL_AIC_IRQ for at91rm9200 and at91sam9 SoCs only if OLD_IRQ_AT91 is not selected (which means we are compiling a pure DT kernel, without any legacy board support). Remove specific irq init code in all dt board files: this init procedure is automatically handled in of_irq_init which is called by the arm irq core code and is in charge of calling the appropriate aic init functions. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 3dc3a69..dd28e1f 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -50,12 +50,14 @@ config HAVE_AT91_SMD config SOC_AT91SAM9 bool select AT91_SAM9_TIME + select ATMEL_AIC_IRQ if !OLD_IRQ_AT91 select CPU_ARM926T select GENERIC_CLOCKEVENTS config SOC_SAMA5 bool select AT91_SAM9_TIME + select ATMEL_AIC5_IRQ select CPU_V7 select GENERIC_CLOCKEVENTS select USE_OF @@ -108,6 +110,7 @@ endif if SOC_SAM_V4_V5 config SOC_AT91RM9200 bool "AT91RM9200" + select ATMEL_AIC_IRQ if !OLD_IRQ_AT91 select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 @@ -193,7 +196,6 @@ comment "Generic Board Type" config MACH_AT91RM9200_DT bool "Atmel AT91RM9200 Evaluation Kits with device-tree support" depends on SOC_AT91RM9200 - select OLD_IRQ_AT91 select USE_OF help Select this if you want to experiment device-tree with @@ -202,7 +204,6 @@ config MACH_AT91RM9200_DT config MACH_AT91SAM9_DT bool "Atmel AT91SAM Evaluation Kits with device-tree support" depends on SOC_AT91SAM9 - select OLD_IRQ_AT91 select USE_OF help Select this if you want to experiment device-tree with @@ -211,7 +212,6 @@ config MACH_AT91SAM9_DT config MACH_SAMA5_DT bool "Atmel SAMA5 Evaluation Kits with device-tree support" depends on SOC_SAMA5 - select OLD_IRQ_AT91 select USE_OF select PHYLIB if NETDEVICES help diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c index 3a185fa..61ea214 100644 --- a/arch/arm/mach-at91/board-dt-rm9200.c +++ b/arch/arm/mach-at91/board-dt-rm9200.c @@ -24,17 +24,6 @@ #include "at91_aic.h" #include "generic.h" - -static const struct of_device_id irq_of_match[] __initconst = { - { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, - { /*sentinel*/ } -}; - -static void __init at91rm9200_dt_init_irq(void) -{ - of_irq_init(irq_of_match); -} - static const char *at91rm9200_dt_board_compat[] __initdata = { "atmel,at91rm9200", NULL @@ -43,8 +32,6 @@ static const char *at91rm9200_dt_board_compat[] __initdata = { DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") .init_time = at91rm9200_timer_init, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = at91rm9200_dt_initialize, - .init_irq = at91rm9200_dt_init_irq, .dt_compat = at91rm9200_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c index 575b0be..dfa8d48 100644 --- a/arch/arm/mach-at91/board-dt-sam9.c +++ b/arch/arm/mach-at91/board-dt-sam9.c @@ -34,17 +34,6 @@ static void __init sam9_dt_timer_init(void) at91sam926x_pit_init(); } -static const struct of_device_id irq_of_match[] __initconst = { - - { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, - { /*sentinel*/ } -}; - -static void __init at91_dt_init_irq(void) -{ - of_irq_init(irq_of_match); -} - static const char *at91_dt_board_compat[] __initdata = { "atmel,at91sam9", NULL @@ -54,8 +43,6 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") /* Maintainer: Atmel */ .init_time = sam9_dt_timer_init, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = at91_dt_initialize, - .init_irq = at91_dt_init_irq, .dt_compat = at91_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c index 075ec05..d6fe04b 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -35,17 +35,6 @@ static void __init sama5_dt_timer_init(void) at91sam926x_pit_init(); } -static const struct of_device_id irq_of_match[] __initconst = { - - { .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init }, - { /*sentinel*/ } -}; - -static void __init at91_dt_init_irq(void) -{ - of_irq_init(irq_of_match); -} - static int ksz9021rn_phy_fixup(struct phy_device *phy) { int value; @@ -82,9 +71,7 @@ DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") /* Maintainer: Atmel */ .init_time = sama5_dt_timer_init, .map_io = at91_map_io, - .handle_irq = at91_aic5_handle_irq, .init_early = at91_dt_initialize, - .init_irq = at91_dt_init_irq, .init_machine = sama5_dt_device_init, .dt_compat = sama5_dt_board_compat, MACHINE_END -- cgit v0.10.2 From 2626063f86cdce500153e8550334b9331421dc6f Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Thu, 10 Jul 2014 19:14:22 +0200 Subject: ARM: at91: remove old irq material Remove all the material related to AIC5 support: this interrupt controller driver is now implemented in drivers/irqchip/atmel-aic.c. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 3d192c5..cdb3ec9 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -48,11 +48,6 @@ void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; static struct device_node *at91_aic_np; static unsigned int n_irqs = NR_AIC_IRQS; -static unsigned long at91_aic_caps = 0; - -/* AIC5 introduces a Source Select Register */ -#define AT91_AIC_CAP_AIC5 (1 << 0) -#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) #ifdef CONFIG_PM @@ -92,50 +87,14 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) void at91_irq_suspend(void) { - int bit = -1; - - if (has_aic5()) { - /* disable enabled irqs */ - while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - } - /* enable wakeup irqs */ - bit = -1; - while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - } - } else { - at91_aic_write(AT91_AIC_IDCR, *backups); - at91_aic_write(AT91_AIC_IECR, *wakeups); - } + at91_aic_write(AT91_AIC_IDCR, *backups); + at91_aic_write(AT91_AIC_IECR, *wakeups); } void at91_irq_resume(void) { - int bit = -1; - - if (has_aic5()) { - /* disable wakeup irqs */ - while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - } - /* enable irqs disabled for suspend */ - bit = -1; - while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - } - } else { - at91_aic_write(AT91_AIC_IDCR, *wakeups); - at91_aic_write(AT91_AIC_IECR, *backups); - } + at91_aic_write(AT91_AIC_IDCR, *wakeups); + at91_aic_write(AT91_AIC_IECR, *backups); } #else @@ -169,21 +128,6 @@ at91_aic_handle_irq(struct pt_regs *regs) handle_IRQ(irqnr, regs); } -asmlinkage void __exception_irq_entry -at91_aic5_handle_irq(struct pt_regs *regs) -{ - u32 irqnr; - u32 irqstat; - - irqnr = at91_aic_read(AT91_AIC5_IVR); - irqstat = at91_aic_read(AT91_AIC5_ISR); - - if (!irqstat) - at91_aic_write(AT91_AIC5_EOICR, 0); - else - handle_IRQ(irqnr, regs); -} - static void at91_aic_mask_irq(struct irq_data *d) { /* Disable interrupt on AIC */ @@ -192,15 +136,6 @@ static void at91_aic_mask_irq(struct irq_data *d) clear_backup(d->hwirq); } -static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) -{ - /* Disable interrupt on AIC5 */ - at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - /* Update ISR cache */ - clear_backup(d->hwirq); -} - static void at91_aic_unmask_irq(struct irq_data *d) { /* Enable interrupt on AIC */ @@ -209,15 +144,6 @@ static void at91_aic_unmask_irq(struct irq_data *d) set_backup(d->hwirq); } -static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) -{ - /* Enable interrupt on AIC5 */ - at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - /* Update ISR cache */ - set_backup(d->hwirq); -} - static void at91_aic_eoi(struct irq_data *d) { /* @@ -227,11 +153,6 @@ static void at91_aic_eoi(struct irq_data *d) at91_aic_write(AT91_AIC_EOICR, 0); } -static void __maybe_unused at91_aic5_eoi(struct irq_data *d) -{ - at91_aic_write(AT91_AIC5_EOICR, 0); -} - static unsigned long *at91_extern_irq; u32 at91_get_extern_irq(void) @@ -282,16 +203,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) if (srctype < 0) return srctype; - if (has_aic5()) { - at91_aic_write(AT91_AIC5_SSR, - d->hwirq & AT91_AIC5_INTSEL_MSK); - smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; - at91_aic_write(AT91_AIC5_SMR, smr | srctype); - } else { - smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) - & ~AT91_AIC_SRCTYPE; - at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); - } + smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; + at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); return 0; } @@ -331,177 +244,6 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); } -static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) -{ - int i; - - /* - * Perform 8 End Of Interrupt Command to make sure AIC - * will not Lock out nIRQ - */ - for (i = 0; i < 8; i++) - at91_aic_write(AT91_AIC5_EOICR, 0); - - /* - * Spurious Interrupt ID in Spurious Vector Register. - * When there is no current interrupt, the IRQ Vector Register - * reads the value stored in AIC_SPU - */ - at91_aic_write(AT91_AIC5_SPU, spu_vector); - - /* No debugging in AIC: Debug (Protect) Control Register */ - at91_aic_write(AT91_AIC5_DCR, 0); - - /* Disable and clear all interrupts initially */ - for (i = 0; i < n_irqs; i++) { - at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - at91_aic_write(AT91_AIC5_ICCR, 1); - } -} - -#if defined(CONFIG_OF) -static unsigned int *at91_aic_irq_priorities; - -static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - /* Put virq number in Source Vector Register */ - at91_aic_write(AT91_AIC_SVR(hw), virq); - - /* Active Low interrupt, with priority */ - at91_aic_write(AT91_AIC_SMR(hw), - AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); - - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); - - return 0; -} - -static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); - - /* Put virq number in Source Vector Register */ - at91_aic_write(AT91_AIC5_SVR, virq); - - /* Active Low interrupt, with priority */ - at91_aic_write(AT91_AIC5_SMR, - AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); - - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); - - return 0; -} - -static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, - const u32 *intspec, unsigned int intsize, - irq_hw_number_t *out_hwirq, unsigned int *out_type) -{ - if (WARN_ON(intsize < 3)) - return -EINVAL; - if (WARN_ON(intspec[0] >= n_irqs)) - return -EINVAL; - if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) - || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) - return -EINVAL; - - *out_hwirq = intspec[0]; - *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; - at91_aic_irq_priorities[*out_hwirq] = intspec[2]; - - return 0; -} - -static struct irq_domain_ops at91_aic_irq_ops = { - .map = at91_aic_irq_map, - .xlate = at91_aic_irq_domain_xlate, -}; - -int __init at91_aic_of_common_init(struct device_node *node, - struct device_node *parent) -{ - struct property *prop; - const __be32 *p; - u32 val; - - at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) - * sizeof(*at91_extern_irq), GFP_KERNEL); - if (!at91_extern_irq) - return -ENOMEM; - - if (at91_aic_pm_init()) { - kfree(at91_extern_irq); - return -ENOMEM; - } - - at91_aic_irq_priorities = kzalloc(n_irqs - * sizeof(*at91_aic_irq_priorities), - GFP_KERNEL); - if (!at91_aic_irq_priorities) - return -ENOMEM; - - at91_aic_base = of_iomap(node, 0); - at91_aic_np = node; - - at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, - &at91_aic_irq_ops, NULL); - if (!at91_aic_domain) - panic("Unable to add AIC irq domain (DT)\n"); - - of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { - if (val >= n_irqs) - pr_warn("AIC: external irq %d >= %d skip it\n", - val, n_irqs); - else - set_bit(val, at91_extern_irq); - } - - irq_set_default_host(at91_aic_domain); - - return 0; -} - -int __init at91_aic_of_init(struct device_node *node, - struct device_node *parent) -{ - int err; - - err = at91_aic_of_common_init(node, parent); - if (err) - return err; - - at91_aic_hw_init(n_irqs); - - return 0; -} - -int __init at91_aic5_of_init(struct device_node *node, - struct device_node *parent) -{ - int err; - - at91_aic_caps |= AT91_AIC_CAP_AIC5; - n_irqs = NR_AIC5_IRQS; - at91_aic_chip.irq_ack = at91_aic5_mask_irq; - at91_aic_chip.irq_mask = at91_aic5_mask_irq; - at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; - at91_aic_chip.irq_eoi = at91_aic5_eoi; - at91_aic_irq_ops.map = at91_aic5_irq_map; - - err = at91_aic_of_common_init(node, parent); - if (err) - return err; - - at91_aic5_hw_init(n_irqs); - - return 0; -} -#endif - /* * Initialize the AIC interrupt controller. */ -- cgit v0.10.2 From 8ead9f949d921f619ac474397531e799a1719e9d Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Jul 2014 16:07:21 +0200 Subject: ARM: msm: delete dangling mahimahi board file This board file is not compiled, and includes header files that do not even exist so it can't be made to compile easily either. I assume it is a merge mistake, thus deleting it. Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c deleted file mode 100644 index 873c3ca..0000000 --- a/arch/arm/mach-msm/board-mahimahi.c +++ /dev/null @@ -1,83 +0,0 @@ -/* linux/arch/arm/mach-msm/board-mahimahi.c - * - * Copyright (C) 2009 Google, Inc. - * Copyright (C) 2009 HTC Corporation. - * Author: Dima Zavin - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "board-mahimahi.h" -#include "devices.h" -#include "proc_comm.h" -#include "common.h" - -static uint debug_uart; - -module_param_named(debug_uart, debug_uart, uint, 0); - -static struct platform_device *devices[] __initdata = { -#if !defined(CONFIG_MSM_SERIAL_DEBUGGER) - &msm_device_uart1, -#endif - &msm_device_uart_dm1, - &msm_device_nand, -}; - -static void __init mahimahi_init(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init mahimahi_fixup(struct tag *tags, char **cmdline) -{ - memblock_add(PHYS_OFFSET, 219*SZ_1M); - memblock_add(MSM_HIGHMEM_BASE, MSM_HIGHMEM_SIZE); -} - -static void __init mahimahi_map_io(void) -{ - msm_map_common_io(); - msm_clock_init(); -} - -static void __init mahimahi_init_late(void) -{ - smd_debugfs_init(); -} - -void msm_timer_init(void); - -MACHINE_START(MAHIMAHI, "mahimahi") - .atag_offset = 0x100, - .fixup = mahimahi_fixup, - .map_io = mahimahi_map_io, - .init_irq = msm_init_irq, - .init_machine = mahimahi_init, - .init_late = mahimahi_init_late, - .init_time = msm_timer_init, -MACHINE_END -- cgit v0.10.2 From 262334ae213b7e84da1d0f1c53c5ecb580fc19d0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 8 Jul 2014 16:09:37 +0200 Subject: ARM: msm: remove reference to MSM_SERIAL_DEBUGGER This is a dangling symbol in the kernel: there is no config option for the MSM_SERIAL_DEBUGGER anywhere in the kernel. Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index 2458843..8f5ecdc 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c @@ -124,7 +124,7 @@ struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { static struct platform_device *devices[] __initdata = { &msm_clock_7x30, &msm_device_gpio_7x30, -#if defined(CONFIG_SERIAL_MSM) || defined(CONFIG_MSM_SERIAL_DEBUGGER) +#if defined(CONFIG_SERIAL_MSM) &msm_device_uart2, #endif &msm_device_smd, -- cgit v0.10.2 From 77cfe68e2808be01497124c1fa889322b483650c Mon Sep 17 00:00:00 2001 From: Georgi Djakov Date: Mon, 26 May 2014 19:37:40 +0300 Subject: ARM: msm: Update the references to DEBUG_MSM_UARTx The Kconfig options DEBUG_MSM_UART1, DEBUG_MSM_UART2, DEBUG_MSM_UART3, MSM_DEBUG_UART1, MSM_DEBUG_UART2 and MSM_DEBUG_UART3 are removed, but they are still referenced in the following files: arch/arm/mach-msm/io.c, arch/arm/mach-msm/board-trout.c arch/arm/mach-msm/board-trout-gpio.c Fix this by updating the reference to the new Kconfig option. Reported-by: Paul Bolle Signed-off-by: Georgi Djakov Signed-off-by: Linus Walleij diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c index 2c25050..722ad63 100644 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ b/arch/arm/mach-msm/board-trout-gpio.c @@ -94,7 +94,7 @@ static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset) } static struct msm_gpio_chip msm_gpio_banks[] = { -#if defined(CONFIG_MSM_DEBUG_UART1) +#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9a00000) /* H2W pins <-> UART1 */ TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x40), #else diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c index f72b07de..ba3edd3 100644 --- a/arch/arm/mach-msm/board-trout.c +++ b/arch/arm/mach-msm/board-trout.c @@ -88,7 +88,7 @@ static void __init trout_map_io(void) msm_map_common_io(); iotable_init(trout_io_desc, ARRAY_SIZE(trout_io_desc)); -#ifdef CONFIG_MSM_DEBUG_UART3 +#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9c00000) /* route UART3 to the "H2W" extended usb connector */ writeb(0x80, TROUT_CPLD_BASE + 0x00); #endif diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 34e0947..b042dca 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -57,8 +57,7 @@ static struct map_desc msm_io_desc[] __initdata = { .length = MSM_SHARED_RAM_SIZE, .type = MT_DEVICE, }, -#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ - defined(CONFIG_DEBUG_MSM_UART3) +#if defined(CONFIG_DEBUG_MSM_UART) { /* Must be last: virtual and pfn filled in by debug_ll_addr() */ .length = SZ_4K, @@ -76,8 +75,7 @@ void __init msm_map_common_io(void) * pages are peripheral interface or not. */ asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); -#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ - defined(CONFIG_DEBUG_MSM_UART3) +#if defined(CONFIG_DEBUG_MSM_UART) #ifdef CONFIG_MMU debug_ll_addr(&msm_io_desc[size - 1].pfn, &msm_io_desc[size - 1].virtual); -- cgit v0.10.2 From 58b71c3ec7b53e948cb0e59d783ab0ed0c4d767e Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Thu, 24 Jul 2014 09:05:21 +0200 Subject: ARM: imx: iomux: Do not export symbol without public declaration The iomux function declarations are in headers only accessible in this directory. Thus those can't be used in any module. None of the objects in this directory is tristate. Neither can the header be included in out-of-tree modules. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c index 7c66805..1657fe6 100644 --- a/arch/arm/mach-imx/iomux-imx31.c +++ b/arch/arm/mach-imx/iomux-imx31.c @@ -64,7 +64,6 @@ int mxc_iomux_mode(unsigned int pin_mode) return ret; } -EXPORT_SYMBOL(mxc_iomux_mode); /* * This function configures the pad value for a IOMUX pin. @@ -90,7 +89,6 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) spin_unlock(&gpio_mux_lock); } -EXPORT_SYMBOL(mxc_iomux_set_pad); /* * allocs a single pin: @@ -116,7 +114,6 @@ int mxc_iomux_alloc_pin(unsigned int pin, const char *label) return 0; } -EXPORT_SYMBOL(mxc_iomux_alloc_pin); int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count, const char *label) @@ -137,7 +134,6 @@ setup_error: mxc_iomux_release_multiple_pins(pin_list, i); return ret; } -EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins); void mxc_iomux_release_pin(unsigned int pin) { @@ -146,7 +142,6 @@ void mxc_iomux_release_pin(unsigned int pin) if (pad < (PIN_MAX + 1)) clear_bit(pad, mxc_pin_alloc_map); } -EXPORT_SYMBOL(mxc_iomux_release_pin); void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count) { @@ -158,7 +153,6 @@ void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count) p++; } } -EXPORT_SYMBOL(mxc_iomux_release_multiple_pins); /* * This function enables/disables the general purpose function for a particular @@ -178,4 +172,3 @@ void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en) __raw_writel(l, IOMUXGPR); spin_unlock(&gpio_mux_lock); } -EXPORT_SYMBOL(mxc_iomux_set_gpr); diff --git a/arch/arm/mach-imx/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c index 2b156d1..ecd5436 100644 --- a/arch/arm/mach-imx/iomux-v1.c +++ b/arch/arm/mach-imx/iomux-v1.c @@ -153,7 +153,6 @@ int mxc_gpio_mode(int gpio_mode) return 0; } -EXPORT_SYMBOL(mxc_gpio_mode); static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) { @@ -178,7 +177,6 @@ int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, ret = imx_iomuxv1_setup_multiple(pin_list, count); return ret; } -EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); int __init imx_iomuxv1_init(void __iomem *base, int numports) { diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c index 9dae74b..d61f960 100644 --- a/arch/arm/mach-imx/iomux-v3.c +++ b/arch/arm/mach-imx/iomux-v3.c @@ -55,7 +55,6 @@ int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad) return 0; } -EXPORT_SYMBOL(mxc_iomux_v3_setup_pad); int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count) { @@ -71,7 +70,6 @@ int mxc_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t *pad_list, unsigned count) } return 0; } -EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads); void mxc_iomux_v3_init(void __iomem *iomux_v3_base) { -- cgit v0.10.2 From 7c5deaf77526508709b320b76b0d41cec7274edc Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 26 Jul 2014 17:41:08 +0400 Subject: ARM: i.MX: Remove mach-cpuimx27sd board file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit eukrea_mbimx27-baseboard.c and mach-cpuimx27.c can be replaced with their devicetree equivalents: imx27-eukrea-mbimxsd27-baseboard.dts and imx27-eukrea-cpuimx27.dtsi respectively, so remove the board files. Signed-off-by: Alexander Shiyan Acked-by: Eric Bénard Signed-off-by: Shawn Guo diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index 63bde0e..f53074c 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig @@ -31,9 +31,6 @@ CONFIG_MACH_EUKREA_CPUIMX25SD=y CONFIG_MACH_IMX25_DT=y CONFIG_MACH_MX27ADS=y CONFIG_MACH_PCM038=y -CONFIG_MACH_CPUIMX27=y -CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2=y -CONFIG_MACH_EUKREA_CPUIMX27_USEUART4=y CONFIG_MACH_MX27_3DS=y CONFIG_MACH_IMX27_VISSTRIM_M10=y CONFIG_MACH_PCA100=y diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index be9a51a..e9a0459 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -253,56 +253,6 @@ config MACH_PCM970_BASEBOARD endchoice -config MACH_CPUIMX27 - bool "Eukrea CPUIMX27 module" - select IMX_HAVE_PLATFORM_FSL_USB2_UDC - select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_MXC_EHCI - select IMX_HAVE_PLATFORM_MXC_NAND - select IMX_HAVE_PLATFORM_MXC_W1 - select USB_ULPI_VIEWPORT if USB_ULPI - select SOC_IMX27 - help - Include support for Eukrea CPUIMX27 platform. This includes - specific configurations for the module and its peripherals. - -config MACH_EUKREA_CPUIMX27_USESDHC2 - bool "CPUIMX27 integrates SDHC2 module" - depends on MACH_CPUIMX27 - select IMX_HAVE_PLATFORM_MXC_MMC - help - This adds support for the internal SDHC2 used on CPUIMX27 - for wifi or eMMC. - -config MACH_EUKREA_CPUIMX27_USEUART4 - bool "CPUIMX27 integrates UART4 module" - depends on MACH_CPUIMX27 - help - This adds support for the internal UART4 used on CPUIMX27 - for bluetooth. - -choice - prompt "Baseboard" - depends on MACH_CPUIMX27 - default MACH_EUKREA_MBIMX27_BASEBOARD - -config MACH_EUKREA_MBIMX27_BASEBOARD - bool "Eukrea MBIMX27 development board" - select IMX_HAVE_PLATFORM_IMX_FB - select IMX_HAVE_PLATFORM_IMX_KEYPAD - select IMX_HAVE_PLATFORM_IMX_SSI - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_MXC_MMC - select IMX_HAVE_PLATFORM_SPI_IMX - select LEDS_GPIO_REGISTER - help - This adds board specific devices that can be found on Eukrea's - MBIMX27 evaluation board. - -endchoice - config MACH_MX27_3DS bool "MX27PDK platform" select IMX_HAVE_PLATFORM_FSL_USB2_UDC diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 23c0293..30f3f5e 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -60,8 +60,6 @@ obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o -obj-$(CONFIG_MACH_CPUIMX27) += mach-cpuimx27.o -obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o obj-$(CONFIG_MACH_PCA100) += mach-pca100.o obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o diff --git a/arch/arm/mach-imx/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h index a21d331..bb2c90d 100644 --- a/arch/arm/mach-imx/eukrea-baseboards.h +++ b/arch/arm/mach-imx/eukrea-baseboards.h @@ -27,23 +27,15 @@ * This CPU module needs a baseboard to work. After basic initializing * its own devices, it calls baseboard's init function. * TODO: Add your own baseboard init function and call it from - * inside eukrea_cpuimx25_init() eukrea_cpuimx27_init() - * eukrea_cpuimx35_init() eukrea_cpuimx51_init() - * or eukrea_cpuimx51sd_init(). + * inside eukrea_cpuimx25_init() or eukrea_cpuimx35_init() * * This example here is for the development board. Refer * mach-mx25/eukrea_mbimxsd-baseboard.c for cpuimx25 - * mach-imx/eukrea_mbimx27-baseboard.c for cpuimx27 * mach-mx3/eukrea_mbimxsd-baseboard.c for cpuimx35 - * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51 - * mach-mx5/eukrea_mbimxsd-baseboard.c for cpuimx51sd */ extern void eukrea_mbimxsd25_baseboard_init(void); -extern void eukrea_mbimx27_baseboard_init(void); extern void eukrea_mbimxsd35_baseboard_init(void); -extern void eukrea_mbimx51_baseboard_init(void); -extern void eukrea_mbimxsd51_baseboard_init(void); #endif diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c deleted file mode 100644 index b2f08bf..0000000 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ /dev/null @@ -1,351 +0,0 @@ -/* - * Copyright (C) 2009-2010 Eric Benard - eric@eukrea.com - * - * Based on pcm970-baseboard.c which is : - * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#include -#include -#include -#include -#include -#include -#include