From 93c659d820ef291f6ca5e628f44b26cfb2226aba Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:05 +0200 Subject: i2c: rcar: rework hw init We don't need to init HW before every transfer since we know the HW state then. HW init at probe time is enough. While here, add setting the clock register which belongs to init HW. Also, set MDBS bit since not setting it is prohibited according to the manual. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index d8361da..877ce97 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -144,9 +144,10 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv) { /* reset master mode */ rcar_i2c_write(priv, ICMIER, 0); - rcar_i2c_write(priv, ICMCR, 0); + rcar_i2c_write(priv, ICMCR, MDBS); rcar_i2c_write(priv, ICMSR, 0); - rcar_i2c_write(priv, ICMAR, 0); + /* start clock */ + rcar_i2c_write(priv, ICCCR, priv->icccr); } static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv) @@ -495,16 +496,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, pm_runtime_get_sync(dev); - /*-------------- spin lock -----------------*/ - spin_lock_irqsave(&priv->lock, flags); - - rcar_i2c_init(priv); - /* start clock */ - rcar_i2c_write(priv, ICCCR, priv->icccr); - - spin_unlock_irqrestore(&priv->lock, flags); - /*-------------- spin unlock -----------------*/ - ret = rcar_i2c_bus_barrier(priv); if (ret < 0) goto out; @@ -669,6 +660,8 @@ static int rcar_i2c_probe(struct platform_device *pdev) if (IS_ERR(priv->io)) return PTR_ERR(priv->io); + rcar_i2c_init(priv); + irq = platform_get_irq(pdev, 0); init_waitqueue_head(&priv->wait); spin_lock_init(&priv->lock); -- cgit v0.10.2 From 59daef909d9ac2ca4d08389bf816a9ad3bf8c350 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:06 +0200 Subject: i2c: rcar: remove unused IOERROR state Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 877ce97..3594cda 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -95,7 +95,6 @@ #define RCAR_IRQ_ACK_RECV (~(MAT | MDR) & 0xFF) #define ID_LAST_MSG (1 << 0) -#define ID_IOERROR (1 << 1) #define ID_DONE (1 << 2) #define ID_ARBLOST (1 << 3) #define ID_NACK (1 << 4) @@ -540,11 +539,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, break; } - if (rcar_i2c_flags_has(priv, ID_IOERROR)) { - ret = -EIO; - break; - } - ret = i + 1; /* The number of transfer */ } out: -- cgit v0.10.2 From 738206dec9354817e37c6cddb3eae278b4d7e7ba Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:07 +0200 Subject: i2c: rcar: remove spinlock We make sure to reinit the HW in the timeout case; then we know that interrupts are always disabled in the sections protected by the spinlock. Thus, we can simply remove it which is a preparation for further refactoring. While here, rename the timeout variable to time_left which is way more readable. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 3594cda..e65418b 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -34,7 +34,6 @@ #include #include #include -#include /* register offsets */ #define ICSCR 0x00 /* slave ctrl */ @@ -110,7 +109,6 @@ struct rcar_i2c_priv { struct i2c_msg *msg; struct clk *clk; - spinlock_t lock; wait_queue_head_t wait; int pos; @@ -428,9 +426,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) irqreturn_t result = IRQ_HANDLED; u32 msr; - /*-------------- spin lock -----------------*/ - spin_lock(&priv->lock); - if (rcar_i2c_slave_irq(priv)) goto exit; @@ -477,9 +472,6 @@ out: } exit: - spin_unlock(&priv->lock); - /*-------------- spin unlock -----------------*/ - return result; } @@ -489,9 +481,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, { struct rcar_i2c_priv *priv = i2c_get_adapdata(adap); struct device *dev = rcar_i2c_priv_to_dev(priv); - unsigned long flags; int i, ret; - long timeout; + long time_left; pm_runtime_get_sync(dev); @@ -506,9 +497,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, break; } - /*-------------- spin lock -----------------*/ - spin_lock_irqsave(&priv->lock, flags); - /* init each data */ priv->msg = &msgs[i]; priv->pos = 0; @@ -518,13 +506,11 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, rcar_i2c_prepare_msg(priv); - spin_unlock_irqrestore(&priv->lock, flags); - /*-------------- spin unlock -----------------*/ - - timeout = wait_event_timeout(priv->wait, + time_left = wait_event_timeout(priv->wait, rcar_i2c_flags_has(priv, ID_DONE), adap->timeout); - if (!timeout) { + if (!time_left) { + rcar_i2c_init(priv); ret = -ETIMEDOUT; break; } @@ -658,7 +644,6 @@ static int rcar_i2c_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); init_waitqueue_head(&priv->wait); - spin_lock_init(&priv->lock); adap = &priv->adap; adap->nr = pdev->id; -- cgit v0.10.2 From 344beeb23bfc11502fc54875f37ccdf51b6639b9 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:08 +0200 Subject: i2c: rcar: refactor setup of a msg We want to reuse this function later. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index e65418b..6e459a3 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -106,7 +106,8 @@ enum rcar_i2c_type { struct rcar_i2c_priv { void __iomem *io; struct i2c_adapter adap; - struct i2c_msg *msg; + struct i2c_msg *msg; + int msgs_left; struct clk *clk; wait_queue_head_t wait; @@ -254,6 +255,11 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv) { int read = !!rcar_i2c_is_recv(priv); + priv->pos = 0; + priv->flags = 0; + if (priv->msgs_left == 1) + rcar_i2c_flags_set(priv, ID_LAST_MSG); + rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read); rcar_i2c_write(priv, ICMSR, 0); rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START); @@ -498,11 +504,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, } /* init each data */ - priv->msg = &msgs[i]; - priv->pos = 0; - priv->flags = 0; - if (i == num - 1) - rcar_i2c_flags_set(priv, ID_LAST_MSG); + priv->msg = &msgs[i]; + priv->msgs_left = num - i; rcar_i2c_prepare_msg(priv); -- cgit v0.10.2 From 2bc3c5a8631db6d88f3a83188b069ca46b301315 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:09 +0200 Subject: i2c: rcar: init new messages in irq Setting up new messages was done in process context while handling a message was in interrupt context. Because of the HW design, this IP core is sensitive to timing, so the context switches were too expensive. Move this setup to interrupt context as well. In my test setup, this fixed the occasional 'data byte sent twice' issue which a number of people have seen. It also fixes to send REP_START after a read message which was wrongly send as a STOP + START sequence before. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 6e459a3..36c7930 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -266,6 +266,13 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv) rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND); } +static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv) +{ + priv->msg++; + priv->msgs_left--; + rcar_i2c_prepare_msg(priv); +} + /* * interrupt functions */ @@ -308,21 +315,17 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) * [ICRXTX] -> [SHIFT] -> [I2C bus] */ - if (priv->flags & ID_LAST_MSG) + if (priv->flags & ID_LAST_MSG) { /* * If current msg is the _LAST_ msg, * prepare stop condition here. * ID_DONE will be set on STOP irq. */ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); - else - /* - * If current msg is _NOT_ last msg, - * it doesn't call stop phase. - * thus, there is no STOP irq. - * return ID_DONE here. - */ - return ID_DONE; + } else { + rcar_i2c_next_msg(priv); + return 0; + } } rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND); @@ -366,7 +369,10 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) else rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); - rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV); + if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG)) + rcar_i2c_next_msg(priv); + else + rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV); return 0; } @@ -461,6 +467,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) /* Stop */ if (msr & MST) { + priv->msgs_left--; /* The last message also made it */ rcar_i2c_flags_set(priv, ID_DONE); goto out; } @@ -500,35 +507,28 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, /* This HW can't send STOP after address phase */ if (msgs[i].len == 0) { ret = -EOPNOTSUPP; - break; - } - - /* init each data */ - priv->msg = &msgs[i]; - priv->msgs_left = num - i; - - rcar_i2c_prepare_msg(priv); - - time_left = wait_event_timeout(priv->wait, - rcar_i2c_flags_has(priv, ID_DONE), - adap->timeout); - if (!time_left) { - rcar_i2c_init(priv); - ret = -ETIMEDOUT; - break; - } - - if (rcar_i2c_flags_has(priv, ID_NACK)) { - ret = -ENXIO; - break; - } - - if (rcar_i2c_flags_has(priv, ID_ARBLOST)) { - ret = -EAGAIN; - break; + goto out; } + } - ret = i + 1; /* The number of transfer */ + /* init data */ + priv->msg = msgs; + priv->msgs_left = num; + + rcar_i2c_prepare_msg(priv); + + time_left = wait_event_timeout(priv->wait, + rcar_i2c_flags_has(priv, ID_DONE), + num * adap->timeout); + if (!time_left) { + rcar_i2c_init(priv); + ret = -ETIMEDOUT; + } else if (rcar_i2c_flags_has(priv, ID_NACK)) { + ret = -ENXIO; + } else if (rcar_i2c_flags_has(priv, ID_ARBLOST)) { + ret = -EAGAIN; + } else { + ret = num - priv->msgs_left; /* The number of transfer */ } out: pm_runtime_put(dev); -- cgit v0.10.2 From 315a1736a2f2d9ad21dddea6bed766469342c2dc Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:10 +0200 Subject: i2c: rcar: don't issue stop when HW does it automatically The manual says (55.4.8.6) that HW does automatically send STOP after NACK was received. My measuerments confirm that. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 36c7930..dcf9fc7 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -458,8 +458,8 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) /* Nack */ if (msr & MNR) { - /* go to stop phase */ - rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); + /* HW automatically sends STOP after received NACK */ + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP); rcar_i2c_flags_set(priv, ID_NACK); goto out; -- cgit v0.10.2 From 2151ba7584b73255ae057892bb9c2de358af9502 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:11 +0200 Subject: i2c: rcar: check master irqs before slave irqs Due to broken HW design, master IRQs are more timing critical, so give them precedence over slave IRQ. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index dcf9fc7..06bd8c4 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -435,19 +435,17 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) static irqreturn_t rcar_i2c_irq(int irq, void *ptr) { struct rcar_i2c_priv *priv = ptr; - irqreturn_t result = IRQ_HANDLED; u32 msr; - if (rcar_i2c_slave_irq(priv)) - goto exit; - msr = rcar_i2c_read(priv, ICMSR); /* Only handle interrupts that are currently enabled */ msr &= rcar_i2c_read(priv, ICMIER); if (!msr) { - result = IRQ_NONE; - goto exit; + if (rcar_i2c_slave_irq(priv)) + return IRQ_HANDLED; + + return IRQ_NONE; } /* Arbitration lost */ @@ -484,8 +482,7 @@ out: wake_up(&priv->wait); } -exit: - return result; + return IRQ_HANDLED; } static int rcar_i2c_master_xfer(struct i2c_adapter *adap, -- cgit v0.10.2 From e5a7effa09e257436ab2cd633f80db3f78c684df Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:12 +0200 Subject: i2c: rcar: revoke START request early If we don't clear START generation as soon as possible, it may cause another message to be generated. To keep the race window as small as possible, we clear it right at the beginning of the interrupt. We don't need checking since we always want to stop START and STOP generation on the next occasion after we started it. This patch improves the situation but sadly does not completely fix it. It is still to be researched if we can do better given this HW design. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 06bd8c4..2afa368 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -84,6 +84,7 @@ #define RCAR_BUS_PHASE_START (MDBS | MIE | ESG) #define RCAR_BUS_PHASE_DATA (MDBS | MIE) +#define RCAR_BUS_MASK_DATA (~(ESG | FSB) & 0xFF) #define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB) #define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE) @@ -288,13 +289,6 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) if (!(msr & MDE)) return 0; - /* - * If address transfer phase finished, - * goto data phase. - */ - if (msr & MAT) - rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); - if (priv->pos < msg->len) { /* * Prepare next data to ICRXTX register. @@ -346,11 +340,7 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) return 0; if (msr & MAT) { - /* - * Address transfer phase finished, - * but, there is no data at this point. - * Do nothing. - */ + /* Address transfer phase finished, but no data at this point. */ } else if (priv->pos < msg->len) { /* * get received data @@ -366,8 +356,6 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) */ if (priv->pos + 1 >= msg->len) rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); - else - rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG)) rcar_i2c_next_msg(priv); @@ -435,7 +423,11 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) static irqreturn_t rcar_i2c_irq(int irq, void *ptr) { struct rcar_i2c_priv *priv = ptr; - u32 msr; + u32 msr, val; + + /* Clear START or STOP as soon as we can */ + val = rcar_i2c_read(priv, ICMCR); + rcar_i2c_write(priv, ICMCR, val & RCAR_BUS_MASK_DATA); msr = rcar_i2c_read(priv, ICMSR); @@ -457,7 +449,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) /* Nack */ if (msr & MNR) { /* HW automatically sends STOP after received NACK */ - rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP); rcar_i2c_flags_set(priv, ID_NACK); goto out; -- cgit v0.10.2 From 708ca4084126692707cca379dc6fb61913a07183 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 3 Sep 2015 22:20:13 +0200 Subject: i2c: rcar: clean up after refactoring Update the comments to match current behaviour. Shorten some comments. Update copyrights. Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 2afa368..dbedbff 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -1,7 +1,8 @@ /* * Driver for the Renesas RCar I2C unit * - * Copyright (C) 2014 Wolfram Sang + * Copyright (C) 2014-15 Wolfram Sang + * Copyright (C) 2011-2015 Renesas Electronics Corporation * * Copyright (C) 2012-14 Renesas Solutions Corp. * Kuninori Morimoto @@ -9,9 +10,6 @@ * This file is based on the drivers/i2c/busses/i2c-sh7760.c * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss * - * This file used out-of-tree driver i2c-rcar.c - * Copyright (C) 2011-2012 Renesas Electronics Corporation - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -244,9 +242,7 @@ scgd_find: dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n", scl, bus_speed, clk_get_rate(priv->clk), round, cdf, scgd); - /* - * keep icccr value - */ + /* keep icccr value */ priv->icccr = scgd << cdf_width | cdf; return 0; @@ -281,11 +277,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) { struct i2c_msg *msg = priv->msg; - /* - * FIXME - * sometimes, unknown interrupt happened. - * Do nothing - */ + /* FIXME: sometimes, unknown interrupt happened. Do nothing */ if (!(msr & MDE)) return 0; @@ -331,28 +323,22 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) { struct i2c_msg *msg = priv->msg; - /* - * FIXME - * sometimes, unknown interrupt happened. - * Do nothing - */ + /* FIXME: sometimes, unknown interrupt happened. Do nothing */ if (!(msr & MDR)) return 0; if (msr & MAT) { /* Address transfer phase finished, but no data at this point. */ } else if (priv->pos < msg->len) { - /* - * get received data - */ + /* get received data */ msg->buf[priv->pos] = rcar_i2c_read(priv, ICRXTX); priv->pos++; } /* - * If next received data is the _LAST_, - * go to STOP phase, - * otherwise, go to DATA phase. + * If next received data is the _LAST_, go to STOP phase. Might be + * overwritten by REP START when setting up a new msg. Not elegant + * but the only stable sequence for REP START I have found so far. */ if (priv->pos + 1 >= msg->len) rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); -- cgit v0.10.2 From 0e59378bc05b084939af54d2066552ac42fa0fee Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:01 +0100 Subject: i2c: img-scb: enable fencing for all versions of the ip The code to read from the master read fifo, and write to the master write fifo, checks a bit in an SCB register before every byte to ensure that the fifo is not full (write fifo) or empty (read fifo). Due to clock domain crossing inside the SCB block the updated value of this bit is only visible after 2 cycles. The scb_wr_rd_fence() function does 2 dummy writes (to the read-only revision register), and it's called before reading from or writing to the fifos to ensure that subsequent reads of the fifo status bits do not read stale values. As the 2 dummy writes are required in all versions of the ip, the version check is dropped. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index 00ffd66..5c3c615 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -278,8 +278,6 @@ #define ISR_COMPLETE(err) (ISR_COMPLETE_M | (ISR_STATUS_M & (err))) #define ISR_FATAL(err) (ISR_COMPLETE(err) | ISR_FATAL_M) -#define REL_SOC_IP_SCB_2_2_1 0x00020201 - enum img_i2c_mode { MODE_INACTIVE, MODE_RAW, @@ -1120,10 +1118,8 @@ static int img_i2c_init(struct img_i2c *i2c) return -EINVAL; } - if (rev == REL_SOC_IP_SCB_2_2_1) { - i2c->need_wr_rd_fence = true; - dev_info(i2c->adap.dev.parent, "fence quirk enabled"); - } + /* Fencing enabled by default. */ + i2c->need_wr_rd_fence = true; bitrate_khz = i2c->bitrate / 1000; clk_khz = clk_get_rate(i2c->scb_clk) / 1000; -- cgit v0.10.2 From 2aefb1bd4101235be7d9f0d5ac8d56aa979f6081 Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:02 +0100 Subject: i2c: img-scb: do dummy writes before fifo access Move scb_wr_rd_fence to before reading from fifo and writing to fifo to make sure the the first read/write is done after the required number of cycles. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index 5c3c615..0368d91 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -534,6 +534,7 @@ static void img_i2c_read_fifo(struct img_i2c *i2c) u32 fifo_status; u8 data; + img_i2c_wr_rd_fence(i2c); fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG); if (fifo_status & FIFO_READ_EMPTY) break; @@ -542,7 +543,6 @@ static void img_i2c_read_fifo(struct img_i2c *i2c) *i2c->msg.buf = data; img_i2c_writel(i2c, SCB_READ_FIFO_REG, 0xff); - img_i2c_wr_rd_fence(i2c); i2c->msg.len--; i2c->msg.buf++; } @@ -554,12 +554,12 @@ static void img_i2c_write_fifo(struct img_i2c *i2c) while (i2c->msg.len) { u32 fifo_status; + img_i2c_wr_rd_fence(i2c); fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG); if (fifo_status & FIFO_WRITE_FULL) break; img_i2c_writel(i2c, SCB_WRITE_DATA_REG, *i2c->msg.buf); - img_i2c_wr_rd_fence(i2c); i2c->msg.len--; i2c->msg.buf++; } -- cgit v0.10.2 From 5728d95f2458887ae3d95547c04352bba5080ad6 Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:03 +0100 Subject: i2c: img-scb: use DIV_ROUND_UP to round divisor values Using % can be slow depending on the architecture. Using DIV_ROUND_UP is nicer and more efficient way to do it. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index 0368d91..b4f59e1 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -1179,9 +1179,7 @@ static int img_i2c_init(struct img_i2c *i2c) int_bitrate++; /* Setup TCKH value */ - tckh = timing.tckh / clk_period; - if (timing.tckh % clk_period) - tckh++; + tckh = DIV_ROUND_UP(timing.tckh, clk_period); if (tckh > 0) data = tckh - 1; @@ -1201,9 +1199,7 @@ static int img_i2c_init(struct img_i2c *i2c) img_i2c_writel(i2c, SCB_TIME_TCKL_REG, data); /* Setup TSDH value */ - tsdh = timing.tsdh / clk_period; - if (timing.tsdh % clk_period) - tsdh++; + tsdh = DIV_ROUND_UP(timing.tsdh, clk_period); if (tsdh > 1) data = tsdh - 1; -- cgit v0.10.2 From 987008dbc48479af250cddda7f36e920a47ef54f Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:04 +0100 Subject: i2c: img-scb: fix LOW and HIGH period values for the SCL clock Currently, after determining the minimum value for the High period (TCKH) the remainder of the internal clock pulses is set as the Low period (TCKL). This causes the i2c clock duty cycle to be much less than 50%. Modify the starting position to TCKH and TCKL at 50% of the internal clock, and adjusts the TCKH and TCKL values from there should the minimum value for TCKL not be met. This results in duty cycles closer to 50%. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index b4f59e1..e4daebc 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -1178,25 +1178,29 @@ static int img_i2c_init(struct img_i2c *i2c) ((bitrate_khz * clk_period) / 2)) int_bitrate++; - /* Setup TCKH value */ - tckh = DIV_ROUND_UP(timing.tckh, clk_period); + /* + * Setup clock duty cycle, start with 50% and adjust TCKH and TCKL + * values from there if they don't meet minimum timing requirements + */ + tckh = int_bitrate / 2; + tckl = int_bitrate - tckh; - if (tckh > 0) - data = tckh - 1; - else - data = 0; + /* Adjust TCKH and TCKL values */ + data = DIV_ROUND_UP(timing.tckl, clk_period); - img_i2c_writel(i2c, SCB_TIME_TCKH_REG, data); + if (tckl < data) { + tckl = data; + tckh = int_bitrate - tckl; + } - /* Setup TCKL value */ - tckl = int_bitrate - tckh; + if (tckh > 0) + --tckh; if (tckl > 0) - data = tckl - 1; - else - data = 0; + --tckl; - img_i2c_writel(i2c, SCB_TIME_TCKL_REG, data); + img_i2c_writel(i2c, SCB_TIME_TCKH_REG, tckh); + img_i2c_writel(i2c, SCB_TIME_TCKL_REG, tckl); /* Setup TSDH value */ tsdh = DIV_ROUND_UP(timing.tsdh, clk_period); -- cgit v0.10.2 From 0f0a3189978c1bd38a36f97577c38fef861ebff5 Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:05 +0100 Subject: i2c: img-scb: use line_status instead of i2c->line_status i2c->line_status accumulates the line status bits that have been seen with each interrupt. As we're only interested in that bit from the current interrupt, refer to line_status (the argument to img_i2c_auto) instead of i2c->line_status. Signed-off-by: Sifan Naeem Reviewed-by: James Hartley Acked-by: James Hogan Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index e4daebc..049d193 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -857,7 +857,7 @@ static unsigned int img_i2c_auto(struct img_i2c *i2c, } /* Enable transaction halt on start bit */ - if (!i2c->last_msg && i2c->line_status & LINESTAT_START_BIT_DET) { + if (!i2c->last_msg && line_status & LINESTAT_START_BIT_DET) { img_i2c_transaction_halt(i2c, true); /* we're no longer interested in the slave event */ i2c->int_enable &= ~INT_SLAVE_EVENT; -- cgit v0.10.2 From 1ed6faedfc9741cca2d97b25ab73902ba7177093 Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:06 +0100 Subject: i2c: img-scb: Clear line and interrupt status before starting a transfer Clear line status and all generated interrupts from the interrupt status register before starting a transfer, as we may have unserviced interrupts from previous transfers that might be handled in the context of the new transfer. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index 049d193..0fa4715 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -1060,6 +1060,15 @@ static int img_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, i2c->last_msg = (i == num - 1); reinit_completion(&i2c->msg_complete); + /* + * Clear line status and all interrupts before starting a + * transfer, as we may have unserviced interrupts from + * previous transfers that might be handled in the context + * of the new transfer. + */ + img_i2c_writel(i2c, SCB_INT_CLEAR_REG, ~0); + img_i2c_writel(i2c, SCB_CLEAR_REG, ~0); + if (atomic) img_i2c_atomic_start(i2c); else if (msg->flags & I2C_M_RD) -- cgit v0.10.2 From 58b0497dad1abbe389af83e3d7706be584cf3ba2 Mon Sep 17 00:00:00 2001 From: Sifan Naeem Date: Thu, 10 Sep 2015 15:50:07 +0100 Subject: i2c: img-scb: verify support for requested bit rate The requested bit rate can be outside the range supported by the driver. The maximum bit rate this driver supports at the moment is 400Khz. If the requested bit rate is larger than the maximum supported by the driver, set the bitrate to the maximum supported before bitrate_khz is calculated. Maximum speed supported by the driver can be increased to 1Mhz by adding support for "fast plus mode" in the future. Fixes: commit 27bce457d588 ("i2c: img-scb: Add Imagination Technologies I2C SCB driver") Signed-off-by: Sifan Naeem Acked-by: James Hogan Reviewed-by: James Hartley Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-img-scb.c b/drivers/i2c/busses/i2c-img-scb.c index 0fa4715..3795fe1 100644 --- a/drivers/i2c/busses/i2c-img-scb.c +++ b/drivers/i2c/busses/i2c-img-scb.c @@ -1130,9 +1130,6 @@ static int img_i2c_init(struct img_i2c *i2c) /* Fencing enabled by default. */ i2c->need_wr_rd_fence = true; - bitrate_khz = i2c->bitrate / 1000; - clk_khz = clk_get_rate(i2c->scb_clk) / 1000; - /* Determine what mode we're in from the bitrate */ timing = timings[0]; for (i = 0; i < ARRAY_SIZE(timings); i++) { @@ -1141,6 +1138,17 @@ static int img_i2c_init(struct img_i2c *i2c) break; } } + if (i2c->bitrate > timings[ARRAY_SIZE(timings) - 1].max_bitrate) { + dev_warn(i2c->adap.dev.parent, + "requested bitrate (%u) is higher than the max bitrate supported (%u)\n", + i2c->bitrate, + timings[ARRAY_SIZE(timings) - 1].max_bitrate); + timing = timings[ARRAY_SIZE(timings) - 1]; + i2c->bitrate = timing.max_bitrate; + } + + bitrate_khz = i2c->bitrate / 1000; + clk_khz = clk_get_rate(i2c->scb_clk) / 1000; /* Find the prescale that would give us that inc (approx delay = 0) */ prescale = SCB_OPT_INC * clk_khz / (256 * 16 * bitrate_khz); -- cgit v0.10.2 From c335631a68db4b32b24cb59814c485c45f0f4506 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 31 Aug 2015 17:31:28 +0300 Subject: i2c: designware: Remove interrupt clearing from i2c_dw_pci_probe() There is no need to clear interrupts in i2c_dw_pci_probe() since only place where interrupts are unmasked is i2c_dw_xfer_init() and there interrupts are always cleared after commit 2a2d95e9d6d2 ("i2c: designware: always clear interrupts before enabling them"). This allows to cleanup the code and replace i2c_dw_clear_int() in i2c_dw_xfer_init() by direct register read as there are no other callers. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 7441cdc..dec0af7 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -438,7 +438,7 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) __i2c_dw_enable(dev, true); /* Clear and enable interrupts */ - i2c_dw_clear_int(dev); + dw_readl(dev, DW_IC_CLR_INTR); dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); } @@ -839,12 +839,6 @@ void i2c_dw_disable(struct dw_i2c_dev *dev) } EXPORT_SYMBOL_GPL(i2c_dw_disable); -void i2c_dw_clear_int(struct dw_i2c_dev *dev) -{ - dw_readl(dev, DW_IC_CLR_INTR); -} -EXPORT_SYMBOL_GPL(i2c_dw_clear_int); - void i2c_dw_disable_int(struct dw_i2c_dev *dev) { dw_writel(dev, 0, DW_IC_INTR_MASK); diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 9630222..f44aeee 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -122,7 +122,6 @@ extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); extern void i2c_dw_enable(struct dw_i2c_dev *dev); extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev); extern void i2c_dw_disable(struct dw_i2c_dev *dev); -extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index df23e8c..e477ddd 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -268,7 +268,6 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, } i2c_dw_disable_int(dev); - i2c_dw_clear_int(dev); r = i2c_add_numbered_adapter(adap); if (r) { dev_err(&pdev->dev, "failure adding adapter\n"); -- cgit v0.10.2 From b9f84adcb834ec2b1fd0ec91676c4b165daf51e6 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 31 Aug 2015 17:31:29 +0300 Subject: i2c: designware: Disable interrupts before requesting PCI device interrupt Device must not generate interrupts before registering the interrupt handler so move i2c_dw_disable_int() before requesting it. There are no known issues with this. The code has been here since commit fe20ff5c7e9c ("i2c-designware: Add support for Designware core behind PCI devices."). Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index e477ddd..d9e8937 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -260,6 +260,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci"); + i2c_dw_disable_int(dev); r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, IRQF_SHARED | IRQF_COND_SUSPEND, adap->name, dev); if (r) { @@ -267,7 +268,6 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, return r; } - i2c_dw_disable_int(dev); r = i2c_add_numbered_adapter(adap); if (r) { dev_err(&pdev->dev, "failure adding adapter\n"); -- cgit v0.10.2 From f6ed2b79dc67e9211bb6488938247b9979eece79 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 31 Aug 2015 17:31:30 +0300 Subject: i2c: designware: Remove unused functions i2c_dw_is_enabled() became unused by the commit be58eda775c8 ("i2c: designware-pci: Cleanup driver power management") and i2c_dw_enable() by the commit 3a48d1c08fe0 ("i2c: prevent spurious interrupt on Designware controllers"). Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index dec0af7..c9e93a7 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -815,19 +815,6 @@ tx_aborted: } EXPORT_SYMBOL_GPL(i2c_dw_isr); -void i2c_dw_enable(struct dw_i2c_dev *dev) -{ - /* Enable the adapter */ - __i2c_dw_enable(dev, true); -} -EXPORT_SYMBOL_GPL(i2c_dw_enable); - -u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev) -{ - return dw_readl(dev, DW_IC_ENABLE); -} -EXPORT_SYMBOL_GPL(i2c_dw_is_enabled); - void i2c_dw_disable(struct dw_i2c_dev *dev) { /* Disable controller */ diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index f44aeee..10c7903 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -119,8 +119,6 @@ extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num); extern u32 i2c_dw_func(struct i2c_adapter *adap); extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); -extern void i2c_dw_enable(struct dw_i2c_dev *dev); -extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev); extern void i2c_dw_disable(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); -- cgit v0.10.2 From 8a437459523ad878c6c2bd3a7703b1b88fcbfcd8 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 31 Aug 2015 17:31:31 +0300 Subject: i2c: designware: Make dw_readl() and dw_writel() static dw_readl() and dw_writel() are not used outside of i2c-designware-core and they are not exported so make them static and remove their forward declaration. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index c9e93a7..52272a0 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -165,7 +165,7 @@ static char *abort_sources[] = { "lost arbitration", }; -u32 dw_readl(struct dw_i2c_dev *dev, int offset) +static u32 dw_readl(struct dw_i2c_dev *dev, int offset) { u32 value; @@ -181,7 +181,7 @@ u32 dw_readl(struct dw_i2c_dev *dev, int offset) return value; } -void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) +static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) { if (dev->accessor_flags & ACCESS_SWAP) b = swab32(b); diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 10c7903..0e73b86 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -112,8 +112,6 @@ struct dw_i2c_dev { #define ACCESS_SWAP 0x00000001 #define ACCESS_16BIT 0x00000002 -extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); -extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); extern int i2c_dw_init(struct dw_i2c_dev *dev); extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num); -- cgit v0.10.2 From 6ad6fde3970c98348e4201efc22c92be414c86a6 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 31 Aug 2015 17:31:32 +0300 Subject: i2c: designware: Rename platform driver probe and PM functions Make it easier to distinguish between i2c-designware-platdrv and i2c-designware-core functions and to be consistent with i2c-designware-pcidrv. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 3dd2de3..17167cd 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -133,7 +133,7 @@ static inline int dw_i2c_acpi_configure(struct platform_device *pdev) static inline void dw_i2c_acpi_unconfigure(struct platform_device *pdev) { } #endif -static int dw_i2c_probe(struct platform_device *pdev) +static int dw_i2c_plat_probe(struct platform_device *pdev) { struct dw_i2c_dev *dev; struct i2c_adapter *adap; @@ -271,7 +271,7 @@ static int dw_i2c_probe(struct platform_device *pdev) return 0; } -static int dw_i2c_remove(struct platform_device *pdev) +static int dw_i2c_plat_remove(struct platform_device *pdev) { struct dw_i2c_dev *dev = platform_get_drvdata(pdev); @@ -300,12 +300,12 @@ MODULE_DEVICE_TABLE(of, dw_i2c_of_match); #endif #ifdef CONFIG_PM_SLEEP -static int dw_i2c_prepare(struct device *dev) +static int dw_i2c_plat_prepare(struct device *dev) { return pm_runtime_suspended(dev); } -static void dw_i2c_complete(struct device *dev) +static void dw_i2c_plat_complete(struct device *dev) { if (dev->power.direct_complete) pm_request_resume(dev); @@ -316,7 +316,7 @@ static void dw_i2c_complete(struct device *dev) #endif #ifdef CONFIG_PM -static int dw_i2c_suspend(struct device *dev) +static int dw_i2c_plat_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); @@ -327,7 +327,7 @@ static int dw_i2c_suspend(struct device *dev) return 0; } -static int dw_i2c_resume(struct device *dev) +static int dw_i2c_plat_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); @@ -341,10 +341,10 @@ static int dw_i2c_resume(struct device *dev) } static const struct dev_pm_ops dw_i2c_dev_pm_ops = { - .prepare = dw_i2c_prepare, - .complete = dw_i2c_complete, - SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_suspend, dw_i2c_resume) - SET_RUNTIME_PM_OPS(dw_i2c_suspend, dw_i2c_resume, NULL) + .prepare = dw_i2c_plat_prepare, + .complete = dw_i2c_plat_complete, + SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) + SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL) }; #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops) @@ -356,8 +356,8 @@ static const struct dev_pm_ops dw_i2c_dev_pm_ops = { MODULE_ALIAS("platform:i2c_designware"); static struct platform_driver dw_i2c_driver = { - .probe = dw_i2c_probe, - .remove = dw_i2c_remove, + .probe = dw_i2c_plat_probe, + .remove = dw_i2c_plat_remove, .driver = { .name = "i2c_designware", .of_match_table = of_match_ptr(dw_i2c_of_match), -- cgit v0.10.2 From d80d134182ba536ececab8d5fca50d779befc9a6 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 12 Oct 2015 16:55:35 +0300 Subject: i2c: designware: Move common probe code into i2c_dw_probe() There is some code duplication in i2c-designware-platdrv and i2c-designware-pcidrv probe functions. What is even worse that duplication requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core functions to be exported. Therefore move common code into new i2c_dw_probe() and make functions above local to i2c-designware-core. While merging the code patch does following functional changes: - I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it was used for platform and ACPI devices but PCI device used "i2c-designware-pci". - Using device name for interrupt name. Previous it was platform device name, ACPI device name or "i2c-designware-pci". - Error code from devm_request_irq() and i2c_add_numbered_adapter() will be printed in case of error. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 52272a0..8c48b27 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -618,7 +618,7 @@ static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev) /* * Prepare controller for a transaction and call i2c_dw_xfer_msg */ -int +static int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct dw_i2c_dev *dev = i2c_get_adapdata(adap); @@ -702,14 +702,17 @@ done_nolock: return ret; } -EXPORT_SYMBOL_GPL(i2c_dw_xfer); -u32 i2c_dw_func(struct i2c_adapter *adap) +static u32 i2c_dw_func(struct i2c_adapter *adap) { struct dw_i2c_dev *dev = i2c_get_adapdata(adap); return dev->functionality; } -EXPORT_SYMBOL_GPL(i2c_dw_func); + +static struct i2c_algorithm i2c_dw_algo = { + .master_xfer = i2c_dw_xfer, + .functionality = i2c_dw_func, +}; static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) { @@ -770,7 +773,7 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) * Interrupt service routine. This gets called whenever an I2C interrupt * occurs. */ -irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) +static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) { struct dw_i2c_dev *dev = dev_id; u32 stat, enabled; @@ -813,7 +816,6 @@ tx_aborted: return IRQ_HANDLED; } -EXPORT_SYMBOL_GPL(i2c_dw_isr); void i2c_dw_disable(struct dw_i2c_dev *dev) { @@ -838,5 +840,40 @@ u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev) } EXPORT_SYMBOL_GPL(i2c_dw_read_comp_param); +int i2c_dw_probe(struct dw_i2c_dev *dev) +{ + struct i2c_adapter *adap = &dev->adapter; + int r; + + init_completion(&dev->cmd_complete); + mutex_init(&dev->lock); + + r = i2c_dw_init(dev); + if (r) + return r; + + snprintf(adap->name, sizeof(adap->name), + "Synopsys DesignWare I2C adapter"); + adap->algo = &i2c_dw_algo; + adap->dev.parent = dev->dev; + i2c_set_adapdata(adap, dev); + + i2c_dw_disable_int(dev); + r = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, IRQF_SHARED, + dev_name(dev->dev), dev); + if (r) { + dev_err(dev->dev, "failure requesting irq %i: %d\n", + dev->irq, r); + return r; + } + + r = i2c_add_numbered_adapter(adap); + if (r) + dev_err(dev->dev, "failure adding adapter: %d\n", r); + + return r; +} +EXPORT_SYMBOL_GPL(i2c_dw_probe); + MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter core"); MODULE_LICENSE("GPL"); diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 0e73b86..1d50898 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -113,13 +113,10 @@ struct dw_i2c_dev { #define ACCESS_16BIT 0x00000002 extern int i2c_dw_init(struct dw_i2c_dev *dev); -extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], - int num); -extern u32 i2c_dw_func(struct i2c_adapter *adap); -extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); extern void i2c_dw_disable(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); +extern int i2c_dw_probe(struct dw_i2c_dev *dev); #if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL) extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev); diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index d9e8937..169be1e 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -158,11 +158,6 @@ static struct dw_pci_controller dw_pci_controllers[] = { }, }; -static struct i2c_algorithm i2c_dw_algo = { - .master_xfer = i2c_dw_xfer, - .functionality = i2c_dw_func, -}; - #ifdef CONFIG_PM static int i2c_dw_pci_suspend(struct device *dev) { @@ -222,13 +217,12 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, if (!dev) return -ENOMEM; - init_completion(&dev->cmd_complete); - mutex_init(&dev->lock); dev->clk = NULL; dev->controller = controller; dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; dev->base = pcim_iomap_table(pdev)[0]; dev->dev = &pdev->dev; + dev->irq = pdev->irq; dev->functionality = controller->functionality | DW_DEFAULT_FUNCTIONALITY; @@ -246,33 +240,15 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, dev->tx_fifo_depth = controller->tx_fifo_depth; dev->rx_fifo_depth = controller->rx_fifo_depth; - r = i2c_dw_init(dev); - if (r) - return r; adap = &dev->adapter; - i2c_set_adapdata(adap, dev); adap->owner = THIS_MODULE; adap->class = 0; - adap->algo = &i2c_dw_algo; - adap->dev.parent = &pdev->dev; adap->nr = controller->bus_num; - snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci"); - - i2c_dw_disable_int(dev); - r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, - IRQF_SHARED | IRQF_COND_SUSPEND, adap->name, dev); - if (r) { - dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); - return r; - } - - r = i2c_add_numbered_adapter(adap); - if (r) { - dev_err(&pdev->dev, "failure adding adapter\n"); + r = i2c_dw_probe(dev); + if (r) return r; - } pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); pm_runtime_use_autosuspend(&pdev->dev); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 17167cd..adcf4c3 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -41,10 +41,6 @@ #include #include "i2c-designware-core.h" -static struct i2c_algorithm i2c_dw_algo = { - .master_xfer = i2c_dw_xfer, - .functionality = i2c_dw_func, -}; static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) { return clk_get_rate(dev->clk)/1000; @@ -155,8 +151,6 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) if (IS_ERR(dev->base)) return PTR_ERR(dev->base); - init_completion(&dev->cmd_complete); - mutex_init(&dev->lock); dev->dev = &pdev->dev; dev->irq = irq; platform_set_drvdata(pdev, dev); @@ -231,33 +225,15 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; dev->adapter.nr = pdev->id; } - r = i2c_dw_init(dev); - if (r) - return r; - - i2c_dw_disable_int(dev); - r = devm_request_irq(&pdev->dev, dev->irq, i2c_dw_isr, IRQF_SHARED, - pdev->name, dev); - if (r) { - dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); - return r; - } adap = &dev->adapter; - i2c_set_adapdata(adap, dev); adap->owner = THIS_MODULE; adap->class = I2C_CLASS_DEPRECATED; - strlcpy(adap->name, "Synopsys DesignWare I2C adapter", - sizeof(adap->name)); - adap->algo = &i2c_dw_algo; - adap->dev.parent = &pdev->dev; adap->dev.of_node = pdev->dev.of_node; - r = i2c_add_numbered_adapter(adap); - if (r) { - dev_err(&pdev->dev, "failure adding adapter\n"); + r = i2c_dw_probe(dev); + if (r) return r; - } if (dev->pm_runtime_disabled) { pm_runtime_forbid(&pdev->dev); -- cgit v0.10.2 From 166c2ba398640278ae6037be4aa5562c03cf3d24 Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Wed, 7 Oct 2015 13:18:44 +0300 Subject: i2c / ACPI: Rework I2C device scanning The way we currently scan I2C devices behind an I2C host controller does not work in cases where the I2C device in question is not declared directly below the host controller ACPI node. This is perfectly legal according the ACPI 6.0 specification and some existing systems are doing this. To be able to enumerate all devices which are connected to a certain I2C host controller we need to rework the current I2C scanning routine a bit. Instead of scanning directly below the host controller we scan the whole ACPI namespace for present devices with valid I2cSerialBus() connection pointing to the host controller in question. Signed-off-by: Mika Westerberg Acked-by: Rafael J. Wysocki Signed-off-by: Andy Shevchenko Tested-by: Dustin Byford Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index 5f89f1e..3a4c54e 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c @@ -99,27 +99,40 @@ struct gsb_buffer { }; } __packed; -static int acpi_i2c_add_resource(struct acpi_resource *ares, void *data) +struct acpi_i2c_lookup { + struct i2c_board_info *info; + acpi_handle adapter_handle; + acpi_handle device_handle; +}; + +static int acpi_i2c_find_address(struct acpi_resource *ares, void *data) { - struct i2c_board_info *info = data; + struct acpi_i2c_lookup *lookup = data; + struct i2c_board_info *info = lookup->info; + struct acpi_resource_i2c_serialbus *sb; + acpi_handle adapter_handle; + acpi_status status; - if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) { - struct acpi_resource_i2c_serialbus *sb; + if (info->addr || ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS) + return 1; - sb = &ares->data.i2c_serial_bus; - if (!info->addr && sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) { - info->addr = sb->slave_address; - if (sb->access_mode == ACPI_I2C_10BIT_MODE) - info->flags |= I2C_CLIENT_TEN; - } - } else if (!info->irq) { - struct resource r; + sb = &ares->data.i2c_serial_bus; + if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_I2C) + return 1; - if (acpi_dev_resource_interrupt(ares, 0, &r)) - info->irq = r.start; + /* + * Extract the ResourceSource and make sure that the handle matches + * with the I2C adapter handle. + */ + status = acpi_get_handle(lookup->device_handle, + sb->resource_source.string_ptr, + &adapter_handle); + if (ACPI_SUCCESS(status) && adapter_handle == lookup->adapter_handle) { + info->addr = sb->slave_address; + if (sb->access_mode == ACPI_I2C_10BIT_MODE) + info->flags |= I2C_CLIENT_TEN; } - /* Tell the ACPI core to skip this resource */ return 1; } @@ -128,6 +141,8 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level, { struct i2c_adapter *adapter = data; struct list_head resource_list; + struct acpi_i2c_lookup lookup; + struct resource_entry *entry; struct i2c_board_info info; struct acpi_device *adev; int ret; @@ -140,14 +155,37 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level, memset(&info, 0, sizeof(info)); info.fwnode = acpi_fwnode_handle(adev); + memset(&lookup, 0, sizeof(lookup)); + lookup.adapter_handle = ACPI_HANDLE(adapter->dev.parent); + lookup.device_handle = handle; + lookup.info = &info; + + /* + * Look up for I2cSerialBus resource with ResourceSource that + * matches with this adapter. + */ INIT_LIST_HEAD(&resource_list); ret = acpi_dev_get_resources(adev, &resource_list, - acpi_i2c_add_resource, &info); + acpi_i2c_find_address, &lookup); acpi_dev_free_resource_list(&resource_list); if (ret < 0 || !info.addr) return AE_OK; + /* Then fill IRQ number if any */ + ret = acpi_dev_get_resources(adev, &resource_list, NULL, NULL); + if (ret < 0) + return AE_OK; + + resource_list_for_each_entry(entry, &resource_list) { + if (resource_type(entry->res) == IORESOURCE_IRQ) { + info.irq = entry->res->start; + break; + } + } + + acpi_dev_free_resource_list(&resource_list); + adev->power.flags.ignore_parent = true; strlcpy(info.type, dev_name(&adev->dev), sizeof(info.type)); if (!i2c_new_device(adapter, &info)) { @@ -160,6 +198,8 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level, return AE_OK; } +#define ACPI_I2C_MAX_SCAN_DEPTH 32 + /** * acpi_i2c_register_devices - enumerate I2C slave devices behind adapter * @adap: pointer to adapter @@ -170,17 +210,13 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level, */ static void acpi_i2c_register_devices(struct i2c_adapter *adap) { - acpi_handle handle; acpi_status status; - if (!adap->dev.parent) - return; - - handle = ACPI_HANDLE(adap->dev.parent); - if (!handle) + if (!adap->dev.parent || !has_acpi_companion(adap->dev.parent)) return; - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, + status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, + ACPI_I2C_MAX_SCAN_DEPTH, acpi_i2c_add_device, NULL, adap, NULL); if (ACPI_FAILURE(status)) -- cgit v0.10.2 From 6109dbd618e5921eed6b4d09d48c0abc8cd508cd Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:24:03 +0300 Subject: i2c: ismt: mark register space with __iomem This fixes the code to suppress sparse warnings like: drivers/i2c/busses/i2c-ismt.c:725:36: warning: incorrect type in argument 2 (different address spaces) drivers/i2c/busses/i2c-ismt.c:725:36: expected void volatile [noderef] *addr drivers/i2c/busses/i2c-ismt.c:725:36: got void * Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index f994712..3ab3b4d 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -165,7 +165,7 @@ struct ismt_desc { struct ismt_priv { struct i2c_adapter adapter; - void *smba; /* PCI BAR */ + void __iomem *smba; /* PCI BAR */ struct pci_dev *pci_dev; struct ismt_desc *hw; /* descriptor virt base addr */ dma_addr_t io_rng_dma; /* descriptor HW base addr */ -- cgit v0.10.2 From 600ca08023e33b6afe7ba65aebe419058e17eec7 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:23:58 +0300 Subject: i2c: ismt: improve usage of devres API pcim_release() will release any requested region. There is no need to duplicate this effort in the driver. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index 3ab3b4d..fd4284e 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -904,8 +904,7 @@ ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) priv->smba = pcim_iomap(pdev, SMBBAR, len); if (!priv->smba) { dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n"); - err = -ENODEV; - goto fail; + return -ENODEV; } if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) || @@ -915,32 +914,26 @@ ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) DMA_BIT_MASK(32)) != 0)) { dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n", pdev); - err = -ENODEV; - goto fail; + return -ENODEV; } } err = ismt_dev_init(priv); if (err) - goto fail; + return err; ismt_hw_init(priv); err = ismt_int_init(priv); if (err) - goto fail; + return err; err = i2c_add_adapter(&priv->adapter); if (err) { dev_err(&pdev->dev, "Failed to add SMBus iSMT adapter\n"); - err = -ENODEV; - goto fail; + return -ENODEV; } return 0; - -fail: - pci_release_region(pdev, SMBBAR); - return err; } /** @@ -952,7 +945,6 @@ static void ismt_remove(struct pci_dev *pdev) struct ismt_priv *priv = pci_get_drvdata(pdev); i2c_del_adapter(&priv->adapter); - pci_release_region(pdev, SMBBAR); } /** -- cgit v0.10.2 From fb8918b2cf8741eef3972cbe70ab5dabd6ff67e7 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:23:59 +0300 Subject: i2c: ismt: PCI core handles power state for us There is no need to repeat the work that is already done in the PCI driver core. Remove suspend and resume callbacks. Note that there is no more calls performed to enable or disable a PCI device during suspend-resume cycle. Nowadays they seems to be superfluous. Someone can read more in [1]. [1] https://www.kernel.org/doc/ols/2009/ols2009-pages-319-330.pdf Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index fd4284e..3889e6b 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -947,44 +947,11 @@ static void ismt_remove(struct pci_dev *pdev) i2c_del_adapter(&priv->adapter); } -/** - * ismt_suspend() - place the device in suspend - * @pdev: PCI-Express device - * @mesg: PM message - */ -#ifdef CONFIG_PM -static int ismt_suspend(struct pci_dev *pdev, pm_message_t mesg) -{ - pci_save_state(pdev); - pci_set_power_state(pdev, pci_choose_state(pdev, mesg)); - return 0; -} - -/** - * ismt_resume() - PCI resume code - * @pdev: PCI-Express device - */ -static int ismt_resume(struct pci_dev *pdev) -{ - pci_set_power_state(pdev, PCI_D0); - pci_restore_state(pdev); - return pci_enable_device(pdev); -} - -#else - -#define ismt_suspend NULL -#define ismt_resume NULL - -#endif - static struct pci_driver ismt_driver = { .name = "ismt_smbus", .id_table = ismt_ids, .probe = ismt_probe, .remove = ismt_remove, - .suspend = ismt_suspend, - .resume = ismt_resume, }; module_pci_driver(ismt_driver); -- cgit v0.10.2 From f92d155d3eb05e74380383450eb86ba995c8d766 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:24:00 +0300 Subject: i2c: ismt: do not duplicate msi_enabled flag struct pci_dev already has a flag to track if MSI is enabled or not. Use it directly. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index 3889e6b..3cc20f3 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -172,7 +172,6 @@ struct ismt_priv { u8 head; /* ring buffer head pointer */ struct completion cmp; /* interrupt completion */ u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* temp R/W data buffer */ - bool using_msi; /* type of interrupt flag */ }; /** @@ -398,7 +397,7 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr, desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); /* Initialize common control bits */ - if (likely(priv->using_msi)) + if (likely(pci_dev_msi_enabled(priv->pci_dev))) desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR; else desc->control = ISMT_DESC_FAIR; @@ -806,7 +805,6 @@ static int ismt_int_init(struct ismt_priv *priv) goto intx; } - priv->using_msi = true; goto done; /* Try using legacy interrupts */ @@ -822,8 +820,6 @@ intx: return -ENODEV; } - priv->using_msi = false; - done: return 0; } -- cgit v0.10.2 From 6befa6dd8de73fd726f3b69b63e4aa7b17a25531 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:24:01 +0300 Subject: i2c: ismt: propagate actual error code Propagate actual return code when requesting interrupt fails. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index 3cc20f3..21cd4f6 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -817,7 +817,7 @@ intx: priv); if (err) { dev_err(&priv->pci_dev->dev, "no usable interrupts\n"); - return -ENODEV; + return err; } done: -- cgit v0.10.2 From 064181b00e33c917145194247b4abcfa36ca06d7 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 16 Sep 2015 17:24:02 +0300 Subject: i2c: ismt: issue a warning when fail to request MSI Issue the warning in all error paths when unable to register MSI or its handler. Signed-off-by: Andy Shevchenko Reviewed-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index 21cd4f6..80648be 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -788,11 +788,8 @@ static int ismt_int_init(struct ismt_priv *priv) /* Try using MSI interrupts */ err = pci_enable_msi(priv->pci_dev); - if (err) { - dev_warn(&priv->pci_dev->dev, - "Unable to use MSI interrupts, falling back to legacy\n"); + if (err) goto intx; - } err = devm_request_irq(&priv->pci_dev->dev, priv->pci_dev->irq, @@ -805,10 +802,13 @@ static int ismt_int_init(struct ismt_priv *priv) goto intx; } - goto done; + return 0; /* Try using legacy interrupts */ intx: + dev_warn(&priv->pci_dev->dev, + "Unable to use MSI interrupts, falling back to legacy\n"); + err = devm_request_irq(&priv->pci_dev->dev, priv->pci_dev->irq, ismt_do_interrupt, @@ -820,7 +820,6 @@ intx: return err; } -done: return 0; } -- cgit v0.10.2 From 35780e860f7d4a5f33f6ceadf09038ee26f1ef43 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Mon, 14 Sep 2015 11:03:50 +0200 Subject: i2c: davinci: Optimize clock generation on Keystone SoC According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed additive part of frequency divisors (referred as "d" in the code and datasheet) always equals to 6, independent of module clock prescaler. module clock frequency master clock frequency = ---------------------- (ICCL + 6) + (ICCH + 6) It was not the case with original Davinci IP. Introduce new compatible property "ti,keystone-i2c", which triggers special handling in the driver. Without this change Keystone-based systems (having 204.8MHz input clock) choose prescaler 29 (PSC=28). Using d=5 in this case leads to bus bitrate ~353kHz instead of requested 400kHz. After correction, assuming d=6 bus rate is ~392kHz. This gives ~11% transfer rate increase. Signed-off-by: Alexander Sverdlin Reviewed-by: Grygorii Strashko Tested-by: Hemanth Guruva Reddy Tested-by: Lukasz Gemborowski Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-davinci.txt b/Documentation/devicetree/bindings/i2c/i2c-davinci.txt index a4e1cbc..5b123e0 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-davinci.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-davinci.txt @@ -1,10 +1,10 @@ -* Texas Instruments Davinci I2C +* Texas Instruments Davinci/Keystone I2C This file provides information, what the device node for the -davinci i2c interface contain. +davinci/keystone i2c interface contains. Required properties: -- compatible: "ti,davinci-i2c"; +- compatible: "ti,davinci-i2c" or "ti,keystone-i2c"; - reg : Offset and length of the register set for the device Recommended properties : diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index 3fbb9a0..c5628a4 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -181,6 +181,7 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) u32 clkh; u32 clkl; u32 input_clock = clk_get_rate(dev->clk); + struct device_node *of_node = dev->dev->of_node; /* NOTE: I2C Clock divider programming info * As per I2C specs the following formulas provide prescaler @@ -196,6 +197,9 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) * where if PSC == 0, d = 7, * if PSC == 1, d = 6 * if PSC > 1 , d = 5 + * + * Note: + * d is always 6 on Keystone I2C controller */ /* get minimum of 7 MHz clock, but max of 12 MHz */ @@ -204,6 +208,9 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) psc++; /* better to run under spec than over */ d = (psc >= 2) ? 5 : 7 - psc; + if (of_node && of_device_is_compatible(of_node, "ti,keystone-i2c")) + d = 6; + clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)); /* Avoid driving the bus too fast because of rounding errors above */ if (input_clock / (psc + 1) / clk > pdata->bus_freq * 1000) @@ -726,6 +733,7 @@ static struct i2c_algorithm i2c_davinci_algo = { static const struct of_device_id davinci_i2c_of_match[] = { {.compatible = "ti,davinci-i2c", }, + {.compatible = "ti,keystone-i2c", }, {}, }; MODULE_DEVICE_TABLE(of, davinci_i2c_of_match); -- cgit v0.10.2 From 26f590e674d3ecf7517148fdb62d2983469bd993 Mon Sep 17 00:00:00 2001 From: Barry Song <21cnbao@gmail.com> Date: Mon, 7 Sep 2015 03:08:55 +0000 Subject: i2c: tegra: drop duplicated code for assigning algo This code is repeated in probe: i2c_dev->adapter.algo = &tegra_i2c_algo; Cc: Donglin Peng Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index b7e1a36..a0522fc 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -873,7 +873,6 @@ static int tegra_i2c_probe(struct platform_device *pdev) i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; strlcpy(i2c_dev->adapter.name, "Tegra I2C adapter", sizeof(i2c_dev->adapter.name)); - i2c_dev->adapter.algo = &tegra_i2c_algo; i2c_dev->adapter.dev.parent = &pdev->dev; i2c_dev->adapter.nr = pdev->id; i2c_dev->adapter.dev.of_node = pdev->dev.of_node; -- cgit v0.10.2 From 8a5e3d472e04a19a47de41cbe4856169ade11af2 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Tue, 8 Sep 2015 08:56:23 +0200 Subject: i2c: au1550: relax bus timings a bit The i2c-au1550 driver has to program various setup and hold times for the sda/scl signals by hand. The current values seem to be working best when the driver is supplied with 50MHz, however on the DB1300 board 48MHz is the closest we can get to it, and the timings are a bit too tight for that, leading to the last bit of a transmission sometimes being swallowed. This manifests itself in wrong readings of the ne1619 sensor and inability to configure the wm8731 i2s codec. With the relaxed timings, both the sensor and the i2s codec can now be accessed more reliably over a wider range of I2C block input frequencies. Verified on DB1200, DB1300 and DB1550 boards. Signed-off-by: Manuel Lauss Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index a6aae84..4de1107 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -284,10 +284,10 @@ static void i2c_au1550_setup(struct i2c_au1550_data *priv) /* Set the protocol timer values. See Table 71 in the * Au1550 Data Book for standard timing values. */ - WR(priv, PSC_SMBTMR, PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ - PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ - PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ - PSC_SMBTMR_SET_CH(15)); + WR(priv, PSC_SMBTMR, PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(20) | \ + PSC_SMBTMR_SET_PU(20) | PSC_SMBTMR_SET_SH(20) | \ + PSC_SMBTMR_SET_SU(20) | PSC_SMBTMR_SET_CL(20) | \ + PSC_SMBTMR_SET_CH(20)); cfg |= PSC_SMBCFG_DE_ENABLE; WR(priv, PSC_SMBCFG, cfg); -- cgit v0.10.2 From b299167652fe58f1ebadb3e3ac84a5a0b74e534e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Wed, 7 Oct 2015 02:45:11 +0300 Subject: i2c: ocores: support big-endian register layout This allows using OpenCores I2C controller attached to its host in native-endian mode with bi-endian CPUs. Example of such system is Xtensa XTFPGA platform. Acked-by: Peter Korsgaard Signed-off-by: Max Filippov Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index abf5db7..11b7b87 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -92,6 +92,16 @@ static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value) iowrite32(value, i2c->base + (reg << i2c->reg_shift)); } +static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u8 value) +{ + iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); +} + +static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u8 value) +{ + iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); +} + static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg) { return ioread8(i2c->base + (reg << i2c->reg_shift)); @@ -107,6 +117,16 @@ static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg) return ioread32(i2c->base + (reg << i2c->reg_shift)); } +static inline u8 oc_getreg_16be(struct ocores_i2c *i2c, int reg) +{ + return ioread16be(i2c->base + (reg << i2c->reg_shift)); +} + +static inline u8 oc_getreg_32be(struct ocores_i2c *i2c, int reg) +{ + return ioread32be(i2c->base + (reg << i2c->reg_shift)); +} + static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value) { i2c->setreg(i2c, reg, value); @@ -428,6 +448,9 @@ static int ocores_i2c_probe(struct platform_device *pdev) i2c->reg_io_width = 1; /* Set to default value */ if (!i2c->setreg || !i2c->getreg) { + bool be = pdata ? pdata->big_endian : + of_device_is_big_endian(pdev->dev.of_node); + switch (i2c->reg_io_width) { case 1: i2c->setreg = oc_setreg_8; @@ -435,13 +458,13 @@ static int ocores_i2c_probe(struct platform_device *pdev) break; case 2: - i2c->setreg = oc_setreg_16; - i2c->getreg = oc_getreg_16; + i2c->setreg = be ? oc_setreg_16be : oc_setreg_16; + i2c->getreg = be ? oc_getreg_16be : oc_getreg_16; break; case 4: - i2c->setreg = oc_setreg_32; - i2c->getreg = oc_getreg_32; + i2c->setreg = be ? oc_setreg_32be : oc_setreg_32; + i2c->getreg = be ? oc_getreg_32be : oc_getreg_32; break; default: diff --git a/include/linux/i2c-ocores.h b/include/linux/i2c-ocores.h index 1c06b5c..01edd96 100644 --- a/include/linux/i2c-ocores.h +++ b/include/linux/i2c-ocores.h @@ -15,6 +15,7 @@ struct ocores_i2c_platform_data { u32 reg_shift; /* register offset shift value */ u32 reg_io_width; /* register io read/write width */ u32 clock_khz; /* input clock in kHz */ + bool big_endian; /* registers are big endian */ u8 num_devices; /* number of devices in the devices list */ struct i2c_board_info const *devices; /* devices connected to the bus */ }; -- cgit v0.10.2 From e7db0d34b38d56bbdb3d2d64c6233c53b77a3c6c Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 5 Aug 2015 15:18:25 +0200 Subject: i2c: rcar: add support for r8a7795 (R-Car H3) Enable the I2C core for this SoC. I add a new type because this version has new features (e.g. DMA) which will be added somewhen later. Signed-off-by: Wolfram Sang Tested-by: Kuninori Morimoto Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt index 16b3e07..ea406eb2 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt @@ -10,6 +10,7 @@ Required properties: "renesas,i2c-r8a7792" "renesas,i2c-r8a7793" "renesas,i2c-r8a7794" + "renesas,i2c-r8a7795" - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt specifier. diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index dbedbff..1921294 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -100,6 +100,7 @@ enum rcar_i2c_type { I2C_RCAR_GEN1, I2C_RCAR_GEN2, + I2C_RCAR_GEN3, }; struct rcar_i2c_priv { @@ -176,6 +177,7 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv, cdf_width = 2; break; case I2C_RCAR_GEN2: + case I2C_RCAR_GEN3: cdf_width = 3; break; default: @@ -573,6 +575,7 @@ static const struct of_device_id rcar_i2c_dt_ids[] = { { .compatible = "renesas,i2c-r8a7792", .data = (void *)I2C_RCAR_GEN2 }, { .compatible = "renesas,i2c-r8a7793", .data = (void *)I2C_RCAR_GEN2 }, { .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 }, + { .compatible = "renesas,i2c-r8a7795", .data = (void *)I2C_RCAR_GEN3 }, {}, }; MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids); -- cgit v0.10.2 From 7bb6da5a3d2dae725ed228a97dd65f82e3fbd934 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 5 Aug 2015 15:18:26 +0200 Subject: i2c: sh_mobile: add support for r8a7795 (R-Car H3) Enable the I2C core for this SoC. It is compitable to Gen2 SoCs, so reuse the settings. Signed-off-by: Wolfram Sang Tested-by: Kuninori Morimoto Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt index 2bfc6e7..214f94c 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt @@ -10,6 +10,7 @@ Required properties: - "renesas,iic-r8a7792" (R-Car V2H) - "renesas,iic-r8a7793" (R-Car M2-N) - "renesas,iic-r8a7794" (R-Car E2) + - "renesas,iic-r8a7795" (R-Car H3) - "renesas,iic-sh73a0" (SH-Mobile AG5) - reg : address start and address range size of device - interrupts : interrupt of device diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index 47659a9..7d2bd3e 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c @@ -836,6 +836,7 @@ static const struct of_device_id sh_mobile_i2c_dt_ids[] = { { .compatible = "renesas,iic-r8a7792", .data = &fast_clock_dt_config }, { .compatible = "renesas,iic-r8a7793", .data = &fast_clock_dt_config }, { .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config }, + { .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config }, { .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config }, {}, }; -- cgit v0.10.2 From c6f1891323e6a259c0b0f516a3a3e0f6b0ee2c5f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 7 Oct 2015 10:16:31 +0200 Subject: i2c: rcar: Remove obsolete platform data support Since commit 4baadb9e05c68962 ("ARM: shmobile: r8a7778: remove obsolete setup code"), Renesas R-Car SoCs are only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to use platform data anymore, hence remove platform data configuration. Signed-off-by: Geert Uytterhoeven [wsa: removed now unused ret value and cast to proper enum type] Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index 1921294..bbf3b25 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -582,7 +581,6 @@ MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids); static int rcar_i2c_probe(struct platform_device *pdev) { - struct i2c_rcar_platform_data *pdata = dev_get_platdata(&pdev->dev); struct rcar_i2c_priv *priv; struct i2c_adapter *adap; struct resource *res; @@ -601,15 +599,9 @@ static int rcar_i2c_probe(struct platform_device *pdev) } bus_speed = 100000; /* default 100 kHz */ - ret = of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed); - if (ret < 0 && pdata && pdata->bus_speed) - bus_speed = pdata->bus_speed; + of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed); - if (pdev->dev.of_node) - priv->devtype = (long)of_match_device(rcar_i2c_dt_ids, - dev)->data; - else - priv->devtype = platform_get_device_id(pdev)->driver_data; + priv->devtype = (enum rcar_i2c_type)of_match_device(rcar_i2c_dt_ids, dev)->data; ret = rcar_i2c_clock_calculate(priv, bus_speed, dev); if (ret < 0) @@ -667,14 +659,6 @@ static int rcar_i2c_remove(struct platform_device *pdev) return 0; } -static const struct platform_device_id rcar_i2c_id_table[] = { - { "i2c-rcar", I2C_RCAR_GEN1 }, - { "i2c-rcar_gen1", I2C_RCAR_GEN1 }, - { "i2c-rcar_gen2", I2C_RCAR_GEN2 }, - {}, -}; -MODULE_DEVICE_TABLE(platform, rcar_i2c_id_table); - static struct platform_driver rcar_i2c_driver = { .driver = { .name = "i2c-rcar", @@ -682,7 +666,6 @@ static struct platform_driver rcar_i2c_driver = { }, .probe = rcar_i2c_probe, .remove = rcar_i2c_remove, - .id_table = rcar_i2c_id_table, }; module_platform_driver(rcar_i2c_driver); diff --git a/include/linux/i2c/i2c-rcar.h b/include/linux/i2c/i2c-rcar.h deleted file mode 100644 index 496f5c2..0000000 --- a/include/linux/i2c/i2c-rcar.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __I2C_R_CAR_H__ -#define __I2C_R_CAR_H__ - -#include - -struct i2c_rcar_platform_data { - u32 bus_speed; -}; - -#endif /* __I2C_R_CAR_H__ */ -- cgit v0.10.2 From d695e22a27a958cb20f5b11df2692c13b15fc80e Mon Sep 17 00:00:00 2001 From: Luis de Bethencourt Date: Tue, 20 Oct 2015 15:16:27 +0100 Subject: i2c: ibm-iic: Fix module autoload for OF platform driver This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c index 722f839..ab49230 100644 --- a/drivers/i2c/busses/i2c-ibm_iic.c +++ b/drivers/i2c/busses/i2c-ibm_iic.c @@ -798,6 +798,7 @@ static const struct of_device_id ibm_iic_match[] = { { .compatible = "ibm,iic", }, {} }; +MODULE_DEVICE_TABLE(of, ibm_iic_match); static struct platform_driver ibm_iic_driver = { .driver = { -- cgit v0.10.2 From 93ae965022bfcdde473a5ff09e48dff7c8dab08c Mon Sep 17 00:00:00 2001 From: Luis de Bethencourt Date: Tue, 20 Oct 2015 15:16:28 +0100 Subject: i2c: meson: Fix module autoload for OF platform driver This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-meson.c b/drivers/i2c/busses/i2c-meson.c index 5e176adc..71d3929 100644 --- a/drivers/i2c/busses/i2c-meson.c +++ b/drivers/i2c/busses/i2c-meson.c @@ -475,6 +475,7 @@ static const struct of_device_id meson_i2c_match[] = { { .compatible = "amlogic,meson6-i2c" }, { }, }; +MODULE_DEVICE_TABLE(of, meson_i2c_match); static struct platform_driver meson_i2c_driver = { .probe = meson_i2c_probe, -- cgit v0.10.2 From 598cf1611b2686243c011207d24aa38e09f1a115 Mon Sep 17 00:00:00 2001 From: Luis de Bethencourt Date: Tue, 20 Oct 2015 15:16:29 +0100 Subject: i2c: rk3x: Fix module autoload for OF platform driver This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index 72e97e30..c1935eb 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers/i2c/busses/i2c-rk3x.c @@ -858,6 +858,7 @@ static const struct of_device_id rk3x_i2c_match[] = { { .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] }, {}, }; +MODULE_DEVICE_TABLE(of, rk3x_i2c_match); static int rk3x_i2c_probe(struct platform_device *pdev) { -- cgit v0.10.2 From 8c5ec4c7ec0b58658d0fab813b9aca420b85ebfa Mon Sep 17 00:00:00 2001 From: Luis de Bethencourt Date: Tue, 20 Oct 2015 15:16:30 +0100 Subject: i2c: stu300: Fix module autoload for OF platform driver This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt Acked-by: Linus Walleij Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c index 4885da9..460c134 100644 --- a/drivers/i2c/busses/i2c-stu300.c +++ b/drivers/i2c/busses/i2c-stu300.c @@ -977,6 +977,7 @@ static const struct of_device_id stu300_dt_match[] = { { .compatible = "st,ddci2c" }, {}, }; +MODULE_DEVICE_TABLE(of, stu300_dt_match); static struct platform_driver stu300_i2c_driver = { .driver = { -- cgit v0.10.2 From 319d7f05dfb148935de46f2c7544ecf1e6332161 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Wed, 21 Oct 2015 10:09:17 +0300 Subject: i2c: designware: Fix build error when !CONFIG_PM_SLEEP Commit ("i2c: designware: Rename platform driver probe and PM functions") introduced "'dw_i2c_plat_prepare' undeclared here" and "'dw_i2c_plat_complete' undeclared here" build errors when CONFIG_PM_SLEEP is not set. Fix this by renaming NULL defined dw_i2c_prepare and dw_i2c_complete PM hooks to dw_i2c_plat_prepare and dw_i2c_plat_complete since this was obviously missing from the commit. Reported-by: kbuild test robot Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index adcf4c3..c8a11ef 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -287,8 +287,8 @@ static void dw_i2c_plat_complete(struct device *dev) pm_request_resume(dev); } #else -#define dw_i2c_prepare NULL -#define dw_i2c_complete NULL +#define dw_i2c_plat_prepare NULL +#define dw_i2c_plat_complete NULL #endif #ifdef CONFIG_PM -- cgit v0.10.2 From 6f6ddbb09d2a5baded0e23add3ad2d9e9417ab30 Mon Sep 17 00:00:00 2001 From: Cyrille Pitchen Date: Wed, 21 Oct 2015 15:44:03 +0200 Subject: i2c: at91: fix write transfers by clearing pending interrupt first In some cases a NACK interrupt may be pending in the Status Register (SR) as a result of a previous transfer. However at91_do_twi_transfer() did not read the SR to clear pending interruptions before starting a new transfer. Hence a NACK interrupt rose as soon as it was enabled again at the I2C controller level, resulting in a wrong sequence of operations and strange patterns of behaviour on the I2C bus, such as a clock stretch followed by a restart of the transfer. This first issue occurred with both DMA and PIO write transfers. Also when a NACK error was detected during a PIO write transfer, the interrupt handler used to wrongly start a new transfer by writing into the Transmit Holding Register (THR). Then the I2C slave was likely to reply with a second NACK. This second issue is fixed in atmel_twi_interrupt() by handling the TXRDY status bit only if both the TXCOMP and NACK status bits are cleared. Tested with a at24 eeprom on sama5d36ek board running a linux-4.1-at91 kernel image. Adapted to linux-next. Reported-by: Peter Rosin Signed-off-by: Cyrille Pitchen Signed-off-by: Ludovic Desroches Tested-by: Peter Rosin Signed-off-by: Wolfram Sang Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1 diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c index 1c758cd..94c087b 100644 --- a/drivers/i2c/busses/i2c-at91.c +++ b/drivers/i2c/busses/i2c-at91.c @@ -465,19 +465,57 @@ static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id) if (!irqstatus) return IRQ_NONE; - else if (irqstatus & AT91_TWI_RXRDY) - at91_twi_read_next_byte(dev); - else if (irqstatus & AT91_TWI_TXRDY) - at91_twi_write_next_byte(dev); - - /* catch error flags */ - dev->transfer_status |= status; + /* + * When a NACK condition is detected, the I2C controller sets the NACK, + * TXCOMP and TXRDY bits all together in the Status Register (SR). + * + * 1 - Handling NACK errors with CPU write transfer. + * + * In such case, we should not write the next byte into the Transmit + * Holding Register (THR) otherwise the I2C controller would start a new + * transfer and the I2C slave is likely to reply by another NACK. + * + * 2 - Handling NACK errors with DMA write transfer. + * + * By setting the TXRDY bit in the SR, the I2C controller also triggers + * the DMA controller to write the next data into the THR. Then the + * result depends on the hardware version of the I2C controller. + * + * 2a - Without support of the Alternative Command mode. + * + * This is the worst case: the DMA controller is triggered to write the + * next data into the THR, hence starting a new transfer: the I2C slave + * is likely to reply by another NACK. + * Concurrently, this interrupt handler is likely to be called to manage + * the first NACK before the I2C controller detects the second NACK and + * sets once again the NACK bit into the SR. + * When handling the first NACK, this interrupt handler disables the I2C + * controller interruptions, especially the NACK interrupt. + * Hence, the NACK bit is pending into the SR. This is why we should + * read the SR to clear all pending interrupts at the beginning of + * at91_do_twi_transfer() before actually starting a new transfer. + * + * 2b - With support of the Alternative Command mode. + * + * When a NACK condition is detected, the I2C controller also locks the + * THR (and sets the LOCK bit in the SR): even though the DMA controller + * is triggered by the TXRDY bit to write the next data into the THR, + * this data actually won't go on the I2C bus hence a second NACK is not + * generated. + */ if (irqstatus & (AT91_TWI_TXCOMP | AT91_TWI_NACK)) { at91_disable_twi_interrupts(dev); complete(&dev->cmd_complete); + } else if (irqstatus & AT91_TWI_RXRDY) { + at91_twi_read_next_byte(dev); + } else if (irqstatus & AT91_TWI_TXRDY) { + at91_twi_write_next_byte(dev); } + /* catch error flags */ + dev->transfer_status |= status; + return IRQ_HANDLED; } @@ -487,6 +525,7 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) unsigned long time_left; bool has_unre_flag = dev->pdata->has_unre_flag; bool has_alt_cmd = dev->pdata->has_alt_cmd; + unsigned sr; /* * WARNING: the TXCOMP bit in the Status Register is NOT a clear on @@ -537,6 +576,9 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) reinit_completion(&dev->cmd_complete); dev->transfer_status = 0; + /* Clear pending interrupts, such as NACK. */ + sr = at91_twi_read(dev, AT91_TWI_SR); + if (dev->fifo_size) { unsigned fifo_mr = at91_twi_read(dev, AT91_TWI_FMR); @@ -558,7 +600,7 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) } else if (dev->msg->flags & I2C_M_RD) { unsigned start_flags = AT91_TWI_START; - if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) { + if (sr & AT91_TWI_RXRDY) { dev_err(dev->dev, "RXRDY still set!"); at91_twi_read(dev, AT91_TWI_RHR); } -- cgit v0.10.2 From fa721baed6ba9ec5cdb3109d71f31e0974c8d3f1 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Fri, 23 Oct 2015 16:01:17 +0800 Subject: i2c: imx: add support for Freescale Layerscape platforms Signed-off-by: Shaohui Xie Signed-off-by: Hou Zhiqiang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 08b8617..14147ec 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -582,10 +582,10 @@ config I2C_IMG config I2C_IMX tristate "IMX I2C interface" - depends on ARCH_MXC + depends on ARCH_MXC || ARCH_LAYERSCAPE help Say Y here if you want to use the IIC bus controller on - the Freescale i.MX/MXC processors. + the Freescale i.MX/MXC or Layerscape processors. This driver can also be built as a module. If so, the module will be called i2c-imx. -- cgit v0.10.2 From 3eddad96c4395280d5f6f13c958b276c11d3f575 Mon Sep 17 00:00:00 2001 From: Ken Xue Date: Fri, 23 Oct 2015 13:28:47 +0800 Subject: i2c: designware: reverts "i2c: designware: Add support for AMD I2C controller" The patch reverts commit a445900c9060 (i2c: designware: Add support for AMD I2C controller). It never worked anyhow because it did not register a proper clkdev. Since kernel 4.1 starts to support APD, there is no need to get freq from id->driver_data for AMD0010. clkdev is supposed to be already registered in APD. So, revert old design and make AMD0010 looks like other ones. Signed-off-by: Ken Xue Signed-off-by: Xiangliang Yu Acked-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index c8a11ef..f830da6 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -73,7 +73,6 @@ static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], static int dw_i2c_acpi_configure(struct platform_device *pdev) { struct dw_i2c_dev *dev = platform_get_drvdata(pdev); - const struct acpi_device_id *id; dev->adapter.nr = -1; dev->tx_fifo_depth = 32; @@ -87,29 +86,9 @@ static int dw_i2c_acpi_configure(struct platform_device *pdev) dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &dev->sda_hold_time); - /* - * Provide a way for Designware I2C host controllers that are not - * based on Intel LPSS to specify their input clock frequency via - * id->driver_data. - */ - id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); - if (id && id->driver_data) - clk_register_fixed_rate(&pdev->dev, dev_name(&pdev->dev), NULL, - CLK_IS_ROOT, id->driver_data); - return 0; } -static void dw_i2c_acpi_unconfigure(struct platform_device *pdev) -{ - struct dw_i2c_dev *dev = platform_get_drvdata(pdev); - const struct acpi_device_id *id; - - id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); - if (id && id->driver_data) - clk_unregister(dev->clk); -} - static const struct acpi_device_id dw_i2c_acpi_match[] = { { "INT33C2", 0 }, { "INT33C3", 0 }, @@ -117,7 +96,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = { { "INT3433", 0 }, { "80860F41", 0 }, { "808622C1", 0 }, - { "AMD0010", 133 * 1000 * 1000 }, + { "AMD0010", 0 }, { } }; MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); @@ -126,7 +105,6 @@ static inline int dw_i2c_acpi_configure(struct platform_device *pdev) { return -ENODEV; } -static inline void dw_i2c_acpi_unconfigure(struct platform_device *pdev) { } #endif static int dw_i2c_plat_probe(struct platform_device *pdev) @@ -261,9 +239,6 @@ static int dw_i2c_plat_remove(struct platform_device *pdev) pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (has_acpi_companion(&pdev->dev)) - dw_i2c_acpi_unconfigure(pdev); - return 0; } -- cgit v0.10.2 From dd6fd4a3279310bac214867e31848f47e13caa6f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 23 Oct 2015 19:51:59 +0900 Subject: i2c: uniphier: add UniPhier FIFO-less I2C driver Add support for on-chip I2C controller used on old UniPhier SoCs such as PH1-LD4, PH1-sLD8, etc. This adapter is so simple that it has no FIFO in it. Signed-off-by: Masahiro Yamada Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt b/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt new file mode 100644 index 0000000..26f9d95 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-uniphier.txt @@ -0,0 +1,25 @@ +UniPhier I2C controller (FIFO-less) + +Required properties: +- compatible: should be "socionext,uniphier-i2c". +- #address-cells: should be 1. +- #size-cells: should be 0. +- reg: offset and length of the register set for the device. +- interrupts: a single interrupt specifier. +- clocks: phandle to the input clock. + +Optional properties: +- clock-frequency: desired I2C bus frequency in Hz. The maximum supported + value is 400000. Defaults to 100000 if not specified. + +Examples: + + i2c0: i2c@58400000 { + compatible = "socionext,uniphier-i2c"; + reg = <0x58400000 0x40>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 797236b..2f23aab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1607,6 +1607,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm/boot/dts/uniphier* F: arch/arm/mach-uniphier/ +F: drivers/i2c/busses/i2c-uniphier* F: drivers/pinctrl/uniphier/ F: drivers/tty/serial/8250/8250_uniphier.c N: uniphier diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 14147ec..6a40e16 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -902,6 +902,14 @@ config I2C_TEGRA If you say yes to this option, support will be included for the I2C controller embedded in NVIDIA Tegra SOCs +config I2C_UNIPHIER + tristate "UniPhier FIFO-less I2C controller" + depends on ARCH_UNIPHIER + help + If you say yes to this option, support will be included for + the UniPhier FIFO-less I2C interface embedded in PH1-LD4, PH1-sLD8, + or older UniPhier SoCs. + config I2C_VERSATILE tristate "ARM Versatile/Realview I2C bus support" depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 6df3b30..f9f0902 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -87,6 +87,7 @@ obj-$(CONFIG_I2C_ST) += i2c-st.o obj-$(CONFIG_I2C_STU300) += i2c-stu300.o obj-$(CONFIG_I2C_SUN6I_P2WI) += i2c-sun6i-p2wi.o obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o +obj-$(CONFIG_I2C_UNIPHIER) += i2c-uniphier.o obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o obj-$(CONFIG_I2C_WMT) += i2c-wmt.o obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o diff --git a/drivers/i2c/busses/i2c-uniphier.c b/drivers/i2c/busses/i2c-uniphier.c new file mode 100644 index 0000000..e3c3861 --- /dev/null +++ b/drivers/i2c/busses/i2c-uniphier.c @@ -0,0 +1,441 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define UNIPHIER_I2C_DTRM 0x00 /* TX register */ +#define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */ +#define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */ +#define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */ +#define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */ +#define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */ +#define UNIPHIER_I2C_DREC 0x04 /* RX register */ +#define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */ +#define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */ +#define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */ +#define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */ +#define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */ +#define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */ +#define UNIPHIER_I2C_MYAD 0x08 /* slave address */ +#define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */ +#define UNIPHIER_I2C_BRST 0x10 /* bus reset */ +#define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */ +#define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */ +#define UNIPHIER_I2C_HOLD 0x14 /* hold time control */ +#define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */ +#define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */ +#define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */ +#define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */ +#define UNIPHIER_I2C_SETUP 0x20 /* setup time control */ + +#define UNIPHIER_I2C_DEFAULT_SPEED 100000 +#define UNIPHIER_I2C_MAX_SPEED 400000 + +struct uniphier_i2c_priv { + struct completion comp; + struct i2c_adapter adap; + void __iomem *membase; + struct clk *clk; + unsigned int busy_cnt; +}; + +static irqreturn_t uniphier_i2c_interrupt(int irq, void *dev_id) +{ + struct uniphier_i2c_priv *priv = dev_id; + + /* + * This hardware uses edge triggered interrupt. Do not touch the + * hardware registers in this handler to make sure to catch the next + * interrupt edge. Just send a complete signal and return. + */ + complete(&priv->comp); + + return IRQ_HANDLED; +} + +static int uniphier_i2c_xfer_byte(struct i2c_adapter *adap, u32 txdata, + u32 *rxdatap) +{ + struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); + unsigned long time_left; + u32 rxdata; + + reinit_completion(&priv->comp); + + txdata |= UNIPHIER_I2C_DTRM_IRQEN; + dev_dbg(&adap->dev, "write data: 0x%04x\n", txdata); + writel(txdata, priv->membase + UNIPHIER_I2C_DTRM); + + time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); + if (unlikely(!time_left)) { + dev_err(&adap->dev, "transaction timeout\n"); + return -ETIMEDOUT; + } + + rxdata = readl(priv->membase + UNIPHIER_I2C_DREC); + dev_dbg(&adap->dev, "read data: 0x%04x\n", rxdata); + + if (rxdatap) + *rxdatap = rxdata; + + return 0; +} + +static int uniphier_i2c_send_byte(struct i2c_adapter *adap, u32 txdata) +{ + u32 rxdata; + int ret; + + ret = uniphier_i2c_xfer_byte(adap, txdata, &rxdata); + if (ret) + return ret; + + if (unlikely(rxdata & UNIPHIER_I2C_DREC_LAB)) { + dev_dbg(&adap->dev, "arbitration lost\n"); + return -EAGAIN; + } + if (unlikely(rxdata & UNIPHIER_I2C_DREC_LRB)) { + dev_dbg(&adap->dev, "could not get ACK\n"); + return -ENXIO; + } + + return 0; +} + +static int uniphier_i2c_tx(struct i2c_adapter *adap, u16 addr, u16 len, + const u8 *buf) +{ + int ret; + + dev_dbg(&adap->dev, "start condition\n"); + ret = uniphier_i2c_send_byte(adap, addr << 1 | + UNIPHIER_I2C_DTRM_STA | + UNIPHIER_I2C_DTRM_NACK); + if (ret) + return ret; + + while (len--) { + ret = uniphier_i2c_send_byte(adap, + UNIPHIER_I2C_DTRM_NACK | *buf++); + if (ret) + return ret; + } + + return 0; +} + +static int uniphier_i2c_rx(struct i2c_adapter *adap, u16 addr, u16 len, + u8 *buf) +{ + int ret; + + dev_dbg(&adap->dev, "start condition\n"); + ret = uniphier_i2c_send_byte(adap, addr << 1 | + UNIPHIER_I2C_DTRM_STA | + UNIPHIER_I2C_DTRM_NACK | + UNIPHIER_I2C_DTRM_RD); + if (ret) + return ret; + + while (len--) { + u32 rxdata; + + ret = uniphier_i2c_xfer_byte(adap, + len ? 0 : UNIPHIER_I2C_DTRM_NACK, + &rxdata); + if (ret) + return ret; + *buf++ = rxdata; + } + + return 0; +} + +static int uniphier_i2c_stop(struct i2c_adapter *adap) +{ + dev_dbg(&adap->dev, "stop condition\n"); + return uniphier_i2c_send_byte(adap, UNIPHIER_I2C_DTRM_STO | + UNIPHIER_I2C_DTRM_NACK); +} + +static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap, + struct i2c_msg *msg, bool stop) +{ + bool is_read = msg->flags & I2C_M_RD; + bool recovery = false; + int ret; + + dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", + is_read ? "receive" : "transmit", msg->addr, msg->len, stop); + + if (is_read) + ret = uniphier_i2c_rx(adap, msg->addr, msg->len, msg->buf); + else + ret = uniphier_i2c_tx(adap, msg->addr, msg->len, msg->buf); + + if (ret == -EAGAIN) /* could not acquire bus. bail out without STOP */ + return ret; + + if (ret == -ETIMEDOUT) { + /* This error is fatal. Needs recovery. */ + stop = false; + recovery = true; + } + + if (stop) { + int ret2 = uniphier_i2c_stop(adap); + + if (ret2) { + /* Failed to issue STOP. The bus needs recovery. */ + recovery = true; + ret = ret ?: ret2; + } + } + + if (recovery) + i2c_recover_bus(adap); + + return ret; +} + +static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap) +{ + struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); + + if (!(readl(priv->membase + UNIPHIER_I2C_DREC) & + UNIPHIER_I2C_DREC_BBN)) { + if (priv->busy_cnt++ > 3) { + /* + * If bus busy continues too long, it is probably + * in a wrong state. Try bus recovery. + */ + i2c_recover_bus(adap); + priv->busy_cnt = 0; + } + + return -EAGAIN; + } + + priv->busy_cnt = 0; + return 0; +} + +static int uniphier_i2c_master_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + struct i2c_msg *msg, *emsg = msgs + num; + int ret; + + ret = uniphier_i2c_check_bus_busy(adap); + if (ret) + return ret; + + for (msg = msgs; msg < emsg; msg++) { + /* If next message is read, skip the stop condition */ + bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD); + /* but, force it if I2C_M_STOP is set */ + if (msg->flags & I2C_M_STOP) + stop = true; + + ret = uniphier_i2c_master_xfer_one(adap, msg, stop); + if (ret) + return ret; + } + + return num; +} + +static u32 uniphier_i2c_functionality(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm uniphier_i2c_algo = { + .master_xfer = uniphier_i2c_master_xfer, + .functionality = uniphier_i2c_functionality, +}; + +static void uniphier_i2c_reset(struct uniphier_i2c_priv *priv, bool reset_on) +{ + u32 val = UNIPHIER_I2C_BRST_RSCL; + + val |= reset_on ? 0 : UNIPHIER_I2C_BRST_FOEN; + writel(val, priv->membase + UNIPHIER_I2C_BRST); +} + +static int uniphier_i2c_get_scl(struct i2c_adapter *adap) +{ + struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); + + return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & + UNIPHIER_I2C_BSTS_SCL); +} + +static void uniphier_i2c_set_scl(struct i2c_adapter *adap, int val) +{ + struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); + + writel(val ? UNIPHIER_I2C_BRST_RSCL : 0, + priv->membase + UNIPHIER_I2C_BRST); +} + +static int uniphier_i2c_get_sda(struct i2c_adapter *adap) +{ + struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); + + return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & + UNIPHIER_I2C_BSTS_SDA); +} + +static void uniphier_i2c_unprepare_recovery(struct i2c_adapter *adap) +{ + uniphier_i2c_reset(i2c_get_adapdata(adap), false); +} + +static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info = { + .recover_bus = i2c_generic_scl_recovery, + .get_scl = uniphier_i2c_get_scl, + .set_scl = uniphier_i2c_set_scl, + .get_sda = uniphier_i2c_get_sda, + .unprepare_recovery = uniphier_i2c_unprepare_recovery, +}; + +static int uniphier_i2c_clk_init(struct device *dev, + struct uniphier_i2c_priv *priv) +{ + struct device_node *np = dev->of_node; + unsigned long clk_rate; + u32 bus_speed; + int ret; + + if (of_property_read_u32(np, "clock-frequency", &bus_speed)) + bus_speed = UNIPHIER_I2C_DEFAULT_SPEED; + + if (bus_speed > UNIPHIER_I2C_MAX_SPEED) + bus_speed = UNIPHIER_I2C_MAX_SPEED; + + /* Get input clk rate through clk driver */ + priv->clk = devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(dev, "failed to get clock\n"); + return PTR_ERR(priv->clk); + } + + ret = clk_prepare_enable(priv->clk); + if (ret) + return ret; + + clk_rate = clk_get_rate(priv->clk); + + uniphier_i2c_reset(priv, true); + + writel((clk_rate / bus_speed / 2 << 16) | (clk_rate / bus_speed), + priv->membase + UNIPHIER_I2C_CLK); + + uniphier_i2c_reset(priv, false); + + return 0; +} + +static int uniphier_i2c_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct uniphier_i2c_priv *priv; + struct resource *regs; + int irq; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->membase = devm_ioremap_resource(dev, regs); + if (IS_ERR(priv->membase)) + return PTR_ERR(priv->membase); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(dev, "failed to get IRQ number"); + return irq; + } + + init_completion(&priv->comp); + priv->adap.owner = THIS_MODULE; + priv->adap.algo = &uniphier_i2c_algo; + priv->adap.dev.parent = dev; + priv->adap.dev.of_node = dev->of_node; + strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name)); + priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info; + i2c_set_adapdata(&priv->adap, priv); + platform_set_drvdata(pdev, priv); + + ret = uniphier_i2c_clk_init(dev, priv); + if (ret) + return ret; + + ret = devm_request_irq(dev, irq, uniphier_i2c_interrupt, 0, pdev->name, + priv); + if (ret) { + dev_err(dev, "failed to request irq %d\n", irq); + goto err; + } + + ret = i2c_add_adapter(&priv->adap); + if (ret) { + dev_err(dev, "failed to add I2C adapter\n"); + goto err; + } + +err: + if (ret) + clk_disable_unprepare(priv->clk); + + return ret; +} + +static int uniphier_i2c_remove(struct platform_device *pdev) +{ + struct uniphier_i2c_priv *priv = platform_get_drvdata(pdev); + + i2c_del_adapter(&priv->adap); + clk_disable_unprepare(priv->clk); + + return 0; +} + +static const struct of_device_id uniphier_i2c_match[] = { + { .compatible = "socionext,uniphier-i2c" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, uniphier_i2c_match); + +static struct platform_driver uniphier_i2c_drv = { + .probe = uniphier_i2c_probe, + .remove = uniphier_i2c_remove, + .driver = { + .name = "uniphier-i2c", + .of_match_table = uniphier_i2c_match, + }, +}; +module_platform_driver(uniphier_i2c_drv); + +MODULE_AUTHOR("Masahiro Yamada "); +MODULE_DESCRIPTION("UniPhier I2C bus driver"); +MODULE_LICENSE("GPL"); -- cgit v0.10.2 From 6a62974b667f3976ec44e255bed31746cca1ff51 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 23 Oct 2015 19:52:00 +0900 Subject: i2c: uniphier_f: add UniPhier FIFO-builtin I2C driver Add support for on-chip I2C controller used on newer UniPhier SoCs such as PH1-Pro4, PH1-Pro5, etc. This adapter is equipped with 8-depth TX/RX FIFOs. Signed-off-by: Masahiro Yamada Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt b/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt new file mode 100644 index 0000000..27fc6f8 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-uniphier-f.txt @@ -0,0 +1,25 @@ +UniPhier I2C controller (FIFO-builtin) + +Required properties: +- compatible: should be "socionext,uniphier-fi2c". +- #address-cells: should be 1. +- #size-cells: should be 0. +- reg: offset and length of the register set for the device. +- interrupts: a single interrupt specifier. +- clocks: phandle to the input clock. + +Optional properties: +- clock-frequency: desired I2C bus frequency in Hz. The maximum supported + value is 400000. Defaults to 100000 if not specified. + +Examples: + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 6a40e16..0774f18 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -910,6 +910,14 @@ config I2C_UNIPHIER the UniPhier FIFO-less I2C interface embedded in PH1-LD4, PH1-sLD8, or older UniPhier SoCs. +config I2C_UNIPHIER_F + tristate "UniPhier FIFO-builtin I2C controller" + depends on ARCH_UNIPHIER + help + If you say yes to this option, support will be included for + the UniPhier FIFO-builtin I2C interface embedded in PH1-Pro4, + PH1-Pro5, or newer UniPhier SoCs. + config I2C_VERSATILE tristate "ARM Versatile/Realview I2C bus support" depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index f9f0902..37f2819 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -88,6 +88,7 @@ obj-$(CONFIG_I2C_STU300) += i2c-stu300.o obj-$(CONFIG_I2C_SUN6I_P2WI) += i2c-sun6i-p2wi.o obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o obj-$(CONFIG_I2C_UNIPHIER) += i2c-uniphier.o +obj-$(CONFIG_I2C_UNIPHIER_F) += i2c-uniphier-f.o obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o obj-$(CONFIG_I2C_WMT) += i2c-wmt.o obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o diff --git a/drivers/i2c/busses/i2c-uniphier-f.c b/drivers/i2c/busses/i2c-uniphier-f.c new file mode 100644 index 0000000..e8d03bc --- /dev/null +++ b/drivers/i2c/busses/i2c-uniphier-f.c @@ -0,0 +1,584 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define UNIPHIER_FI2C_CR 0x00 /* control register */ +#define UNIPHIER_FI2C_CR_MST BIT(3) /* master mode */ +#define UNIPHIER_FI2C_CR_STA BIT(2) /* start condition */ +#define UNIPHIER_FI2C_CR_STO BIT(1) /* stop condition */ +#define UNIPHIER_FI2C_CR_NACK BIT(0) /* do not return ACK */ +#define UNIPHIER_FI2C_DTTX 0x04 /* TX FIFO */ +#define UNIPHIER_FI2C_DTTX_CMD BIT(8) /* send command (slave addr) */ +#define UNIPHIER_FI2C_DTTX_RD BIT(0) /* read transaction */ +#define UNIPHIER_FI2C_DTRX 0x04 /* RX FIFO */ +#define UNIPHIER_FI2C_SLAD 0x0c /* slave address */ +#define UNIPHIER_FI2C_CYC 0x10 /* clock cycle control */ +#define UNIPHIER_FI2C_LCTL 0x14 /* clock low period control */ +#define UNIPHIER_FI2C_SSUT 0x18 /* restart/stop setup time control */ +#define UNIPHIER_FI2C_DSUT 0x1c /* data setup time control */ +#define UNIPHIER_FI2C_INT 0x20 /* interrupt status */ +#define UNIPHIER_FI2C_IE 0x24 /* interrupt enable */ +#define UNIPHIER_FI2C_IC 0x28 /* interrupt clear */ +#define UNIPHIER_FI2C_INT_TE BIT(9) /* TX FIFO empty */ +#define UNIPHIER_FI2C_INT_RF BIT(8) /* RX FIFO full */ +#define UNIPHIER_FI2C_INT_TC BIT(7) /* send complete (STOP) */ +#define UNIPHIER_FI2C_INT_RC BIT(6) /* receive complete (STOP) */ +#define UNIPHIER_FI2C_INT_TB BIT(5) /* sent specified bytes */ +#define UNIPHIER_FI2C_INT_RB BIT(4) /* received specified bytes */ +#define UNIPHIER_FI2C_INT_NA BIT(2) /* no ACK */ +#define UNIPHIER_FI2C_INT_AL BIT(1) /* arbitration lost */ +#define UNIPHIER_FI2C_SR 0x2c /* status register */ +#define UNIPHIER_FI2C_SR_DB BIT(12) /* device busy */ +#define UNIPHIER_FI2C_SR_STS BIT(11) /* stop condition detected */ +#define UNIPHIER_FI2C_SR_BB BIT(8) /* bus busy */ +#define UNIPHIER_FI2C_SR_RFF BIT(3) /* RX FIFO full */ +#define UNIPHIER_FI2C_SR_RNE BIT(2) /* RX FIFO not empty */ +#define UNIPHIER_FI2C_SR_TNF BIT(1) /* TX FIFO not full */ +#define UNIPHIER_FI2C_SR_TFE BIT(0) /* TX FIFO empty */ +#define UNIPHIER_FI2C_RST 0x34 /* reset control */ +#define UNIPHIER_FI2C_RST_TBRST BIT(2) /* clear TX FIFO */ +#define UNIPHIER_FI2C_RST_RBRST BIT(1) /* clear RX FIFO */ +#define UNIPHIER_FI2C_RST_RST BIT(0) /* forcible bus reset */ +#define UNIPHIER_FI2C_BM 0x38 /* bus monitor */ +#define UNIPHIER_FI2C_BM_SDAO BIT(3) /* output for SDA line */ +#define UNIPHIER_FI2C_BM_SDAS BIT(2) /* readback of SDA line */ +#define UNIPHIER_FI2C_BM_SCLO BIT(1) /* output for SCL line */ +#define UNIPHIER_FI2C_BM_SCLS BIT(0) /* readback of SCL line */ +#define UNIPHIER_FI2C_NOISE 0x3c /* noise filter control */ +#define UNIPHIER_FI2C_TBC 0x40 /* TX byte count setting */ +#define UNIPHIER_FI2C_RBC 0x44 /* RX byte count setting */ +#define UNIPHIER_FI2C_TBCM 0x48 /* TX byte count monitor */ +#define UNIPHIER_FI2C_RBCM 0x4c /* RX byte count monitor */ +#define UNIPHIER_FI2C_BRST 0x50 /* bus reset */ +#define UNIPHIER_FI2C_BRST_FOEN BIT(1) /* normal operation */ +#define UNIPHIER_FI2C_BRST_RSCL BIT(0) /* release SCL */ + +#define UNIPHIER_FI2C_INT_FAULTS \ + (UNIPHIER_FI2C_INT_NA | UNIPHIER_FI2C_INT_AL) +#define UNIPHIER_FI2C_INT_STOP \ + (UNIPHIER_FI2C_INT_TC | UNIPHIER_FI2C_INT_RC) + +#define UNIPHIER_FI2C_RD BIT(0) +#define UNIPHIER_FI2C_STOP BIT(1) +#define UNIPHIER_FI2C_MANUAL_NACK BIT(2) +#define UNIPHIER_FI2C_BYTE_WISE BIT(3) +#define UNIPHIER_FI2C_DEFER_STOP_COMP BIT(4) + +#define UNIPHIER_FI2C_DEFAULT_SPEED 100000 +#define UNIPHIER_FI2C_MAX_SPEED 400000 +#define UNIPHIER_FI2C_FIFO_SIZE 8 + +struct uniphier_fi2c_priv { + struct completion comp; + struct i2c_adapter adap; + void __iomem *membase; + struct clk *clk; + unsigned int len; + u8 *buf; + u32 enabled_irqs; + int error; + unsigned int flags; + unsigned int busy_cnt; +}; + +static void uniphier_fi2c_fill_txfifo(struct uniphier_fi2c_priv *priv, + bool first) +{ + int fifo_space = UNIPHIER_FI2C_FIFO_SIZE; + + /* + * TX-FIFO stores slave address in it for the first access. + * Decrement the counter. + */ + if (first) + fifo_space--; + + while (priv->len) { + if (fifo_space-- <= 0) + break; + + dev_dbg(&priv->adap.dev, "write data: %02x\n", *priv->buf); + writel(*priv->buf++, priv->membase + UNIPHIER_FI2C_DTTX); + priv->len--; + } +} + +static void uniphier_fi2c_drain_rxfifo(struct uniphier_fi2c_priv *priv) +{ + int fifo_left = priv->flags & UNIPHIER_FI2C_BYTE_WISE ? + 1 : UNIPHIER_FI2C_FIFO_SIZE; + + while (priv->len) { + if (fifo_left-- <= 0) + break; + + *priv->buf++ = readl(priv->membase + UNIPHIER_FI2C_DTRX); + dev_dbg(&priv->adap.dev, "read data: %02x\n", priv->buf[-1]); + priv->len--; + } +} + +static void uniphier_fi2c_set_irqs(struct uniphier_fi2c_priv *priv) +{ + writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE); +} + +static void uniphier_fi2c_clear_irqs(struct uniphier_fi2c_priv *priv) +{ + writel(-1, priv->membase + UNIPHIER_FI2C_IC); +} + +static void uniphier_fi2c_stop(struct uniphier_fi2c_priv *priv) +{ + dev_dbg(&priv->adap.dev, "stop condition\n"); + + priv->enabled_irqs |= UNIPHIER_FI2C_INT_STOP; + uniphier_fi2c_set_irqs(priv); + writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STO, + priv->membase + UNIPHIER_FI2C_CR); +} + +static irqreturn_t uniphier_fi2c_interrupt(int irq, void *dev_id) +{ + struct uniphier_fi2c_priv *priv = dev_id; + u32 irq_status; + + irq_status = readl(priv->membase + UNIPHIER_FI2C_INT); + + dev_dbg(&priv->adap.dev, + "interrupt: enabled_irqs=%04x, irq_status=%04x\n", + priv->enabled_irqs, irq_status); + + if (irq_status & UNIPHIER_FI2C_INT_STOP) + goto complete; + + if (unlikely(irq_status & UNIPHIER_FI2C_INT_AL)) { + dev_dbg(&priv->adap.dev, "arbitration lost\n"); + priv->error = -EAGAIN; + goto complete; + } + + if (unlikely(irq_status & UNIPHIER_FI2C_INT_NA)) { + dev_dbg(&priv->adap.dev, "could not get ACK\n"); + priv->error = -ENXIO; + if (priv->flags & UNIPHIER_FI2C_RD) { + /* + * work around a hardware bug: + * The receive-completed interrupt is never set even if + * STOP condition is detected after the address phase + * of read transaction fails to get ACK. + * To avoid time-out error, we issue STOP here, + * but do not wait for its completion. + * It should be checked after exiting this handler. + */ + uniphier_fi2c_stop(priv); + priv->flags |= UNIPHIER_FI2C_DEFER_STOP_COMP; + goto complete; + } + goto stop; + } + + if (irq_status & UNIPHIER_FI2C_INT_TE) { + if (!priv->len) + goto data_done; + + uniphier_fi2c_fill_txfifo(priv, false); + goto handled; + } + + if (irq_status & (UNIPHIER_FI2C_INT_RF | UNIPHIER_FI2C_INT_RB)) { + uniphier_fi2c_drain_rxfifo(priv); + if (!priv->len) + goto data_done; + + if (unlikely(priv->flags & UNIPHIER_FI2C_MANUAL_NACK)) { + if (priv->len <= UNIPHIER_FI2C_FIFO_SIZE && + !(priv->flags & UNIPHIER_FI2C_BYTE_WISE)) { + dev_dbg(&priv->adap.dev, + "enable read byte count IRQ\n"); + priv->enabled_irqs |= UNIPHIER_FI2C_INT_RB; + uniphier_fi2c_set_irqs(priv); + priv->flags |= UNIPHIER_FI2C_BYTE_WISE; + } + if (priv->len <= 1) { + dev_dbg(&priv->adap.dev, "set NACK\n"); + writel(UNIPHIER_FI2C_CR_MST | + UNIPHIER_FI2C_CR_NACK, + priv->membase + UNIPHIER_FI2C_CR); + } + } + + goto handled; + } + + return IRQ_NONE; + +data_done: + if (priv->flags & UNIPHIER_FI2C_STOP) { +stop: + uniphier_fi2c_stop(priv); + } else { +complete: + priv->enabled_irqs = 0; + uniphier_fi2c_set_irqs(priv); + complete(&priv->comp); + } + +handled: + uniphier_fi2c_clear_irqs(priv); + + return IRQ_HANDLED; +} + +static void uniphier_fi2c_tx_init(struct uniphier_fi2c_priv *priv, u16 addr) +{ + priv->enabled_irqs |= UNIPHIER_FI2C_INT_TE; + /* do not use TX byte counter */ + writel(0, priv->membase + UNIPHIER_FI2C_TBC); + /* set slave address */ + writel(UNIPHIER_FI2C_DTTX_CMD | addr << 1, + priv->membase + UNIPHIER_FI2C_DTTX); + /* first chunk of data */ + uniphier_fi2c_fill_txfifo(priv, true); +} + +static void uniphier_fi2c_rx_init(struct uniphier_fi2c_priv *priv, u16 addr) +{ + priv->flags |= UNIPHIER_FI2C_RD; + + if (likely(priv->len < 256)) { + /* + * If possible, use RX byte counter. + * It can automatically handle NACK for the last byte. + */ + writel(priv->len, priv->membase + UNIPHIER_FI2C_RBC); + priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF | + UNIPHIER_FI2C_INT_RB; + } else { + /* + * The byte counter can not count over 256. In this case, + * do not use it at all. Drain data when FIFO gets full, + * but treat the last portion as a special case. + */ + writel(0, priv->membase + UNIPHIER_FI2C_RBC); + priv->flags |= UNIPHIER_FI2C_MANUAL_NACK; + priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF; + } + + /* set slave address with RD bit */ + writel(UNIPHIER_FI2C_DTTX_CMD | UNIPHIER_FI2C_DTTX_RD | addr << 1, + priv->membase + UNIPHIER_FI2C_DTTX); +} + +static void uniphier_fi2c_reset(struct uniphier_fi2c_priv *priv) +{ + writel(UNIPHIER_FI2C_RST_RST, priv->membase + UNIPHIER_FI2C_RST); +} + +static void uniphier_fi2c_prepare_operation(struct uniphier_fi2c_priv *priv) +{ + writel(UNIPHIER_FI2C_BRST_FOEN | UNIPHIER_FI2C_BRST_RSCL, + priv->membase + UNIPHIER_FI2C_BRST); +} + +static void uniphier_fi2c_recover(struct uniphier_fi2c_priv *priv) +{ + uniphier_fi2c_reset(priv); + i2c_recover_bus(&priv->adap); +} + +static int uniphier_fi2c_master_xfer_one(struct i2c_adapter *adap, + struct i2c_msg *msg, bool stop) +{ + struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); + bool is_read = msg->flags & I2C_M_RD; + unsigned long time_left; + + dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", + is_read ? "receive" : "transmit", msg->addr, msg->len, stop); + + priv->len = msg->len; + priv->buf = msg->buf; + priv->enabled_irqs = UNIPHIER_FI2C_INT_FAULTS; + priv->error = 0; + priv->flags = 0; + + if (stop) + priv->flags |= UNIPHIER_FI2C_STOP; + + reinit_completion(&priv->comp); + uniphier_fi2c_clear_irqs(priv); + writel(UNIPHIER_FI2C_RST_TBRST | UNIPHIER_FI2C_RST_RBRST, + priv->membase + UNIPHIER_FI2C_RST); /* reset TX/RX FIFO */ + + if (is_read) + uniphier_fi2c_rx_init(priv, msg->addr); + else + uniphier_fi2c_tx_init(priv, msg->addr); + + uniphier_fi2c_set_irqs(priv); + + dev_dbg(&adap->dev, "start condition\n"); + writel(UNIPHIER_FI2C_CR_MST | UNIPHIER_FI2C_CR_STA, + priv->membase + UNIPHIER_FI2C_CR); + + time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); + if (!time_left) { + dev_err(&adap->dev, "transaction timeout.\n"); + uniphier_fi2c_recover(priv); + return -ETIMEDOUT; + } + dev_dbg(&adap->dev, "complete\n"); + + if (unlikely(priv->flags & UNIPHIER_FI2C_DEFER_STOP_COMP)) { + u32 status = readl(priv->membase + UNIPHIER_FI2C_SR); + + if (!(status & UNIPHIER_FI2C_SR_STS) || + status & UNIPHIER_FI2C_SR_BB) { + dev_err(&adap->dev, + "stop condition was not completed.\n"); + uniphier_fi2c_recover(priv); + return -EBUSY; + } + } + + return priv->error; +} + +static int uniphier_fi2c_check_bus_busy(struct i2c_adapter *adap) +{ + struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); + + if (readl(priv->membase + UNIPHIER_FI2C_SR) & UNIPHIER_FI2C_SR_DB) { + if (priv->busy_cnt++ > 3) { + /* + * If bus busy continues too long, it is probably + * in a wrong state. Try bus recovery. + */ + uniphier_fi2c_recover(priv); + priv->busy_cnt = 0; + } + + return -EAGAIN; + } + + priv->busy_cnt = 0; + return 0; +} + +static int uniphier_fi2c_master_xfer(struct i2c_adapter *adap, + struct i2c_msg *msgs, int num) +{ + struct i2c_msg *msg, *emsg = msgs + num; + int ret; + + ret = uniphier_fi2c_check_bus_busy(adap); + if (ret) + return ret; + + for (msg = msgs; msg < emsg; msg++) { + /* If next message is read, skip the stop condition */ + bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD); + /* but, force it if I2C_M_STOP is set */ + if (msg->flags & I2C_M_STOP) + stop = true; + + ret = uniphier_fi2c_master_xfer_one(adap, msg, stop); + if (ret) + return ret; + } + + return num; +} + +static u32 uniphier_fi2c_functionality(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static const struct i2c_algorithm uniphier_fi2c_algo = { + .master_xfer = uniphier_fi2c_master_xfer, + .functionality = uniphier_fi2c_functionality, +}; + +static int uniphier_fi2c_get_scl(struct i2c_adapter *adap) +{ + struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); + + return !!(readl(priv->membase + UNIPHIER_FI2C_BM) & + UNIPHIER_FI2C_BM_SCLS); +} + +static void uniphier_fi2c_set_scl(struct i2c_adapter *adap, int val) +{ + struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); + + writel(val ? UNIPHIER_FI2C_BRST_RSCL : 0, + priv->membase + UNIPHIER_FI2C_BRST); +} + +static int uniphier_fi2c_get_sda(struct i2c_adapter *adap) +{ + struct uniphier_fi2c_priv *priv = i2c_get_adapdata(adap); + + return !!(readl(priv->membase + UNIPHIER_FI2C_BM) & + UNIPHIER_FI2C_BM_SDAS); +} + +static void uniphier_fi2c_unprepare_recovery(struct i2c_adapter *adap) +{ + uniphier_fi2c_prepare_operation(i2c_get_adapdata(adap)); +} + +static struct i2c_bus_recovery_info uniphier_fi2c_bus_recovery_info = { + .recover_bus = i2c_generic_scl_recovery, + .get_scl = uniphier_fi2c_get_scl, + .set_scl = uniphier_fi2c_set_scl, + .get_sda = uniphier_fi2c_get_sda, + .unprepare_recovery = uniphier_fi2c_unprepare_recovery, +}; + +static int uniphier_fi2c_clk_init(struct device *dev, + struct uniphier_fi2c_priv *priv) +{ + struct device_node *np = dev->of_node; + unsigned long clk_rate; + u32 bus_speed, clk_count; + int ret; + + if (of_property_read_u32(np, "clock-frequency", &bus_speed)) + bus_speed = UNIPHIER_FI2C_DEFAULT_SPEED; + + if (bus_speed > UNIPHIER_FI2C_MAX_SPEED) + bus_speed = UNIPHIER_FI2C_MAX_SPEED; + + /* Get input clk rate through clk driver */ + priv->clk = devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(dev, "failed to get clock\n"); + return PTR_ERR(priv->clk); + } + + ret = clk_prepare_enable(priv->clk); + if (ret) + return ret; + + clk_rate = clk_get_rate(priv->clk); + + uniphier_fi2c_reset(priv); + + clk_count = clk_rate / bus_speed; + + writel(clk_count, priv->membase + UNIPHIER_FI2C_CYC); + writel(clk_count / 2, priv->membase + UNIPHIER_FI2C_LCTL); + writel(clk_count / 2, priv->membase + UNIPHIER_FI2C_SSUT); + writel(clk_count / 16, priv->membase + UNIPHIER_FI2C_DSUT); + + uniphier_fi2c_prepare_operation(priv); + + return 0; +} + +static int uniphier_fi2c_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct uniphier_fi2c_priv *priv; + struct resource *regs; + int irq; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->membase = devm_ioremap_resource(dev, regs); + if (IS_ERR(priv->membase)) + return PTR_ERR(priv->membase); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(dev, "failed to get IRQ number"); + return irq; + } + + init_completion(&priv->comp); + priv->adap.owner = THIS_MODULE; + priv->adap.algo = &uniphier_fi2c_algo; + priv->adap.dev.parent = dev; + priv->adap.dev.of_node = dev->of_node; + strlcpy(priv->adap.name, "UniPhier FI2C", sizeof(priv->adap.name)); + priv->adap.bus_recovery_info = &uniphier_fi2c_bus_recovery_info; + i2c_set_adapdata(&priv->adap, priv); + platform_set_drvdata(pdev, priv); + + ret = uniphier_fi2c_clk_init(dev, priv); + if (ret) + return ret; + + ret = devm_request_irq(dev, irq, uniphier_fi2c_interrupt, 0, + pdev->name, priv); + if (ret) { + dev_err(dev, "failed to request irq %d\n", irq); + goto err; + } + + ret = i2c_add_adapter(&priv->adap); + if (ret) { + dev_err(dev, "failed to add I2C adapter\n"); + goto err; + } + +err: + if (ret) + clk_disable_unprepare(priv->clk); + + return ret; +} + +static int uniphier_fi2c_remove(struct platform_device *pdev) +{ + struct uniphier_fi2c_priv *priv = platform_get_drvdata(pdev); + + i2c_del_adapter(&priv->adap); + clk_disable_unprepare(priv->clk); + + return 0; +} + +static const struct of_device_id uniphier_fi2c_match[] = { + { .compatible = "socionext,uniphier-fi2c" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, uniphier_fi2c_match); + +static struct platform_driver uniphier_fi2c_drv = { + .probe = uniphier_fi2c_probe, + .remove = uniphier_fi2c_remove, + .driver = { + .name = "uniphier-fi2c", + .of_match_table = uniphier_fi2c_match, + }, +}; +module_platform_driver(uniphier_fi2c_drv); + +MODULE_AUTHOR("Masahiro Yamada "); +MODULE_DESCRIPTION("UniPhier FIFO-builtin I2C bus driver"); +MODULE_LICENSE("GPL"); -- cgit v0.10.2 From 62a615e083604d291af0cb18f9b4549531ea4f94 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 23 Oct 2015 12:16:41 +0300 Subject: mfd: core: redo ACPI matching of the children devices There is at least one board on the market, i.e. Intel Galileo Gen2, that uses _ADR to distinguish the devices under one actual device. Due to this we have to improve the quirk in the MFD core to handle that board. Acked-by: Rafael J. Wysocki Acked-by: Lee Jones Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang diff --git a/Documentation/acpi/enumeration.txt b/Documentation/acpi/enumeration.txt index b731b29..a91ec5a 100644 --- a/Documentation/acpi/enumeration.txt +++ b/Documentation/acpi/enumeration.txt @@ -347,13 +347,18 @@ For the first case, the MFD drivers do not need to do anything. The resulting child platform device will have its ACPI_COMPANION() set to point to the parent device. -If the ACPI namespace has a device that we can match using an ACPI id, -the id should be set like: +If the ACPI namespace has a device that we can match using an ACPI id or ACPI +adr, the cell should be set like: + + static struct mfd_cell_acpi_match my_subdevice_cell_acpi_match = { + .pnpid = "XYZ0001", + .adr = 0, + }; static struct mfd_cell my_subdevice_cell = { .name = "my_subdevice", /* set the resources relative to the parent */ - .acpi_pnpid = "XYZ0001", + .acpi_match = &my_subdevice_cell_acpi_match, }; The ACPI id "XYZ0001" is then used to lookup an ACPI device directly under diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index c17635d..60b60dc 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -82,29 +82,49 @@ static int mfd_platform_add_cell(struct platform_device *pdev, static void mfd_acpi_add_device(const struct mfd_cell *cell, struct platform_device *pdev) { - struct acpi_device *parent_adev; + const struct mfd_cell_acpi_match *match = cell->acpi_match; + struct acpi_device *parent, *child; struct acpi_device *adev; - parent_adev = ACPI_COMPANION(pdev->dev.parent); - if (!parent_adev) + parent = ACPI_COMPANION(pdev->dev.parent); + if (!parent) return; /* - * MFD child device gets its ACPI handle either from the ACPI - * device directly under the parent that matches the acpi_pnpid or - * it will use the parent handle if is no acpi_pnpid is given. + * MFD child device gets its ACPI handle either from the ACPI device + * directly under the parent that matches the either _HID or _CID, or + * _ADR or it will use the parent handle if is no ID is given. + * + * Note that use of _ADR is a grey area in the ACPI specification, + * though Intel Galileo Gen2 is using it to distinguish the children + * devices. */ - adev = parent_adev; - if (cell->acpi_pnpid) { - struct acpi_device_id ids[2] = {}; - struct acpi_device *child_adev; - - strlcpy(ids[0].id, cell->acpi_pnpid, sizeof(ids[0].id)); - list_for_each_entry(child_adev, &parent_adev->children, node) - if (acpi_match_device_ids(child_adev, ids)) { - adev = child_adev; - break; + adev = parent; + if (match) { + if (match->pnpid) { + struct acpi_device_id ids[2] = {}; + + strlcpy(ids[0].id, match->pnpid, sizeof(ids[0].id)); + list_for_each_entry(child, &parent->children, node) { + if (acpi_match_device_ids(child, ids)) { + adev = child; + break; + } + } + } else { + unsigned long long adr; + acpi_status status; + + list_for_each_entry(child, &parent->children, node) { + status = acpi_evaluate_integer(child->handle, + "_ADR", NULL, + &adr); + if (ACPI_SUCCESS(status) && match->adr == adr) { + adev = child; + break; + } } + } } ACPI_COMPANION_SET(&pdev->dev, adev); diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index a76bc10..27dac3f 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -18,6 +18,12 @@ struct irq_domain; +/* Matches ACPI PNP id, either _HID or _CID, or ACPI _ADR */ +struct mfd_cell_acpi_match { + const char *pnpid; + const unsigned long long adr; +}; + /* * This struct describes the MFD part ("cell"). * After registration the copy of this structure will become the platform data @@ -44,8 +50,8 @@ struct mfd_cell { */ const char *of_compatible; - /* Matches ACPI PNP id, either _HID or _CID */ - const char *acpi_pnpid; + /* Matches ACPI */ + const struct mfd_cell_acpi_match *acpi_match; /* * These resources can be specified relative to the parent device. -- cgit v0.10.2 From c39dc960e9c5196022cbc46507d4782b6fc314f6 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 23 Oct 2015 12:16:42 +0300 Subject: mfd: intel_quark_i2c_gpio: load gpio driver first On Intel Galileo boards the GPIO expander is connected to i2c bus. Moreover it is able to generate interrupt, but interrupt line is connected to GPIO. That's why we have to have GPIO driver in place when we will probe i2c host with device connected to it. Acked-by: Lee Jones Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c index 1ce1603..958c134 100644 --- a/drivers/mfd/intel_quark_i2c_gpio.c +++ b/drivers/mfd/intel_quark_i2c_gpio.c @@ -90,19 +90,19 @@ static struct resource intel_quark_gpio_res[] = { static struct mfd_cell intel_quark_mfd_cells[] = { { - .id = MFD_I2C_BAR, - .name = "i2c_designware", - .num_resources = ARRAY_SIZE(intel_quark_i2c_res), - .resources = intel_quark_i2c_res, - .ignore_resource_conflicts = true, - }, - { .id = MFD_GPIO_BAR, .name = "gpio-dwapb", .num_resources = ARRAY_SIZE(intel_quark_gpio_res), .resources = intel_quark_gpio_res, .ignore_resource_conflicts = true, }, + { + .id = MFD_I2C_BAR, + .name = "i2c_designware", + .num_resources = ARRAY_SIZE(intel_quark_i2c_res), + .resources = intel_quark_i2c_res, + .ignore_resource_conflicts = true, + }, }; static const struct pci_device_id intel_quark_mfd_ids[] = { @@ -248,12 +248,11 @@ static int intel_quark_mfd_probe(struct pci_dev *pdev, dev_set_drvdata(&pdev->dev, quark_mfd); - ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[MFD_I2C_BAR]); + ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]); if (ret) return ret; - ret = intel_quark_gpio_setup(pdev, - &intel_quark_mfd_cells[MFD_GPIO_BAR]); + ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]); if (ret) return ret; -- cgit v0.10.2 From 6ebe21c1cf459d9bd501454ba65650c04fdf9288 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 23 Oct 2015 12:16:43 +0300 Subject: mfd: intel_quark_i2c_gpio: support devices behind i2c bus On Intel Galileo Gen2 the GPIO expanders are connected to the i2c bus. For those devices the ACPI table has specific parameters that refer to an actual i2c host controller. Since MFD now copes with that specific configuration we have to provide a necessary information how to distinguish devices in ACPI namespace. Here the _ADR values are provided. Acked-by: Lee Jones Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang diff --git a/drivers/mfd/intel_quark_i2c_gpio.c b/drivers/mfd/intel_quark_i2c_gpio.c index 958c134..0421374 100644 --- a/drivers/mfd/intel_quark_i2c_gpio.c +++ b/drivers/mfd/intel_quark_i2c_gpio.c @@ -31,6 +31,10 @@ #define MFD_I2C_BAR 0 #define MFD_GPIO_BAR 1 +/* ACPI _ADR value to match the child node */ +#define MFD_ACPI_MATCH_GPIO 0ULL +#define MFD_ACPI_MATCH_I2C 1ULL + /* The base GPIO number under GPIOLIB framework */ #define INTEL_QUARK_MFD_GPIO_BASE 8 @@ -82,16 +86,25 @@ static struct resource intel_quark_i2c_res[] = { }, }; +static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = { + .adr = MFD_ACPI_MATCH_I2C, +}; + static struct resource intel_quark_gpio_res[] = { [INTEL_QUARK_IORES_MEM] = { .flags = IORESOURCE_MEM, }, }; +static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = { + .adr = MFD_ACPI_MATCH_GPIO, +}; + static struct mfd_cell intel_quark_mfd_cells[] = { { .id = MFD_GPIO_BAR, .name = "gpio-dwapb", + .acpi_match = &intel_quark_acpi_match_gpio, .num_resources = ARRAY_SIZE(intel_quark_gpio_res), .resources = intel_quark_gpio_res, .ignore_resource_conflicts = true, @@ -99,6 +112,7 @@ static struct mfd_cell intel_quark_mfd_cells[] = { { .id = MFD_I2C_BAR, .name = "i2c_designware", + .acpi_match = &intel_quark_acpi_match_i2c, .num_resources = ARRAY_SIZE(intel_quark_i2c_res), .resources = intel_quark_i2c_res, .ignore_resource_conflicts = true, -- cgit v0.10.2 From 3861841d2205714bfabaee4efcbb5e4202884852 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 23 Oct 2015 12:16:44 +0300 Subject: at24: enable ACPI device found on Galileo Gen2 There is a 24c08 chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via ACPI ID INT3499. Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c index c6cb7f8..5d7c090 100644 --- a/drivers/misc/eeprom/at24.c +++ b/drivers/misc/eeprom/at24.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -131,6 +132,12 @@ static const struct i2c_device_id at24_ids[] = { }; MODULE_DEVICE_TABLE(i2c, at24_ids); +static const struct acpi_device_id at24_acpi_ids[] = { + { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) }, + { } +}; +MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); + /*-------------------------------------------------------------------------*/ /* @@ -467,21 +474,29 @@ static void at24_get_ofdata(struct i2c_client *client, static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) { struct at24_platform_data chip; + kernel_ulong_t magic = 0; bool writable; int use_smbus = 0; int use_smbus_write = 0; struct at24_data *at24; int err; unsigned i, num_addresses; - kernel_ulong_t magic; if (client->dev.platform_data) { chip = *(struct at24_platform_data *)client->dev.platform_data; } else { - if (!id->driver_data) + if (id) { + magic = id->driver_data; + } else { + const struct acpi_device_id *aid; + + aid = acpi_match_device(at24_acpi_ids, &client->dev); + if (aid) + magic = aid->driver_data; + } + if (!magic) return -ENODEV; - magic = id->driver_data; chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); magic >>= AT24_SIZE_BYTELEN; chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); @@ -661,6 +676,7 @@ static int at24_remove(struct i2c_client *client) static struct i2c_driver at24_driver = { .driver = { .name = "at24", + .acpi_match_table = ACPI_PTR(at24_acpi_ids), }, .probe = at24_probe, .remove = at24_remove, -- cgit v0.10.2 From 1c4b6c3bcf30d0804db0d0647d8ebeb862c6f7e5 Mon Sep 17 00:00:00 2001 From: Gao Pan Date: Fri, 23 Oct 2015 20:28:54 +0800 Subject: i2c: imx: implement bus recovery Implement bus recovery methods for i2c-imx so we can recover from situations where SCL/SDA are stuck low. Once i2c bus SCL/SDA are stuck low during transfer, config the i2c pinctrl to gpio mode by calling pinctrl sleep set function, and then use GPIO to emulate the i2c protocol to send nine dummy clock to recover i2c device. After recovery, set i2c pinctrl to default group setting. Signed-off-by: Fugang Duan Signed-off-by: Gao Pan Signed-off-by: Sascha Hauer Signed-off-by: Wolfram Sang diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt index ce4311d..eab5836 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt @@ -14,6 +14,10 @@ Optional properties: The absence of the propoerty indicates the default frequency 100 kHz. - dmas: A list of two dma specifiers, one for each entry in dma-names. - dma-names: should contain "tx" and "rx". +- scl-gpios: specify the gpio related to SCL pin +- sda-gpios: specify the gpio related to SDA pin +- pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c + bus recovery, call it "gpio" state Examples: @@ -37,4 +41,9 @@ i2c0: i2c@40066000 { /* i2c0 on vf610 */ dmas = <&edma0 0 50>, <&edma0 0 51>; dma-names = "rx","tx"; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; }; diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 785aa67..8d46e74 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -207,6 +208,11 @@ struct imx_i2c_struct { unsigned int cur_clk; unsigned int bitrate; const struct imx_i2c_hwdata *hwdata; + struct i2c_bus_recovery_info rinfo; + + struct pinctrl *pinctrl; + struct pinctrl_state *pinctrl_pins_default; + struct pinctrl_state *pinctrl_pins_gpio; struct imx_i2c_dma *dma; }; @@ -896,6 +902,13 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, /* Start I2C transfer */ result = i2c_imx_start(i2c_imx); + if (result) { + if (i2c_imx->adapter.bus_recovery_info) { + i2c_recover_bus(&i2c_imx->adapter); + result = i2c_imx_start(i2c_imx); + } + } + if (result) goto fail0; @@ -956,6 +969,55 @@ fail0: return (result < 0) ? result : num; } +static void i2c_imx_prepare_recovery(struct i2c_adapter *adap) +{ + struct imx_i2c_struct *i2c_imx; + + i2c_imx = container_of(adap, struct imx_i2c_struct, adapter); + + pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_gpio); +} + +static void i2c_imx_unprepare_recovery(struct i2c_adapter *adap) +{ + struct imx_i2c_struct *i2c_imx; + + i2c_imx = container_of(adap, struct imx_i2c_struct, adapter); + + pinctrl_select_state(i2c_imx->pinctrl, i2c_imx->pinctrl_pins_default); +} + +static void i2c_imx_init_recovery_info(struct imx_i2c_struct *i2c_imx, + struct platform_device *pdev) +{ + struct i2c_bus_recovery_info *rinfo = &i2c_imx->rinfo; + + i2c_imx->pinctrl_pins_default = pinctrl_lookup_state(i2c_imx->pinctrl, + PINCTRL_STATE_DEFAULT); + i2c_imx->pinctrl_pins_gpio = pinctrl_lookup_state(i2c_imx->pinctrl, + "gpio"); + rinfo->sda_gpio = of_get_named_gpio_flags(pdev->dev.of_node, + "sda-gpios", 0, NULL); + rinfo->scl_gpio = of_get_named_gpio_flags(pdev->dev.of_node, + "scl-gpios", 0, NULL); + + if (!gpio_is_valid(rinfo->sda_gpio) || + !gpio_is_valid(rinfo->scl_gpio) || + IS_ERR(i2c_imx->pinctrl_pins_default) || + IS_ERR(i2c_imx->pinctrl_pins_gpio)) { + dev_dbg(&pdev->dev, "recovery information incomplete\n"); + return; + } + + dev_dbg(&pdev->dev, "using scl-gpio %d and sda-gpio %d for recovery\n", + rinfo->sda_gpio, rinfo->scl_gpio); + + rinfo->prepare_recovery = i2c_imx_prepare_recovery; + rinfo->unprepare_recovery = i2c_imx_unprepare_recovery; + rinfo->recover_bus = i2c_generic_gpio_recovery; + i2c_imx->adapter.bus_recovery_info = rinfo; +} + static u32 i2c_imx_func(struct i2c_adapter *adapter) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL @@ -1023,6 +1085,13 @@ static int i2c_imx_probe(struct platform_device *pdev) dev_err(&pdev->dev, "can't enable I2C clock\n"); return ret; } + + i2c_imx->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(i2c_imx->pinctrl)) { + ret = PTR_ERR(i2c_imx->pinctrl); + goto clk_disable; + } + /* Request IRQ */ ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0, pdev->name, i2c_imx); @@ -1056,6 +1125,8 @@ static int i2c_imx_probe(struct platform_device *pdev) goto clk_disable; } + i2c_imx_init_recovery_info(i2c_imx, pdev); + /* Set up platform driver data */ platform_set_drvdata(pdev, i2c_imx); clk_disable_unprepare(i2c_imx->clk); -- cgit v0.10.2 From 09027e08ac329eddd8f4a06ddcef8022eded6b87 Mon Sep 17 00:00:00 2001 From: Liguo Zhang Date: Tue, 6 Oct 2015 17:22:56 +0800 Subject: i2c: mediatek: add i2c resume support mt65xx i2c controller initial setting will be cleared after system suspend, so we should init mt65xx i2c controller again when system resume. Signed-off-by: Liguo Zhang Signed-off-by: Eddie Huang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index c02e6c0..9b86716 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -728,11 +728,27 @@ static int mtk_i2c_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int mtk_i2c_resume(struct device *dev) +{ + struct mtk_i2c *i2c = dev_get_drvdata(dev); + + mtk_i2c_init_hw(i2c); + + return 0; +} +#endif + +static const struct dev_pm_ops mtk_i2c_pm = { + SET_SYSTEM_SLEEP_PM_OPS(NULL, mtk_i2c_resume) +}; + static struct platform_driver mtk_i2c_driver = { .probe = mtk_i2c_probe, .remove = mtk_i2c_remove, .driver = { .name = I2C_DRV_NAME, + .pm = &mtk_i2c_pm, .of_match_table = of_match_ptr(mtk_i2c_of_match), }, }; -- cgit v0.10.2 From 84d7f2ebd70d36e9d83e0973d2f4dac56a671f4f Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Tue, 13 Oct 2015 15:41:39 +0300 Subject: i2c: i801: Add support for Intel DNV Intel DNV SoC has the same legacy SMBus host controller than Intel Sunrisepoint PCH. It also has same iTCO watchdog on the bus. Add DNV PCI ID to the list of supported devices. Signed-off-by: Mika Westerberg Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index eaef9bc..47c2ddf 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -60,6 +60,7 @@ * BayTrail (SOC) 0x0f12 32 hard yes yes yes * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes + * DNV (SOC) 0x19df 32 hard yes yes yes * * Features supported by this driver: * Software PEC no @@ -202,6 +203,7 @@ #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 +#define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df struct i801_mux_config { char *gpio_chip; @@ -863,6 +865,7 @@ static const struct pci_device_id i801_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, { 0, } }; @@ -1256,6 +1259,7 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) switch (dev->device) { case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS: case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS: + case PCI_DEVICE_ID_INTEL_DNV_SMBUS: priv->features |= FEATURE_I2C_BLOCK_READ; priv->features |= FEATURE_IRQ; priv->features |= FEATURE_SMBUS_PEC; -- cgit v0.10.2 From dd77f423e516293c37c2370b44fd700900409c48 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Thu, 22 Oct 2015 17:16:58 +0300 Subject: i2c: i801: Add support for Intel Broxton This patch adds the SMBUS PCI ID of Intel Broxton. Signed-off-by: Jarkko Nikula Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 47c2ddf..d8219bc 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -61,6 +61,7 @@ * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes * DNV (SOC) 0x19df 32 hard yes yes yes + * Broxton (SOC) 0x5ad4 32 hard yes yes yes * * Features supported by this driver: * Software PEC no @@ -204,6 +205,7 @@ #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 #define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df +#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 struct i801_mux_config { char *gpio_chip; @@ -866,6 +868,7 @@ static const struct pci_device_id i801_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) }, { 0, } }; -- cgit v0.10.2 From 4c0657ae432398f729c1d402bab935505a5255b5 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 22 Oct 2015 14:41:20 -0200 Subject: i2c: imx: Use -ENXIO as error in the NACK case According to Documentation/i2c/fault-codes the response to a bus NACK should be -ENXIO, so fix the error code. Signed-off-by: Fabio Estevam Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 8d46e74..1e4d99d 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -467,7 +467,7 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) { if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) { dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); - return -EIO; /* No ACK */ + return -ENXIO; /* No ACK */ } dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); -- cgit v0.10.2 From d64d45cb95e6f9edf58fab49cfc5a7a60ff1a122 Mon Sep 17 00:00:00 2001 From: Guoying Zhang Date: Wed, 9 Sep 2015 10:30:32 +0000 Subject: i2c: sirf: tune the divider to make i2c bus freq more accurate In prima2 and atlas7, due to some hardware design issue. we need to adjust the divider ratio a little according to i2c bus frequency ranges. Since i2c is open drain interface that allows the slave to stall the transaction by holding the SCL line at '0', the RTL implementation is waiting for SCL feedback from the pin after setting it to High-Z ('1'). This wait adds to the high-time interval counter few cycles of the input synchronization (depending on the SCL_FILTER_REG field), and also the time it takes for the board pull-up resistor to rise the SCL line. For slow SCL settings these additions are negligible, but they start to affect the speed when clock is set to faster frequencies. This patch is based on the actual tests, and it makes SCL more accurate. Signed-off-by: Guoying Zhang Signed-off-by: Barry Song Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-sirf.c b/drivers/i2c/busses/i2c-sirf.c index 1092d4e..13e51ef 100644 --- a/drivers/i2c/busses/i2c-sirf.c +++ b/drivers/i2c/busses/i2c-sirf.c @@ -358,11 +358,29 @@ static int i2c_sirfsoc_probe(struct platform_device *pdev) if (err < 0) bitrate = SIRFSOC_I2C_DEFAULT_SPEED; - if (bitrate < 100000) - regval = - (2 * ctrl_speed) / (bitrate * 11); - else + /* + * Due to some hardware design issues, we need to tune the formula. + * Since i2c is open drain interface that allows the slave to + * stall the transaction by holding the SCL line at '0', the RTL + * implementation is waiting for SCL feedback from the pin after + * setting it to High-Z ('1'). This wait adds to the high-time + * interval counter few cycles of the input synchronization + * (depending on the SCL_FILTER_REG field), and also the time it + * takes for the board pull-up resistor to rise the SCL line. + * For slow SCL settings these additions are negligible, + * but they start to affect the speed when clock is set to faster + * frequencies. + * Through the actual tests, use the different user_div value(which + * in the divider formular 'Fio / (Fi2c * user_div)') to adapt + * the different ranges of i2c bus clock frequency, to make the SCL + * more accurate. + */ + if (bitrate <= 30000) regval = ctrl_speed / (bitrate * 5); + else if (bitrate > 30000 && bitrate <= 280000) + regval = (2 * ctrl_speed) / (bitrate * 11); + else + regval = ctrl_speed / (bitrate * 6); writel(regval, siic->base + SIRFSOC_I2C_CLK_CTRL); if (regval > 0xFF) -- cgit v0.10.2 From c57d3e7a9391c03ae7ee5572be850284393f5bef Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 8 Sep 2015 11:05:49 +0200 Subject: i2c-dev: Fix typo in ioctl name reference The ioctl is named I2C_RDWR for "I2C read/write". But references to it were misspelled "rdrw". Fix them. Signed-off-by: Jean Delvare Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c index 71c7a39..3853897 100644 --- a/drivers/i2c/i2c-dev.c +++ b/drivers/i2c/i2c-dev.c @@ -235,7 +235,7 @@ static int i2cdev_check_addr(struct i2c_adapter *adapter, unsigned int addr) return result; } -static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client, +static noinline int i2cdev_ioctl_rdwr(struct i2c_client *client, unsigned long arg) { struct i2c_rdwr_ioctl_data rdwr_arg; @@ -250,7 +250,7 @@ static noinline int i2cdev_ioctl_rdrw(struct i2c_client *client, /* Put an arbitrary limit on the number of messages that can * be sent at once */ - if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS) + if (rdwr_arg.nmsgs > I2C_RDWR_IOCTL_MAX_MSGS) return -EINVAL; rdwr_pa = memdup_user(rdwr_arg.msgs, @@ -456,7 +456,7 @@ static long i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) return put_user(funcs, (unsigned long __user *)arg); case I2C_RDWR: - return i2cdev_ioctl_rdrw(client, arg); + return i2cdev_ioctl_rdwr(client, arg); case I2C_SMBUS: return i2cdev_ioctl_smbus(client, arg); diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c index 48851f6..dcf2653 100644 --- a/fs/compat_ioctl.c +++ b/fs/compat_ioctl.c @@ -686,7 +686,7 @@ static int do_i2c_rdwr_ioctl(unsigned int fd, unsigned int cmd, if (get_user(nmsgs, &udata->nmsgs)) return -EFAULT; - if (nmsgs > I2C_RDRW_IOCTL_MAX_MSGS) + if (nmsgs > I2C_RDWR_IOCTL_MAX_MSGS) return -EINVAL; if (get_user(datap, &udata->msgs)) diff --git a/include/uapi/linux/i2c-dev.h b/include/uapi/linux/i2c-dev.h index 3f31155..2f05e66 100644 --- a/include/uapi/linux/i2c-dev.h +++ b/include/uapi/linux/i2c-dev.h @@ -66,7 +66,9 @@ struct i2c_rdwr_ioctl_data { __u32 nmsgs; /* number of i2c_msgs */ }; -#define I2C_RDRW_IOCTL_MAX_MSGS 42 +#define I2C_RDWR_IOCTL_MAX_MSGS 42 +/* Originally defined with a typo, keep it for compatibility */ +#define I2C_RDRW_IOCTL_MAX_MSGS I2C_RDWR_IOCTL_MAX_MSGS #endif /* _UAPI_LINUX_I2C_DEV_H */ -- cgit v0.10.2 From 9e685c84c266582ad002311497684f183db6b937 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Fri, 11 Sep 2015 11:27:18 +0200 Subject: i2c-dev: Fix I2C_SLAVE ioctl comment The first part of the comment is wrong since November 2007, delete it. The second part of the comment is related to I2C_PEC, not I2C_SLAVE, so move it where it belongs. Signed-off-by: Jean Delvare Cc: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c index 3853897..2413ec9 100644 --- a/drivers/i2c/i2c-dev.c +++ b/drivers/i2c/i2c-dev.c @@ -421,16 +421,6 @@ static long i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) switch (cmd) { case I2C_SLAVE: case I2C_SLAVE_FORCE: - /* NOTE: devices set up to work with "new style" drivers - * can't use I2C_SLAVE, even when the device node is not - * bound to a driver. Only I2C_SLAVE_FORCE will work. - * - * Setting the PEC flag here won't affect kernel drivers, - * which will be using the i2c_client node registered with - * the driver model core. Likewise, when that client has - * the PEC flag already set, the i2c-dev driver won't see - * (or use) this setting. - */ if ((arg > 0x3ff) || (((client->flags & I2C_M_TEN) == 0) && arg > 0x7f)) return -EINVAL; @@ -446,6 +436,13 @@ static long i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) client->flags &= ~I2C_M_TEN; return 0; case I2C_PEC: + /* + * Setting the PEC flag here won't affect kernel drivers, + * which will be using the i2c_client node registered with + * the driver model core. Likewise, when that client has + * the PEC flag already set, the i2c-dev driver won't see + * (or use) this setting. + */ if (arg) client->flags |= I2C_CLIENT_PEC; else -- cgit v0.10.2 From 174f2366b076db3876c3b7f595edf2aa739f9d43 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 9 Jun 2015 15:52:49 +0800 Subject: i2c: au1550: Convert to devm_kzalloc and devm_ioremap_resource Use devm_* APIs to simplify the code. Signed-off-by: Axel Lin Tested-by: Manuel Lauss Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 4de1107..5bcb1f0 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -48,7 +48,6 @@ struct i2c_au1550_data { void __iomem *psc_base; int xfer_timeout; struct i2c_adapter adap; - struct resource *ioarea; }; static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v) @@ -315,30 +314,16 @@ i2c_au1550_probe(struct platform_device *pdev) struct resource *r; int ret; - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - ret = -ENODEV; - goto out; - } + priv = devm_kzalloc(&pdev->dev, sizeof(struct i2c_au1550_data), + GFP_KERNEL); + if (!priv) + return -ENOMEM; - priv = kzalloc(sizeof(struct i2c_au1550_data), GFP_KERNEL); - if (!priv) { - ret = -ENOMEM; - goto out; - } - - priv->ioarea = request_mem_region(r->start, resource_size(r), - pdev->name); - if (!priv->ioarea) { - ret = -EBUSY; - goto out_mem; - } + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->psc_base = devm_ioremap_resource(&pdev->dev, r); + if (IS_ERR(priv->psc_base)) + return PTR_ERR(priv->psc_base); - priv->psc_base = ioremap(r->start, resource_size(r)); - if (!priv->psc_base) { - ret = -EIO; - goto out_map; - } priv->xfer_timeout = 200; priv->adap.nr = pdev->id; @@ -351,20 +336,13 @@ i2c_au1550_probe(struct platform_device *pdev) i2c_au1550_setup(priv); ret = i2c_add_numbered_adapter(&priv->adap); - if (ret == 0) { - platform_set_drvdata(pdev, priv); - return 0; + if (ret) { + i2c_au1550_disable(priv); + return ret; } - i2c_au1550_disable(priv); - iounmap(priv->psc_base); -out_map: - release_resource(priv->ioarea); - kfree(priv->ioarea); -out_mem: - kfree(priv); -out: - return ret; + platform_set_drvdata(pdev, priv); + return 0; } static int i2c_au1550_remove(struct platform_device *pdev) @@ -373,10 +351,6 @@ static int i2c_au1550_remove(struct platform_device *pdev) i2c_del_adapter(&priv->adap); i2c_au1550_disable(priv); - iounmap(priv->psc_base); - release_resource(priv->ioarea); - kfree(priv->ioarea); - kfree(priv); return 0; } -- cgit v0.10.2 From c5fa6fc79f5b1fbe540300dbe3efbaa515b05282 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Mon, 24 Aug 2015 11:29:36 +0530 Subject: i2c: pxa: Add support for pxa910/988 & new configuration features TWSI_ILCR & TWSI_IWCR registers are used to adjust clock rate of standard & fast mode in pxa910/988; so this patch adds these two new entries to "struct pxa_reg_layout" and "struct pxa_i2c". Signed-off-by: Jett.Zhou Signed-off-by: Yi Zhang Signed-off-by: Vaibhav Hiremath Tested-by: Robert Jarzmik [wsa: white space fixes] Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index 645e4b7..0d35195 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -46,12 +46,15 @@ struct pxa_reg_layout { u32 icr; u32 isr; u32 isar; + u32 ilcr; + u32 iwcr; }; enum pxa_i2c_types { REGS_PXA2XX, REGS_PXA3XX, REGS_CE4100, + REGS_PXA910, }; /* @@ -79,12 +82,22 @@ static struct pxa_reg_layout pxa_reg_layout[] = { .isr = 0x04, /* no isar register */ }, + [REGS_PXA910] = { + .ibmr = 0x00, + .idbr = 0x08, + .icr = 0x10, + .isr = 0x18, + .isar = 0x20, + .ilcr = 0x28, + .iwcr = 0x30, + }, }; static const struct platform_device_id i2c_pxa_id_table[] = { { "pxa2xx-i2c", REGS_PXA2XX }, { "pxa3xx-pwri2c", REGS_PXA3XX }, { "ce4100-i2c", REGS_CE4100 }, + { "pxa910-i2c", REGS_PXA910 }, { }, }; MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); @@ -124,6 +137,23 @@ MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); #define ISR_SAD (1 << 9) /* slave address detected */ #define ISR_BED (1 << 10) /* bus error no ACK/NAK */ +/* bit field shift & mask */ +#define ILCR_SLV_SHIFT 0 +#define ILCR_SLV_MASK (0x1FF << ILCR_SLV_SHIFT) +#define ILCR_FLV_SHIFT 9 +#define ILCR_FLV_MASK (0x1FF << ILCR_FLV_SHIFT) +#define ILCR_HLVL_SHIFT 18 +#define ILCR_HLVL_MASK (0x1FF << ILCR_HLVL_SHIFT) +#define ILCR_HLVH_SHIFT 27 +#define ILCR_HLVH_MASK (0x1F << ILCR_HLVH_SHIFT) + +#define IWCR_CNT_SHIFT 0 +#define IWCR_CNT_MASK (0x1F << IWCR_CNT_SHIFT) +#define IWCR_HS_CNT1_SHIFT 5 +#define IWCR_HS_CNT1_MASK (0x1F << IWCR_HS_CNT1_SHIFT) +#define IWCR_HS_CNT2_SHIFT 10 +#define IWCR_HS_CNT2_MASK (0x1F << IWCR_HS_CNT2_SHIFT) + struct pxa_i2c { spinlock_t lock; wait_queue_head_t wait; @@ -150,6 +180,8 @@ struct pxa_i2c { void __iomem *reg_icr; void __iomem *reg_isr; void __iomem *reg_isar; + void __iomem *reg_ilcr; + void __iomem *reg_iwcr; unsigned long iobase; unsigned long iosize; @@ -168,6 +200,8 @@ struct pxa_i2c { #define _ICR(i2c) ((i2c)->reg_icr) #define _ISR(i2c) ((i2c)->reg_isr) #define _ISAR(i2c) ((i2c)->reg_isar) +#define _ILCR(i2c) ((i2c)->reg_ilcr) +#define _IWCR(i2c) ((i2c)->reg_iwcr) /* * I2C Slave mode address @@ -1102,7 +1136,7 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = { static const struct of_device_id i2c_pxa_dt_ids[] = { { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX }, { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX }, - { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX }, + { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 }, {} }; MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids); @@ -1203,6 +1237,11 @@ static int i2c_pxa_probe(struct platform_device *dev) if (i2c_type != REGS_CE4100) i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar; + if (i2c_type == REGS_PXA910) { + i2c->reg_ilcr = i2c->reg_base + pxa_reg_layout[i2c_type].ilcr; + i2c->reg_iwcr = i2c->reg_base + pxa_reg_layout[i2c_type].iwcr; + } + i2c->iobase = res->start; i2c->iosize = resource_size(res); -- cgit v0.10.2 From c0e5c4450494d74c8deb4f47ddcbb74c94937e20 Mon Sep 17 00:00:00 2001 From: Dustin Byford Date: Fri, 23 Oct 2015 12:27:06 -0700 Subject: acpi: add acpi_preset_companion() stub Add a stub for acpi_preset_companion(). Fixes build failures when acpi_preset_companion() is used and CONFIG_ACPI is not set. Acked-by: Mika Westerberg Signed-off-by: Dustin Byford Acked-by: Rafael J. Wysocki Signed-off-by: Wolfram Sang diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 43856d1..43b55e7 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -477,6 +477,11 @@ static inline bool has_acpi_companion(struct device *dev) return false; } +static inline void acpi_preset_companion(struct device *dev, + struct acpi_device *parent, u64 addr) +{ +} + static inline const char *acpi_dev_name(struct acpi_device *adev) { return NULL; -- cgit v0.10.2 From 8eb5c87a92c065aaca39ac3e841b07906a4959a2 Mon Sep 17 00:00:00 2001 From: Dustin Byford Date: Fri, 23 Oct 2015 12:27:07 -0700 Subject: i2c: add ACPI support for I2C mux ports Although I2C mux devices are easily enumerated using ACPI (_HID/_CID or device property compatible string match), enumerating I2C client devices connected through an I2C mux needs a little extra work. This change implements a method for describing an I2C device hierarchy that includes mux devices by using an ACPI Device() for each mux channel along with an _ADR to set the channel number for the device. See Documentation/acpi/i2c-muxes.txt for a simple example. To make this work the ismt, i801, and designware pci/platform devs now share an ACPI companion with their I2C adapter dev similar to how it's done in OF. This is done on the assumption that power management functions will not be called directly on the I2C dev that is sharing the ACPI node. Acked-by: Mika Westerberg Tested-by: Mika Westerberg Signed-off-by: Dustin Byford Signed-off-by: Wolfram Sang diff --git a/Documentation/acpi/i2c-muxes.txt b/Documentation/acpi/i2c-muxes.txt new file mode 100644 index 0000000..9fcc4f0 --- /dev/null +++ b/Documentation/acpi/i2c-muxes.txt @@ -0,0 +1,58 @@ +ACPI I2C Muxes +-------------- + +Describing an I2C device hierarchy that includes I2C muxes requires an ACPI +Device () scope per mux channel. + +Consider this topology: + ++------+ +------+ +| SMB1 |-->| MUX0 |--CH00--> i2c client A (0x50) +| | | 0x70 |--CH01--> i2c client B (0x50) ++------+ +------+ + +which corresponds to the following ASL: + +Device (SMB1) +{ + Name (_HID, ...) + Device (MUX0) + { + Name (_HID, ...) + Name (_CRS, ResourceTemplate () { + I2cSerialBus (0x70, ControllerInitiated, I2C_SPEED, + AddressingMode7Bit, "^SMB1", 0x00, + ResourceConsumer,,) + } + + Device (CH00) + { + Name (_ADR, 0) + + Device (CLIA) + { + Name (_HID, ...) + Name (_CRS, ResourceTemplate () { + I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED, + AddressingMode7Bit, "^CH00", 0x00, + ResourceConsumer,,) + } + } + } + + Device (CH01) + { + Name (_ADR, 1) + + Device (CLIB) + { + Name (_HID, ...) + Name (_CRS, ResourceTemplate () { + I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED, + AddressingMode7Bit, "^CH01", 0x00, + ResourceConsumer,,) + } + } + } + } +} diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 169be1e..1543d35d 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -35,6 +35,7 @@ #include #include #include +#include #include "i2c-designware-core.h" #define DRIVER_NAME "i2c-designware-pci" @@ -244,6 +245,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, adap = &dev->adapter; adap->owner = THIS_MODULE; adap->class = 0; + ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); adap->nr = controller->bus_num; r = i2c_dw_probe(dev); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index f830da6..190a0d2 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -207,6 +207,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) adap = &dev->adapter; adap->owner = THIS_MODULE; adap->class = I2C_CLASS_DEPRECATED; + ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); adap->dev.of_node = pdev->dev.of_node; r = i2c_dw_probe(dev); diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index d8219bc..c306751 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c @@ -1257,6 +1257,9 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) priv->adapter.owner = THIS_MODULE; priv->adapter.class = i801_get_adapter_class(priv); priv->adapter.algo = &smbus_algorithm; + priv->adapter.dev.parent = &dev->dev; + ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev)); + priv->adapter.retries = 3; priv->pci_dev = dev; switch (dev->device) { @@ -1388,12 +1391,6 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) i801_add_tco(priv); - /* set up the sysfs linkage to our parent device */ - priv->adapter.dev.parent = &dev->dev; - - /* Retry up to 3 times on lost arbitration */ - priv->adapter.retries = 3; - snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus I801 adapter at %04lx", priv->smba); err = i2c_add_adapter(&priv->adapter); diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index 80648be..ebff820 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -842,17 +842,13 @@ ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id) return -ENOMEM; pci_set_drvdata(pdev, priv); + i2c_set_adapdata(&priv->adapter, priv); priv->adapter.owner = THIS_MODULE; - priv->adapter.class = I2C_CLASS_HWMON; - priv->adapter.algo = &smbus_algorithm; - - /* set up the sysfs linkage to our parent device */ priv->adapter.dev.parent = &pdev->dev; - - /* number of retries on lost arbitration */ + ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev)); priv->adapter.retries = ISMT_MAX_RETRIES; priv->pci_dev = pdev; diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index 3a4c54e..5897fdb 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c @@ -156,7 +156,7 @@ static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level, info.fwnode = acpi_fwnode_handle(adev); memset(&lookup, 0, sizeof(lookup)); - lookup.adapter_handle = ACPI_HANDLE(adapter->dev.parent); + lookup.adapter_handle = ACPI_HANDLE(&adapter->dev); lookup.device_handle = handle; lookup.info = &info; @@ -212,7 +212,7 @@ static void acpi_i2c_register_devices(struct i2c_adapter *adap) { acpi_status status; - if (!adap->dev.parent || !has_acpi_companion(adap->dev.parent)) + if (!has_acpi_companion(&adap->dev)) return; status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c index 2ba7c0f..00fc5b1 100644 --- a/drivers/i2c/i2c-mux.c +++ b/drivers/i2c/i2c-mux.c @@ -25,6 +25,7 @@ #include #include #include +#include /* multiplexer per channel data */ struct i2c_mux_priv { @@ -173,6 +174,13 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, } } + /* + * Associate the mux channel with an ACPI node. + */ + if (has_acpi_companion(mux_dev)) + acpi_preset_companion(&priv->adap.dev, ACPI_COMPANION(mux_dev), + chan_id); + if (force_nr) { priv->adap.nr = force_nr; ret = i2c_add_numbered_adapter(&priv->adap); -- cgit v0.10.2 From 43e9f2aa7788cc60eb11fe3cb4fb6f0b63c35de6 Mon Sep 17 00:00:00 2001 From: Muhammad Falak R Wani Date: Tue, 20 Oct 2015 23:47:19 +0530 Subject: i2c: pnx: Use setup_timer instead of open coding it Use timer API function setup_timer instead of init_timer to initialize the timer. Signed-off-by: Muhammad Falak R Wani Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index e814a36..cdbf632 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c @@ -659,9 +659,8 @@ static int i2c_pnx_probe(struct platform_device *pdev) if (IS_ERR(alg_data->clk)) return PTR_ERR(alg_data->clk); - init_timer(&alg_data->mif.timer); - alg_data->mif.timer.function = i2c_pnx_timeout; - alg_data->mif.timer.data = (unsigned long)alg_data; + setup_timer(&alg_data->mif.timer, i2c_pnx_timeout, + (unsigned long)alg_data); snprintf(alg_data->adapter.name, sizeof(alg_data->adapter.name), "%s", pdev->name); -- cgit v0.10.2 From a9bed6b10bd117a300cceb9062003f7a2761ef99 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Mon, 26 Oct 2015 10:38:27 +0100 Subject: i2c: at91: manage unexpected RXRDY flag when starting a transfer In some cases, we could start a new i2c transfer with the RXRDY flag set. It is not a clean state and it leads to print annoying error messages even if there no real issue. The cause is only having garbage data in the Receive Holding Register because of a weird behavior of the RXRDY flag. Reported-by: Peter Rosin Signed-off-by: Ludovic Desroches Tested-by: Peter Rosin Signed-off-by: Wolfram Sang Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1 diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c index 94c087b..10835d1 100644 --- a/drivers/i2c/busses/i2c-at91.c +++ b/drivers/i2c/busses/i2c-at91.c @@ -347,8 +347,14 @@ error: static void at91_twi_read_next_byte(struct at91_twi_dev *dev) { - if (!dev->buf_len) + /* + * If we are in this case, it means there is garbage data in RHR, so + * delete them. + */ + if (!dev->buf_len) { + at91_twi_read(dev, AT91_TWI_RHR); return; + } /* 8bit read works with and without FIFO */ *dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR); @@ -465,6 +471,24 @@ static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id) if (!irqstatus) return IRQ_NONE; + /* + * In reception, the behavior of the twi device (before sama5d2) is + * weird. There is some magic about RXRDY flag! When a data has been + * almost received, the reception of a new one is anticipated if there + * is no stop command to send. That is the reason why ask for sending + * the stop command not on the last data but on the second last one. + * + * Unfortunately, we could still have the RXRDY flag set even if the + * transfer is done and we have read the last data. It might happen + * when the i2c slave device sends too quickly data after receiving the + * ack from the master. The data has been almost received before having + * the order to send stop. In this case, sending the stop command could + * cause a RXRDY interrupt with a TXCOMP one. It is better to manage + * the RXRDY interrupt first in order to not keep garbage data in the + * Receive Holding Register for the next transfer. + */ + if (irqstatus & AT91_TWI_RXRDY) + at91_twi_read_next_byte(dev); /* * When a NACK condition is detected, the I2C controller sets the NACK, @@ -507,8 +531,6 @@ static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id) if (irqstatus & (AT91_TWI_TXCOMP | AT91_TWI_NACK)) { at91_disable_twi_interrupts(dev); complete(&dev->cmd_complete); - } else if (irqstatus & AT91_TWI_RXRDY) { - at91_twi_read_next_byte(dev); } else if (irqstatus & AT91_TWI_TXRDY) { at91_twi_write_next_byte(dev); } @@ -525,7 +547,6 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) unsigned long time_left; bool has_unre_flag = dev->pdata->has_unre_flag; bool has_alt_cmd = dev->pdata->has_alt_cmd; - unsigned sr; /* * WARNING: the TXCOMP bit in the Status Register is NOT a clear on @@ -577,7 +598,7 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) dev->transfer_status = 0; /* Clear pending interrupts, such as NACK. */ - sr = at91_twi_read(dev, AT91_TWI_SR); + at91_twi_read(dev, AT91_TWI_SR); if (dev->fifo_size) { unsigned fifo_mr = at91_twi_read(dev, AT91_TWI_FMR); @@ -600,11 +621,6 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev) } else if (dev->msg->flags & I2C_M_RD) { unsigned start_flags = AT91_TWI_START; - if (sr & AT91_TWI_RXRDY) { - dev_err(dev->dev, "RXRDY still set!"); - at91_twi_read(dev, AT91_TWI_RHR); - } - /* if only one byte is to be read, immediately stop transfer */ if (!has_alt_cmd && dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN)) -- cgit v0.10.2 From 2b630df721ee4c286d286ab5d5d958d34c86f067 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Mon, 26 Oct 2015 13:26:56 +0200 Subject: i2c: i801: Document Intel DNV and Broxton Add missing entries into i2c-i801 documentation and Kconfig about recently added Intel DNV and Broxton. Reported-by: Jean Delvare Signed-off-by: Jarkko Nikula Reviewed-by: Mika Westerberg Reviewed-by: Jean Delvare Signed-off-by: Wolfram Sang diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index 82f48f7..6a4b1af 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -30,6 +30,8 @@ Supported adapters: * Intel BayTrail (SOC) * Intel Sunrise Point-H (PCH) * Intel Sunrise Point-LP (PCH) + * Intel DNV (SOC) + * Intel Broxton (SOC) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 0774f18..45e1a7e 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -124,6 +124,8 @@ config I2C_I801 BayTrail (SOC) Sunrise Point-H (PCH) Sunrise Point-LP (PCH) + DNV (SOC) + Broxton (SOC) This driver can also be built as a module. If so, the module will be called i2c-i801. -- cgit v0.10.2 From 3924bac47abe2e789ffda39685aa9f70dcde02c7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 26 Oct 2015 15:09:53 +0100 Subject: i2c: cadence: enable driver for ARM64 This IP is available on Xilinx ZynqMP. Signed-off-by: Michal Simek Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 45e1a7e..e24c2b6 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -424,7 +424,7 @@ config I2C_BLACKFIN_TWI_CLK_KHZ config I2C_CADENCE tristate "Cadence I2C Controller" - depends on ARCH_ZYNQ + depends on ARCH_ZYNQ || ARM64 help Say yes here to select Cadence I2C Host Controller. This controller is e.g. used by Xilinx Zynq. -- cgit v0.10.2 From 630bc46eaf73ead886fea16a8d06731990ab00d8 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 29 Oct 2015 08:25:48 +0100 Subject: MAINTAINERS: i2c: mark also subdirectories as maintained Otherwise get_maintainer.pl will fall back to git history and CC more people than needed. Signed-off-by: Wolfram Sang Acked-by: Lee Jones diff --git a/MAINTAINERS b/MAINTAINERS index 2f23aab..c3f01dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5090,6 +5090,7 @@ S: Maintained F: Documentation/devicetree/bindings/i2c/ F: Documentation/i2c/ F: drivers/i2c/ +F: drivers/i2c/*/ F: include/linux/i2c.h F: include/linux/i2c-*.h F: include/uapi/linux/i2c.h -- cgit v0.10.2 From 14cbc1d0e29667b0c01c9202fcf8ac31893f7daa Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 25 Oct 2015 16:31:24 +0100 Subject: MAINTAINERS: i2c: drop i2c-pnx maintainer Vitaly last acked patch was in 2010. He moved on probably... Signed-off-by: Wolfram Sang Cc: Vitaly Wool diff --git a/MAINTAINERS b/MAINTAINERS index c3f01dc..e362593 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8263,12 +8263,6 @@ M: "Rafael J. Wysocki" S: Maintained F: drivers/pnp/ -PNXxxxx I2C DRIVER -M: Vitaly Wool -L: linux-i2c@vger.kernel.org -S: Maintained -F: drivers/i2c/busses/i2c-pnx.c - PPP PROTOCOL DRIVERS AND COMPRESSORS M: Paul Mackerras L: linux-ppp@vger.kernel.org -- cgit v0.10.2 From 77133e1c0352b42af8017d7618dcf8e49452613b Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 25 Oct 2015 16:20:59 +0100 Subject: i2c: pnx: remove superfluous assignment smatch rightfully says: drivers/i2c/busses/i2c-pnx.c:499 i2c_pnx_xfer warn: unused return: stat = ioread32() Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index cdbf632..1b8bf36 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c @@ -496,7 +496,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) struct i2c_msg *pmsg; int rc = 0, completed = 0, i; struct i2c_pnx_algo_data *alg_data = adap->algo_data; - u32 stat = ioread32(I2C_REG_STS(alg_data)); + u32 stat; dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", -- cgit v0.10.2 From 75ecc64ef5a1f310fc80f732ad8cfb7e1bdc59d5 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 30 Oct 2015 12:30:06 +0100 Subject: i2c: rcar: Revert the latest refactoring series This whole series caused sometimes timeouts and even OOPSes on some r8a7791 Koelsch boards. We need to understand and fix those first. Revert "i2c: rcar: clean up after refactoring" Revert "i2c: rcar: revoke START request early" Revert "i2c: rcar: check master irqs before slave irqs" Revert "i2c: rcar: don't issue stop when HW does it automatically" Revert "i2c: rcar: init new messages in irq" Revert "i2c: rcar: refactor setup of a msg" Revert "i2c: rcar: remove spinlock" Revert "i2c: rcar: remove unused IOERROR state" Revert "i2c: rcar: rework hw init" Signed-off-by: Wolfram Sang Signed-off-by: Wolfram Sang diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c index bbf3b25..09bdce9 100644 --- a/drivers/i2c/busses/i2c-rcar.c +++ b/drivers/i2c/busses/i2c-rcar.c @@ -1,8 +1,7 @@ /* * Driver for the Renesas RCar I2C unit * - * Copyright (C) 2014-15 Wolfram Sang - * Copyright (C) 2011-2015 Renesas Electronics Corporation + * Copyright (C) 2014 Wolfram Sang * * Copyright (C) 2012-14 Renesas Solutions Corp. * Kuninori Morimoto @@ -10,6 +9,9 @@ * This file is based on the drivers/i2c/busses/i2c-sh7760.c * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss * + * This file used out-of-tree driver i2c-rcar.c + * Copyright (C) 2011-2012 Renesas Electronics Corporation + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -31,6 +33,7 @@ #include #include #include +#include /* register offsets */ #define ICSCR 0x00 /* slave ctrl */ @@ -81,7 +84,6 @@ #define RCAR_BUS_PHASE_START (MDBS | MIE | ESG) #define RCAR_BUS_PHASE_DATA (MDBS | MIE) -#define RCAR_BUS_MASK_DATA (~(ESG | FSB) & 0xFF) #define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB) #define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE) @@ -92,6 +94,7 @@ #define RCAR_IRQ_ACK_RECV (~(MAT | MDR) & 0xFF) #define ID_LAST_MSG (1 << 0) +#define ID_IOERROR (1 << 1) #define ID_DONE (1 << 2) #define ID_ARBLOST (1 << 3) #define ID_NACK (1 << 4) @@ -105,10 +108,10 @@ enum rcar_i2c_type { struct rcar_i2c_priv { void __iomem *io; struct i2c_adapter adap; - struct i2c_msg *msg; - int msgs_left; + struct i2c_msg *msg; struct clk *clk; + spinlock_t lock; wait_queue_head_t wait; int pos; @@ -141,10 +144,9 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv) { /* reset master mode */ rcar_i2c_write(priv, ICMIER, 0); - rcar_i2c_write(priv, ICMCR, MDBS); + rcar_i2c_write(priv, ICMCR, 0); rcar_i2c_write(priv, ICMSR, 0); - /* start clock */ - rcar_i2c_write(priv, ICCCR, priv->icccr); + rcar_i2c_write(priv, ICMAR, 0); } static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv) @@ -243,7 +245,9 @@ scgd_find: dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n", scl, bus_speed, clk_get_rate(priv->clk), round, cdf, scgd); - /* keep icccr value */ + /* + * keep icccr value + */ priv->icccr = scgd << cdf_width | cdf; return 0; @@ -253,24 +257,12 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv) { int read = !!rcar_i2c_is_recv(priv); - priv->pos = 0; - priv->flags = 0; - if (priv->msgs_left == 1) - rcar_i2c_flags_set(priv, ID_LAST_MSG); - rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read); rcar_i2c_write(priv, ICMSR, 0); rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START); rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND); } -static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv) -{ - priv->msg++; - priv->msgs_left--; - rcar_i2c_prepare_msg(priv); -} - /* * interrupt functions */ @@ -278,10 +270,21 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) { struct i2c_msg *msg = priv->msg; - /* FIXME: sometimes, unknown interrupt happened. Do nothing */ + /* + * FIXME + * sometimes, unknown interrupt happened. + * Do nothing + */ if (!(msr & MDE)) return 0; + /* + * If address transfer phase finished, + * goto data phase. + */ + if (msr & MAT) + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); + if (priv->pos < msg->len) { /* * Prepare next data to ICRXTX register. @@ -302,17 +305,21 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr) * [ICRXTX] -> [SHIFT] -> [I2C bus] */ - if (priv->flags & ID_LAST_MSG) { + if (priv->flags & ID_LAST_MSG) /* * If current msg is the _LAST_ msg, * prepare stop condition here. * ID_DONE will be set on STOP irq. */ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); - } else { - rcar_i2c_next_msg(priv); - return 0; - } + else + /* + * If current msg is _NOT_ last msg, + * it doesn't call stop phase. + * thus, there is no STOP irq. + * return ID_DONE here. + */ + return ID_DONE; } rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND); @@ -324,30 +331,39 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr) { struct i2c_msg *msg = priv->msg; - /* FIXME: sometimes, unknown interrupt happened. Do nothing */ + /* + * FIXME + * sometimes, unknown interrupt happened. + * Do nothing + */ if (!(msr & MDR)) return 0; if (msr & MAT) { - /* Address transfer phase finished, but no data at this point. */ + /* + * Address transfer phase finished, + * but, there is no data at this point. + * Do nothing. + */ } else if (priv->pos < msg->len) { - /* get received data */ + /* + * get received data + */ msg->buf[priv->pos] = rcar_i2c_read(priv, ICRXTX); priv->pos++; } /* - * If next received data is the _LAST_, go to STOP phase. Might be - * overwritten by REP START when setting up a new msg. Not elegant - * but the only stable sequence for REP START I have found so far. + * If next received data is the _LAST_, + * go to STOP phase, + * otherwise, go to DATA phase. */ if (priv->pos + 1 >= msg->len) rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); - - if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG)) - rcar_i2c_next_msg(priv); else - rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV); + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA); + + rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV); return 0; } @@ -410,21 +426,22 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) static irqreturn_t rcar_i2c_irq(int irq, void *ptr) { struct rcar_i2c_priv *priv = ptr; - u32 msr, val; + irqreturn_t result = IRQ_HANDLED; + u32 msr; - /* Clear START or STOP as soon as we can */ - val = rcar_i2c_read(priv, ICMCR); - rcar_i2c_write(priv, ICMCR, val & RCAR_BUS_MASK_DATA); + /*-------------- spin lock -----------------*/ + spin_lock(&priv->lock); + + if (rcar_i2c_slave_irq(priv)) + goto exit; msr = rcar_i2c_read(priv, ICMSR); /* Only handle interrupts that are currently enabled */ msr &= rcar_i2c_read(priv, ICMIER); if (!msr) { - if (rcar_i2c_slave_irq(priv)) - return IRQ_HANDLED; - - return IRQ_NONE; + result = IRQ_NONE; + goto exit; } /* Arbitration lost */ @@ -435,7 +452,8 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) /* Nack */ if (msr & MNR) { - /* HW automatically sends STOP after received NACK */ + /* go to stop phase */ + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP); rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP); rcar_i2c_flags_set(priv, ID_NACK); goto out; @@ -443,7 +461,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr) /* Stop */ if (msr & MST) { - priv->msgs_left--; /* The last message also made it */ rcar_i2c_flags_set(priv, ID_DONE); goto out; } @@ -460,7 +477,11 @@ out: wake_up(&priv->wait); } - return IRQ_HANDLED; +exit: + spin_unlock(&priv->lock); + /*-------------- spin unlock -----------------*/ + + return result; } static int rcar_i2c_master_xfer(struct i2c_adapter *adap, @@ -469,11 +490,22 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, { struct rcar_i2c_priv *priv = i2c_get_adapdata(adap); struct device *dev = rcar_i2c_priv_to_dev(priv); + unsigned long flags; int i, ret; - long time_left; + long timeout; pm_runtime_get_sync(dev); + /*-------------- spin lock -----------------*/ + spin_lock_irqsave(&priv->lock, flags); + + rcar_i2c_init(priv); + /* start clock */ + rcar_i2c_write(priv, ICCCR, priv->icccr); + + spin_unlock_irqrestore(&priv->lock, flags); + /*-------------- spin unlock -----------------*/ + ret = rcar_i2c_bus_barrier(priv); if (ret < 0) goto out; @@ -482,28 +514,48 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, /* This HW can't send STOP after address phase */ if (msgs[i].len == 0) { ret = -EOPNOTSUPP; - goto out; + break; } - } - /* init data */ - priv->msg = msgs; - priv->msgs_left = num; - - rcar_i2c_prepare_msg(priv); - - time_left = wait_event_timeout(priv->wait, - rcar_i2c_flags_has(priv, ID_DONE), - num * adap->timeout); - if (!time_left) { - rcar_i2c_init(priv); - ret = -ETIMEDOUT; - } else if (rcar_i2c_flags_has(priv, ID_NACK)) { - ret = -ENXIO; - } else if (rcar_i2c_flags_has(priv, ID_ARBLOST)) { - ret = -EAGAIN; - } else { - ret = num - priv->msgs_left; /* The number of transfer */ + /*-------------- spin lock -----------------*/ + spin_lock_irqsave(&priv->lock, flags); + + /* init each data */ + priv->msg = &msgs[i]; + priv->pos = 0; + priv->flags = 0; + if (i == num - 1) + rcar_i2c_flags_set(priv, ID_LAST_MSG); + + rcar_i2c_prepare_msg(priv); + + spin_unlock_irqrestore(&priv->lock, flags); + /*-------------- spin unlock -----------------*/ + + timeout = wait_event_timeout(priv->wait, + rcar_i2c_flags_has(priv, ID_DONE), + adap->timeout); + if (!timeout) { + ret = -ETIMEDOUT; + break; + } + + if (rcar_i2c_flags_has(priv, ID_NACK)) { + ret = -ENXIO; + break; + } + + if (rcar_i2c_flags_has(priv, ID_ARBLOST)) { + ret = -EAGAIN; + break; + } + + if (rcar_i2c_flags_has(priv, ID_IOERROR)) { + ret = -EIO; + break; + } + + ret = i + 1; /* The number of transfer */ } out: pm_runtime_put(dev); @@ -612,10 +664,9 @@ static int rcar_i2c_probe(struct platform_device *pdev) if (IS_ERR(priv->io)) return PTR_ERR(priv->io); - rcar_i2c_init(priv); - irq = platform_get_irq(pdev, 0); init_waitqueue_head(&priv->wait); + spin_lock_init(&priv->lock); adap = &priv->adap; adap->nr = pdev->id; -- cgit v0.10.2