From 097d06192caf6db29ff6b8a9117cfaf7a514821f Mon Sep 17 00:00:00 2001 From: Kamlakant Patel Date: Tue, 9 Aug 2016 19:35:22 +0530 Subject: spi: xlp: Add ACPI support for Vulcan SPI controller Add ACPI support for SPI controller on Broadcom Vulcan ARM64. Signed-off-by: Kamlakant Patel Signed-off-by: Mark Brown diff --git a/drivers/spi/spi-xlp.c b/drivers/spi/spi-xlp.c index 8f04fec..4071a72 100644 --- a/drivers/spi/spi-xlp.c +++ b/drivers/spi/spi-xlp.c @@ -11,6 +11,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#include #include #include #include @@ -405,8 +406,9 @@ static int xlp_spi_probe(struct platform_device *pdev) clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "could not get spi clock\n"); - return -ENODEV; + return PTR_ERR(clk); } + xspi->spi_clk = clk_get_rate(clk); master = spi_alloc_master(&pdev->dev, 0); @@ -437,6 +439,14 @@ static int xlp_spi_probe(struct platform_device *pdev) return 0; } +#ifdef CONFIG_ACPI +static const struct acpi_device_id xlp_spi_acpi_match[] = { + { "BRCM900D", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(acpi, xlp_spi_acpi_match); +#endif + static const struct of_device_id xlp_spi_dt_id[] = { { .compatible = "netlogic,xlp832-spi" }, { }, @@ -447,6 +457,7 @@ static struct platform_driver xlp_spi_driver = { .driver = { .name = "xlp-spi", .of_match_table = xlp_spi_dt_id, + .acpi_match_table = ACPI_PTR(xlp_spi_acpi_match), }, }; module_platform_driver(xlp_spi_driver); -- cgit v0.10.2 From 5720ec0a6d2605930934f3f154b048e8be3d8a40 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Wed, 17 Aug 2016 15:22:37 +0530 Subject: spi: spi-ti-qspi: Add DMA support for QSPI mmap read Use mem-to-mem DMA to read from flash when reading in mmap mode. This gives improved read performance and reduces CPU load. With this patch the raw-read throughput is ~16MB/s on DRA74 EVM. And CPU load is <20%. UBIFS read throughput ~13 MB/s. Signed-off-by: Vignesh R Signed-off-by: Mark Brown diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index ac0b072..caeac66 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -41,6 +41,8 @@ struct ti_qspi_regs { }; struct ti_qspi { + struct completion transfer_complete; + /* list synchronization */ struct mutex list_lock; @@ -54,6 +56,9 @@ struct ti_qspi { struct ti_qspi_regs ctx_reg; + dma_addr_t mmap_phys_base; + struct dma_chan *rx_chan; + u32 spi_max_frequency; u32 cmd; u32 dc; @@ -379,6 +384,72 @@ static int qspi_transfer_msg(struct ti_qspi *qspi, struct spi_transfer *t, return 0; } +static void ti_qspi_dma_callback(void *param) +{ + struct ti_qspi *qspi = param; + + complete(&qspi->transfer_complete); +} + +static int ti_qspi_dma_xfer(struct ti_qspi *qspi, dma_addr_t dma_dst, + dma_addr_t dma_src, size_t len) +{ + struct dma_chan *chan = qspi->rx_chan; + struct dma_device *dma_dev = chan->device; + dma_cookie_t cookie; + enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; + struct dma_async_tx_descriptor *tx; + int ret; + + tx = dma_dev->device_prep_dma_memcpy(chan, dma_dst, dma_src, + len, flags); + if (!tx) { + dev_err(qspi->dev, "device_prep_dma_memcpy error\n"); + return -EIO; + } + + tx->callback = ti_qspi_dma_callback; + tx->callback_param = qspi; + cookie = tx->tx_submit(tx); + + ret = dma_submit_error(cookie); + if (ret) { + dev_err(qspi->dev, "dma_submit_error %d\n", cookie); + return -EIO; + } + + dma_async_issue_pending(chan); + ret = wait_for_completion_timeout(&qspi->transfer_complete, + msecs_to_jiffies(len)); + if (ret <= 0) { + dmaengine_terminate_sync(chan); + dev_err(qspi->dev, "DMA wait_for_completion_timeout\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static int ti_qspi_dma_xfer_sg(struct ti_qspi *qspi, struct sg_table rx_sg, + loff_t from) +{ + struct scatterlist *sg; + dma_addr_t dma_src = qspi->mmap_phys_base + from; + dma_addr_t dma_dst; + int i, len, ret; + + for_each_sg(rx_sg.sgl, sg, rx_sg.nents, i) { + dma_dst = sg_dma_address(sg); + len = sg_dma_len(sg); + ret = ti_qspi_dma_xfer(qspi, dma_dst, dma_src, len); + if (ret) + return ret; + dma_src += len; + } + + return 0; +} + static void ti_qspi_enable_memory_map(struct spi_device *spi) { struct ti_qspi *qspi = spi_master_get_devdata(spi->master); @@ -426,7 +497,7 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi, QSPI_SPI_SETUP_REG(spi->chip_select)); } -static int ti_qspi_spi_flash_read(struct spi_device *spi, +static int ti_qspi_spi_flash_read(struct spi_device *spi, struct spi_flash_read_message *msg) { struct ti_qspi *qspi = spi_master_get_devdata(spi->master); @@ -437,9 +508,23 @@ static int ti_qspi_spi_flash_read(struct spi_device *spi, if (!qspi->mmap_enabled) ti_qspi_enable_memory_map(spi); ti_qspi_setup_mmap_read(spi, msg); - memcpy_fromio(msg->buf, qspi->mmap_base + msg->from, msg->len); + + if (qspi->rx_chan) { + if (msg->cur_msg_mapped) { + ret = ti_qspi_dma_xfer_sg(qspi, msg->rx_sg, msg->from); + if (ret) + goto err_unlock; + } else { + dev_err(qspi->dev, "Invalid address for DMA\n"); + ret = -EIO; + goto err_unlock; + } + } else { + memcpy_fromio(msg->buf, qspi->mmap_base + msg->from, msg->len); + } msg->retlen = msg->len; +err_unlock: mutex_unlock(&qspi->list_lock); return ret; @@ -536,6 +621,7 @@ static int ti_qspi_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; u32 max_freq; int ret = 0, num_cs, irq; + dma_cap_mask_t mask; master = spi_alloc_master(&pdev->dev, sizeof(*qspi)); if (!master) @@ -550,6 +636,7 @@ static int ti_qspi_probe(struct platform_device *pdev) master->dev.of_node = pdev->dev.of_node; master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) | SPI_BPW_MASK(8); + master->spi_flash_read = ti_qspi_spi_flash_read; if (!of_property_read_u32(np, "num-cs", &num_cs)) master->num_chipselect = num_cs; @@ -592,17 +679,6 @@ static int ti_qspi_probe(struct platform_device *pdev) goto free_master; } - if (res_mmap) { - qspi->mmap_base = devm_ioremap_resource(&pdev->dev, - res_mmap); - master->spi_flash_read = ti_qspi_spi_flash_read; - if (IS_ERR(qspi->mmap_base)) { - dev_err(&pdev->dev, - "falling back to PIO mode\n"); - master->spi_flash_read = NULL; - } - } - qspi->mmap_enabled = false; if (of_property_read_bool(np, "syscon-chipselects")) { qspi->ctrl_base = @@ -633,11 +709,37 @@ static int ti_qspi_probe(struct platform_device *pdev) if (!of_property_read_u32(np, "spi-max-frequency", &max_freq)) qspi->spi_max_frequency = max_freq; - ret = devm_spi_register_master(&pdev->dev, master); - if (ret) - goto free_master; + dma_cap_zero(mask); + dma_cap_set(DMA_MEMCPY, mask); - return 0; + qspi->rx_chan = dma_request_chan_by_mask(&mask); + if (!qspi->rx_chan) { + dev_err(qspi->dev, + "No Rx DMA available, trying mmap mode\n"); + ret = 0; + goto no_dma; + } + master->dma_rx = qspi->rx_chan; + init_completion(&qspi->transfer_complete); + if (res_mmap) + qspi->mmap_phys_base = (dma_addr_t)res_mmap->start; + +no_dma: + if (!qspi->rx_chan && res_mmap) { + qspi->mmap_base = devm_ioremap_resource(&pdev->dev, res_mmap); + if (IS_ERR(qspi->mmap_base)) { + dev_info(&pdev->dev, + "mmap failed with error %ld using PIO mode\n", + PTR_ERR(qspi->mmap_base)); + qspi->mmap_base = NULL; + master->spi_flash_read = NULL; + } + } + qspi->mmap_enabled = false; + + ret = devm_spi_register_master(&pdev->dev, master); + if (!ret) + return 0; free_master: spi_master_put(master); @@ -656,6 +758,9 @@ static int ti_qspi_remove(struct platform_device *pdev) pm_runtime_put_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); + if (qspi->rx_chan) + dma_release_channel(qspi->rx_chan); + return 0; } -- cgit v0.10.2 From 1ae4ec1415a98328b693db588f30d02bb3ca73aa Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 18 Aug 2016 19:34:25 +0200 Subject: spi: spi-txx9: Add missing clock (un)prepare calls for CCF While the custom minimal TXx9 clock implementation doesn't need or use clock (un)prepare calls (they are dummies if !CONFIG_HAVE_CLK_PREPARE), they are mandatory when using the Common Clock Framework. Hence add them, to prepare for the advent of CCF. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown diff --git a/drivers/spi/spi-txx9.c b/drivers/spi/spi-txx9.c index 7492ea3..51759d3 100644 --- a/drivers/spi/spi-txx9.c +++ b/drivers/spi/spi-txx9.c @@ -346,7 +346,7 @@ static int txx9spi_probe(struct platform_device *dev) c->clk = NULL; goto exit; } - ret = clk_enable(c->clk); + ret = clk_prepare_enable(c->clk); if (ret) { c->clk = NULL; goto exit; @@ -395,7 +395,7 @@ static int txx9spi_probe(struct platform_device *dev) exit_busy: ret = -EBUSY; exit: - clk_disable(c->clk); + clk_disable_unprepare(c->clk); spi_master_put(master); return ret; } @@ -406,7 +406,7 @@ static int txx9spi_remove(struct platform_device *dev) struct txx9spi *c = spi_master_get_devdata(master); flush_work(&c->work); - clk_disable(c->clk); + clk_disable_unprepare(c->clk); return 0; } -- cgit v0.10.2 From 2a4635ea1d39affd8bc9d33b062b03f33c910889 Mon Sep 17 00:00:00 2001 From: Jorge Ramirez-Ortiz Date: Wed, 7 Sep 2016 17:43:00 +0200 Subject: spi: tools: enable CROSS_COMPILE in Makefile Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Mark Brown diff --git a/tools/spi/Makefile b/tools/spi/Makefile index cd0db62..3815b18 100644 --- a/tools/spi/Makefile +++ b/tools/spi/Makefile @@ -1,3 +1,5 @@ +CC = $(CROSS_COMPILE)gcc + all: spidev_test spidev_fdx clean: -- cgit v0.10.2