From 712424fd95134bf88d27f3885389fe6ab13f34ac Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 20 Feb 2009 02:31:58 +0100 Subject: [ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon On pre-A0 revisions of the mv78xx0 SoC, the third and fourth ethernet interface are not brought out to pins, but are internally cross-connected, so if we run on pre-A0 silicon, we'll force eth2 and eth3 to PHYless mode. Signed-off-by: Lennert Buytenhek diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 538f8f4..15f9913 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -430,9 +431,22 @@ static struct platform_device mv78xx0_ge10 = { void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) { + u32 dev, rev; + eth_data->shared = &mv78xx0_ge10_shared; mv78xx0_ge10.dev.platform_data = eth_data; + /* + * On the Z0, ge10 and ge11 are internally connected back + * to back, and not brought out. + */ + mv78xx0_pcie_id(&dev, &rev); + if (dev == MV78X00_Z0_DEV_ID) { + eth_data->phy_addr = MV643XX_ETH_PHY_NONE; + eth_data->speed = SPEED_1000; + eth_data->duplex = DUPLEX_FULL; + } + platform_device_register(&mv78xx0_ge10_shared); platform_device_register(&mv78xx0_ge10); } @@ -484,9 +498,22 @@ static struct platform_device mv78xx0_ge11 = { void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) { + u32 dev, rev; + eth_data->shared = &mv78xx0_ge11_shared; mv78xx0_ge11.dev.platform_data = eth_data; + /* + * On the Z0, ge10 and ge11 are internally connected back + * to back, and not brought out. + */ + mv78xx0_pcie_id(&dev, &rev); + if (dev == MV78X00_Z0_DEV_ID) { + eth_data->phy_addr = MV643XX_ETH_PHY_NONE; + eth_data->speed = SPEED_1000; + eth_data->duplex = DUPLEX_FULL; + } + platform_device_register(&mv78xx0_ge11_shared); platform_device_register(&mv78xx0_ge11); } -- cgit v0.10.2